JPS57105900A - Duplicated memory control system - Google Patents

Duplicated memory control system

Info

Publication number
JPS57105900A
JPS57105900A JP55183472A JP18347280A JPS57105900A JP S57105900 A JPS57105900 A JP S57105900A JP 55183472 A JP55183472 A JP 55183472A JP 18347280 A JP18347280 A JP 18347280A JP S57105900 A JPS57105900 A JP S57105900A
Authority
JP
Japan
Prior art keywords
data
bit
alternate
specific
memory area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55183472A
Other languages
Japanese (ja)
Other versions
JPS6357819B2 (en
Inventor
Takashi Ii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55183472A priority Critical patent/JPS57105900A/en
Publication of JPS57105900A publication Critical patent/JPS57105900A/en
Publication of JPS6357819B2 publication Critical patent/JPS6357819B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Abstract

PURPOSE:To use a readout data with inversion, by storing the same data with a positive polarity to a memory area and it with a negative polarity to another memory area respectively, and switching the data in other area, if the readout data of one memory area is failed. CONSTITUTION:EOR gates E0-E3 are connected to the output of memory units M0-M3, one input is tied commonly and connected to a specific ont bit being the address bit for selection of primary/alternate of an address ADRS, and written data has an opposite polarity from the primary side at an alternate side. When a specific address bit is taken as 0 and the primary side is in use, when the data output system of the memory unit M2 is failed to be fixed to a logical 1, an odd number parity error is detected, the specific bit is switched to an alternate side, and the final output data can be read out correctly from the EOR gate.
JP55183472A 1980-12-24 1980-12-24 Duplicated memory control system Granted JPS57105900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55183472A JPS57105900A (en) 1980-12-24 1980-12-24 Duplicated memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55183472A JPS57105900A (en) 1980-12-24 1980-12-24 Duplicated memory control system

Publications (2)

Publication Number Publication Date
JPS57105900A true JPS57105900A (en) 1982-07-01
JPS6357819B2 JPS6357819B2 (en) 1988-11-14

Family

ID=16136386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55183472A Granted JPS57105900A (en) 1980-12-24 1980-12-24 Duplicated memory control system

Country Status (1)

Country Link
JP (1) JPS57105900A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0533608A2 (en) * 1991-09-18 1993-03-24 International Business Machines Corporation Method and apparatus for ensuring the recoverability of vital data in a data processing system
US9043655B2 (en) 2012-06-29 2015-05-26 Fujitsu Limited Apparatus and control method

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE463225B (en) * 1988-05-25 1990-10-22 Roger Svensson DEVELOPMENT PARTS DEVICE
JPH0375316U (en) * 1989-11-27 1991-07-29

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0533608A2 (en) * 1991-09-18 1993-03-24 International Business Machines Corporation Method and apparatus for ensuring the recoverability of vital data in a data processing system
EP0533608A3 (en) * 1991-09-18 1994-06-22 Ibm Method and apparatus for ensuring the recoverability of vital data in a data processing system
US9043655B2 (en) 2012-06-29 2015-05-26 Fujitsu Limited Apparatus and control method

Also Published As

Publication number Publication date
JPS6357819B2 (en) 1988-11-14

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