JPS57111890A - Storage device - Google Patents

Storage device

Info

Publication number
JPS57111890A
JPS57111890A JP55187268A JP18726880A JPS57111890A JP S57111890 A JPS57111890 A JP S57111890A JP 55187268 A JP55187268 A JP 55187268A JP 18726880 A JP18726880 A JP 18726880A JP S57111890 A JPS57111890 A JP S57111890A
Authority
JP
Japan
Prior art keywords
data
output
memories
parity
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55187268A
Other languages
Japanese (ja)
Inventor
Kazuya Kobayashi
Masaki Ogawa
Hide Miyasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55187268A priority Critical patent/JPS57111890A/en
Publication of JPS57111890A publication Critical patent/JPS57111890A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)

Abstract

PURPOSE:To increase not only the reliability but the availability, by securing a duouble structure for a memory to reduce the error. CONSTITUTION:Primary data memories 11-15 are provided along with alternate data memories 21-25, and the same data is written into these memories in the writing mode. Either one of these data is delivered via registers 81-85 to receive a parity checkthrough parity checking circuits 3 and 4. If an error is detected through the parity check, the output of the circuit 3 or 4 is preserved at a flip-flop 5 by a proper timing signal T. The output data is switched by the output the flip-flop 5 and then fetched into holding registers 81-85 after a delay of a certain time.
JP55187268A 1980-12-29 1980-12-29 Storage device Pending JPS57111890A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55187268A JPS57111890A (en) 1980-12-29 1980-12-29 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55187268A JPS57111890A (en) 1980-12-29 1980-12-29 Storage device

Publications (1)

Publication Number Publication Date
JPS57111890A true JPS57111890A (en) 1982-07-12

Family

ID=16203005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55187268A Pending JPS57111890A (en) 1980-12-29 1980-12-29 Storage device

Country Status (1)

Country Link
JP (1) JPS57111890A (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5140592A (en) * 1990-03-02 1992-08-18 Sf2 Corporation Disk array system
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5212785A (en) * 1990-04-06 1993-05-18 Micro Technology, Inc. Apparatus and method for controlling data flow between a computer and memory devices
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5233692A (en) * 1990-04-06 1993-08-03 Micro Technology, Inc. Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5325497A (en) * 1990-03-29 1994-06-28 Micro Technology, Inc. Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5388243A (en) * 1990-03-09 1995-02-07 Mti Technology Corporation Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
US5469453A (en) * 1990-03-02 1995-11-21 Mti Technology Corporation Data corrections applicable to redundant arrays of independent disks
US5956524A (en) * 1990-04-06 1999-09-21 Micro Technology Inc. System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
JP2008154502A (en) * 2006-12-22 2008-07-10 Niigata Urban Flowering & Greenery Foundation Lawn protecting mat, and lawn protecting structure using the same

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5349686A (en) * 1989-06-27 1994-09-20 Mti Technology Corporation Method and circuit for programmably selecting a variable sequence of elements using write-back
US5146574A (en) * 1989-06-27 1992-09-08 Sf2 Corporation Method and circuit for programmable selecting a variable sequence of element using write-back
US5315708A (en) * 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5140592A (en) * 1990-03-02 1992-08-18 Sf2 Corporation Disk array system
US5469453A (en) * 1990-03-02 1995-11-21 Mti Technology Corporation Data corrections applicable to redundant arrays of independent disks
US5388243A (en) * 1990-03-09 1995-02-07 Mti Technology Corporation Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
US5325497A (en) * 1990-03-29 1994-06-28 Micro Technology, Inc. Method and apparatus for assigning signatures to identify members of a set of mass of storage devices
US5202856A (en) * 1990-04-05 1993-04-13 Micro Technology, Inc. Method and apparatus for simultaneous, interleaved access of multiple memories by multiple ports
US5461723A (en) * 1990-04-05 1995-10-24 Mit Technology Corp. Dual channel data block transfer bus
US5212785A (en) * 1990-04-06 1993-05-18 Micro Technology, Inc. Apparatus and method for controlling data flow between a computer and memory devices
US5361347A (en) * 1990-04-06 1994-11-01 Mti Technology Corporation Resource management in a multiple resource system where each resource includes an availability state stored in a memory of the resource
US5233692A (en) * 1990-04-06 1993-08-03 Micro Technology, Inc. Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
US5454085A (en) * 1990-04-06 1995-09-26 Mti Technology Corporation Method and apparatus for an enhanced computer system interface
US5214778A (en) * 1990-04-06 1993-05-25 Micro Technology, Inc. Resource management in a multiple resource system
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5956524A (en) * 1990-04-06 1999-09-21 Micro Technology Inc. System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
JP2008154502A (en) * 2006-12-22 2008-07-10 Niigata Urban Flowering & Greenery Foundation Lawn protecting mat, and lawn protecting structure using the same

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