JPS57127997A - Semiconductor integrated storage device - Google Patents

Semiconductor integrated storage device

Info

Publication number
JPS57127997A
JPS57127997A JP56012507A JP1250781A JPS57127997A JP S57127997 A JPS57127997 A JP S57127997A JP 56012507 A JP56012507 A JP 56012507A JP 1250781 A JP1250781 A JP 1250781A JP S57127997 A JPS57127997 A JP S57127997A
Authority
JP
Japan
Prior art keywords
parity bit
address
input data
section
sets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56012507A
Other languages
Japanese (ja)
Inventor
Yasuhiko Nagahashi
Yasuo Akatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56012507A priority Critical patent/JPS57127997A/en
Publication of JPS57127997A publication Critical patent/JPS57127997A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To achieve a simple and efficient device, by integrating a parity bit generating section and a parity bit storage section on one semiconductor substrate, enabling addressing with the same address, and eliminating the need for two systems of storage devices for data storage and parity check. CONSTITUTION:A parity bit is generated at a generating section 5 in response to N sets of input data applied to N(N>=1) sets of input data terminals D1, and input data and parity bit are individually stored in a data storage section 6 of a storage section 8 and a parity bit storage section 7. Input data and the parity bit corresponding to the data are written in and read out with the same address by the address control signal of an address control section 9 generated with the address signal 7 from M(M>=1) sets of address terminals A, and they are integrated on one semiconductor substrate.
JP56012507A 1981-01-30 1981-01-30 Semiconductor integrated storage device Pending JPS57127997A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56012507A JPS57127997A (en) 1981-01-30 1981-01-30 Semiconductor integrated storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56012507A JPS57127997A (en) 1981-01-30 1981-01-30 Semiconductor integrated storage device

Publications (1)

Publication Number Publication Date
JPS57127997A true JPS57127997A (en) 1982-08-09

Family

ID=11807255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56012507A Pending JPS57127997A (en) 1981-01-30 1981-01-30 Semiconductor integrated storage device

Country Status (1)

Country Link
JP (1) JPS57127997A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5958698A (en) * 1982-09-28 1984-04-04 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit storage device
JPS59104800A (en) * 1982-12-06 1984-06-16 Usac Electronics Ind Co Ltd Parity check system of picture memory
JPS59172200A (en) * 1983-01-03 1984-09-28 テキサス・インスツルメンツ・インコ−ポレイテツド Memory device
JPS60150285A (en) * 1983-08-31 1985-08-07 テキサス インスツルメンツ インコ−ポレイテツド Integrated circuit memory
JP2009043389A (en) * 2007-08-08 2009-02-26 Hynix Semiconductor Inc Flash memory device and method of operating the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529335A (en) * 1975-07-11 1977-01-24 Mitsubishi Electric Corp Parity checl system
JPS5376637A (en) * 1976-12-17 1978-07-07 Nec Corp Diagnostic system of memory device only for reading
JPS53139437A (en) * 1977-05-12 1978-12-05 Nec Corp Memory device
JPS5497334A (en) * 1978-01-18 1979-08-01 Nec Corp Nonvolatile semiconductor memory device
JPS5580895A (en) * 1978-12-08 1980-06-18 Hitachi Ltd Memory system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529335A (en) * 1975-07-11 1977-01-24 Mitsubishi Electric Corp Parity checl system
JPS5376637A (en) * 1976-12-17 1978-07-07 Nec Corp Diagnostic system of memory device only for reading
JPS53139437A (en) * 1977-05-12 1978-12-05 Nec Corp Memory device
JPS5497334A (en) * 1978-01-18 1979-08-01 Nec Corp Nonvolatile semiconductor memory device
JPS5580895A (en) * 1978-12-08 1980-06-18 Hitachi Ltd Memory system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5958698A (en) * 1982-09-28 1984-04-04 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit storage device
JPS59104800A (en) * 1982-12-06 1984-06-16 Usac Electronics Ind Co Ltd Parity check system of picture memory
JPH0421221B2 (en) * 1982-12-06 1992-04-09 Pfu Ltd
JPS59172200A (en) * 1983-01-03 1984-09-28 テキサス・インスツルメンツ・インコ−ポレイテツド Memory device
JPS60150285A (en) * 1983-08-31 1985-08-07 テキサス インスツルメンツ インコ−ポレイテツド Integrated circuit memory
JP2009043389A (en) * 2007-08-08 2009-02-26 Hynix Semiconductor Inc Flash memory device and method of operating the same
US8335118B2 (en) 2007-08-08 2012-12-18 Hynix Semiconductor Inc. Method of operating a flash memory device

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