JPS5699502A - Logical process input/output control - Google Patents

Logical process input/output control

Info

Publication number
JPS5699502A
JPS5699502A JP125580A JP125580A JPS5699502A JP S5699502 A JPS5699502 A JP S5699502A JP 125580 A JP125580 A JP 125580A JP 125580 A JP125580 A JP 125580A JP S5699502 A JPS5699502 A JP S5699502A
Authority
JP
Japan
Prior art keywords
output
input
process input
control device
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP125580A
Other languages
Japanese (ja)
Other versions
JPS6236242B2 (en
Inventor
Keiji Oshima
Toshihiro Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP125580A priority Critical patent/JPS5699502A/en
Publication of JPS5699502A publication Critical patent/JPS5699502A/en
Publication of JPS6236242B2 publication Critical patent/JPS6236242B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Feedback Control In General (AREA)
  • Control By Computers (AREA)

Abstract

PURPOSE:To elevate reliability of the system by providing a process input/output control device for converting a physical address and a logical address in case of the input/output access of the process input/output device. CONSTITUTION:The P I/O input/output system is constituted by providing a logical process input/output control device 4 between the application program 3 and the P I/O access device 2. This control device 4 consists of a data generating device 4-3, an information table 4-2, and a translating equipment 4-1, and has the function for converting a physical address and a logical address in case of access of the access device 2. When said control device 4 is installed, the input/output of the process can be executed by only a simple logical No. from the application program. Accordingly, as a result, reliability of the system can be elevated.
JP125580A 1980-01-11 1980-01-11 Logical process input/output control Granted JPS5699502A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP125580A JPS5699502A (en) 1980-01-11 1980-01-11 Logical process input/output control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP125580A JPS5699502A (en) 1980-01-11 1980-01-11 Logical process input/output control

Publications (2)

Publication Number Publication Date
JPS5699502A true JPS5699502A (en) 1981-08-10
JPS6236242B2 JPS6236242B2 (en) 1987-08-06

Family

ID=11496341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP125580A Granted JPS5699502A (en) 1980-01-11 1980-01-11 Logical process input/output control

Country Status (1)

Country Link
JP (1) JPS5699502A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5818752A (en) * 1981-07-24 1983-02-03 Fuji Facom Corp Operator console controlling system
JPS58222325A (en) * 1982-06-18 1983-12-24 Nec Corp System for selecting input and output port
WO1985004268A1 (en) * 1984-03-14 1985-09-26 Fanuc Ltd Programmable controller
JPS60222946A (en) * 1984-04-20 1985-11-07 Fujitsu Ltd Check system of channel mounting
JPS61131104A (en) * 1984-11-30 1986-06-18 Fuji Facom Corp Simplified system of process input and output

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120935A (en) * 1974-03-11 1975-09-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120935A (en) * 1974-03-11 1975-09-22

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5818752A (en) * 1981-07-24 1983-02-03 Fuji Facom Corp Operator console controlling system
JPH0472252B2 (en) * 1981-07-24 1992-11-17 Fuji Fuakomu Seigyo Kk
JPS58222325A (en) * 1982-06-18 1983-12-24 Nec Corp System for selecting input and output port
WO1985004268A1 (en) * 1984-03-14 1985-09-26 Fanuc Ltd Programmable controller
JPS60222946A (en) * 1984-04-20 1985-11-07 Fujitsu Ltd Check system of channel mounting
JPS61131104A (en) * 1984-11-30 1986-06-18 Fuji Facom Corp Simplified system of process input and output

Also Published As

Publication number Publication date
JPS6236242B2 (en) 1987-08-06

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