ATE536633T1 - Verfahren und einrichtung - Google Patents

Verfahren und einrichtung

Info

Publication number
ATE536633T1
ATE536633T1 AT03818592T AT03818592T ATE536633T1 AT E536633 T1 ATE536633 T1 AT E536633T1 AT 03818592 T AT03818592 T AT 03818592T AT 03818592 T AT03818592 T AT 03818592T AT E536633 T1 ATE536633 T1 AT E536633T1
Authority
AT
Austria
Prior art keywords
edge
define
semiconductor material
sacrificial layer
source
Prior art date
Application number
AT03818592T
Other languages
English (en)
Inventor
Christopher Harris
Andrei Konstantinov
Original Assignee
Cree Sweden Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cree Sweden Ab filed Critical Cree Sweden Ab
Application granted granted Critical
Publication of ATE536633T1 publication Critical patent/ATE536633T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/051Manufacture or treatment of FETs having PN junction gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/015Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/061Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D44/00Charge transfer devices
    • H10D44/40Charge-coupled devices [CCD]
    • H10D44/45Charge-coupled devices [CCD] having field effect produced by insulated gate electrodes 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Thin Film Transistor (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Diaphragms For Electromechanical Transducers (AREA)
AT03818592T 2003-09-05 2003-09-05 Verfahren und einrichtung ATE536633T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SE2003/001382 WO2005024923A1 (en) 2003-09-05 2003-09-05 Method and device

Publications (1)

Publication Number Publication Date
ATE536633T1 true ATE536633T1 (de) 2011-12-15

Family

ID=34271303

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03818592T ATE536633T1 (de) 2003-09-05 2003-09-05 Verfahren und einrichtung

Country Status (7)

Country Link
US (1) US7646060B2 (de)
EP (1) EP1665348B1 (de)
JP (1) JP4563938B2 (de)
KR (1) KR101035044B1 (de)
AT (1) ATE536633T1 (de)
AU (1) AU2003258933A1 (de)
WO (1) WO2005024923A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5655570B2 (ja) * 2011-01-06 2015-01-21 住友電気工業株式会社 半導体装置の製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5588378A (en) * 1978-12-27 1980-07-04 Hitachi Ltd Semiconductor device
US4599790A (en) * 1985-01-30 1986-07-15 Texas Instruments Incorporated Process for forming a T-shaped gate structure
JPS62106669A (ja) * 1985-11-05 1987-05-18 Fujitsu Ltd GaAs MESFETの構造とその製造方法
EP0224614B1 (de) * 1985-12-06 1990-03-14 International Business Machines Corporation Verfahren zum Herstellen eines völlig selbstjustierten Feldeffekttransistors
FR2613134B1 (fr) * 1987-03-24 1990-03-09 Labo Electronique Physique Dispositif semiconducteur du type transistor a effet de champ
JPH02135743A (ja) * 1988-11-16 1990-05-24 Toshiba Corp 電界効果トランジスタの製造方法
JP2746482B2 (ja) * 1991-02-14 1998-05-06 三菱電機株式会社 電界効果型トランジスタ及びその製造方法
SE9900358D0 (sv) * 1999-02-03 1999-02-03 Ind Mikroelektronikcentrum Ab A lateral field effect transistor of SiC, a method for production thereof and a use of such a transistor
JP2001196580A (ja) 2000-01-12 2001-07-19 Kmt Semiconductor Ltd 電界効果トランジスタの製造方法
EP1205980A1 (de) * 2000-11-07 2002-05-15 Infineon Technologies AG Verfahren zur Herstellung eines Feldeffekttransistors in einem Halbleiter-Substrat
DE10101825B4 (de) * 2001-01-17 2006-12-14 United Monolithic Semiconductors Gmbh Verfahren zur Herstellung eines Halbleiter-Bauelements mit einer T-förmigen Kontaktelektrode
US6358827B1 (en) * 2001-01-19 2002-03-19 Taiwan Semiconductor Manufacturing Company Method of forming a squared-off, vertically oriented polysilicon spacer gate
JP2003037264A (ja) * 2001-07-24 2003-02-07 Toshiba Corp 半導体装置およびその製造方法
US6620697B1 (en) 2001-09-24 2003-09-16 Koninklijke Philips Electronics N.V. Silicon carbide lateral metal-oxide semiconductor field-effect transistor having a self-aligned drift region and method for forming the same
US7531217B2 (en) * 2004-12-15 2009-05-12 Iowa State University Research Foundation, Inc. Methods for making high-temperature coatings having Pt metal modified γ-Ni +γ′-Ni3Al alloy compositions and a reactive element

Also Published As

Publication number Publication date
US7646060B2 (en) 2010-01-12
JP2007521634A (ja) 2007-08-02
KR20060057006A (ko) 2006-05-25
EP1665348B1 (de) 2011-12-07
KR101035044B1 (ko) 2011-05-19
JP4563938B2 (ja) 2010-10-20
EP1665348A1 (de) 2006-06-07
WO2005024923A1 (en) 2005-03-17
AU2003258933A1 (en) 2005-03-29
US20060252212A1 (en) 2006-11-09

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