ATE465516T1 - Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren - Google Patents

Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren

Info

Publication number
ATE465516T1
ATE465516T1 AT04766739T AT04766739T ATE465516T1 AT E465516 T1 ATE465516 T1 AT E465516T1 AT 04766739 T AT04766739 T AT 04766739T AT 04766739 T AT04766739 T AT 04766739T AT E465516 T1 ATE465516 T1 AT E465516T1
Authority
AT
Austria
Prior art keywords
field effect
effect transistors
cmos field
producing cmos
silicidation
Prior art date
Application number
AT04766739T
Other languages
English (en)
Inventor
Cyril Cabral
Meikei Ieong
Jakub Kedzierski
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE465516T1 publication Critical patent/ATE465516T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66628Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28097Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823835Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
AT04766739T 2003-09-24 2004-09-08 Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren ATE465516T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/669,898 US7183182B2 (en) 2003-09-24 2003-09-24 Method and apparatus for fabricating CMOS field effect transistors
PCT/EP2004/052086 WO2005029579A1 (en) 2003-09-24 2004-09-08 Method and apparatus for fabricating cmos field effect transistors

Publications (1)

Publication Number Publication Date
ATE465516T1 true ATE465516T1 (de) 2010-05-15

Family

ID=34313783

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04766739T ATE465516T1 (de) 2003-09-24 2004-09-08 Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren

Country Status (9)

Country Link
US (2) US7183182B2 (de)
EP (1) EP1668695B1 (de)
JP (1) JP2007534148A (de)
KR (1) KR100818898B1 (de)
CN (1) CN100419999C (de)
AT (1) ATE465516T1 (de)
DE (1) DE602004026753D1 (de)
TW (1) TWI334632B (de)
WO (1) WO2005029579A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040036129A1 (en) * 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
US7352025B2 (en) * 2003-12-08 2008-04-01 International Business Machines Corporation Semiconductor memory device with increased node capacitance
US7348265B2 (en) * 2004-03-01 2008-03-25 Texas Instruments Incorporated Semiconductor device having a silicided gate electrode and method of manufacture therefor
JP4116990B2 (ja) * 2004-09-28 2008-07-09 富士通株式会社 電界効果型トランジスタおよびその製造方法
JP2006114681A (ja) * 2004-10-14 2006-04-27 Nec Electronics Corp 半導体装置及びその製造方法
JP2006120718A (ja) * 2004-10-19 2006-05-11 Toshiba Corp 半導体装置およびその製造方法
US7611943B2 (en) * 2004-10-20 2009-11-03 Texas Instruments Incorporated Transistors, integrated circuits, systems, and processes of manufacture with improved work function modulation
JP2006324628A (ja) * 2005-05-16 2006-11-30 Interuniv Micro Electronica Centrum Vzw 完全ケイ化ゲート形成方法及び当該方法によって得られたデバイス
EP1724818A3 (de) * 2005-05-16 2007-12-26 Interuniversitair Microelektronica Centrum ( Imec) Verfahren zur Herstellung vollsilicidierter Dual-Gates und mit diesem Verfahren erhältliche Halbleiterbauelemente
US7473637B2 (en) 2005-07-20 2009-01-06 Micron Technology, Inc. ALD formed titanium nitride films
US7151023B1 (en) * 2005-08-01 2006-12-19 International Business Machines Corporation Metal gate MOSFET by full semiconductor metal alloy conversion
JPWO2007074775A1 (ja) * 2005-12-26 2009-06-04 日本電気株式会社 Nmosfet及びその製造方法並びにcmosfet及びその製造方法
US20070164323A1 (en) * 2006-01-18 2007-07-19 Micron Technology, Inc. CMOS gates with intermetallic compound tunable work functions
US20070164367A1 (en) * 2006-01-18 2007-07-19 Micron Technology, Inc. CMOS gates with solid-solution alloy tunable work functions
US7709402B2 (en) 2006-02-16 2010-05-04 Micron Technology, Inc. Conductive layers for hafnium silicon oxynitride films
KR101036771B1 (ko) * 2006-07-25 2011-05-25 닛본 덴끼 가부시끼가이샤 반도체 장치 및 그 제조 방법
US20080206973A1 (en) * 2007-02-26 2008-08-28 Texas Instrument Inc. Process method to optimize fully silicided gate (FUSI) thru PAI implant
US7547596B2 (en) * 2007-08-01 2009-06-16 Texas Instruments Incorporated Method of enhancing drive current in a transistor
JP2009224509A (ja) * 2008-03-14 2009-10-01 Panasonic Corp 半導体装置及びその製造方法
CN101894749B (zh) * 2009-05-20 2013-03-20 中芯国际集成电路制造(北京)有限公司 半导体器件的栅极掺杂方法
CN106033718A (zh) * 2015-03-15 2016-10-19 中国科学院微电子研究所 一种金属硅化物的形成方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6165470A (ja) * 1984-09-07 1986-04-04 Hitachi Ltd 半導体集積回路装置
US5624869A (en) * 1994-04-13 1997-04-29 International Business Machines Corporation Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen
JP2570179B2 (ja) * 1994-05-26 1997-01-08 日本電気株式会社 半導体集積回路装置の製造方法
US5593924A (en) * 1995-06-02 1997-01-14 Texas Instruments Incorporated Use of a capping layer to attain low titanium-silicide sheet resistance and uniform silicide thickness for sub-micron silicon and polysilicon lines
US6297135B1 (en) * 1997-01-29 2001-10-02 Ultratech Stepper, Inc. Method for forming silicide regions on an integrated device
US6777759B1 (en) 1997-06-30 2004-08-17 Intel Corporation Device structure and method for reducing silicide encroachment
JP2000031478A (ja) * 1998-07-13 2000-01-28 Ricoh Co Ltd 半導体装置及びその製造方法
US6100173A (en) 1998-07-15 2000-08-08 Advanced Micro Devices, Inc. Forming a self-aligned silicide gate conductor to a greater thickness than junction silicide structures using a dual-salicidation process
US6204103B1 (en) 1998-09-18 2001-03-20 Intel Corporation Process to make complementary silicide metal gates for CMOS technology
US6291282B1 (en) * 1999-02-26 2001-09-18 Texas Instruments Incorporated Method of forming dual metal gate structures or CMOS devices
US6087235A (en) * 1999-10-14 2000-07-11 Advanced Micro Devices, Inc. Method for effective fabrication of a field effect transistor with elevated drain and source contact structures
JP2001189448A (ja) * 1999-12-28 2001-07-10 Fujitsu Ltd 半導体装置及びその製造方法
US6365446B1 (en) * 2000-07-03 2002-04-02 Chartered Semiconductor Manufacturing Ltd. Formation of silicided ultra-shallow junctions using implant through metal technology and laser annealing process
US6458678B1 (en) 2000-07-25 2002-10-01 Advanced Micro Devices, Inc. Transistor formed using a dual metal process for gate and source/drain region
US6365476B1 (en) * 2000-10-27 2002-04-02 Ultratech Stepper, Inc. Laser thermal process for fabricating field-effect transistors
US6518113B1 (en) * 2001-02-06 2003-02-11 Advanced Micro Devices, Inc. Doping of thin amorphous silicon work function control layers of MOS gate electrodes
US6952040B2 (en) * 2001-06-29 2005-10-04 Intel Corporation Transistor structure and method of fabrication
US6777317B2 (en) * 2001-08-29 2004-08-17 Ultratech Stepper, Inc. Method for semiconductor gate doping
US20030092249A1 (en) 2001-11-09 2003-05-15 Chia-Fu Hsu Lightly-insitu-doped amorphous silicon applied in DRAM gates
US6451701B1 (en) * 2001-11-14 2002-09-17 Taiwan Semiconductor Manufacturing Company Method for making low-resistance silicide contacts between closely spaced electrically conducting lines for field effect transistors
US6867087B2 (en) * 2001-11-19 2005-03-15 Infineon Technologies Ag Formation of dual work function gate electrode
JP2003158091A (ja) * 2001-11-20 2003-05-30 Oki Electric Ind Co Ltd 半導体装置および半導体装置の製造方法
US6599831B1 (en) * 2002-04-30 2003-07-29 Advanced Micro Devices, Inc. Metal gate electrode using silicidation and method of formation thereof
JP4150548B2 (ja) * 2002-08-08 2008-09-17 富士通株式会社 半導体装置の製造方法
US6544829B1 (en) * 2002-09-20 2003-04-08 Lsi Logic Corporation Polysilicon gate salicidation

Also Published As

Publication number Publication date
CN1853266A (zh) 2006-10-25
JP2007534148A (ja) 2007-11-22
WO2005029579A1 (en) 2005-03-31
EP1668695B1 (de) 2010-04-21
TWI334632B (en) 2010-12-11
KR100818898B1 (ko) 2008-04-04
EP1668695A1 (de) 2006-06-14
US20070128785A1 (en) 2007-06-07
US20050064636A1 (en) 2005-03-24
DE602004026753D1 (de) 2010-06-02
KR20060060723A (ko) 2006-06-05
CN100419999C (zh) 2008-09-17
US7183182B2 (en) 2007-02-27
TW200512882A (en) 2005-04-01

Similar Documents

Publication Publication Date Title
ATE465516T1 (de) Verfahren und vorrichtung zur herstellung von cmos-feldeffekttransistoren
TW200514199A (en) Dual fully-silicided gate MOSFETS
WO2005064644A3 (en) Strained silicon mosfets having reduced diffusion of n-type dopants
DE602006013748D1 (de) Verfahren zur Herstellung vollsilicidierter Dual-Gates und mit diesem Verfahren erhältliche Halbleiterbauelemente
TW200721494A (en) Method of manufacturing semiconductor device
WO2005101515A3 (en) Process to improve transistor drive current through the use of strain
TW200511508A (en) Semiconductor device, method for manufacturing the semiconductor device, and integrated circuit including the semiconductor device
TW200705660A (en) Semiconductor device with CMOS transistor and fabricating method thereof
JP2005520356A5 (de)
EP1679743A3 (de) Integrierter Halbleiterschaltkreis und sein Herstellungsverfahren
TW200507189A (en) Semiconductor device including nonvolatile memory and method for fabricating the same
SG144922A1 (en) A method to fabricate variable work function gates for fusi devices
JP2012522362A5 (de)
TW200707592A (en) Manufacturing method of semiconductor device and semiconductor device
WO2007002130A3 (en) Replacement gate field effect transistor with germanium or sige channel and manufacturing method for same using gas-cluster ion irradiation
EP1398836A3 (de) Dünnfilm-Halbleiterbauelement und Herstellungsverfahren
DE60116342D1 (de) Herstellungsprozess für verarmungs-mosfet-bauelemente, silizidierte source-und drainkontakte
TW200608610A (en) Process for fabricating a strained channel MOSFET device
WO2007110507A3 (fr) Procede de realisation d'un transistor a effet de champ a grilles auto-alignees
TW200509244A (en) A selective etch process for making a semiconductor device having a high-k gate dielectric
SG152165A1 (en) Methods of forming field effect transistors having stress-inducing sidewall insulating spacers thereon and devices formed thereby
TW200739902A (en) Fin field effect transistors (FinFETs) and methods for making the same
TW200513149A (en) Transistor substrate, display device, and method for manufacture
TW200729460A (en) Semiconductor device
ATE434831T1 (de) Herstellungsverfahren für halbleiterbauelement

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties