ATE485630T1 - Verfahren und vorrichtung zur verminderung des leckstroms in halbleiterschaltungen - Google Patents

Verfahren und vorrichtung zur verminderung des leckstroms in halbleiterschaltungen

Info

Publication number
ATE485630T1
ATE485630T1 AT04103621T AT04103621T ATE485630T1 AT E485630 T1 ATE485630 T1 AT E485630T1 AT 04103621 T AT04103621 T AT 04103621T AT 04103621 T AT04103621 T AT 04103621T AT E485630 T1 ATE485630 T1 AT E485630T1
Authority
AT
Austria
Prior art keywords
circuits
leakage
leakage current
semiconductor circuits
reducing leakage
Prior art date
Application number
AT04103621T
Other languages
English (en)
Inventor
Alan Marshall
Andrea Olgiati
Anthony Stansfield
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Application granted granted Critical
Publication of ATE485630T1 publication Critical patent/ATE485630T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Dram (AREA)
  • Bipolar Transistors (AREA)
AT04103621T 2003-07-28 2004-07-28 Verfahren und vorrichtung zur verminderung des leckstroms in halbleiterschaltungen ATE485630T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/628,906 US6946903B2 (en) 2003-07-28 2003-07-28 Methods and systems for reducing leakage current in semiconductor circuits

Publications (1)

Publication Number Publication Date
ATE485630T1 true ATE485630T1 (de) 2010-11-15

Family

ID=34103479

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04103621T ATE485630T1 (de) 2003-07-28 2004-07-28 Verfahren und vorrichtung zur verminderung des leckstroms in halbleiterschaltungen

Country Status (5)

Country Link
US (3) US6946903B2 (de)
EP (1) EP1519487B1 (de)
JP (1) JP4440723B2 (de)
AT (1) ATE485630T1 (de)
DE (1) DE602004029638D1 (de)

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US7571402B2 (en) * 2003-08-28 2009-08-04 Stmicroelectronics, Inc. Scan chain modification for reduced leakage
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US7599299B2 (en) * 2004-04-30 2009-10-06 Xilinx, Inc. Dynamic reconfiguration of a system monitor (DRPORT)
US7180348B2 (en) * 2005-03-24 2007-02-20 Arm Limited Circuit and method for storing data in operational and sleep modes
US7366043B2 (en) * 2005-06-29 2008-04-29 Hynix Semiconductor Inc. Current reduction circuit of semiconductor device
US7170803B2 (en) * 2005-06-29 2007-01-30 Hynix Semiconductor Inc. Current reduction circuit of semiconductor device
US7286379B1 (en) * 2005-09-08 2007-10-23 Lsi Corporation Content addressable memory (CAM) architecture and method of operating the same
US7725519B2 (en) * 2005-10-05 2010-05-25 Qualcom Incorporated Floating-point processor with selectable subprecision
US7757137B2 (en) * 2007-03-27 2010-07-13 International Business Machines Corporation Method and apparatus for on-the-fly minimum power state transition
US7795914B2 (en) * 2007-11-02 2010-09-14 International Business Machines Corporation Circuit design methodology to reduce leakage power
US7818466B2 (en) 2007-12-31 2010-10-19 Synopsys, Inc. HDMI controller circuit for transmitting digital data to compatible audio device using address decoder where values are written to registers of sub-circuits
JP5194805B2 (ja) * 2008-01-08 2013-05-08 富士通セミコンダクター株式会社 半導体装置及びその製造方法
EP2166454A1 (de) * 2008-09-08 2010-03-24 Panasonic Corporation System und Verfahren zum Testen von anwendungsspezifischen Blocks, die in rekonfigurierbare Arrays eingebettet sind
KR101020291B1 (ko) * 2009-02-03 2011-03-07 주식회사 하이닉스반도체 프리드라이버 및 이를 이용한 출력드라이버회로
US8258861B2 (en) 2010-01-08 2012-09-04 Analog Devices, Inc. Systems and methods for minimizing power consumption
WO2011131250A1 (en) * 2010-04-23 2011-10-27 Panasonic Corporation Reuse of constants between arithmetic logic units and look-up-tables
US8390328B2 (en) 2011-05-13 2013-03-05 Arm Limited Supplying a clock signal and a gated clock signal to synchronous elements
US8689068B2 (en) * 2011-11-28 2014-04-01 Freescale Semiconductor, Inc. Low leakage current operation of integrated circuit using scan chain
US9628081B2 (en) * 2014-08-12 2017-04-18 Xilinx, Inc. Interconnect circuits having low threshold voltage P-channel transistors for a programmable integrated circuit

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US6794914B2 (en) * 2002-05-24 2004-09-21 Qualcomm Incorporated Non-volatile multi-threshold CMOS latch with leakage control
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US6940307B1 (en) * 2003-10-22 2005-09-06 Altera Corporation Integrated circuits with reduced standby power consumption

Also Published As

Publication number Publication date
US20050083107A1 (en) 2005-04-21
US7315201B2 (en) 2008-01-01
JP2005101540A (ja) 2005-04-14
US7233197B2 (en) 2007-06-19
US20050024121A1 (en) 2005-02-03
JP4440723B2 (ja) 2010-03-24
US20070241811A1 (en) 2007-10-18
EP1519487A1 (de) 2005-03-30
EP1519487B1 (de) 2010-10-20
DE602004029638D1 (de) 2010-12-02
US6946903B2 (en) 2005-09-20

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