ATE451716T1 - Verfahren zum aufzeigen von kristallfehlern und/oder spannungsfeldern in der kontaktfläche von zwei verbundenen materialen - Google Patents

Verfahren zum aufzeigen von kristallfehlern und/oder spannungsfeldern in der kontaktfläche von zwei verbundenen materialen

Info

Publication number
ATE451716T1
ATE451716T1 AT01974440T AT01974440T ATE451716T1 AT E451716 T1 ATE451716 T1 AT E451716T1 AT 01974440 T AT01974440 T AT 01974440T AT 01974440 T AT01974440 T AT 01974440T AT E451716 T1 ATE451716 T1 AT E451716T1
Authority
AT
Austria
Prior art keywords
crystalline
stress fields
securing
thin film
face
Prior art date
Application number
AT01974440T
Other languages
German (de)
English (en)
Inventor
Franck Fournel
Hubert Moriceau
Noel Magnea
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Application granted granted Critical
Publication of ATE451716T1 publication Critical patent/ATE451716T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Micromachines (AREA)
  • Processes Of Treating Macromolecular Substances (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Surface Treatment Of Glass (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
AT01974440T 2000-10-06 2001-10-05 Verfahren zum aufzeigen von kristallfehlern und/oder spannungsfeldern in der kontaktfläche von zwei verbundenen materialen ATE451716T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0012796A FR2815121B1 (fr) 2000-10-06 2000-10-06 Procede de revelation de defauts cristallins et/ou de champs de contraintes a l'interface d'adhesion moleculaire de deux materiaux solides
PCT/FR2001/003074 WO2002029876A1 (fr) 2000-10-06 2001-10-05 Procede de revelation de defauts cristallins et/ou de champs de contraintes a l'interface d'adhesion moleculaire de deux materiaux solides

Publications (1)

Publication Number Publication Date
ATE451716T1 true ATE451716T1 (de) 2009-12-15

Family

ID=8855073

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01974440T ATE451716T1 (de) 2000-10-06 2001-10-05 Verfahren zum aufzeigen von kristallfehlern und/oder spannungsfeldern in der kontaktfläche von zwei verbundenen materialen

Country Status (7)

Country Link
US (1) US7041227B2 (https=)
EP (1) EP1332517B1 (https=)
JP (2) JP2004511102A (https=)
AT (1) ATE451716T1 (https=)
DE (1) DE60140760D1 (https=)
FR (1) FR2815121B1 (https=)
WO (1) WO2002029876A1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004281878A (ja) * 2003-03-18 2004-10-07 Seiko Epson Corp 半導体基板の製造方法及びこれにより製造される半導体基板、電気光学装置並びに電子機器
JP2005279843A (ja) * 2004-03-29 2005-10-13 Univ Of Tokyo 細線を含む結晶材料とその製造方法、およびこれを用いたナノ細線デバイス
US7495266B2 (en) * 2004-06-16 2009-02-24 Massachusetts Institute Of Technology Strained silicon-on-silicon by wafer bonding and layer transfer
FR2876498B1 (fr) * 2004-10-12 2008-03-14 Commissariat Energie Atomique Procede de realisation d'heterostructures resonnantes a transport planaire
FR2877662B1 (fr) 2004-11-09 2007-03-02 Commissariat Energie Atomique Reseau de particules et procede de realisation d'un tel reseau.
CN101326646B (zh) * 2005-11-01 2011-03-16 麻省理工学院 单片集成的半导体材料和器件
US20070252223A1 (en) * 2005-12-05 2007-11-01 Massachusetts Institute Of Technology Insulated gate devices and method of making same
FR2895419B1 (fr) 2005-12-27 2008-02-22 Commissariat Energie Atomique Procede de realisation simplifiee d'une structure epitaxiee
FR2895391B1 (fr) * 2005-12-27 2008-01-25 Commissariat Energie Atomique Procede d'elaboration de nanostructures ordonnees
FR2896493B1 (fr) 2006-01-23 2008-02-22 Commissariat Energie Atomique Procede d'elaboration d'un support pour la croissance de nanostructures allongees localisees
US8063397B2 (en) * 2006-06-28 2011-11-22 Massachusetts Institute Of Technology Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission
FR2903810B1 (fr) * 2006-07-13 2008-10-10 Commissariat Energie Atomique Procede de nanostructuration de la surface d'un substrat
JP2009063202A (ja) * 2007-09-05 2009-03-26 Daikin Ind Ltd 放熱器およびそれを備えた冷凍装置
FR2925748B1 (fr) 2007-12-21 2010-01-29 Commissariat Energie Atomique Support de stockage de donnees et procede associe

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2766620B1 (fr) * 1997-07-22 2000-12-01 Commissariat Energie Atomique Realisation de microstructures ou de nanostructures sur un support
FR2767604B1 (fr) * 1997-08-19 2000-12-01 Commissariat Energie Atomique Procede de traitement pour le collage moleculaire et le decollage de deux structures
US5981400A (en) 1997-09-18 1999-11-09 Cornell Research Foundation, Inc. Compliant universal substrate for epitaxial growth
JP3031904B2 (ja) * 1998-02-18 2000-04-10 キヤノン株式会社 複合部材とその分離方法、及びそれを利用した半導体基体の製造方法
FR2784800B1 (fr) * 1998-10-20 2000-12-01 Commissariat Energie Atomique Procede de realisation de composants passifs et actifs sur un meme substrat isolant
JP2003516241A (ja) * 1999-12-09 2003-05-13 コーネル・リサーチ・ファンデーション・インコーポレイテッド ナノメートル規模の間隔で周期的表面構造を製作する方法

Also Published As

Publication number Publication date
US20040074866A1 (en) 2004-04-22
JP4954853B2 (ja) 2012-06-20
FR2815121A1 (fr) 2002-04-12
EP1332517A1 (fr) 2003-08-06
FR2815121B1 (fr) 2002-12-13
EP1332517B1 (fr) 2009-12-09
DE60140760D1 (de) 2010-01-21
JP2004511102A (ja) 2004-04-08
JP2008124480A (ja) 2008-05-29
US7041227B2 (en) 2006-05-09
WO2002029876A1 (fr) 2002-04-11

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