ATE435492T1 - Verbesserungen im bezug auf inhaltsadressierbare speicheranordnungen - Google Patents

Verbesserungen im bezug auf inhaltsadressierbare speicheranordnungen

Info

Publication number
ATE435492T1
ATE435492T1 AT06076208T AT06076208T ATE435492T1 AT E435492 T1 ATE435492 T1 AT E435492T1 AT 06076208 T AT06076208 T AT 06076208T AT 06076208 T AT06076208 T AT 06076208T AT E435492 T1 ATE435492 T1 AT E435492T1
Authority
AT
Austria
Prior art keywords
data
word
cam
content addressable
addressable storage
Prior art date
Application number
AT06076208T
Other languages
English (en)
Inventor
Ian Paul Jalowiecki
John Lancaster
Anargyros Krikelis
Original Assignee
Aspex Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0028356A external-priority patent/GB0028356D0/en
Priority claimed from GB0028357A external-priority patent/GB0028357D0/en
Application filed by Aspex Technology Ltd filed Critical Aspex Technology Ltd
Application granted granted Critical
Publication of ATE435492T1 publication Critical patent/ATE435492T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores

Landscapes

  • Dram (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Detection And Correction Of Errors (AREA)
  • Information Transfer Systems (AREA)
  • Debugging And Monitoring (AREA)
AT06076208T 2000-11-21 2001-11-21 Verbesserungen im bezug auf inhaltsadressierbare speicheranordnungen ATE435492T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0028356A GB0028356D0 (en) 2000-11-21 2000-11-21 Improvements relating to digital data storage and retrieval
GB0028357A GB0028357D0 (en) 2000-11-21 2000-11-21 Improvements relating to digital data storage

Publications (1)

Publication Number Publication Date
ATE435492T1 true ATE435492T1 (de) 2009-07-15

Family

ID=26245308

Family Applications (2)

Application Number Title Priority Date Filing Date
AT06076208T ATE435492T1 (de) 2000-11-21 2001-11-21 Verbesserungen im bezug auf inhaltsadressierbare speicheranordnungen
AT01997812T ATE435491T1 (de) 2000-11-21 2001-11-21 Bit-parallele/bit-serielle inhaltsadressierbare (assoziative) verbundspeicheranordnungen

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT01997812T ATE435491T1 (de) 2000-11-21 2001-11-21 Bit-parallele/bit-serielle inhaltsadressierbare (assoziative) verbundspeicheranordnungen

Country Status (7)

Country Link
US (1) US7096318B2 (de)
EP (2) EP1713082B1 (de)
JP (1) JP4596733B2 (de)
AT (2) ATE435492T1 (de)
AU (1) AU2002223853A1 (de)
DE (2) DE60139140D1 (de)
WO (1) WO2002043068A2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7114026B1 (en) * 2002-06-17 2006-09-26 Sandeep Khanna CAM device having multiple index generators
JP2007508653A (ja) * 2003-10-11 2007-04-05 スパンス ロジック インコーポレイテッド 高速テーブルルックアップ用メモリおよび低消費電力機構
CN1329832C (zh) * 2004-03-25 2007-08-01 华为技术有限公司 一种仿真内容可寻址存储器的方法
US20060129374A1 (en) * 2004-12-15 2006-06-15 Larson Lee A Apparatus and method for apparatus mediating voltage levels between an emulation unit and a target processor
JP4738112B2 (ja) 2005-09-12 2011-08-03 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7477186B2 (en) * 2005-10-11 2009-01-13 Sony Ericsson Mobile Communications Ab Memory systems with column read to an arithmetic operation circuit, pattern detector circuits and methods and computer program products for the same
US7657496B2 (en) * 2006-06-26 2010-02-02 Saffron Technology, Inc. Nonlinear associative memories using linear arrays of associative memory cells, and methods of operating same
US7848129B1 (en) 2008-11-20 2010-12-07 Netlogic Microsystems, Inc. Dynamically partitioned CAM array
US7920399B1 (en) 2010-10-21 2011-04-05 Netlogic Microsystems, Inc. Low power content addressable memory device having selectable cascaded array segments
JP5520391B2 (ja) * 2010-12-28 2014-06-11 インターナショナル・ビジネス・マシーンズ・コーポレーション 検索開始点を決定する装置及び方法
US8467213B1 (en) 2011-03-22 2013-06-18 Netlogic Microsystems, Inc. Power limiting in a content search system
TW201349254A (zh) 2012-04-17 2013-12-01 Heraeus Precious Metals North America Conshohocken Llc 用於太陽能電池接點的導電厚膜膏
US9455020B2 (en) * 2014-06-05 2016-09-27 Micron Technology, Inc. Apparatuses and methods for performing an exclusive or operation using sensing circuitry
US12327591B2 (en) * 2021-04-09 2025-06-10 Mediatek Singapore Pte. Ltd. Method and apparatus for performing a MAC operation in a memory array
US12106822B2 (en) 2021-07-16 2024-10-01 Mediatek Singapore Pte. Ltd. Memory array with programmable number of filters

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3851313A (en) * 1973-02-21 1974-11-26 Texas Instruments Inc Memory cell for sequentially addressed memory array
US4038538A (en) * 1975-08-18 1977-07-26 Burroughs Corporation Integer and floating point to binary converter
DE2712575C2 (de) * 1977-03-22 1985-12-19 Walter Dipl.-Ing. 8011 Putzbrunn Motsch Assoziatives Speichersystem in hochintegrierter Halbleitertechnik
US4964040A (en) * 1983-01-03 1990-10-16 United States Of America As Represented By The Secretary Of The Navy Computer hardware executive
US4760523A (en) * 1984-06-29 1988-07-26 Trw Inc. Fast search processor
JPS61107596A (ja) * 1984-10-31 1986-05-26 Nec Corp 連想記憶装置
US4933835A (en) * 1985-02-22 1990-06-12 Intergraph Corporation Apparatus for maintaining consistency of a cache memory with a primary memory
JPS625510A (ja) 1985-07-01 1987-01-12 住友電気工業株式会社 ゴムケ−ブル
JPS62165794A (ja) 1986-01-17 1987-07-22 Toshiba Corp 連想記憶用メモリセル
US4799192A (en) * 1986-08-28 1989-01-17 Massachusetts Institute Of Technology Three-transistor content addressable memory
JPS63173297A (ja) * 1987-01-12 1988-07-16 Nec Corp 半導体記憶装置
JPH01196792A (ja) 1988-01-29 1989-08-08 Mitsubishi Electric Corp 半導体記憶装置
JPH02187993A (ja) 1989-01-13 1990-07-24 Mitsubishi Electric Corp 連想メモリ装置
US5072422A (en) * 1989-05-15 1991-12-10 E-Systems, Inc. Content-addressed memory system with word cells having select and match bits
US5051949A (en) * 1989-11-15 1991-09-24 Harris Corporation Content addressable memory device
JPH05298892A (ja) * 1992-04-22 1993-11-12 Mitsubishi Electric Corp 連想記憶メモリ
JPH0695879A (ja) * 1992-05-05 1994-04-08 Internatl Business Mach Corp <Ibm> コンピュータシステム
US5276650A (en) * 1992-07-29 1994-01-04 Intel Corporation Memory array size reduction
US6005811A (en) * 1994-08-17 1999-12-21 Oak Technology, Incorporated Method for operating a memory
JPH10198324A (ja) 1997-01-08 1998-07-31 Funai Electric Co Ltd 映像表示装置
JP3095064B2 (ja) * 1997-09-08 2000-10-03 日本電気株式会社 連想記憶装置
US6212628B1 (en) * 1998-04-09 2001-04-03 Teranex, Inc. Mesh connected computer
JP2000030469A (ja) * 1998-07-14 2000-01-28 Oki Electric Ind Co Ltd 連想メモリセル及び連想メモリ
US6044005A (en) * 1999-02-03 2000-03-28 Sibercore Technologies Incorporated Content addressable memory storage device
US6137707A (en) * 1999-03-26 2000-10-24 Netlogic Microsystems Method and apparatus for simultaneously performing a plurality of compare operations in content addressable memory device
US6078513A (en) * 1999-06-09 2000-06-20 Neomagic Corp. NMOS dynamic content-addressable-memory CAM cell with self-booting pass transistors and local row and column select

Also Published As

Publication number Publication date
EP1713082B1 (de) 2009-07-01
EP1336178A2 (de) 2003-08-20
WO2002043068A3 (en) 2003-03-13
EP1713082A1 (de) 2006-10-18
JP4596733B2 (ja) 2010-12-15
ATE435491T1 (de) 2009-07-15
AU2002223853A1 (en) 2002-06-03
US20040199724A1 (en) 2004-10-07
EP1336178B1 (de) 2009-07-01
DE60139140D1 (de) 2009-08-13
WO2002043068A2 (en) 2002-05-30
JP2004520668A (ja) 2004-07-08
US7096318B2 (en) 2006-08-22
DE60139165D1 (de) 2009-08-13

Similar Documents

Publication Publication Date Title
ATE435492T1 (de) Verbesserungen im bezug auf inhaltsadressierbare speicheranordnungen
TW239200B (en) A data processor having a cache memory capable of being used as a linear ram bank
KR100230767B1 (ko) 동적 메모리의 데이타저장 및 검색방법과 그 장치
US20110310648A1 (en) Semiconductor storage device
ATE335334T1 (de) Vlan tabellenverwaltungssystem in hardwarebasierten paketvermittlungsstellen für speichereffizientes auslesen und einschreiben
ATE373307T1 (de) Simultaner mehrbank für flash-speicher
ATE443345T1 (de) Gestapelte 1t-n speicherzellenstruktur
EP0917154A3 (de) Programmierter Speicher mit verbesserter Geschwindigkeit und Leistungsverbrauch
US10068645B2 (en) Multiple cycle search content addressable memory
DE69526431D1 (de) Eine synchrone nand-dram-speicherarchitektur
TW200519963A (en) Multi-port memory device with stacked banks
DE60228585D1 (de) Speicheranordnung mit unterschiedlicher &#34;burst&#34; addressierungsreihefolge für lese- und schreibvorgänge
US6591331B1 (en) Method and apparatus for determining the address of the highest priority matching entry in a segmented content addressable memory device
KR940006023A (ko) 내용주소화기억장치 및 그 일치워드(incidence word)의 불능화방법
BR0111245A (pt) Cams de porta dupla para uma memória não-volátil de operação instantânea
ATE449411T1 (de) Zweidimensionaler datenspeicher
US6751701B1 (en) Method and apparatus for detecting a multiple match in an intra-row configurable CAM system
DE60102230D1 (de) Mehrfacheintragsvergleich in einem inhaltsadressierbaren speicher
US6799243B1 (en) Method and apparatus for detecting a match in an intra-row configurable cam system
US6868475B2 (en) Content addressable memory having data width extension capability
KR890016568A (ko) 교차식 메모리 구조 장치
GB0405283D0 (en) Multi-port memory for flexible and space efficient corner turning networks in associative processors
US6813680B1 (en) Method and apparatus for loading comparand data into a content addressable memory system
US6801981B1 (en) Intra-row configurability of content addressable memory
US6795892B1 (en) Method and apparatus for determining a match address in an intra-row configurable cam device

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties