ATE422268T1 - Herstellungsverfahren in spacer-technik für einen festwertspeichertransistor mit auswahlgate an einer seite eines kontrollgate-floating-gate- stapels - Google Patents
Herstellungsverfahren in spacer-technik für einen festwertspeichertransistor mit auswahlgate an einer seite eines kontrollgate-floating-gate- stapelsInfo
- Publication number
- ATE422268T1 ATE422268T1 AT02735732T AT02735732T ATE422268T1 AT E422268 T1 ATE422268 T1 AT E422268T1 AT 02735732 T AT02735732 T AT 02735732T AT 02735732 T AT02735732 T AT 02735732T AT E422268 T1 ATE422268 T1 AT E422268T1
- Authority
- AT
- Austria
- Prior art keywords
- gate
- production process
- state memory
- fixed state
- memory transistor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
- H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
- H10D30/6892—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0135—Manufacturing their gate conductors
Landscapes
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP01203001 | 2001-08-06 | ||
| EP01203000 | 2001-08-06 | ||
| EP02076742 | 2002-05-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE422268T1 true ATE422268T1 (de) | 2009-02-15 |
Family
ID=27224299
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT02735732T ATE422268T1 (de) | 2001-08-06 | 2002-06-04 | Herstellungsverfahren in spacer-technik für einen festwertspeichertransistor mit auswahlgate an einer seite eines kontrollgate-floating-gate- stapels |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6984557B2 (de) |
| EP (1) | EP1417704B1 (de) |
| JP (1) | JP4290548B2 (de) |
| KR (1) | KR100859081B1 (de) |
| AT (1) | ATE422268T1 (de) |
| DE (1) | DE60231083D1 (de) |
| TW (1) | TW589674B (de) |
| WO (1) | WO2003015172A2 (de) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003188290A (ja) | 2001-12-19 | 2003-07-04 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置およびその製造方法 |
| DE10241170A1 (de) * | 2002-09-05 | 2004-03-18 | Infineon Technologies Ag | Hochdichter NROM-FINFET |
| WO2005027220A2 (en) * | 2003-09-16 | 2005-03-24 | Koninklijke Philips Electronics N.V. | Manufacture of a non-volatile memory device with a single access gate and differently doped source and drain |
| KR100702029B1 (ko) * | 2005-09-22 | 2007-03-30 | 삼성전자주식회사 | 플로팅된 드레인측 보조 게이트를 갖는 고전압 모스트랜지스터를 구비하는 비휘발성 메모리 소자들 및 그제조방법들 |
| KR100661225B1 (ko) | 2005-12-26 | 2006-12-22 | 동부일렉트로닉스 주식회사 | 이이피롬 소자 제조 방법 |
| KR100745766B1 (ko) * | 2006-06-23 | 2007-08-02 | 삼성전자주식회사 | 네 개의 스토리지 노드막을 구비하는 비휘발성 메모리 소자및 그 동작 방법 |
| US8320191B2 (en) | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
| KR20100076225A (ko) * | 2008-12-26 | 2010-07-06 | 주식회사 동부하이텍 | 비휘발성 메모리 소자 제조 방법 |
| US8101492B2 (en) * | 2009-09-23 | 2012-01-24 | Infineon Technologies Ag | Method for making semiconductor device |
| TWI422017B (zh) * | 2011-04-18 | 2014-01-01 | Powerchip Technology Corp | 非揮發性記憶體元件及其製造方法 |
| US9559177B2 (en) | 2013-12-03 | 2017-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory devices and method of fabricating same |
| US9653302B2 (en) | 2015-07-31 | 2017-05-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Gate structure with multiple spacer and method for manufacturing the same |
| US10510851B2 (en) * | 2016-11-29 | 2019-12-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Low resistance contact method and structure |
| US10868027B2 (en) | 2018-07-13 | 2020-12-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and method for preventing silicide contamination during the manufacture of micro-processors with embedded flash memory |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2597719B2 (ja) * | 1989-07-31 | 1997-04-09 | 株式会社東芝 | 不揮発性半導体記憶装置およびその動作方法 |
| US5541130A (en) * | 1995-06-07 | 1996-07-30 | International Business Machines Corporation | Process for making and programming a flash memory array |
| DE19600307C1 (de) * | 1996-01-05 | 1998-01-08 | Siemens Ag | Hochintegrierter Halbleiterspeicher und Verfahren zur Herstellung des Halbleiterspeichers |
| TW452834B (en) * | 1999-03-18 | 2001-09-01 | Toshiba Corp | Nonvolatile semiconductor memory device and manufacture thereof |
| JP3971873B2 (ja) * | 1999-09-10 | 2007-09-05 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
| US6642103B2 (en) * | 2000-03-08 | 2003-11-04 | Koninklijke Philips Electronics N.V. | Semiconductor device and method of manufacturing the same |
| US6984558B2 (en) * | 2001-08-06 | 2006-01-10 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device with non-volatile memory comprising a memory cell with an access gate and with a control gate and a charge storage region |
-
2002
- 2002-06-04 WO PCT/IB2002/002083 patent/WO2003015172A2/en not_active Ceased
- 2002-06-04 EP EP02735732A patent/EP1417704B1/de not_active Expired - Lifetime
- 2002-06-04 US US10/485,482 patent/US6984557B2/en not_active Expired - Fee Related
- 2002-06-04 KR KR1020047001756A patent/KR100859081B1/ko not_active Expired - Fee Related
- 2002-06-04 AT AT02735732T patent/ATE422268T1/de not_active IP Right Cessation
- 2002-06-04 JP JP2003519997A patent/JP4290548B2/ja not_active Expired - Fee Related
- 2002-06-04 DE DE60231083T patent/DE60231083D1/de not_active Expired - Lifetime
- 2002-07-15 TW TW091115711A patent/TW589674B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR20040023715A (ko) | 2004-03-18 |
| EP1417704B1 (de) | 2009-02-04 |
| US20040235249A1 (en) | 2004-11-25 |
| WO2003015172A3 (en) | 2003-06-05 |
| TW589674B (en) | 2004-06-01 |
| JP4290548B2 (ja) | 2009-07-08 |
| KR100859081B1 (ko) | 2008-09-17 |
| US6984557B2 (en) | 2006-01-10 |
| WO2003015172A2 (en) | 2003-02-20 |
| EP1417704A2 (de) | 2004-05-12 |
| DE60231083D1 (de) | 2009-03-19 |
| JP2004538643A (ja) | 2004-12-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |