ATE37630T1 - Halbleiteranordnung. - Google Patents

Halbleiteranordnung.

Info

Publication number
ATE37630T1
ATE37630T1 AT84201109T AT84201109T ATE37630T1 AT E37630 T1 ATE37630 T1 AT E37630T1 AT 84201109 T AT84201109 T AT 84201109T AT 84201109 T AT84201109 T AT 84201109T AT E37630 T1 ATE37630 T1 AT E37630T1
Authority
AT
Austria
Prior art keywords
voltage
semiconductor arrangement
small
sourceigate
resistor
Prior art date
Application number
AT84201109T
Other languages
English (en)
Inventor
Marcellinus Johannes M Pelgrom
Holstlaan
Hendrik Anne Harwig
Jan Willem Slotboom
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of ATE37630T1 publication Critical patent/ATE37630T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76808—Input structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Bipolar Transistors (AREA)
  • Networks Using Active Elements (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Noodles (AREA)
AT84201109T 1983-08-02 1984-07-30 Halbleiteranordnung. ATE37630T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8302731A NL8302731A (nl) 1983-08-02 1983-08-02 Halfgeleiderinrichting.
EP84201109A EP0133721B1 (de) 1983-08-02 1984-07-30 Halbleiteranordnung

Publications (1)

Publication Number Publication Date
ATE37630T1 true ATE37630T1 (de) 1988-10-15

Family

ID=19842221

Family Applications (1)

Application Number Title Priority Date Filing Date
AT84201109T ATE37630T1 (de) 1983-08-02 1984-07-30 Halbleiteranordnung.

Country Status (8)

Country Link
US (1) US4627082A (de)
EP (1) EP0133721B1 (de)
JP (1) JPS6065571A (de)
AT (1) ATE37630T1 (de)
AU (1) AU3137784A (de)
CA (1) CA1216967A (de)
DE (1) DE3474378D1 (de)
NL (1) NL8302731A (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155971A (ja) * 1984-08-27 1986-03-20 Sumitomo Electric Ind Ltd シヨツトキ−ゲ−ト電界効果トランジスタ
NL8501542A (nl) * 1985-05-30 1986-12-16 Philips Nv Ladingsgekoppelde inrichting.
NL8600890A (nl) * 1986-04-09 1987-11-02 Philips Nv Halfgeleiderinrichting.
US4712124A (en) * 1986-12-22 1987-12-08 North American Philips Corporation Complementary lateral insulated gate rectifiers with matched "on" resistances
NL8800851A (nl) * 1988-04-05 1989-11-01 Philips Nv Halfgeleidergeheugeninrichting.
JPH0831791B2 (ja) * 1988-12-28 1996-03-27 三菱電機株式会社 半導体装置
US5440749A (en) * 1989-08-03 1995-08-08 Nanotronics Corporation High performance, low cost microprocessor architecture
JP3189327B2 (ja) * 1991-10-08 2001-07-16 ソニー株式会社 電荷検出装置
US6674470B1 (en) 1996-09-19 2004-01-06 Kabushiki Kaisha Toshiba MOS-type solid state imaging device with high sensitivity
US7408754B1 (en) * 2004-11-18 2008-08-05 Altera Corporation Fast trigger ESD device for protection of integrated circuits
JP4934302B2 (ja) * 2005-09-09 2012-05-16 ホシザキ電機株式会社 冷却貯蔵庫
KR101130638B1 (ko) 2007-02-26 2012-04-02 호시자키 덴키 가부시키가이샤 냉각 저장고 및 그 압축기의 제어 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4191896A (en) * 1976-07-26 1980-03-04 Rca Corporation Low noise CCD input circuit
US4068140A (en) * 1976-12-27 1978-01-10 Texas Instruments Incorporated MOS source follower circuit
US4096430A (en) * 1977-04-04 1978-06-20 General Electric Company Metal-oxide-semiconductor voltage reference
IT1099381B (it) * 1978-01-09 1985-09-18 Rca Corp Specchi di corrente a transistori mos, con scarichi allungati
JPS54126479A (en) * 1978-03-25 1979-10-01 Toshiba Corp Signal charge injection system of charge coupled device
CH628462A5 (fr) * 1978-12-22 1982-02-26 Centre Electron Horloger Source de tension de reference.
FR2447610A1 (fr) * 1979-01-26 1980-08-22 Commissariat Energie Atomique Generateur de tension de reference et circuit de mesure de la tension de seuil d'un transistor mos, applicable a ce generateur de tension de reference
JPS562017A (en) * 1979-06-19 1981-01-10 Toshiba Corp Constant electric current circuit
US4453094A (en) * 1982-06-30 1984-06-05 General Electric Company Threshold amplifier for IC fabrication using CMOS technology
US4477782A (en) * 1983-05-13 1984-10-16 At&T Bell Laboratories Compound current mirror

Also Published As

Publication number Publication date
AU3137784A (en) 1985-02-07
CA1216967A (en) 1987-01-20
US4627082A (en) 1986-12-02
DE3474378D1 (en) 1988-11-03
NL8302731A (nl) 1985-03-01
EP0133721B1 (de) 1988-09-28
JPS6065571A (ja) 1985-04-15
EP0133721A1 (de) 1985-03-06

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties