ATE362652T1 - Veränderbare temperaturprozesse für verstellbaren elektrostatischen substrathalter - Google Patents

Veränderbare temperaturprozesse für verstellbaren elektrostatischen substrathalter

Info

Publication number
ATE362652T1
ATE362652T1 AT03728281T AT03728281T ATE362652T1 AT E362652 T1 ATE362652 T1 AT E362652T1 AT 03728281 T AT03728281 T AT 03728281T AT 03728281 T AT03728281 T AT 03728281T AT E362652 T1 ATE362652 T1 AT E362652T1
Authority
AT
Austria
Prior art keywords
temperature
wafer
changable
substrate holder
temperature processes
Prior art date
Application number
AT03728281T
Other languages
English (en)
Inventor
Tom Kamp
Richard Gottscho
Steve Lee
Chris Lee
Yoko Yamaguchi
Vahid Vahedi
Aaron Eppler
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Application granted granted Critical
Publication of ATE362652T1 publication Critical patent/ATE362652T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Chemical Vapour Deposition (AREA)
  • Plasma Technology (AREA)
  • Physical Vapour Deposition (AREA)
AT03728281T 2002-04-02 2003-03-25 Veränderbare temperaturprozesse für verstellbaren elektrostatischen substrathalter ATE362652T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US36977302P 2002-04-02 2002-04-02
US10/235,453 US6921724B2 (en) 2002-04-02 2002-09-04 Variable temperature processes for tunable electrostatic chuck

Publications (1)

Publication Number Publication Date
ATE362652T1 true ATE362652T1 (de) 2007-06-15

Family

ID=28456852

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03728281T ATE362652T1 (de) 2002-04-02 2003-03-25 Veränderbare temperaturprozesse für verstellbaren elektrostatischen substrathalter

Country Status (11)

Country Link
US (1) US6921724B2 (de)
EP (1) EP1493180B1 (de)
JP (3) JP4698951B2 (de)
KR (1) KR100921356B1 (de)
CN (1) CN1323427C (de)
AT (1) ATE362652T1 (de)
AU (1) AU2003233432A1 (de)
DE (1) DE60313861T2 (de)
IL (2) IL164363A0 (de)
TW (1) TWI281212B (de)
WO (1) WO2003085721A2 (de)

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US8375890B2 (en) 2007-03-19 2013-02-19 Micron Technology, Inc. Apparatus and methods for capacitively coupled plasma vapor processing of semiconductor wafers
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Also Published As

Publication number Publication date
JP2005522051A (ja) 2005-07-21
JP5881277B2 (ja) 2016-03-09
WO2003085721A2 (en) 2003-10-16
JP2010187023A (ja) 2010-08-26
WO2003085721A3 (en) 2003-12-18
EP1493180A2 (de) 2005-01-05
IL164363A (en) 2010-02-17
AU2003233432A1 (en) 2003-10-20
US6921724B2 (en) 2005-07-26
KR20050004834A (ko) 2005-01-12
TW200406846A (en) 2004-05-01
CN1323427C (zh) 2007-06-27
IL164363A0 (en) 2005-12-18
DE60313861T2 (de) 2008-01-17
JP2016096341A (ja) 2016-05-26
JP6170540B2 (ja) 2017-07-26
KR100921356B1 (ko) 2009-10-13
JP4698951B2 (ja) 2011-06-08
EP1493180B1 (de) 2007-05-16
CN1647259A (zh) 2005-07-27
US20030186545A1 (en) 2003-10-02
DE60313861D1 (de) 2007-06-28
TWI281212B (en) 2007-05-11

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