ATE320676T1 - Phasenregelschleife und verfahren zum erzeugen von redundanten nottaktsignalen - Google Patents

Phasenregelschleife und verfahren zum erzeugen von redundanten nottaktsignalen

Info

Publication number
ATE320676T1
ATE320676T1 AT00300462T AT00300462T ATE320676T1 AT E320676 T1 ATE320676 T1 AT E320676T1 AT 00300462 T AT00300462 T AT 00300462T AT 00300462 T AT00300462 T AT 00300462T AT E320676 T1 ATE320676 T1 AT E320676T1
Authority
AT
Austria
Prior art keywords
signal
input clock
phase detector
phase
coupled
Prior art date
Application number
AT00300462T
Other languages
English (en)
Inventor
Drew G Doblar
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of ATE320676T1 publication Critical patent/ATE320676T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H03L7/143—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by switching the reference signal of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AT00300462T 1999-01-25 2000-01-21 Phasenregelschleife und verfahren zum erzeugen von redundanten nottaktsignalen ATE320676T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/236,865 US6359945B1 (en) 1999-01-25 1999-01-25 Phase locked loop and method that provide fail-over redundant clocking

Publications (1)

Publication Number Publication Date
ATE320676T1 true ATE320676T1 (de) 2006-04-15

Family

ID=22891315

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00300462T ATE320676T1 (de) 1999-01-25 2000-01-21 Phasenregelschleife und verfahren zum erzeugen von redundanten nottaktsignalen

Country Status (5)

Country Link
US (2) US6359945B1 (de)
EP (1) EP1022857B1 (de)
JP (1) JP2000224036A (de)
AT (1) ATE320676T1 (de)
DE (1) DE60026656D1 (de)

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EP1269706B1 (de) * 2000-04-04 2006-11-02 Broadcom Corporation Verfahren zur kompensation von phasenfehlern in mehrträgersignalen
US7042970B1 (en) * 2001-06-15 2006-05-09 Analog Devices, Inc. Phase frequency detector with adjustable offset
US20030115503A1 (en) * 2001-12-14 2003-06-19 Koninklijke Philips Electronics N.V. System for enhancing fault tolerance and security of a computing system
EP1476800B1 (de) * 2002-02-14 2010-11-17 TELEFONAKTIEBOLAGET LM ERICSSON (publ) Nahtloser takt
US6806751B2 (en) 2002-09-12 2004-10-19 Foundry Networks, Inc. Loop filter for a phase-locked loop and method for switching
US7089442B2 (en) * 2003-02-07 2006-08-08 Rambus Inc. Fault-tolerant clock generator
US6970045B1 (en) 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
US7295644B1 (en) * 2003-07-14 2007-11-13 Marvell International Ltd. Apparatus for clock data recovery
TWI226754B (en) * 2003-09-12 2005-01-11 Mediatek Inc Device and method for detecting phase difference and PLL using the same
US7130722B2 (en) * 2005-02-22 2006-10-31 Distribution Control Systems, Inc. Smart disconnect switch interbase
US20060193417A1 (en) * 2005-02-25 2006-08-31 Tellabs Operations, Inc. Systems and methods for switching between redundant clock signals
WO2006127994A2 (en) * 2005-05-25 2006-11-30 Radioframe Networks, Inc. Pll with phase clipping and resynchronization
US7724100B2 (en) * 2007-01-31 2010-05-25 Infineon Technologies Austria Ag Oscillator structure
US20080218276A1 (en) * 2007-03-05 2008-09-11 Exar Corporation Means to control pll phase slew rate
US20080218278A1 (en) * 2007-03-05 2008-09-11 Exar Corporation Means to control pll phase slew rate
KR100822307B1 (ko) * 2007-09-20 2008-04-16 주식회사 아나패스 데이터 구동 회로 및 지연 고정 루프
US7864912B1 (en) 2007-10-19 2011-01-04 Marvell International Ltd. Circuits, architectures, a system and methods for improved clock data recovery
US7551039B2 (en) * 2007-10-19 2009-06-23 Hewlett-Packard Development Company, L.P. Phase adjustment in phase-locked loops using multiple oscillator signals
US7554466B1 (en) * 2007-12-05 2009-06-30 Broadcom Corporation Multi-speed burst mode serializer/de-serializer
US8526559B2 (en) * 2008-05-30 2013-09-03 Mediatek Inc. Communication systems and clock generation circuits thereof with reference source switching
US7895374B2 (en) * 2008-07-01 2011-02-22 International Business Machines Corporation Dynamic segment sparing and repair in a memory system
US8234540B2 (en) * 2008-07-01 2012-07-31 International Business Machines Corporation Error correcting code protected quasi-static bit communication on a high-speed bus
US8082475B2 (en) * 2008-07-01 2011-12-20 International Business Machines Corporation Enhanced microprocessor interconnect with bit shadowing
US8245105B2 (en) * 2008-07-01 2012-08-14 International Business Machines Corporation Cascade interconnect memory system with enhanced reliability
US8201069B2 (en) * 2008-07-01 2012-06-12 International Business Machines Corporation Cyclical redundancy code for use in a high-speed serial link
US8082474B2 (en) * 2008-07-01 2011-12-20 International Business Machines Corporation Bit shadowing in a memory system
US8139430B2 (en) * 2008-07-01 2012-03-20 International Business Machines Corporation Power-on initialization and test for a cascade interconnect memory system
US20100005335A1 (en) * 2008-07-01 2010-01-07 International Business Machines Corporation Microprocessor interface with dynamic segment sparing and repair
US7979759B2 (en) * 2009-01-08 2011-07-12 International Business Machines Corporation Test and bring-up of an enhanced cascade interconnect memory system
US20100180154A1 (en) * 2009-01-13 2010-07-15 International Business Machines Corporation Built In Self-Test of Memory Stressor
US20110248755A1 (en) * 2010-04-08 2011-10-13 Hasenplaugh William C Cross-feedback phase-locked loop for distributed clocking systems
JP5598161B2 (ja) * 2010-08-26 2014-10-01 ヤマハ株式会社 クロック発生回路
KR101238440B1 (ko) 2011-12-30 2013-02-28 주식회사 더즈텍 위상 손실 검출기
CN102752065B (zh) * 2012-06-29 2015-09-09 华为技术有限公司 一种时间同步方法及系统
WO2018189288A1 (en) * 2017-04-12 2018-10-18 Telefonaktiebolaget Lm Ericsson (Publ) Short pulse suppression for phase/frequency detector
CN107872414B (zh) * 2017-12-01 2020-07-14 珠海亿智电子科技有限公司 一种用于bpsk信号解调的新型鉴相器
US10727845B1 (en) * 2019-06-25 2020-07-28 Silicon Laboratories Inc. Use of a virtual clock in a PLL to maintain a closed loop system
CN114679173B (zh) * 2021-10-06 2022-08-30 绍兴圆方半导体有限公司 锁相环和时钟同步系统

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US4914404A (en) * 1988-08-02 1990-04-03 Siemens Aktiengesellschaft Method for synchronization of a signal frequency to interference-prone reference signal frequencies
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US6084479A (en) * 1998-05-28 2000-07-04 Cypress Semiconductor Corp. Circuit, architecture and method(s) of controlling a periodic signal generating circuit or device
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Also Published As

Publication number Publication date
US6359945B1 (en) 2002-03-19
US20020075982A1 (en) 2002-06-20
DE60026656D1 (de) 2006-05-11
US6731709B2 (en) 2004-05-04
JP2000224036A (ja) 2000-08-11
EP1022857A2 (de) 2000-07-26
EP1022857A3 (de) 2003-08-27
EP1022857B1 (de) 2006-03-15

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