JPS6434017A - Frequency synthesizer using phase locked loop - Google Patents
Frequency synthesizer using phase locked loopInfo
- Publication number
- JPS6434017A JPS6434017A JP62189951A JP18995187A JPS6434017A JP S6434017 A JPS6434017 A JP S6434017A JP 62189951 A JP62189951 A JP 62189951A JP 18995187 A JP18995187 A JP 18995187A JP S6434017 A JPS6434017 A JP S6434017A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- frequency divider
- phase
- circuit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To minimize the fluctuation of an output signal frequency and to complete phase locking in a short time, by supplying and outputting a signal to a phase comparator compulsorily immediately after starting the frequency division operation of a second frequency divider by an OR circuit. CONSTITUTION:The OR circuit 16 takes the OR of the output signal of a third control circuit 15 and that of the second frequency divider 12, and outputs a pulse with certain width immediately after starting the operation of the second frequency divider 12, then supplies it to the phase comparator 3, and performs phase comparison with a frequency division signal from a first frequency divider 11 by the comparator. Since a gate circuit 17 is set at a gate open state during the reset cancelling period of the second frequency divider 12, the output error signal of the phase comparator 3 passes the gate circuit 17, and is inputted to a charge pump 5, and is converted three values, (L), (H), or (Z) (high impedance), and is supplied to a low-pass filter 6. In such a way, it is possible to minimize the fluctuation of the output signal frequency at the time of starting respective operation of a phase locked loop (PLL), and to shorten a time to complete the phase locking.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62189951A JPH0761010B2 (en) | 1987-07-29 | 1987-07-29 | Frequency synthesizer using phase-locked loop |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62189951A JPH0761010B2 (en) | 1987-07-29 | 1987-07-29 | Frequency synthesizer using phase-locked loop |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6434017A true JPS6434017A (en) | 1989-02-03 |
JPH0761010B2 JPH0761010B2 (en) | 1995-06-28 |
Family
ID=16249927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62189951A Expired - Lifetime JPH0761010B2 (en) | 1987-07-29 | 1987-07-29 | Frequency synthesizer using phase-locked loop |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0761010B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0429412A (en) * | 1990-05-23 | 1992-01-31 | Matsushita Electric Ind Co Ltd | Phase comparator |
US6173025B1 (en) | 1997-05-02 | 2001-01-09 | Nec Corporation | PLL frequency synthesizer using frequency dividers reset by initial phase difference |
-
1987
- 1987-07-29 JP JP62189951A patent/JPH0761010B2/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0429412A (en) * | 1990-05-23 | 1992-01-31 | Matsushita Electric Ind Co Ltd | Phase comparator |
US6173025B1 (en) | 1997-05-02 | 2001-01-09 | Nec Corporation | PLL frequency synthesizer using frequency dividers reset by initial phase difference |
Also Published As
Publication number | Publication date |
---|---|
JPH0761010B2 (en) | 1995-06-28 |
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