JPS6446319A - Phase locked loop circuit - Google Patents
Phase locked loop circuitInfo
- Publication number
- JPS6446319A JPS6446319A JP62202658A JP20265887A JPS6446319A JP S6446319 A JPS6446319 A JP S6446319A JP 62202658 A JP62202658 A JP 62202658A JP 20265887 A JP20265887 A JP 20265887A JP S6446319 A JPS6446319 A JP S6446319A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- phase
- reset
- division circuit
- frequency division
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To obtain a fast and stable frequency pull-in operation even when a loop filter time constant is increased, by locking the phase of an output signal compulsorily with that of an input signal in a state where the phase is unlocked. CONSTITUTION:A reset signal outputted from a reset signal generation circuit 18 is supplied to a frequency division circuit 13. At the frequency division circuit 13, the frequency-divided value of a counter provided on its inside is reset complusorily to a value supplied to an input terminal 19. And to the input terminal 19, the frequency-divided value of the frequency division circuit 13 in a phase locked state is supplied. Therefore, the frequency division circuit 13 is reset compulsorily to the frequency-divided value in phase locking at the time of supplying the reset signal, and the phase of the output signal is locked with that of the input signal compulsorily. In such a way, it is possible to perform the fast and stable frequency pull-in operation even when the loop filter time constant is increased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62202658A JPS6446319A (en) | 1987-08-14 | 1987-08-14 | Phase locked loop circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62202658A JPS6446319A (en) | 1987-08-14 | 1987-08-14 | Phase locked loop circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6446319A true JPS6446319A (en) | 1989-02-20 |
Family
ID=16460997
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62202658A Pending JPS6446319A (en) | 1987-08-14 | 1987-08-14 | Phase locked loop circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6446319A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0575454A (en) * | 1991-09-13 | 1993-03-26 | Sanyo Electric Co Ltd | Pll circuit |
US5304954A (en) * | 1991-08-08 | 1994-04-19 | Fujitsu Limited | PLL synthesizer having frequency dividers with reset control |
-
1987
- 1987-08-14 JP JP62202658A patent/JPS6446319A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5304954A (en) * | 1991-08-08 | 1994-04-19 | Fujitsu Limited | PLL synthesizer having frequency dividers with reset control |
JPH0575454A (en) * | 1991-09-13 | 1993-03-26 | Sanyo Electric Co Ltd | Pll circuit |
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