YU46996B - Uredjaj za prijenos podataka izmedju dva postrojenja za obradu podataka koji imaju nezavisne pogonske taktove - Google Patents

Uredjaj za prijenos podataka izmedju dva postrojenja za obradu podataka koji imaju nezavisne pogonske taktove

Info

Publication number
YU46996B
YU46996B YU65987A YU65987A YU46996B YU 46996 B YU46996 B YU 46996B YU 65987 A YU65987 A YU 65987A YU 65987 A YU65987 A YU 65987A YU 46996 B YU46996 B YU 46996B
Authority
YU
Yugoslavia
Prior art keywords
bistable
inputs
data
clock
transmission device
Prior art date
Application number
YU65987A
Other languages
English (en)
Other versions
YU65987A (en
Inventor
B.G. Hogberg
Original Assignee
Telefon Ab., Lm Ericsson
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefon Ab., Lm Ericsson filed Critical Telefon Ab., Lm Ericsson
Publication of YU65987A publication Critical patent/YU65987A/xx
Publication of YU46996B publication Critical patent/YU46996B/sh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/20—Repeater circuits; Relay circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Computer And Data Communications (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

UREDJAJ ZA PRIJENOS PODATAKA IZMEDJU DVA POSTROJENJA ZA OBRADU PODATAKA KOJI IMAJU NEZAVISNE POGONSKE TAKTOVE, u paralelnom obliku iz predajnog spremnika (REG1) u prijemni spremnik (REG2), izmedju predajnog i prijemnog postrojenja kojima upravljaju odgovarajući prvi (CL1) i drugi (CL2) medjusobno nezavisni taktovi, pri čemu se prijemni spremnik aktivira signalom upisa u skladu sa patentnim zahtevom 1, naznačen time, da predajna strana sadrži prvi JK bistabil (F1) čiji ulazi za podatke (JK) su spojeni na liniju signala za upis (LO1), dok mu je ulaz za takt spojen na liniju za signale takta (CL1), a izlaz je spojen na ulaz (D) drugog logičkog sklopa, (D2, X2, F2) na prijemnoj strani, koji sadrži D bistabil (D2), isključivo ili sklopku (X2) i JK bistabil (F2), pri čemu su izlazi bistabila (D2, F2) spojeni na ulaze isključivo ili sklopke (X2), čiji izlaz je spojen na ulaze za podatke bistabila (F2), na ulaz za upis sklopa (REG2), i na izlaz čitavog sklopa, a ulazi za takt bistabila (D2, F2) spojeni su na liniju za takt (CL2).
YU65987A 1986-04-18 1987-04-10 Uredjaj za prijenos podataka izmedju dva postrojenja za obradu podataka koji imaju nezavisne pogonske taktove YU46996B (sh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE8601801A SE452937B (sv) 1986-04-18 1986-04-18 Sett och anordning for att overfora data mellan tva datautrustningar som drivs av var sin oberoende klocka

Publications (2)

Publication Number Publication Date
YU65987A YU65987A (en) 1990-06-30
YU46996B true YU46996B (sh) 1994-11-15

Family

ID=20364262

Family Applications (1)

Application Number Title Priority Date Filing Date
YU65987A YU46996B (sh) 1986-04-18 1987-04-10 Uredjaj za prijenos podataka izmedju dva postrojenja za obradu podataka koji imaju nezavisne pogonske taktove

Country Status (20)

Country Link
US (1) US4984194A (sh)
EP (1) EP0265480B1 (sh)
KR (1) KR910004805B1 (sh)
AR (1) AR241341A1 (sh)
AU (1) AU592641B2 (sh)
BR (1) BR8707272A (sh)
CA (1) CA1279729C (sh)
DE (1) DE3768199D1 (sh)
DK (1) DK166897B1 (sh)
EG (1) EG19769A (sh)
ES (1) ES2003040A6 (sh)
FI (1) FI85926C (sh)
GR (1) GR870453B (sh)
IE (1) IE59877B1 (sh)
MA (1) MA20951A1 (sh)
MX (1) MX173648B (sh)
NO (1) NO173578C (sh)
SE (1) SE452937B (sh)
WO (1) WO1987006413A1 (sh)
YU (1) YU46996B (sh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5008904A (en) * 1989-07-24 1991-04-16 Hewlett-Packard Co. Synchronizer using clock phase extrapolation
EP0574598A1 (de) * 1992-06-13 1993-12-22 International Business Machines Corporation Datenpufferspeicher
US5357613A (en) * 1992-09-16 1994-10-18 Texas Instruments Incorporated Time-domain boundary buffer method and apparatus
JP3490131B2 (ja) * 1994-01-21 2004-01-26 株式会社ルネサステクノロジ データ転送制御方法、データプロセッサ及びデータ処理システム
JPH0856274A (ja) * 1994-06-06 1996-02-27 Ricoh Co Ltd 画像形成装置の通信回路
GB2384409B (en) * 2002-01-16 2005-05-11 Thomson Licensing Sa Method and arrangement for correcting data

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6016664B2 (ja) * 1977-10-28 1985-04-26 豊田工機株式会社 デ−タ転送装置
US4463443A (en) * 1979-07-24 1984-07-31 The United States Of America As Represented By The Secretary Of The Air Force Data buffer apparatus between subsystems which operate at differing or varying data rates
FR2476880A1 (fr) * 1980-02-27 1981-08-28 Ibm France Procede et dispositif pour multiplexer un signal de donnees et plusieurs signaux secondaires, procede et dispositif de demultiplexage associes, et emetteur-recepteur d'interface en faisant application
DE3247834A1 (de) * 1982-12-23 1984-06-28 Siemens AG, 1000 Berlin und 8000 München Schaltkreis-baustein
US4607348A (en) * 1983-02-28 1986-08-19 Burroughs Corporation Transfer rate control system from tape peripheral to buffer memory of peripheral controller
US4621341A (en) * 1984-08-24 1986-11-04 Advanced Micro Devices, Inc. Method and apparatus for transferring data in parallel from a smaller to a larger register

Also Published As

Publication number Publication date
MX173648B (es) 1994-03-22
FI875089A0 (fi) 1987-11-18
EG19769A (en) 1996-01-31
CA1279729C (en) 1991-01-29
EP0265480A1 (en) 1988-05-04
IE870660L (en) 1987-10-18
DK166897B1 (da) 1993-07-26
FI85926C (sv) 1992-06-10
NO875168L (no) 1987-12-10
KR910004805B1 (ko) 1991-07-13
NO875168D0 (no) 1987-12-10
FI875089A (fi) 1987-11-18
SE8601801L (sv) 1987-10-19
YU65987A (en) 1990-06-30
GR870453B (en) 1987-03-26
WO1987006413A1 (en) 1987-10-22
MA20951A1 (fr) 1987-12-31
SE8601801D0 (sv) 1986-04-18
AU592641B2 (en) 1990-01-18
BR8707272A (pt) 1988-04-19
DE3768199D1 (de) 1991-04-04
SE452937B (sv) 1987-12-21
DK666087D0 (da) 1987-12-17
NO173578C (no) 1993-12-29
AU7288087A (en) 1987-11-09
FI85926B (fi) 1992-02-28
ES2003040A6 (es) 1988-10-01
DK666087A (da) 1987-12-17
KR880701503A (ko) 1988-07-27
US4984194A (en) 1991-01-08
AR241341A1 (es) 1992-05-29
NO173578B (no) 1993-09-20
EP0265480B1 (en) 1991-02-27
IE59877B1 (en) 1994-04-20

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