ES8304678A1 - Perfeccionamientos en un dispositivo para aumentar la seguridad de funcionamiento de un reloj duplicado. - Google Patents

Perfeccionamientos en un dispositivo para aumentar la seguridad de funcionamiento de un reloj duplicado.

Info

Publication number
ES8304678A1
ES8304678A1 ES512362A ES512362A ES8304678A1 ES 8304678 A1 ES8304678 A1 ES 8304678A1 ES 512362 A ES512362 A ES 512362A ES 512362 A ES512362 A ES 512362A ES 8304678 A1 ES8304678 A1 ES 8304678A1
Authority
ES
Spain
Prior art keywords
clock
circuit
high reliability
clock device
bistable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES512362A
Other languages
English (en)
Other versions
ES512362A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ALE International SAS
Original Assignee
La Telephone Industrielle et Commerciale Telic Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by La Telephone Industrielle et Commerciale Telic Alcatel SA filed Critical La Telephone Industrielle et Commerciale Telic Alcatel SA
Publication of ES8304678A1 publication Critical patent/ES8304678A1/es
Publication of ES512362A0 publication Critical patent/ES512362A0/es
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1604Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G3/00Producing timing pulses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0079Receiver details
    • H04L7/0083Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Hardware Redundancy (AREA)
  • Electric Clocks (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

DISPOSITIVO DE SEGURIDAD DE FUNCIONAMIENTO DE RELOJ DUPLICADO. COMPRENDE, EN CADA RELOJ, UN CIRCUITO DE SELECCION (6), UN REGISTRO UNITARIO (7), Y UN CIRCUITO DE ELABORACION DE SEÑALES DE TIEMPO (8). CADA CIRCUITO DE SELECCION (6) CONSTA DE DOS CIRCUITOS DE TRATAMIENTO (11, 12) Y UN CIRCUITO DE SALIDA (13). CADA CIRCUITO DE TRATAMIENTO ESTA CONECTADO EN ENTRADA AL CIRCUITO DE FILTRACION Y MODELADO (4) DE CADA UNO DE LOS RELOJES (1, 2).
ES512362A 1981-05-20 1982-05-19 Perfeccionamientos en un dispositivo para aumentar la seguridad de funcionamiento de un reloj duplicado. Granted ES512362A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8110022A FR2506478A1 (fr) 1981-05-20 1981-05-20 Dispositif pour augmenter la securite de fonctionnement d'une horloge dupliquee

Publications (2)

Publication Number Publication Date
ES8304678A1 true ES8304678A1 (es) 1983-03-01
ES512362A0 ES512362A0 (es) 1983-03-01

Family

ID=9258678

Family Applications (1)

Application Number Title Priority Date Filing Date
ES512362A Granted ES512362A0 (es) 1981-05-20 1982-05-19 Perfeccionamientos en un dispositivo para aumentar la seguridad de funcionamiento de un reloj duplicado.

Country Status (8)

Country Link
US (1) US4480198A (es)
EP (1) EP0065711B1 (es)
JP (1) JPS5837586A (es)
DE (1) DE3260773D1 (es)
ES (1) ES512362A0 (es)
FR (1) FR2506478A1 (es)
IE (1) IE52991B1 (es)
PT (1) PT74932A (es)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4920540A (en) * 1987-02-25 1990-04-24 Stratus Computer, Inc. Fault-tolerant digital timing apparatus and method
NL8202685A (nl) * 1982-07-05 1984-02-01 Philips Nv Kloksignaalregenerator met hoge stabiliteit.
US4644498A (en) * 1983-04-04 1987-02-17 General Electric Company Fault-tolerant real time clock
WO1985002275A1 (en) * 1983-11-07 1985-05-23 Motorola, Inc. Synthesized clock microcomputer with power saving
US4696019A (en) * 1984-09-19 1987-09-22 United Technologies Corporation Multi-channel clock synchronizer
FR2577087B1 (fr) * 1985-02-07 1987-03-06 Thomson Csf Mat Tel Dispositif de distribution d'horloge tripliquee, chaque signal d'horloge comportant un signal de synchronisation
US4644568A (en) * 1985-03-28 1987-02-17 At&T Bell Laboratories Timing signal distribution arrangement
GB8615399D0 (en) * 1986-06-24 1986-07-30 Int Computers Ltd Switching circuit
US4882738A (en) * 1987-06-25 1989-11-21 Nec Corporation Clock control system
US4922489A (en) * 1987-10-23 1990-05-01 Siemens Aktiengesellschaft Circuit configuration for routine testing of the clock supply of a large number of units operated with the same clock
NL8800872A (nl) * 1988-04-06 1989-11-01 Philips Nv Geintegreerde schakeling.
DE3905689A1 (de) * 1989-02-24 1990-08-30 Philips Patentverwaltung Schaltungsanordnung mit zwei parallelen zweigen zur uebertragung eines binaersignales
US4979191A (en) * 1989-05-17 1990-12-18 The Boeing Company Autonomous N-modular redundant fault tolerant clock system
US5123107A (en) * 1989-06-20 1992-06-16 Mensch Jr William D Topography of CMOS microcomputer integrated circuit chip including core processor and memory, priority, and I/O interface circuitry coupled thereto
US5175734A (en) * 1989-09-27 1992-12-29 Siemens Aktiengesellschaft Clock supply for multiplex systems
US5377205A (en) * 1993-04-15 1994-12-27 The Boeing Company Fault tolerant clock with synchronized reset
US6718474B1 (en) 2000-09-21 2004-04-06 Stratus Technologies Bermuda Ltd. Methods and apparatus for clock management based on environmental conditions
US6404240B1 (en) * 2000-10-30 2002-06-11 Semiconductor Components Industries Llc Circuit and method of a three state phase frequency lock detector

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE326321B (es) * 1968-11-15 1970-07-20 E Sjoequist
US3715729A (en) * 1971-03-10 1973-02-06 Ibm Timing control for a multiprocessor system
FR2315736A1 (fr) * 1975-06-25 1977-01-21 Materiel Telephonique Systeme de transmission de signaux periodiques
GB1603647A (en) * 1977-04-29 1981-11-25 Bourner M Pulse order recognition circuit
US4185245A (en) * 1978-05-15 1980-01-22 International Telephone And Telegraph Corporation Fault-tolerant clock signal distribution arrangement
FR2433878B1 (fr) * 1978-08-18 1986-03-28 Labo Cent Telecommunicat Circuit d'horloge pour ensemble electronique

Also Published As

Publication number Publication date
IE821200L (en) 1982-11-20
EP0065711B1 (fr) 1984-09-19
IE52991B1 (en) 1988-04-27
EP0065711A1 (fr) 1982-12-01
US4480198A (en) 1984-10-30
ES512362A0 (es) 1983-03-01
PT74932A (fr) 1982-06-01
FR2506478A1 (fr) 1982-11-26
JPS5837586A (ja) 1983-03-04
DE3260773D1 (en) 1984-10-25

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