JPS57154941A - Lsi converting system of logical circuit - Google Patents
Lsi converting system of logical circuitInfo
- Publication number
- JPS57154941A JPS57154941A JP56040127A JP4012781A JPS57154941A JP S57154941 A JPS57154941 A JP S57154941A JP 56040127 A JP56040127 A JP 56040127A JP 4012781 A JP4012781 A JP 4012781A JP S57154941 A JPS57154941 A JP S57154941A
- Authority
- JP
- Japan
- Prior art keywords
- logical circuit
- lsi
- macro
- input
- unused
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
Abstract
PURPOSE:To convert a logical circuit into an LSI with the smallest number of elements, by setting ''1'' and ''0'' levels to the input and output terminals respectively along with an unused terminal when a logical circuit is designed with use of a general-purpose macro. CONSTITUTION:A logical circuit of LSI is first produced by using a general- purpose macro. In this case, ''1'' and ''0'' levels are written to the input and output terminals along with an unused terminal. Then undesired elements are removed. The backward tracing is carried out from an unused output terminal toward the input side of macro and along a signal line. After this, the signal level is held at the output side of macro, and at the same time the forward tracing is carried out from the ''0'' and ''1'' levels of the input side puls the unused input terminal to remove the undesired element and signals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56040127A JPS57154941A (en) | 1981-03-19 | 1981-03-19 | Lsi converting system of logical circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56040127A JPS57154941A (en) | 1981-03-19 | 1981-03-19 | Lsi converting system of logical circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57154941A true JPS57154941A (en) | 1982-09-24 |
Family
ID=12572141
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56040127A Pending JPS57154941A (en) | 1981-03-19 | 1981-03-19 | Lsi converting system of logical circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57154941A (en) |
-
1981
- 1981-03-19 JP JP56040127A patent/JPS57154941A/en active Pending
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