JPS56100520A - Pulse processing circuit - Google Patents

Pulse processing circuit

Info

Publication number
JPS56100520A
JPS56100520A JP399980A JP399980A JPS56100520A JP S56100520 A JPS56100520 A JP S56100520A JP 399980 A JP399980 A JP 399980A JP 399980 A JP399980 A JP 399980A JP S56100520 A JPS56100520 A JP S56100520A
Authority
JP
Japan
Prior art keywords
output
becomes
reset
data input
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP399980A
Other languages
Japanese (ja)
Inventor
Hideki Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP399980A priority Critical patent/JPS56100520A/en
Publication of JPS56100520A publication Critical patent/JPS56100520A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/033Monostable circuits

Abstract

PURPOSE:To make the output pulse width fixed approximately, by connecting the reset output of the D type FF to the data input of the same D type FF through the CR time constant circuit and the level discriminating circuit. CONSTITUTION:When pulse (a) of a short pulse period is input to input terminal 11 at time t1, output (b) rises slowly due to CR time constant circuits 14 and 15 though reset output (d) becomes L. If output (b) is higher than discrimination level LL of level discriminating circuit 16, output (e) is H still because data input (c) is H still. When output (b) becomes discrimination level LL, data input (c) bebomes L; and by the next pulse (at time t3), reset output (d) and set output (e) becomes H and L respectively. When reset output (d) becomes H, capacitor 15 is charged; and when output (b) exceeds discrimination level LH, output C becomes H, and the circuit is returned to the original state.
JP399980A 1980-01-16 1980-01-16 Pulse processing circuit Pending JPS56100520A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP399980A JPS56100520A (en) 1980-01-16 1980-01-16 Pulse processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP399980A JPS56100520A (en) 1980-01-16 1980-01-16 Pulse processing circuit

Publications (1)

Publication Number Publication Date
JPS56100520A true JPS56100520A (en) 1981-08-12

Family

ID=11572693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP399980A Pending JPS56100520A (en) 1980-01-16 1980-01-16 Pulse processing circuit

Country Status (1)

Country Link
JP (1) JPS56100520A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61284113A (en) * 1985-06-11 1986-12-15 Mitsubishi Electric Corp Timer circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61284113A (en) * 1985-06-11 1986-12-15 Mitsubishi Electric Corp Timer circuit

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