JPS5776922A - Timer circuit - Google Patents

Timer circuit

Info

Publication number
JPS5776922A
JPS5776922A JP15246880A JP15246880A JPS5776922A JP S5776922 A JPS5776922 A JP S5776922A JP 15246880 A JP15246880 A JP 15246880A JP 15246880 A JP15246880 A JP 15246880A JP S5776922 A JPS5776922 A JP S5776922A
Authority
JP
Japan
Prior art keywords
level
capacitor
inverter
voltage
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15246880A
Other languages
Japanese (ja)
Inventor
Shigeto Oda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15246880A priority Critical patent/JPS5776922A/en
Publication of JPS5776922A publication Critical patent/JPS5776922A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching

Landscapes

  • Measurement Of Predetermined Time Intervals (AREA)
  • Pulse Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To simplify the circuit constitution, by detecting a voltage of a capacitor constituting an integral network with an inverter having hysteresis characteristics and obtaining the delay time of operation and restoration. CONSTITUTION:When an input signal A is at L level, a transistor (TR)2 is non- conductive, a capacitor 8 is charged, and an output (c) of an inverter 24 is at L level. When the input signal A is at H level, the TR2 is turned on and the charge of the capacitor 8 is discharged through a resistor 5. When a terminal voltage (b) of the capacitor 8 reaches a threshold voltage VL of the inverter 24, an output (c) is at H level. When the input signal A is again at L level, the TR2 is turned off, the capacitor 8 is charged via resistors 4, 5, and when the voltage (b) reaches a threshold voltage VH of the inverter 24, the output (c) is at L level.
JP15246880A 1980-10-29 1980-10-29 Timer circuit Pending JPS5776922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15246880A JPS5776922A (en) 1980-10-29 1980-10-29 Timer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15246880A JPS5776922A (en) 1980-10-29 1980-10-29 Timer circuit

Publications (1)

Publication Number Publication Date
JPS5776922A true JPS5776922A (en) 1982-05-14

Family

ID=15541164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15246880A Pending JPS5776922A (en) 1980-10-29 1980-10-29 Timer circuit

Country Status (1)

Country Link
JP (1) JPS5776922A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62278816A (en) * 1986-05-28 1987-12-03 Yagi Antenna Co Ltd Timer circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62278816A (en) * 1986-05-28 1987-12-03 Yagi Antenna Co Ltd Timer circuit

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