JPS5598364A - Maximum value detecting circuit - Google Patents

Maximum value detecting circuit

Info

Publication number
JPS5598364A
JPS5598364A JP595979A JP595979A JPS5598364A JP S5598364 A JPS5598364 A JP S5598364A JP 595979 A JP595979 A JP 595979A JP 595979 A JP595979 A JP 595979A JP S5598364 A JPS5598364 A JP S5598364A
Authority
JP
Japan
Prior art keywords
input terminal
feed back
signal level
input
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP595979A
Other languages
Japanese (ja)
Inventor
Ryuichi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Columbia Co Ltd
Original Assignee
Nippon Columbia Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Columbia Co Ltd filed Critical Nippon Columbia Co Ltd
Priority to JP595979A priority Critical patent/JPS5598364A/en
Publication of JPS5598364A publication Critical patent/JPS5598364A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To simplify the constitution by connecting differentially a plurality of transistors and a feed back transistor to one another and feeding back output of a plurality of the transistors through a diode to the feed back transistor.
CONSTITUTION: In the case of the signal impressed to input terminals 1 and 2 being zero, a substantially equal current flows through FFT5 and 6 and a diode 11, 12 become conductive and negative feed back to a gate of FFT18 is carried out through transistors 13 and 15. Thus, output level of the output terminal 17 becomes zero. Then, in the case of the input signal level of the input terminal 1 being larger than that of the input terminal 2, the negative feed back is carried out through a diode 11 and potential of the output terminal 17 becomes equal to the signal level of the input terminal 1. Similarly, in the case of the input signal level of the input terminal 2 being larger than that of the input terminal 1, the potential of the output terminal 17 becomes equal to the signal level of the input terminal 2.
COPYRIGHT: (C)1980,JPO&Japio
JP595979A 1979-01-20 1979-01-20 Maximum value detecting circuit Pending JPS5598364A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP595979A JPS5598364A (en) 1979-01-20 1979-01-20 Maximum value detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP595979A JPS5598364A (en) 1979-01-20 1979-01-20 Maximum value detecting circuit

Publications (1)

Publication Number Publication Date
JPS5598364A true JPS5598364A (en) 1980-07-26

Family

ID=11625422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP595979A Pending JPS5598364A (en) 1979-01-20 1979-01-20 Maximum value detecting circuit

Country Status (1)

Country Link
JP (1) JPS5598364A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60244867A (en) * 1984-05-21 1985-12-04 Nec Corp Voltage discriminating circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60244867A (en) * 1984-05-21 1985-12-04 Nec Corp Voltage discriminating circuit
JPH0554630B2 (en) * 1984-05-21 1993-08-13 Nippon Electric Co

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