JPS56100519A - Pulse processing circuit - Google Patents

Pulse processing circuit

Info

Publication number
JPS56100519A
JPS56100519A JP400080A JP400080A JPS56100519A JP S56100519 A JPS56100519 A JP S56100519A JP 400080 A JP400080 A JP 400080A JP 400080 A JP400080 A JP 400080A JP S56100519 A JPS56100519 A JP S56100519A
Authority
JP
Japan
Prior art keywords
input
output
becomes
pulse
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP400080A
Other languages
Japanese (ja)
Inventor
Hideki Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP400080A priority Critical patent/JPS56100519A/en
Publication of JPS56100519A publication Critical patent/JPS56100519A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/033Monostable circuits

Abstract

PURPOSE:To make the output pulse with fixed approximately, by connecting the reset output of the D type FF to the data input of the same D type FF through the CR time constant circuit where a diode is connected in parallel to a resistance. CONSTITUTION:When pulse (a) of the period shorter than time t1 is input to input terminal 11, input (c) of data input D of D type FF12 rises slowly due to CR time constant circuits 15 and 16 through reset output (b) becomes L. Consequently, output (d) is not changed and is H still. When input (c) becomes a prescribed value or less, data input D becomes L; and by the next input pulse (at time t3) reset output (b) and set output (d) becomes H and L respectively. Thus, output (d) is extended to the width between times t1 and t3 even if the period of the input pulse is short. Since reset output (b) becomes H, capacitor 16 is charged rapidly by diode 17.
JP400080A 1980-01-16 1980-01-16 Pulse processing circuit Pending JPS56100519A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP400080A JPS56100519A (en) 1980-01-16 1980-01-16 Pulse processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP400080A JPS56100519A (en) 1980-01-16 1980-01-16 Pulse processing circuit

Publications (1)

Publication Number Publication Date
JPS56100519A true JPS56100519A (en) 1981-08-12

Family

ID=11572722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP400080A Pending JPS56100519A (en) 1980-01-16 1980-01-16 Pulse processing circuit

Country Status (1)

Country Link
JP (1) JPS56100519A (en)

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