WO2024045018A1 - 显示面板、显示装置及裂纹检测方法 - Google Patents

显示面板、显示装置及裂纹检测方法 Download PDF

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Publication number
WO2024045018A1
WO2024045018A1 PCT/CN2022/116100 CN2022116100W WO2024045018A1 WO 2024045018 A1 WO2024045018 A1 WO 2024045018A1 CN 2022116100 W CN2022116100 W CN 2022116100W WO 2024045018 A1 WO2024045018 A1 WO 2024045018A1
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WIPO (PCT)
Prior art keywords
detection
line
area
electrically connected
display
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PCT/CN2022/116100
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English (en)
French (fr)
Inventor
初志文
屈忆
马宏伟
张毅
周洋
白露
冯翱远
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202280002973.1A priority Critical patent/CN117957602A/zh
Priority to PCT/CN2022/116100 priority patent/WO2024045018A1/zh
Publication of WO2024045018A1 publication Critical patent/WO2024045018A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

Definitions

  • This article relates to but is not limited to the field of display technology, and specifically refers to a display panel, a display device and a crack detection method.
  • LCD liquid crystal displays
  • OLED organic light-emitting diode
  • PDP plasma display panels
  • FED Field Emission Display
  • Embodiments of the present disclosure provide a display panel, a display device, and a crack detection method.
  • a display panel including: a substrate, a plurality of display units, at least one first data line, at least one second data line, at least one first detection control unit, and at least one second detection unit. a control unit, at least one first detection line and at least one second detection line.
  • the substrate includes a display area and a frame area located around the display area.
  • the frame area includes a first frame area surrounding the display area and a second frame area located on a side of the first frame area away from the display area.
  • the second frame area at least includes a bending area.
  • a plurality of display units at least one first data line and at least one second data line are located in the display area, and the first data line and the second data line are respectively electrically connected to some of the display units among the plurality of display units.
  • the first detection line is located at least in the first frame area, the first end of the first detection line is electrically connected to the first data line through the first detection control unit, and the second end of the first detection line is configured to receive the first detection signal.
  • the second detection line is at least located in the bending area, the first end of the second detection line is electrically connected to the second data line through the second detection control unit, and the second end of the second detection line is configured to receive the first detection signal.
  • the plurality of display units electrically connected to the first data line are configured to emit light to display the first detection line when the first detection control unit is turned on and the first detection line is cracked.
  • the plurality of display units electrically connected to the second data line are configured to emit light to display the second bright line when the second detection control unit is turned on and the second detection line is cracked.
  • the second end of the first detection line and the second end of the second detection line are electrically connected to the same first signal pin.
  • the second frame area further includes: a trace lead-out area and a signal access area located on a side of the bending area away from the display area.
  • the first detection line and the second detection line are electrically connected through a detection connection line, and the detection connection line is electrically connected to the first signal pin in the signal access area.
  • the display panel includes two first detection lines and two second detection lines, the two first detection lines are located on both sides of the display area along the second direction, and the Two second detection lines are located on both sides of the display area along the second direction.
  • the detection connection line includes: a first detection connection line, a second detection connection line and a third detection connection line that are electrically connected in sequence.
  • the first detection connection line is connected to the first detection line located on one side of the display area and
  • the second detection line is electrically connected
  • the third detection connection line is electrically connected to the first detection line and the second detection line located on the other side of the display area.
  • the first detection connection line and the third detection connection line extend along the second direction
  • the second detection connection line extends along the first direction
  • the first direction intersects the second direction.
  • the first detection connection line and the third detection connection line are of the same layer structure, and the second detection connection line is located on a side of the first detection connection line close to the substrate. side.
  • the first detection line includes a first sub-trace located in the first frame area, and the first sub-trace is a serpentine line.
  • the second detection line includes a fifth sub-line located in the bending area, and the fifth sub-line is a serpentine line.
  • At least part of the first detection line is located on a side of the second detection line away from the display area.
  • the frame area further includes: a first power line and a second power line; in the bending area, the second power line is located between the first detection line and the second detection line. The side away from the first power cord.
  • the display panel further includes: at least one third data line located in the display area, at least one third detection line located in the first frame area, and at least one third data line located in the frame area.
  • Three detection control units the first end of the third detection line is electrically connected to the third data line through the third detection control unit, and the second end of the third detection line is configured to receive a second detection signal .
  • the plurality of display units electrically connected to the third data line are configured to display dark lines when the third detection control unit is turned on and receives the second detection signal.
  • the display panel further includes: at least one third data line located in the display area, at least one third detection line located in the first frame area, and at least one third detection line located in the frame area.
  • Three detection control units the first end of the third detection line is electrically connected to the third data line through the third detection control unit, and the second end of the third detection line is configured to receive the first detection signal.
  • the plurality of display units electrically connected to the third data line are configured to emit light to display a bright line when the third detection control unit is turned on and a crack occurs in the third detection line.
  • the first detection control unit includes a first detection transistor, a gate of the first detection transistor is electrically connected to the detection control line, and a first electrode of the first detection transistor is connected to the detection control line.
  • the first detection line is electrically connected
  • the second electrode of the first detection transistor is electrically connected to the first data line.
  • the second detection control unit includes a second detection transistor, a gate of the second detection transistor is electrically connected to the detection control line, and a first electrode of the second detection transistor is electrically connected to the second detection line.
  • the second pole of the second detection transistor is electrically connected to the second data line.
  • the at least one first detection control unit and the at least one second detection control unit are located in the first border area.
  • embodiments of the present disclosure provide a display device, including the display panel as described above.
  • embodiments of the present disclosure provide a crack detection method, which is applied to the display panel as described above, including: when detecting cracks on the display panel, electrically connecting the first detection line and the first detection line through the first detection control unit.
  • the data line is electrically connected to the second detection line and the second data line through the second detection control unit, and provides the first detection signal to the first detection line and the second detection line; based on the first data line and the second data line
  • the lighting status of the plurality of electrically connected display units is used to determine whether there is a crack in the first detection line or the second detection line.
  • Figure 1 is a schematic diagram of a display panel according to at least one embodiment of the present disclosure
  • Figure 2 is a partial cross-sectional schematic diagram along the R-R’ direction in Figure 1;
  • FIG. 3 is a partial wiring diagram of the frame area of the display panel according to at least one embodiment of the present disclosure
  • FIG. 4 is another partial wiring diagram of the frame area of the display panel according to at least one embodiment of the present disclosure.
  • Figure 5 is a schematic diagram of partial wiring of the first frame area and the second frame area in at least one embodiment of the present disclosure
  • Figure 6 is a partial enlarged schematic diagram of area S1 in Figure 5;
  • Figure 7 is a partial enlarged schematic diagram of area S2 in Figure 5;
  • Figure 8 is a partial enlarged schematic diagram of area S3 in Figure 5;
  • Figure 9 is a partial enlarged schematic diagram of area S4 in Figure 5;
  • Figure 10 is a partial enlarged schematic diagram of area S5 in Figure 5;
  • FIG. 11 is a schematic diagram of a display device according to at least one embodiment of the present disclosure.
  • connection should be understood in a broad sense.
  • it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, an indirect connection through an intermediate piece, or an internal connection between two elements.
  • connection should be understood in a broad sense.
  • it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, an indirect connection through an intermediate piece, or an internal connection between two elements.
  • electrical connection includes a case where constituent elements are connected together through an element having some electrical effect.
  • element having some electrical function There is no particular limitation on the "element having some electrical function” as long as it can transmit electrical signals between connected components.
  • elements with some electrical function include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with multiple functions.
  • a transistor refers to an element including at least three terminals: a gate, a drain, and a source.
  • a transistor has a channel region between a drain (drain electrode terminal, drain region, or drain electrode) and a source (source electrode terminal, source region, or source electrode), and current can flow through the drain, channel region, and source .
  • the channel region refers to a region through which current mainly flows.
  • one of the electrodes is called the first pole, and the other electrode is called the second pole.
  • the first pole can be the source or the drain
  • the second pole can be is the drain or source
  • the gate of the transistor is called the control electrode.
  • parallel refers to a state in which the angle formed by two straight lines is -10° or more and 10° or less. Therefore, it also includes a state in which the angle is -5° or more and 5° or less.
  • vertical refers to a state where the angle formed by two straight lines is 80° or more and 100° or less, and therefore includes an angle of 85° or more and 95° or less.
  • triangles, rectangles, trapezoids, pentagons or hexagons are not strictly defined. They can be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small differences caused by tolerances. Deformation can include leading angles, arc edges, deformation, etc.
  • a extending along direction B means that A may include a main part and a secondary part connected to the main part.
  • the main part is a line, line segment or bar-shaped body, the main part extends along direction B, and the main part
  • the length of the portion extending along direction B is greater than the length of the minor portion extending along the other directions.
  • “A extends along direction B” means “the main body part of A extends along direction B”.
  • a and B have the same layer structure” or “A and B are arranged on the same layer” means that A and B are formed at the same time through the same patterning process, or that the surfaces of A and B close to the substrate are The distance between the substrates is basically the same, or the surfaces of A and B close to the substrate are in direct contact with the same film layer.
  • each process stage will have its own process detection function to prevent defective products from being missed in this process stage and flowing into the next process stage, resulting in a waste of materials and resource costs. Therefore, in the preparation process of display panels, it is required to carry out effective and rapid detection of each process stage as much as possible, in order to effectively control production costs and improve the yield of display panels.
  • This embodiment provides a display panel, including: a substrate, a plurality of display units, at least one first data line, at least one second data line, at least one first detection control unit, at least one second detection control unit, at least a first detection line and at least one second detection line.
  • the substrate includes a display area and a frame area located around the display area.
  • the frame area includes a first frame area surrounding the display area and a second frame area located on a side of the first frame area away from the display area.
  • the second frame area at least includes a bending area.
  • a plurality of display units, at least one first data line and at least one second data line are located in the display area, and the first data line and the second data line are respectively electrically connected to some of the display units among the plurality of display units.
  • the first detection line is located at least in the first frame area, the first end of the first detection line is electrically connected to the first data line through the first detection control unit, and the second end of the first detection line is configured to receive the first detection signal.
  • the second detection line is at least located in the bending area, the first end of the second detection line is electrically connected to the second data line through the second detection control unit, and the second end of the second detection line is configured to receive the first detection signal.
  • the first detection line and the second detection line of the display panel provided in this embodiment can both receive the first detection signal.
  • the first detection line and the second detection line can be synchronously detected for cracks, thereby achieving synchronous detection. Cracks in the first frame area and bending area are detected to determine whether the display panel is qualified. In this way, fast and effective crack detection can be achieved, which can improve the quality of the display panel and reduce production costs.
  • the plurality of display units electrically connected by the first data line may be configured to emit light to display the first bright line when the first detection control unit is turned on and the first detection line cracks.
  • the plurality of display units electrically connected to the second data line may be configured to emit light to display the second bright line when the second detection control unit is turned on and the second detection line is cracked.
  • This example can determine whether cracks occur in the first frame area and the bending area based on whether the display panel displays the first bright line and the second bright line, and can identify the occurrence of cracks when the display panel displays the first bright line or the second bright line. position, the first frame area and the bending area can be effectively and quickly detected, thereby effectively controlling production costs and improving the yield rate of the display panel.
  • FIG. 1 is a schematic diagram of a display panel according to at least one embodiment of the present disclosure.
  • the display panel may include: a display area 10 and a frame area located around the display area 10 .
  • the frame area may include: a first frame area 21 surrounding the display area 10 and a second frame area 22 located on one side of the display area 10 .
  • the second frame area 22 may be located on a side of the first frame area 21 away from the display area 10 .
  • part of the first frame area 21 may be located between the display area 10 and the second frame area 22.
  • the second frame area 22 may include: a bending area 221 , a wiring lead-out area 222 , and a signal access area (including the first signal access area) arranged in sequence along a direction away from the display area 10 (ie, the first direction D1 ). 223 and the second signal access area 224).
  • the bending area 221 may be located on a side of the first frame area 21 away from the display area 10 , and the bending area 221 may be connected to the first frame area 21 .
  • the wire lead-out area 222 is located between the bending area 221 and the first signal access area 223
  • the second signal access area 224 is located on a side of the first signal access area 223 away from the display area 10 .
  • the bending area 221 may be configured to bend the wire lead-out area 222 , the first signal access area 223 and the second signal access area 224 to the back of the display area 10 .
  • the first signal access area 223 can be configured to set a corresponding integrated circuit, for example, it can be a display driver integrated circuit (DDI, Display Driver Integration) or a touch and display driver integrated circuit (TDDI, Touch and Display Driver Integration).
  • the second signal access area 224 can be configured to set multiple binding pins, and the multiple binding pins can be bound to a flexible printed circuit board (FPC, Flexible Printed Circuit), so that multiple signal leads (for example, drive control lines, power cord, etc.) are connected to external control devices through multiple bonding pins.
  • FPC Flexible Printed Circuit
  • display area 10 may be circular. However, this embodiment is not limited to this.
  • the display area 10 may be in a rectangular shape, an elliptical shape, or other shapes.
  • the display area 10 may include: a substrate, a display structure layer and a packaging structure layer disposed on the substrate.
  • the display structure layer may include multiple display units (ie, sub-pixels), multiple gate lines, and multiple data lines.
  • the plurality of data lines may extend along the first direction D1, and the plurality of gate lines may extend along the second direction D2.
  • the first direction D1 intersects the second direction D2.
  • the first direction D1 may be perpendicular to the second direction D2.
  • Orthographic projections of multiple gate lines and multiple data lines on the substrate may intersect to form multiple sub-pixel areas.
  • a subpixel is set within a subpixel area.
  • the plurality of data lines are electrically connected to the plurality of sub-pixels, and the plurality of data lines are configured to provide data signals to the plurality of sub-pixels.
  • the plurality of gate lines are electrically connected to the plurality of sub-pixels, and the plurality of gate lines are configured to provide gate driving signals to the plurality of sub-pixels.
  • one pixel unit of the display area may include three sub-pixels, and the three sub-pixels are red sub-pixels, green sub-pixels and blue sub-pixels respectively.
  • the three sub-pixels can be arranged horizontally, vertically or vertically.
  • one pixel unit may include four sub-pixels, and the four sub-pixels are respectively a red sub-pixel, a green sub-pixel, a blue sub-pixel and a white sub-pixel.
  • the four sub-pixels can be arranged horizontally, vertically or squarely.
  • At least one subpixel may include a pixel circuit and a light emitting element.
  • the pixel circuit may be configured to drive connected light emitting elements.
  • a pixel circuit may include a plurality of transistors and at least one capacitor.
  • the pixel circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure.
  • T in the above circuit structure refers to the thin film transistor
  • C refers to the capacitor
  • the number in front of T represents the number of thin film transistors in the circuit
  • the number in front of C represents the number of capacitors in the circuit.
  • the plurality of transistors in the pixel circuit may be P-type transistors, or may be N-type transistors. Using the same type of transistors in pixel circuits can simplify the process flow, reduce the process difficulty of the display panel, and improve the product yield. In other examples, the plurality of transistors in the pixel circuit may include P-type transistors and N-type transistors.
  • the plurality of transistors in the pixel circuit may employ low-temperature polysilicon thin film transistors, or may employ oxide thin film transistors, or may employ low-temperature polysilicon thin film transistors and oxide thin film transistors.
  • the active layer of low-temperature polysilicon thin film transistors uses low temperature polysilicon (LTPS, Low Temperature Poly-Silicon), and the active layer of oxide thin film transistors uses oxide semiconductor (Oxide).
  • LTPS Low Temperature Poly-Silicon
  • oxide semiconductor Oxide
  • Low-temperature polysilicon thin film transistors and oxide thin film transistors are integrated on a display panel, that is, LTPS+Oxide (LTPO for short) Display panels can take advantage of both to achieve low-frequency driving, reduce power consumption, and improve display quality.
  • LTPS+Oxide LTPO for short
  • the light-emitting element may be a light-emitting diode (LED, Light Emitting Diode), an organic light-emitting diode (OLED, Organic Light Emitting Diode), a quantum dot light-emitting diode (QLED, Quantum Dot Light Emitting Diodes), or a micro-LED (including: Any of mini-LED or micro-LED), etc.
  • the light-emitting element can be an OLED, and the light-emitting element can emit red light, green light, blue light, or white light, etc., driven by its corresponding pixel circuit.
  • the color of the light-emitting element can be determined according to needs.
  • the light-emitting element may include: an anode, a cathode, and an organic light-emitting layer located between the anode and the cathode.
  • the anode of the light-emitting element may be electrically connected to the corresponding pixel circuit.
  • this embodiment is not limited to this.
  • the display panel may also integrate a touch structure.
  • the display area of the display panel may also include: a touch structure layer located on the side of the packaging structure layer away from the substrate.
  • the touch structure layer can be set on the packaging structure layer of the display panel to form a touch structure on thin film encapsulation (Touch on Thin Film Encapsulation, Touch on TFE for short).
  • the display structure and the touch structure are integrated together, making it lightweight and thin. , foldable and other advantages, it can meet product needs such as flexible folding and narrow borders.
  • Touch on TFE structure mainly includes Flexible Multi-Layer On Cell (FMLOC) structure and Flexible Single-Layer On Cell (FSLOC) structure.
  • FMLOC structure is based on the working principle of mutual capacitance detection.
  • the integrated circuit realizes the touch action by detecting the mutual capacitance between the driving electrode and the sensing electrode.
  • the FSLOC structure is based on the working principle of self-capacitance (or voltage) detection.
  • a single layer of metal is used to form the touch electrode, and the integrated circuit realizes the touch action by detecting the self-capacitance (or voltage) of the touch electrode.
  • the touch structure layer may include multiple touch units. At least one touch unit may include at least one touch electrode.
  • the orthographic projection of at least one touch electrode on the substrate may include orthographic projections of multiple sub-pixels on the substrate.
  • the touch unit includes multiple touch electrodes, the multiple touch electrodes may be arranged at intervals, and adjacent touch electrodes may be connected to each other through connecting parts.
  • the touch electrode and the connection part may have the same layer structure.
  • the touch electrode may have a rhombus shape, for example, it may be a regular rhombus shape, a horizontally elongated rhombus shape, or a vertically elongated rhombus shape. However, this embodiment is not limited to this.
  • the touch electrode may have any one or more of a triangle, a square, a trapezoid, a parallelogram, a pentagon, a hexagon, and other polygons.
  • the touch electrodes in the display panel may be in the form of a metal grid.
  • the metal grid is formed by interweaving multiple metal lines.
  • the metal grid includes multiple grid patterns.
  • the grid pattern is surrounded by multiple metal lines.
  • the touch electrodes in the form of polygons and metal grids have the advantages of small resistance, small thickness and fast response speed. However, this embodiment is not limited to this.
  • Figure 2 is a partial cross-sectional view along the R-R’ direction in Figure 1.
  • the display area 10 may include: a substrate 41 , a driving circuit layer 42 sequentially disposed on the substrate 41 , a light emitting element 43 , Encapsulation structure layer 44 and touch structure layer 45 .
  • a driving circuit layer 42 sequentially disposed on the substrate 41
  • a light emitting element 43 a light emitting element 43
  • Encapsulation structure layer 44 Encapsulation structure layer 44
  • touch structure layer 45 touch structure layer 45 .
  • Figure 2 only the structure of one sub-pixel is taken as an example for illustration.
  • substrate 41 may be a flexible substrate.
  • the flexible substrate may include a stacked first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer.
  • the first flexible material layer and the second flexible material layer can be made of polyimide (PI), polyethylene terephthalate (PET) or surface-treated polymer soft film.
  • the material of the inorganic material layer and the second inorganic material layer can be silicon nitride (SiNx) or silicon oxide (SiOx) to improve the water and oxygen resistance of the substrate.
  • the material of the semiconductor layer can be amorphous silicon (a -si). However, this embodiment is not limited to this.
  • the driving circuit layer 42 may include a plurality of transistors forming a pixel circuit and at least one storage capacitor.
  • a first transistor 401 and a first storage capacitor 402 are taken as an example for illustration.
  • the driving circuit layer 42 of the display area 10 may include: a semiconductor layer disposed on the substrate 41, a first insulating layer 51 covering the semiconductor layer, a first gate metal layer disposed on the first insulating layer 51, and a first gate metal layer covering the first gate layer 41.
  • the semiconductor layer may include at least a first active layer, the first gate metal layer may include at least a first gate electrode and a first capacitor electrode, the second gate metal layer may include at least a second capacitor electrode, and the first source and drain metal layer may at least Includes a first source electrode and a first drain electrode.
  • the first active layer, the first gate electrode, the first source electrode and the first drain electrode may form the first transistor 401, and the first capacitor electrode and the second capacitor electrode may form the first storage capacitor 402.
  • the driving circuit layer may further include a sixth insulating layer and a second source-drain metal layer located on the side of the first source-drain metal layer away from the substrate. However, this embodiment is not limited to this.
  • the light-emitting element 43 may include a first electrode 431, a pixel definition layer 434, an organic light-emitting layer 432, and a second electrode 433.
  • the first electrode 431 is disposed on the fifth insulating layer 55 and is connected to the first drain electrode of the first transistor 401 through the via holes opened in the fourth insulating layer 54 and the fifth insulating layer 55 .
  • the pixel definition layer 434 may be disposed on the first electrode 431 and the fifth insulating layer 55 , and a pixel opening may be disposed on the pixel definition layer 434 , and the pixel opening may expose part of the surface of the first electrode 431 .
  • the organic light-emitting layer 432 is at least partially disposed within the pixel opening, and the organic light-emitting layer 432 is connected to the first electrode 431 .
  • the second electrode 433 is provided on the organic light-emitting layer 432, and the second electrode 433 is connected to the organic light-emitting layer 432.
  • the organic light-emitting layer 432 of the light-emitting element 43 may include an Emitting Layer (EML), a Hole Injection Layer (HIL), a Hole Transport Layer (HTL) , Hole Transport Layer), hole blocking layer (HBL, Hole Block Layer), electron blocking layer (EBL, Electron Block Layer), electron injection layer (EIL, Electron Injection Layer), electron transport layer (ETL, Electron Transport Layer) one or more film layers.
  • EML Emitting Layer
  • HIL Hole Injection Layer
  • HTL Hole Transport Layer
  • HBL Hole Transport Layer
  • HBL Hole Transport Layer
  • EBL Electron Block Layer
  • EIL Electron Injection Layer
  • ETL Electron Transport Layer
  • the light-emitting characteristics of the organic material are used to emit light according to the required grayscale.
  • light-emitting elements of different colors have different light-emitting layers.
  • a red light-emitting element includes a red light-emitting layer
  • a green light-emitting element includes a green light-emitting layer
  • a blue light-emitting element includes a blue light-emitting layer.
  • the hole injection layer and hole transport layer located on one side of the light-emitting layer can use a common layer
  • the electron injection layer and electron transport layer located on the other side of the light-emitting layer can use a common layer.
  • any one or more layers of the hole injection layer, the hole transport layer, the electron injection layer and the electron transport layer can be produced by one process (one evaporation process or one inkjet printing process), and Isolation can be achieved through surface segmentation of the formed film layer or through surface treatment and other means.
  • any one or more of the hole injection layer, hole transport layer, electron injection layer and electron transport layer corresponding to adjacent sub-pixels may be isolated.
  • the organic light-emitting layer can be formed by evaporation using a fine metal mask (FMM) or an open mask (Open Mask), or by using an inkjet process.
  • FMM fine metal mask
  • Open Mask open mask
  • the packaging structure layer 44 may include a stacked first packaging layer, a second packaging layer, and a third packaging layer.
  • the first encapsulation layer and the third encapsulation layer can be made of inorganic materials
  • the second encapsulation layer can be made of organic materials.
  • the second encapsulation layer is arranged between the first encapsulation layer and the third encapsulation layer to ensure that external water vapor cannot enter and emit light.
  • the encapsulation layer may adopt a five-layer stacked structure of inorganic/organic/inorganic/organic/inorganic.
  • the touch structure layer 45 may include: a first touch insulating layer 451 disposed on a side of the packaging structure layer 44 away from the substrate 41 , a first touch insulating layer 451 disposed on a side away from the first touch insulating layer 451
  • the touch structure layer in this example takes the FSLOC structure as an example. However, this embodiment is not limited to this.
  • FIG. 3 is a partial wiring diagram of a display panel according to at least one embodiment of the present disclosure.
  • FIG. 3 several data lines in the display area and several detection lines in the frame area are used as examples for illustration, and other wiring lines are omitted.
  • the display area 10 may include: at least two first data lines 11, at least two second data lines 12, and a plurality of third data lines 13.
  • Each data line may be electrically connected to a plurality of display units Px arranged along the first direction D1 and configured to provide data signals to the plurality of display units Px.
  • the first data line 11 and the second data line 12 can be configured to be electrically connected to a display unit that emits the same color light.
  • the first data line 11 and the second data line can be configured to be electrically connected to a plurality of display units that emit green light. Unit electrical connections.
  • this embodiment is not limited to this.
  • the two first data lines 11 may be substantially symmetrical with respect to the centerline of the display area 10 along the second direction D2
  • the two second data lines 12 may be substantially symmetrical with respect to the centerline of the display area 10 along the second direction D2.
  • the first data line 11 and the second data line 12 may not be adjacent, and multiple third data lines 13 may be provided between the first data line 11 and the second data line 12 .
  • the number of third data lines 13 provided between the first data line 11 and the second data line 12 is required so that a plurality of display units electrically connected by the first data line 11 and a plurality of display units electrically connected by the second data line 12 are It can be distinguished by the naked eye when lit.
  • the two first data lines 11 may not be adjacent, and multiple third data lines 13 may be provided between the two first data lines 11 .
  • the number of third data lines 13 provided between the two first data lines 11 is required so that multiple display units electrically connected to the two first data lines 11 can be distinguished by the naked eye when they are lit.
  • the two second data lines 12 may not be adjacent, and multiple third data lines 13 may be provided between the two second data lines 12 .
  • the number of third data lines 13 provided between the two second data lines 12 is required so that multiple display units electrically connected to the two second data lines 12 can be distinguished by the naked eye when they are lit.
  • all data lines in the display area 10 except the first data line 11 and the second data line 12 can be used as the third data line 13 .
  • this embodiment is not limited to this.
  • the frame area may include: a plurality of detection control units (for example, the first detection control unit 35 , the second detection control unit 36 and the third detection control unit 37 ), two first detection control units Detection lines 31a and 31b, two second detection lines 32a and 32b, a third detection line 33, and a detection control line 34.
  • multiple detection control units may be located in the first frame area 21 .
  • a first detection control unit 35 may be electrically connected to a first detection line and at least one first data line 11
  • a second detection control unit 36 may be electrically connected to a second detection line and at least one second data line 12
  • a third detection control unit 37 may be electrically connected to a third detection line 33 and at least one third data line 13 .
  • One third detection line 33 may be electrically connected to a plurality of third detection control units 37 and a plurality of third data lines 13 .
  • the detection control line 34 may be electrically connected with the first detection control unit 35 , the second detection control unit 36 and the third detection control unit 37 .
  • this embodiment is not limited to this. In other examples, multiple detection control units may be located in the second frame area.
  • the two first detection lines 31 a and 31 b may be substantially symmetrical about the center line of the display panel along the second direction D2 .
  • the first detection line 31a may be located in the left half of the frame area
  • the first detection line 31b may be located in the right half of the frame area.
  • the first detection line 31a may include: a first sub-trace 311a located in the first frame area 21, a second sub-trace 312a located in the bending area 221, and a third sub-trace 313a located in the line lead-out area 222.
  • the first detection line 31b may include a first sub-trace 311b located in the first frame area 21, a second sub-trace 312b located in the bending area 221, and a third sub-trace 313b located in the line lead-out area 222.
  • the first sub traces 311a and 311b may be serpentine traces. Among them, the serpentine trace is a bending curve. For example, after one end of the trace extends for a certain distance in one direction, it is bent and detoured and extended for a certain distance in the opposite direction to that direction. Wire.
  • the first sub-traces 311a and 311b may be routed along the direction of the first frame area 21 away from the display area 10 .
  • the first sub-traces 311a and 311b may include a plurality of arc segments (eg, three arc segments), and straight line segments connected between adjacent arc segments.
  • the shape of the arc segment may be substantially the same as the edge shape of the left or right part of the display area 10 .
  • first sub-trace 311a may be electrically connected to the first detection control unit 35, and the other end may be electrically connected to one end of the second sub-trace 312a (or 312b); the second sub-trace 312a (or The other end of 312b) can be electrically connected to one end of the third sub-line 313a (or 313b), and the other end of the third sub-line 313a (or 313b) can be connected to the first signal access area 223 through the detection connection line 38.
  • the first signal pin 391 is electrically connected.
  • the detection connection line 38 can also extend to the second signal access area 224 and be electrically connected to the fourth signal pin 394 located in the second signal access area 224 .
  • the fourth signal pin 394 can be used as a test pin. For example, providing a test signal through the fourth signal pin 394 can identify whether there is a defect in the integrated circuit provided in the first signal access area.
  • the first detection control unit 35 may be located on a side of the first detection line 31 a or 31 b close to the display area 10 .
  • the first detection control unit 35 may include a first detection transistor.
  • the gate electrode of the first detection transistor may be electrically connected to the detection control line 34, the first electrode of the first detection transistor may be electrically connected to the first end of the first detection line 31a or 31b, and the second electrode of the first detection transistor may be electrically connected to the detection control line 34.
  • the first data line 11 of the display area 10 is electrically connected.
  • the two second detection lines 32a and 32b may be substantially symmetrical about the centerline of the display panel along the second direction D2.
  • the second detection line 32a may be located in the left half of the frame area
  • the second detection line 32b may be located in the right half of the frame area.
  • the second detection line 32a may include: a fourth sub-trace 321a located in the first frame area 21, a fifth sub-trace 322a located in the bending area 221, and a sixth sub-trace 323a located in the line lead-out area 222.
  • the second detection line 32b may include: a fourth sub-trace 321b located in the first frame area 21, a fifth sub-trace 322b located in the bending area 221, and a sixth sub-trace 323b located in the line lead-out area 222.
  • the fifth sub-trace 322a and 322b may be serpentine traces.
  • the fifth sub-traces 322a and 322b may be wound along the second direction D2 in the bending area 221.
  • One end of the fourth sub-trace 321a may be electrically connected to the second detection control unit 36, and the other end may be electrically connected to one end of the fifth sub-trace 322a (or 322b); the fifth sub-trace 322a (or The other end of the sixth sub-line 322b) can be electrically connected to one end of the sixth sub-line 323a (or 323b), and the other end of the sixth sub-line 323a (or 323b) can be connected to the first signal access area 223 through the detection connection line 38.
  • the first signal pin 391 is electrically connected.
  • the second detection control unit 36 may be located on a side of the second detection line 32 a or 32 b close to the display area 10 .
  • the second detection control unit 36 may include a second detection transistor.
  • the gate electrode of the second detection transistor may be electrically connected to the detection control line 34
  • the first electrode of the second detection transistor may be electrically connected to the first end of the second detection line 32a or 32b
  • the second electrode of the second detection transistor may be electrically connected to the detection control line 34.
  • the second data line 12 of the display area 10 is electrically connected.
  • the third detection line 33 may include a seventh sub-track 331 located in the first frame area 21 and an eighth sub-track extending from the first frame area 21 to the second frame area.
  • Line 332 may be a ring-shaped trace surrounding the display area 10 .
  • One end of the eighth sub-trace 332 is electrically connected to the seventh sub-trace 331 , and the other end may be electrically connected to the second signal pin 392 in the first signal access area 223 .
  • the third detection control unit 37 may include: a third detection transistor.
  • the gate electrode of the third detection transistor may be electrically connected to the detection control line 34
  • the first electrode of the third detection transistor may be electrically connected to the third detection line 33
  • the second electrode of the third detection transistor may be electrically connected to the third electrode of the display area 10 .
  • the data line 13 is electrically connected.
  • the detection control line 34 may include a ninth sub-trace 341 located in the first frame area 21 and a tenth sub-trace extending from the first frame area 21 to the second frame area. 342.
  • the ninth sub-trace 341 may be a ring-shaped trace surrounding the display area 10 .
  • the ninth sub-trace 341 may be located on a side of the seventh sub-trace 331 close to the display area 10 .
  • One end of the tenth sub-trace 342 is electrically connected to the ninth sub-trace 341 , and the other end may be electrically connected to the third signal pin 393 in the first signal access area 223 .
  • the detection control line 34 may provide a detection control signal configured to turn on or off a plurality of detection control units.
  • the detection transistor included in the detection control unit may be a P-type transistor.
  • the detection control line 34 can turn on the detection transistor by providing a low-level detection control signal, and providing a high-level detection control signal can cause the detection The transistor is turned off.
  • the detection transistor may be an N-type transistor.
  • the detection control line provides a high-level detection control signal to turn on the detection transistor, and provides a low-level detection control signal to turn off the detection transistor.
  • the detection control signal provided by the detection control line 34 can cause the detection transistor to be turned on, so that the first detection control unit 35 , the second detection control unit 36 and the third detection control unit 37 all conduction.
  • the first detection lines 31a and 31b and the second detection lines 32a and 32b may receive a first detection signal (eg, a high level signal), and the third detection line 33 may receive a second detection signal (eg, a high level signal).
  • the first detection lines 31 a and 31 b can be conductive with the corresponding first data line 11
  • the second detection lines 32a and 32b can be connected to the corresponding second data line 12
  • the third detection line 33 can be connected to the corresponding third data line 13, thereby providing the first data line 11 and the second data line 12 with
  • the first detection signal is provided, and the second detection signal is provided to the third data line 13, so that none of the display units electrically connected to these data lines emit light.
  • the display unit of the entire display area of the display panel appears black, that is, the display area displays a dark image.
  • the voltage drop caused by the increase in the wiring resistance of the first detection line 31a prevents the first detection signal from being transmitted to the corresponding first data line 11.
  • This first data line The display unit connected by 11 can emit light, the second data line can receive the first detection signal, the third data line can receive the second detection signal, and the display unit electrically connected by the second data line and the third data line does not emit light, so that The first bright line corresponding to the first data line 11 is displayed in the display area.
  • the second data line 12 electrically connected to the second detection line 32a or 32b cannot receive the first detection signal
  • the display unit electrically connected to the second data line 12 cannot receive the first detection signal.
  • the display unit that is electrically connected to the other data lines may emit light and does not emit light, and may display the second bright line corresponding to the second data line 12 in the display area. In this way, the location of the crack in the display panel can be identified based on the positions of the first bright line and the second bright line.
  • the second detection signal is provided to the data line that is not connected to the first detection line and the second detection line through the third detection control unit and the third detection line, so that the display area displays a dark image, so that a dark image appears in the display area.
  • Bright lines can be easily identified by the human eye.
  • the display panel may not be provided with the third detection control unit and the third detection line.
  • the first detection signal can be directly provided to the data line that is not connected to the first detection line and the second detection line, so that the display unit electrically connected to these data lines does not emit light.
  • FIG. 4 is another partial wiring diagram of a display panel according to at least one embodiment of the present disclosure.
  • the eighth sub-line 332 of the third detection line 33 may be electrically connected to the detection connection line 38 in the second frame area to be configured to receive the first detection signal.
  • the first signal access area 223 may not be provided with the second signal pin 392 .
  • the first detection lines 31a and 31b, the second detection lines 32a and 32b, and the third detection line 33 may receive the same first detection signal.
  • the first detection lines 31a and 31b and the third detection line 33 may be configured to detect cracks in the first frame area, and the second detection lines 32a and 32b may be configured to detect cracks in the bending area.
  • the detection control signal provided by the detection control line 34 can cause the detection transistor to be turned on, so that the first detection control unit 35 , the second detection control unit 36 and the third detection control unit 37 all conduction.
  • the first detection lines 31a and 31b, the second detection lines 32a and 32b, and the third detection line 33 may receive a first detection signal (eg, a high level signal).
  • the first detection lines 31 a and 31 b can be conductive with the corresponding first data line 11
  • the second detection lines 32a and 32b can be connected to the corresponding second data line 12
  • the third detection line 33 can be connected to the corresponding third data line 13, thereby providing the first data line 11 and the second data line 12 with and the third data line 13 provide a first detection signal, so that none of the display units electrically connected to these data lines emit light.
  • the display unit of the entire display area of the display panel appears black, that is, the display area displays a dark image.
  • the voltage drop caused by the increase in the wiring resistance of the first detection line 31a prevents the first detection signal from being transmitted to the corresponding first data line 11.
  • This first data line The display unit connected to 11 can emit light, and the remaining data lines can receive the first detection signal.
  • the display units electrically connected to the other data lines do not emit light, so that the first bright light corresponding to the first data line 11 is displayed in the display area. Wire.
  • the second data line 12 electrically connected to the second detection line 32a or 32b cannot receive the first detection signal, and the display unit electrically connected to the second data line 12 cannot receive the first detection signal.
  • the display unit that is electrically connected to the other data lines may emit light and does not emit light, and may display the second bright line corresponding to the second data line 12 in the display area.
  • the third data line 13 electrically connected to the third detection line 33 cannot receive the first detection signal.
  • the display unit electrically connected to the third data line 13 can emit light, and the remaining data lines
  • the electrically connected display unit does not emit light and can display a bright line corresponding to the third data line 13 in the display area. In this way, the location of the crack in the display panel can be identified based on the position of the bright line.
  • the first detection signal can be used to simultaneously realize frame crack detection through three sets of detection lines (first detection line, second detection line, and third detection line), which can increase the detection range and improve detection efficiency.
  • the display unit electrically connected to the first data line 11 corresponding to the first detection line 31a when the display unit electrically connected to the first data line 11 corresponding to the first detection line 31a emits light to display the first bright line, it can be identified that a crack exists in the first detection line 31a.
  • the display unit electrically connected to the first data line 11 corresponding to the first detection line 31b emits light to display the first bright line, it can be identified that a crack exists in the first detection line 31b.
  • the display unit electrically connected to the second data line 12 corresponding to the second detection line 32a emits light to display the second bright line, it can be identified that a crack exists in the second detection line 32a.
  • the display unit electrically connected to the second data line 12 corresponding to the second detection line 32b emits light to display the second bright line
  • the display unit electrically connected to the third data line 13 corresponding to the third detection line 33 emits light to display a bright line
  • the third detection line 33 may be configured to detect whether a crack exists in an area surrounding the display area.
  • the first detection line 31a by arranging the first detection line 31a to wind in the left area of the first frame area 21, the first detection line 31a can be configured to mainly detect whether there is a crack in the left area of the first frame area 21.
  • the first detection line 31b By arranging the first detection line 31b to be wound in the right area of the first frame area 21, the first detection line 31b can be configured to mainly detect whether there is a crack in the right area of the first frame area 21.
  • the second detection line 32a By arranging the second detection line 32a to wind around the left part of the bending area 221, the second detection line 32a can be configured to mainly detect whether there is a crack in the left part of the bending area 221.
  • the second detection line 32b By arranging the second detection line 32b to wind around the right part of the bending area 221, the second detection line 32b can be configured to mainly detect whether there is a crack in the right part of the bending area 221.
  • the first detection line is connected to the first data line
  • the second detection line is connected to the second data line
  • the first detection line and the second detection line can receive the first detection signal synchronously, they can synchronously pass through the second detection line.
  • the first detection line and the second detection line perform crack detection, and synchronously identify whether there are cracks at the positions of the first detection line and the second detection line based on the bright line display position in the display area, and then determine whether the entire display panel has cracks.
  • this example simultaneously uses bright line detection to detect the existence of the first frame area and the bending area.
  • the detection range can be increased by setting a first detection line and a second detection line and performing synchronous detection on the first detection line and the second detection line.
  • FIG. 5 is a partially enlarged schematic diagram of the first frame area and the second frame area according to at least one embodiment of the present disclosure.
  • the frame area may include: a plurality of data lead lines 61 and a plurality of drive control signal lines 62 .
  • the plurality of data lead-out lines 61 may be substantially symmetrical with respect to the centerline of the display panel along the second direction D2
  • the plurality of drive control signal lines 62 may be substantially symmetrical with respect to the centerline of the display panel along the second direction D2.
  • multiple data lead-out lines and multiple drive control signal lines are shown as a whole. This embodiment does not limit the number of data lead-out lines and drive control signal lines.
  • the circuit structure of the first frame region 21 (for example, including a gate drive circuit, a multiplexing circuit, a test circuit, an electrostatic discharge circuit, etc.) is omitted in FIG. 5 .
  • At least one data lead-out line 61 may include: a first sub-data lead-out line 611 located in the first frame area 21 , a data connection located in the bending area 221 and extending along the first direction D1 Line 613, and the second sub-data lead-out line 612 located in the wiring lead-out area 222 and extending along the first direction D1.
  • the first sub-data lead-out line 611 and the second sub-data lead-out line 612 may be electrically connected through the data connection line 613 of the bending area 221 .
  • the first sub-data lead-out line 61 after the first sub-data lead-out line 61 is electrically connected to the multiplexing circuit, it can be extended along the edge shape of the display area to the area of the first frame area 21 close to the bending area 221, and then toward the bending area along the first direction D1. 221 extends on one side.
  • the second sub-data lead-out line 612 may be configured to be electrically connected to the integrated circuit of the first signal access area 223.
  • the first sub-data lead-out line 611 and the second sub-data lead-out line 612 may be provided on the same layer as the first gate metal layer or the second gate metal layer of the display area, and the data connection line 613 may be provided on the same layer as the first gate metal layer of the display area.
  • a source and drain metal layer are arranged on the same layer.
  • At least one driving control signal line 62 may include: a first sub-driving control signal line 621 and a second sub-driving control signal line 622 located in the first frame area 21 , a first sub-driving control signal line 622 located in the bending area, 221, the third sub-drive control signal line 623, the fourth sub-drive control signal line 624 and the fifth sub-drive control signal line 625 located in the wiring lead-out area 222.
  • the first sub-driving control signal line 621 may extend along the edge shape of the display area 10 and be electrically connected to the electrostatic discharge circuit and then electrically connected to the second sub-driving control signal line 622 extending along the first direction D1.
  • the second sub-driving signal control line 622 may be electrically connected to the third sub-driving signal control line 623 extending along the first direction D1 through the driving control connection line 626 extending along the first direction D1.
  • the third sub-driving control signal line 623 may be electrically connected to the fourth sub-driving control signal line 624 extending at least along the second direction D2, and may also be electrically connected to the fifth sub-driving control signal line 625.
  • the fifth sub-driving control signal line 625 may be electrically connected to the signal pin in the first signal access area 223, and the fourth sub-driving control signal line 624 may be electrically connected to the binding pin in the second signal access area.
  • the frame area can also be provided with multiple touch signal lines.
  • the touch signal line may include a first sub-touch signal line (not shown) located in the first frame area, a touch connection line 63 located in the bending area 221, and a second sub-touch signal line located in the wiring lead-out area. line (not shown).
  • the second sub-touch signal line may extend to the first signal access area 223 along the first direction D1, and may be electrically connected to a TDDI circuit, for example.
  • the touch connection lines 63 may be arranged in the same layer as the first source and drain metal layer of the display area.
  • the second sub-touch signal line located in the wiring lead-out area can extend to the second signal access area along the first direction D1 and the fourth direction D4, and the signal pins in the second signal access area Electrically connected, and electrically connected to the flexible circuit board (FPC) through the signal pins in the second signal access area.
  • the touch signal line may be located on the side of the second power line 65 away from the first power line 64 .
  • the frame area may also be provided with a first power line 64 and a second power line 65 .
  • the first power line 64 and the second power line 65 may have the same layer structure.
  • the first power line 64 and the second power line 65 may be provided in the same layer as the first source and drain metal layer of the display area.
  • the first power line 64 may include a first sub-power line 641 located in the first frame area 21 , a first power connection line 643 located in the bending area 221 , and a first power connection line 643 located in the wiring lead-out area.
  • the first power connection line 643 may electrically connect the first sub-power line 641 and the second sub-power line 642 .
  • the second sub-power line 642 may extend along the first direction D1, then extend to both sides along the second direction D2, and then extend toward the second signal access area along the third direction D3 and the fourth direction D4 respectively, so as to communicate with the second signal access area.
  • the bonded pins in the signal access area are electrically connected.
  • the third direction D3 and the fourth direction D4 both intersect the first direction D1 and the second direction D2, and the third direction D3 intersects the fourth direction D4.
  • the third direction D3 may be perpendicular to the fourth direction D4.
  • the second power line 65 may be located on a side of the first power line 64 close to the edge of the display panel.
  • the second power line 65 may include: a third sub-power line 651 located in the first frame area 21 , a second power connection line 653 located in the bending area 221 , and a fourth sub-power line 652 located in the wiring lead-out area 222 .
  • the fourth sub-power line 652 located in the left area of the second frame area may first extend along the first direction D1 and then extend along the fourth direction D4 toward the second signal access area.
  • the fourth sub-power line 652 located in the right area of the second frame area may first extend along the first direction D1, and then extend toward the second signal access area along the third direction D3.
  • the fourth sub-power line 652 may be electrically connected to the binding pin of the second signal access area.
  • the first sub-line 311 a of the first detection line 31 a may be located away from the third sub-power line 651 of the second power line 65 away from the display area 10
  • the fourth sub-line 321a of the second detection line 32a may be located on the side of the third sub-power line 651 of the second power line 65 close to the display area 10 .
  • the first sub-trace 311b of the first detection line 31b may be located on the side of the third sub-power line of the second power line away from the display area 10
  • the fourth sub-trace 321b of the second detection line 32b may be located on the side of the third sub-trace of the second power line 31b.
  • the third sub-power line of the two power lines is close to one side of the display area 10 .
  • FIG. 6 is a partially enlarged schematic diagram of area S1 in FIG. 5 .
  • the second sub-trace 312a of the first detection line 31a may be a straight segment extending along the first direction D1.
  • the first sub-line 311a and the third sub-line 313a may have the same layer structure, for example, they may be arranged in the same layer as the second gate metal layer of the display area.
  • the second sub-line 312a may be disposed on the same layer as the first source-drain metal layer of the display area.
  • the fifth sub-trace 322a of the second detection line 32a may include a plurality (for example, five) first straight line segments along the first direction D1 and a second straight line extending along the second direction D2 connecting adjacent first straight line segments. part.
  • the second straight line segment may connect multiple first straight line segments in series.
  • the fifth sub-line 322a may be disposed on the same layer as the first source-drain metal layer of the display area.
  • the fourth sub-trace 321a may be disposed on the same layer as the first gate metal layer of the display area, and the sixth sub-trace 323a may be disposed on the same layer as the second gate metal layer of the display area.
  • One end of the fifth sub-trace 322a can be electrically connected to the fourth sub-trace 321a through the via hole opened in the third insulating layer and the second insulating layer, and the other end can be connected to the sixth sub-trace 321a through the via hole opened in the third insulating layer.
  • Line 323a is electrically connected.
  • the greater the number of first straight segments of the fifth sub-trace 322a the wider the range of the bending area that the second detection line 32a can detect.
  • the second sub-trace 312a of the first detection line 31a and the fifth sub-trace 322a of the second detection line 32a may be located at the second power source. between the second power connection line 653 of the line 65 and the plurality of touch connection lines 63 .
  • the fifth sub-trace 322a of the second detection line 32a may be located on a side of the second sub-trace 312a of the first detection line 31a away from the second power connection line 653 of the second power line 65.
  • the second detection line by arranging the second detection line on the side of the second power line away from the edge of the display panel in the bending area, it is advantageous for the second detection line to detect cracks in the bending area.
  • arranging the first detection line and the second detection line adjacently in the bending area facilitates wiring arrangement.
  • FIG. 7 is a partially enlarged schematic diagram of area S2 in FIG. 5 .
  • the third sub-trace 313a of the first detection line 31a may first extend toward the side away from the display area along the first direction D1, and then toward the display panel along the third direction D3. Extend along the center line in the second direction, and then extend along the first direction D1 toward the side away from the display area.
  • the extension direction of the sixth sub-trace 323a of the second detection line 32a is substantially the same as the extension direction of the third sub-trace 313a.
  • the sixth sub-trace 323a may be located on a side of the centerline of the third sub-trace 313a of the display panel along the second direction.
  • the structures of the first detection line 31b and the second detection line 32b reference can be made to the structures of the first detection line 31a and the second detection line 32a, so no details are given here.
  • FIG. 8 is a partially enlarged schematic diagram of area S3 in FIG. 5 .
  • FIG. 9 is a partially enlarged schematic diagram of area S4 in FIG. 5 .
  • FIG. 10 is a partially enlarged schematic diagram of area S5 in FIG. 5 .
  • the third sub-trace 313a of the first detection line 31a may be electrically connected to the first detection connection line 381
  • the sixth sub-trace 323a of the second detection line 32a may It is electrically connected to the first detection connection line 381.
  • the first detection connection line 381 may extend along the second direction D2.
  • the first end of the first detection connection line 381 may be electrically connected to the fourth detection connection line 384 extending along the fourth direction D4.
  • the fourth detection connection line 384 may be connected to The fifth detection connection line 385 is electrically connected, and the fifth detection connection line 385 can be electrically connected to the first signal pin of the first signal access area.
  • the fourth detection connection line 384 may extend to the second signal access area along the fourth direction D4, the second direction D2, the fourth direction D4 and the first direction D1 in sequence, and be connected with the fourth signal lead in the second signal access area. Pin electrical connection.
  • the second end of the first detection connection line 381 may be electrically connected to the first end of the second detection connection line 382 extending toward one side of the display area along the first direction D1, and the second end of the second detection connection line 382 may be electrically connected to The third detection connection line 383 extending in the second direction D2 is electrically connected.
  • the third sub-line 313b of the first detection line 31b and the sixth sub-line 323b of the second detection line 32b may be electrically connected to the third detection connection line 383.
  • the first detection connection line 381 , the second detection connection line 382 and the third detection connection line 383 may be located on a side of the first power line 64 away from the display area 10 .
  • the fourth detection connection line 384 and the first detection connection line 381 may be an integral structure.
  • the first detection connection line 381 and the third detection connection line 383 may be arranged in the same layer as the first source and drain metal layer of the display area, and the second detection connection line 382 may be arranged in the same layer as the first gate metal layer of the display area.
  • the detection connection line 38 may include: a first detection connection line 381 , a second detection connection line 382 , a third detection connection line 383 , a fourth detection connection line 384 and a fifth detection connection line 385 .
  • the two first detection lines 31a and 31b and the two second detection lines 32a and 32b can be electrically connected through the first detection connection line 381, the second detection connection line 382 and the third detection connection line 383; through the fourth detection connection line
  • the detection connection line 384 and the fifth detection connection line 385 can realize the electrical connection of the two first detection lines 31a and 31b and the two second detection lines 32a and 32b with the same first signal pin in the first signal access area.
  • the fourth detection connection line 384 can also be electrically connected to the fourth signal pin in the second signal access area.
  • the wiring method of this example saves wiring space.
  • the first detection connection line 381 may also be electrically connected to the eighth sub-line 332 of the third detection line 33 to provide the first detection signal to the third detection line 33 .
  • the third detection line 33 can also receive the first detection signal provided by the first signal pin. The connection method of this example can save wiring space and reduce the space occupied by signal pins.
  • the tenth sub-trace 342 of the detection control line 34 may extend along the first direction D1 in the line lead-out area 222 and be electrically connected to the first control connection line 386, It can also be electrically connected to the second control connection line 387.
  • the extension direction of the first control connection line 386 is substantially the same as the extension direction of the first detection connection line 381 , and the first control connection line 386 and the first detection connection line 381 are adjacent in the first direction D1 .
  • the plurality of driving control signal lines 62 may include: a first voltage line 62a, a second voltage line 62b, an initial signal (INIT) line 62c, an output signal line 62d. start signal (STV) line 62e, first clock signal line 62f, second clock signal line 62g, test control line 62h, first test signal line 62i, second test signal line 62j and third test signal line 62k.
  • the first voltage line 62a and the second voltage line 62b may be configured to provide power signals to the gate driving circuit.
  • the first clock signal line 62f and the second clock signal line 62g may be configured to provide a clock signal to the gate driving circuit.
  • the start signal line 62e may be configured to provide a start signal to the gate driving circuit.
  • the initial signal line 62c may be configured to provide an initial signal to the pixel circuit.
  • the output signal line 62d may be configured to transmit an output signal of the gate drive circuit.
  • the test control line 62h, the first test signal line 62i, the second test signal line 62j, and the third test signal line 62k may be configured to provide signals to the test circuit.
  • the third sub-driving control signal line 623a of the first voltage line 62a, the third sub-driving control signal line 623b of the second voltage line 62b, and the third sub-driving signal line 62c of the initial signal line 62c are shown in FIG. 8 .
  • the control signal line 623c, the third sub-drive control signal line 623d of the output signal line 62d, the eighth sub-line 332 of the third detection line 33, the tenth sub-line 342 of the detection control line 34, and the start signal line 62e The third sub-drive control signal line 623e, the third sub-drive control signal line 623f of the first clock signal line 62f, the third sub-drive control signal line 623g of the second clock signal line 62g, and the third sub-driver of the test control line 62h
  • the lines 623k may be arranged sequentially along the second direction D2.
  • the fourth sub-driving control signal line 624e of the start signal line 62e, the fourth sub-driving control signal line 624f of the first clock signal line 62f, the second clock signal line The fourth sub-driving control signal line 624g of 62g, the fourth sub-driving control signal line 624d of the output signal line 62d, the fourth sub-driving control signal line 624d of the initial signal line 62c, the fourth sub-driving control signal line of the second voltage line 62b
  • the signal line 624b, the fourth sub-driving control signal line 624a of the first voltage line 62a, the first control connection line 385, the first detection connection line 381, the fourth sub-driving control signal line 624h of the test control line 62h, the first test The fourth sub-driving control signal line 624i of the signal line 62i, the fourth sub-driving control signal line 624j of the second test signal line
  • the third sub-driving control signal line 623a of the first voltage line 62a is electrically connected to the fourth sub-driving control signal line 624a and the fifth sub-driving control signal line 625a.
  • the third sub-driving control signal line 623b of the second voltage line 62b is electrically connected to the fourth sub-driving control signal line 624b and the fifth sub-driving control signal line 625b.
  • the third sub-driving control signal line 623c of the initial signal line 62c is electrically connected to the fourth sub-driving control signal line 624c.
  • the third sub-drive control signal line 623d and the fourth sub-drive control signal line 624d of the output signal line 62d are electrically connected.
  • the third sub-driving control signal line 623e of the start signal line 62e is electrically connected to the fourth sub-driving control signal line 624e and the fifth sub-driving control signal line 625e.
  • the third sub-driving control signal line 623f of the first clock signal line 62f is electrically connected to the fourth sub-driving control signal line 624f and the fifth sub-driving control signal line 625f.
  • the third sub-driving control signal line 623g of the second clock signal line 62g is electrically connected to the fourth sub-driving control signal line 624g and the fifth sub-driving control signal line 625g.
  • the third sub-driving control signal line 623h of the test control line 62h is electrically connected to the fourth sub-driving control signal line 624h and the fifth sub-driving control signal line 625h.
  • the third sub-driving control signal line 623i of the first test signal line 62i is electrically connected to the fourth sub-driving control signal line 624i and the fifth sub-driving control signal line 625i.
  • the third sub-driving control signal line 623j of the second test signal line 62j is electrically connected to the fourth sub-driving control signal line 624j and the fifth sub-driving control signal line 625j.
  • the third sub-driving control signal line 623k of the third test signal line 62k is electrically connected to the fourth sub-driving control signal line 624k and the fifth sub-driving control signal line 625k.
  • arranging the first detection connection line 381 within a plurality of fourth sub-drive control signal lines is beneficial to connecting the third detection line 33 , and can be connected through the second detection connection line 382 and the third detection connection line 383 Implement signal transfer.
  • the trace arrangement in this example can save the space occupied by traces and pins, and avoid affecting other signals.
  • the fourth detection connection line 384 may be electrically connected to the first signal pin 391 located in the first signal access area through the fifth detection connection line 385 .
  • the first signal pin 391 may include a first sub-pin and a second sub-pin that are stacked and electrically connected to each other.
  • the fifth detection connection line 385 may be electrically connected to the first sub-pin.
  • the fifth detection connection line 385 and the first sub-pin may be of an integrated structure. For example, they may be arranged on the same layer as the first gate metal layer of the display area, and the second sub-pin may be on the same layer as the first source-drain metal layer of the display area. Layer settings.
  • the first control connection line 386 may be electrically connected to the third control connection line 388, and the third control connection line 388 may be electrically connected to the third signal pin 393 located in the first signal access area.
  • the connection method between the third control connection line 388 and the third signal pin 393 is similar to the connection method between the fifth detection connection line 385 and the first signal pin 391 , and therefore will not be described again.
  • the side of the third control connection line 388 close to the fifth detection connection line 385 can also be provided with a start signal line 62e, a first clock signal line 62f, a second clock signal line 62g and corresponding signals in the first signal access area in sequence. Pin connection wire.
  • the preparation process of the display panel of this exemplary embodiment can be realized by using existing mature preparation equipment, and is well compatible with the existing preparation process.
  • the process is simple to implement, easy to implement, has high production efficiency, low production cost, and is of good quality. The rate is high.
  • This embodiment also provides a crack detection method, which is applied to the display panel as described above, including: when detecting cracks on the display panel, electrically connecting the first detection line and the first data line through the first detection control unit, and The second detection control unit is electrically connected to the second detection line and the second data line, and provides the first detection signal to the first detection line and the second detection line; multiple displays based on the electrical connection of the first data line and the second data line The luminous state of the unit is used to determine whether there is a crack in the first detection line or the second detection line.
  • first detection line for example, the first frame area
  • second detection line for example, the bending area
  • the crack detection method provided in this example can simultaneously conduct crack detection on the first detection line and the second detection line, which can save the detection process and achieve effective and rapid detection of the first frame area and the bending area, thereby effectively controlling production costs. , and improve the yield of display panels.
  • An embodiment of the present disclosure also provides a display device, including the display panel of the foregoing embodiment.
  • FIG. 11 is a schematic diagram of a display device according to at least one embodiment of the present disclosure.
  • the display panel 910 may be an OLED display panel.
  • the display device 91 may be: an OLED display device, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame or a navigator, or any other product or component with a display function.
  • this embodiment is not limited to this.

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Abstract

一种显示面板，包括：衬底(41)、多个显示单元(Px)、至少一条第一数据线(11)、至少一条第二数据线(12)、至少一个第一检测控制单元(35)、至少一个第二检测控制单元(36)、至少一条第一检测线(31a、31b)和至少一条第二检测线(32a、32b)。第一检测线(31a、31b)至少位于第一边框区域(21)，第一检测线(31a、31b)的第一端通过第一检测控制单元(35)与第一数据线(11)电连接，第二端配置为接收第一检测信号。第二检测线(32a、32b)至少位于第二边框区域(22)的弯折区域(221)，第二检测线(32a、32b)的第一端通过第二检测控制单元(36)与第二数据线(12)电连接，第二端配置为接收第一检测信号。

Description

显示面板、显示装置及裂纹检测方法 技术领域
本文涉及但不限于显示技术领域，尤指一种显示面板、显示装置及裂纹检测方法。
背景技术
随着显示技术的不断发展，显示产品的种类越来越多，例如，液晶显示器(LCD，Liquid Crystal Display)、有机发光二极管(OLED，Organic Light-Emitting Diode)显示器、等离子体显示面板(PDP，Plasma Display Panel)、场发射显示器(FED，Field Emission Display)等。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本公开实施例提供一种显示面板、显示装置及裂纹检测方法。
一方面，本公开实施例提供一种显示面板，包括：衬底、多个显示单元、至少一条第一数据线、至少一条第二数据线、至少一个第一检测控制单元、至少一个第二检测控制单元、至少一条第一检测线和至少一条第二检测线。衬底包括显示区域和位于显示区域周边的边框区域。边框区域包括围绕显示区域的第一边框区域和位于第一边框区域远离显示区域一侧的第二边框区域。第二边框区域至少包括弯折区域。多个显示单元、至少一条第一数据线和至少一条第二数据线位于显示区域，第一数据线和第二数据线分别与多个显示单元中的部分显示单元电连接。第一检测线至少位于第一边框区域，第一检测线的第一端通过第一检测控制单元与第一数据线电连接，第一检测线的第二端配置为接收第一检测信号。第二检测线至少位于弯折区域，第二检测线的第一端通过第二检测控制单元与第二数据线电连接，第二检测线的第二端配置为接收第一检测信号。
在一些示例性实施方式中，所述第一数据线电连接的多个显示单元被配置为在所述第一检测控制单元导通且所述第一检测线发生裂纹时发射光以显示第一亮线。所述第二数据线电连接的多个显示单元被配置为在所述第二检测控制单元导通且所述第二检测线发生裂纹时发射光以显示第二亮线。
在一些示例性实施方式中，所述第一检测线的第二端和所述第二检测线的第二端与同一个第一信号引脚电连接。
在一些示例性实施方式中，所述第二边框区域还包括：位于所述弯折区域远离所述显示区域一侧的走线引出区域和信号接入区域。在所述走线引出区域，所述第一检测线和所述第二检测线通过检测连接线电连接，所述检测连接线与所述信号接入区域的第一信号引脚电连接。
在一些示例性实施方式中，所述显示面板包括两条第一检测线和两条第二检测线，所述两条第一检测线沿第二方向位于所述显示区域的两侧，所述两条第二检测线沿所述第二方向位于所述显示区域的两侧。所述检测连接线包括：依次电连接的第一检测连接线、第二检测连接线和第三检测连接线，所述第一检测连接线与位于所述显示区域一侧的第一检测线和第二检测线电连接，所述第三检测连接线与位于所述显示区域另一侧的第一检测线和第二检测线电连接。所述第一检测连接线和所述第三检测连接线沿所述第二方向延伸，所述第二检测连接线沿第一方向延伸，所述第一方向与所述第二方向交叉。
在一些示例性实施方式中，所述第一检测连接线和所述第三检测连接线为同层结构，所述第二检测连接线位于所述第一检测连接线靠近所述衬底的一侧。
在一些示例性实施方式中，所述第一检测线包括位于所述第一边框区域的第一子走线，所述第一子走线为蛇形走线。所述第二检测线包括位于所述弯折区域的第五子走线，所述第五子走线为蛇形走线。
在一些示例性实施方式中，在所述第一边框区域，所述第一检测线的至少部分位于所述第二检测线远离所述显示区域的一侧。
在一些示例性实施方式中，所述边框区域还包括：第一电源线和第二电源线；在所述弯折区域，所述第二电源线位于所述第一检测线和第二检测线 远离所述第一电源线的一侧。
在一些示例性实施方式中，显示面板还包括：位于所述显示区域的至少一个第三数据线、位于所述第一边框区域的至少一条第三检测线以及位于所述边框区域的至少一个第三检测控制单元；所述第三检测线的第一端通过所述第三检测控制单元与所述第三数据线电连接，所述第三检测线的第二端配置为接收第二检测信号。所述第三数据线电连接的多个显示单元被配置为在所述第三检测控制单元导通且接收到所述第二检测信号时显示暗线。
在一些示例性实施方式中，显示面板还包括：位于所述显示区域的至少一条第三数据线、位于所述第一边框区域的至少一条第三检测线以及位于所述边框区域的至少一个第三检测控制单元；所述第三检测线的第一端通过所述第三检测控制单元与所述第三数据线电连接，所述第三检测线的第二端配置为接收所述第一检测信号。所述第三数据线电连接的多个显示单元被配置为在所述第三检测控制单元导通且所述第三检测线发生裂纹时发射光以显示亮线。
在一些示例性实施方式中，所述第一检测控制单元包括第一检测晶体管，所述第一检测晶体管的栅极与检测控制线电连接，所述第一检测晶体管的第一极与所述第一检测线电连接，所述第一检测晶体管的第二极与所述第一数据线电连接。所述第二检测控制单元包括第二检测晶体管，所述第二检测晶体管的栅极与所述检测控制线电连接，所述第二检测晶体管的第一极与所述第二检测线电连接，所述第二检测晶体管的第二极与所述第二数据线电连接。
在一些示例性实施方式中，所述至少一个第一检测控制单元和至少一个第二检测控制单元位于所述第一边框区域。
另一方面，本公开实施例提供一种显示装置，包括如上所述的显示面板。
另一方面，本公开实施例提供一种裂纹检测方法，应用于如上所述的显示面板，包括：在对显示面板进行裂纹检测时，通过第一检测控制单元电连接第一检测线和第一数据线，通过第二检测控制单元电连接第二检测线和第二数据线，并向第一检测线和第二检测线提供第一检测信号；基于所述第一数据线和第二数据线电连接的多个显示单元的发光状态来确定第一检测线或第二检测线是否存在裂纹。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开的技术方案，并不构成对本公开的技术方案的限制。附图中一个或多个部件的形状和大小不反映真实比例，目的只是示意说明本公开内容。
图1为本公开至少一实施例的显示面板的示意图；
图2为图1中沿R-R’方向的局部剖面示意图；
图3为本公开至少一实施例的显示面板的边框区域的局部走线示意图；
图4为本公开至少一实施例的显示面板的边框区域的另一局部走线示意图；
图5为本公开至少一实施例的第一边框区域和第二边框区域的局部走线示意图；
图6为图5中区域S1的局部放大示意图；
图7为图5中区域S2的局部放大示意图；
图8为图5中区域S3的局部放大示意图；
图9为图5中区域S4的局部放大示意图；
图10为图5中区域S5的局部放大示意图；
图11为本公开至少一实施例的显示装置的示意图。
具体实施方式
下面将结合附图对本公开的实施例进行详细说明。实施方式可以以多个不同形式来实施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为其他形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意 组合。
在附图中，有时为了明确起见，夸大表示了一个或多个构成要素的大小、层的厚度或区域。因此，本公开的一个方式并不一定限定于该尺寸，附图中一个或多个部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的一个方式不局限于附图所示的形状或数值等。
本说明书中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。本公开中的“多个”表示两个及以上的数量。
在本说明书中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。构成要素的位置关系根据描述的构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。
在本说明书中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以根据情况理解上述术语在本公开中的含义。
在本说明书中，“电连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的传输，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有多种功能的元件等。
在本说明书中，晶体管是指至少包括栅极、漏极以及源极这三个端子的元件。晶体管在漏极(漏电极端子、漏区域或漏电极)与源极(源电极端子、源区域或源电极)之间具有沟道区域，并且电流能够流过漏极、沟道区域以及源极。在本说明书中，沟道区域是指电流主要流过的区域。
在本说明书中，为区分晶体管除栅极之外的两极，将其中一个电极称为第一极，另一电极称为第二极，第一极可以为源极或者漏极，第二极可以为漏极或源极，另外，将晶体管的栅极称为控制极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源极”及“漏极”的功能有时互相调换。因此，在本说明书中，“源极”和“漏极”可以互相调换。
在本说明书中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，也包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，也包括85°以上且95°以下的角度的状态。
在本说明书中，三角形、矩形、梯形、五边形或六边形等并非严格意义上的，可以是近似三角形、矩形、梯形、五边形或六边形等，可以存在公差导致的一些小变形，可以存在导角、弧边以及变形等。
本说明书中的“约”、“大致”，是指不严格限定界限，允许工艺和测量误差范围内的情况。在本说明书中，“大致相同”是指数值相差10％以内的情况。
在本说明书中，A沿着B方向延伸是指，A可以包括主体部分和与主体部分连接的次要部分，主体部分是线、线段或条形状体，主体部分沿着B方向伸展，且主体部分沿着B方向伸展的长度大于次要部分沿着其它方向伸展的长度。以下描述中所说的“A沿着B方向延伸”均是指“A的主体部分沿着B方向延伸”。
在本说明书中，“A和B为同层结构”或“A和B同层设置”是指，A和B通过同一次图案化工艺同时形成，或者A和B靠近衬底一侧的表面与衬底的距离基本相同，或者A和B靠近衬底一侧的表面与同一个膜层直接接触。
在一些实现方式中，在显示面板的制备过程中，每个工艺阶段都会有自身工艺的检测功能，以防止本工艺阶段的次品漏检流入下一个工艺阶段，造成材料和资材成本的浪费。因此，在显示面板的制备过程中要求尽可能对每个工艺阶段进行有效快速的检测，以此来有效控制生产成本，提高显示面板的良率。
本实施例提供一种显示面板，包括：衬底、多个显示单元、至少一条第一数据线、至少一条第二数据线、至少一个第一检测控制单元、至少一个第 二检测控制单元、至少一条第一检测线和至少一条第二检测线。衬底包括显示区域和位于显示区域周边的边框区域。边框区域包括围绕显示区域的第一边框区域和位于第一边框区域远离显示区域一侧的第二边框区域。第二边框区域至少包括弯折区域。多个显示单元、至少一条第一数据线和至少一条第二数据线位于显示区域，第一数据线和第二数据线分别与多个显示单元中的部分显示单元电连接。第一检测线至少位于第一边框区域，第一检测线的第一端通过第一检测控制单元与第一数据线电连接，第一检测线的第二端配置为接收第一检测信号。第二检测线至少位于弯折区域，第二检测线的第一端通过第二检测控制单元与第二数据线电连接，第二检测线的第二端配置为接收第一检测信号。
本实施例提供的显示面板的第一检测线和第二检测线可以均接收第一检测信号，通过利用第一检测信号可以同步对第一检测线和第二检测线进行裂纹检测，实现同步对第一边框区域和弯折区域的裂纹进行检测，以确定显示面板是否合格，如此一来，可以实现快速有效的裂纹检测，可以提升显示面板的品质，并降低生产成本。
在一些示例性实施方式中，第一数据线电连接的多个显示单元可以被配置为在第一检测控制单元导通且第一检测线发生裂纹时发射光以显示第一亮线。第二数据线电连接的多个显示单元可以被配置为在第二检测控制单元导通且第二检测线发生裂纹时发射光以显示第二亮线。本示例可以根据显示面板是否显示第一亮线和第二亮线来判断第一边框区域和弯折区域是否出现裂纹，并在显示面板显示第一亮线或第二亮线时可以识别出现裂纹的位置，可以实现对第一边框区域和弯折区域的有效快速检测，从而可以有效控制生产成本，并提高显示面板的良率。
下面通过一些示例对本实施例的方案进行举例说明。
图1为本公开至少一实施例的显示面板的示意图。在一些示例中，如图1所示，显示面板可以包括：显示区域10以及位于显示区域10周边的边框区域。边框区域可以包括：围绕显示区域10的第一边框区域21、以及位于显示区域10一侧的第二边框区域22。第二边框区域22可以位于第一边框区域21远离显示区域10的一侧。在第一方向D1上，第一边框区域21的部分 区域可以位于显示区域10和第二边框区域22之间。第二边框区域22可以包括：沿着远离显示区域10的方向(即第一方向D1)依次设置的弯折区域221、走线引出区域222、以及信号接入区域(包括第一信号接入区域223和第二信号接入区域224)。弯折区域221可以位于第一边框区域21远离显示区域10的一侧，弯折区域221可以与第一边框区域21连接。走线引出区域222位于弯折区域221和第一信号接入区域223之间，第二信号接入区域224位于第一信号接入区域223远离显示区域10的一侧。
在一些示例中，如图1所示，弯折区域221可以配置为使走线引出区域222、第一信号接入区域223和第二信号接入区域224弯折到显示区域10的背面。第一信号接入区域223可以配置为设置相应的集成电路，例如可以为显示驱动器集成电路(DDI，Display Driver Integration)或者可以为触控与显示驱动器集成电路(TDDI，Touch and Display Driver Integration)。第二信号接入区域224可以配置为设置多个绑定引脚，多个绑定引脚可以绑定柔性电路板(FPC，Flexible Printed Circuit)，使得多条信号引线(例如，驱动控制线、电源线等)通过多个绑定引脚与外部控制装置连接。
在一些示例中，如图1所示，显示区域10可以为圆形。然而，本实施例对此并不限定。例如，显示区域10可以为矩形、或者椭圆形等其它形状。
在一些示例中，显示区域10可以包括：衬底、设置在衬底上的显示结构层和封装结构层。显示结构层可以包括多个显示单元(即子像素)、多条栅线以及多条数据线。多条数据线可以沿第一方向D1延伸，多条栅线可以沿第二方向D2延伸。第一方向D1与第二方向D2交叉，例如第一方向D1可以垂直于第二方向D2。多条栅线和多条数据线在衬底上的正投影可以交叉形成多个子像素区域。一个子像素设置在一个子像素区域内。多条数据线与多个子像素电连接，多条数据线配置为向多个子像素提供数据信号。多条栅线与多个子像素电连接，多条栅线配置为向多个子像素提供栅极驱动信号。
在一些示例中，显示区域的一个像素单元可以包括三个子像素，三个子像素分别为红色子像素、绿色子像素和蓝色子像素。三个子像素可以采用水平并列、竖直并列或品字方式排列。然而，本实施例对此并不限定。在另一些示例中，一个像素单元可以包括四个子像素，四个子像素分别为红色子像 素、绿色子像素、蓝色子像素和白色子像素。四个子像素可以采用水平并列、竖直并列或正方形方式排列。
在一些示例中，至少一个子像素可以包括像素电路和发光元件。像素电路可以配置为驱动所连接的发光元件。例如，像素电路可以包括多个晶体管和至少一个电容。例如，像素电路可以是3T1C、4T1C、5T1C、5T2C、6T1C、7T1C或8T1C结构。其中，上述电路结构中的T指的是薄膜晶体管，C指的是电容，T前面的数字代表电路中薄膜晶体管的数量，C前面的数字代表电路中电容的数量。在一些示例中，像素电路中的多个晶体管可以是P型晶体管，或者可以是N型晶体管。像素电路中采用相同类型的晶体管可以简化工艺流程，减少显示面板的工艺难度，提高产品的良率。在另一些示例中，像素电路中的多个晶体管可以包括P型晶体管和N型晶体管。
在一些示例中，像素电路中的多个晶体管可以采用低温多晶硅薄膜晶体管，或者可以采用氧化物薄膜晶体管，或者可以采用低温多晶硅薄膜晶体管和氧化物薄膜晶体管。低温多晶硅薄膜晶体管的有源层采用低温多晶硅(LTPS，Low Temperature Poly-Silicon)，氧化物薄膜晶体管的有源层采用氧化物半导体(Oxide)。低温多晶硅薄膜晶体管具有迁移率高、充电快等优点，氧化物薄膜晶体管具有漏电流低等优点，将低温多晶硅薄膜晶体管和氧化物薄膜晶体管集成在一个显示面板上，即LTPS+Oxide(简称LTPO)显示面板，可以利用两者的优势，可以实现低频驱动，可以降低功耗，可以提高显示品质。
在一些示例中，发光元件可以是发光二极管(LED，Light Emitting Diode)、有机发光二极管(OLED，Organic Light Emitting Diode)、量子点发光二极管(QLED，Quantum Dot Light Emitting Diodes)、微LED(包括：mini-LED或micro-LED)等中的任一者。例如，发光元件可以为OLED，发光元件在其对应的像素电路的驱动下可以发出红光、绿光、蓝光、或者白光等。发光元件发光的颜色可根据需要而定。在一些示例中，发光元件可以包括：阳极、阴极以及位于阳极和阴极之间的有机发光层。发光元件的阳极可以与对应的像素电路电连接。然而，本实施例对此并不限定。
在一些示例中，显示面板还可以集成触控结构。显示面板的显示区域还 可以包括：位于封装结构层远离衬底一侧的触控结构层。触控结构层可以设置在显示面板的封装结构层上，形成触控结构在薄膜封装上(Touch on Thin Film Encapsulation，简称Touch on TFE)的结构，显示结构和触控结构集成在一起，具有轻薄、可折叠等优点，可以满足柔性折叠、窄边框等产品需求。Touch on TFE结构主要包括柔性多层覆盖表面式(Flexible Multi-Layer On Cell，简称FMLOC)结构和柔性单层覆盖表面式(Flexible Single-Layer On Cell，简称FSLOC)结构。FMLOC结构是基于互容检测的工作原理，一般采用两层金属形成驱动(Tx)电极和感应(Rx)电极，集成电路(IC)通过检测驱动电极和感应电极间的互容来实现触控动作。FSLOC结构是基于自容(或电压)检测的工作原理，一般采用单层金属形成触控电极，集成电路通过检测触控电极自容(或电压)来实现触控动作。
在一些示例中，触控结构层可以包括多个触控单元。至少一个触控单元可以包括至少一个触控电极。至少一个触控电极在衬底上的正投影可以包含多个子像素在衬底上的正投影。当触控单元包括多个触控电极，多个触控电极可以间隔设置，且相邻的触控电极之间可以通过连接部彼此连接。触控电极和连接部可以为同层结构。在一些示例中，触控电极可以具有菱形状，例如可以是正菱形，或者是横长的菱形，或者是纵长的菱形。然而，本实施例对此并不限定。在一些示例中，触控电极可以具有三角形、正方形、梯形、平行四边形、五边形、六边形和其它多边形中的任意一种或多种。
在一些示例中，显示面板中的触控电极可以是金属网格形式，金属网格由多条金属线交织形成，金属网格包括多个网格图案，网格图案是由多条金属线围成的多边形，金属网格形式的触控电极具有电阻小、厚度小和反应速度快等优点。然而，本实施例对此并不限定。
图2为图1中沿R-R’方向的局部剖面示意图。在一些示例中，如图1和图2所示，在垂直于显示面板的方向上，显示区域10可以包括：衬底41、依次设置在衬底41上的驱动电路层42、发光元件43、封装结构层44以及触控结构层45。图2中仅以一个子像素的结构为例进行示意。
在一些示例中，衬底41可以是柔性基底。柔性基底可以包括叠设的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料 层。其中，第一柔性材料层和第二柔性材料层的材料可以采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料，第一无机材料层和第二无机材料层的材料可以采用氮化硅(SiNx)或氧化硅(SiOx)等，用于提高衬底基板的抗水氧能力，半导体层的材料可以采用非晶硅(a-si)。然而，本实施例对此并不限定。
在一些示例中，如图2所示，驱动电路层42可以包括形成像素电路的多个晶体管和至少一个存储电容。图2中以一个第一晶体管401和一个第一存储电容402为例进行示意。显示区域10的驱动电路层42可以包括：设置在衬底41上的半导体层、覆盖半导体层的第一绝缘层51、设置在第一绝缘层51上的第一栅金属层、覆盖第一栅金属层的第二绝缘层52、设置在第二绝缘层52上的第二栅金属层、覆盖第二栅金属层的第三绝缘层53、设置在第三绝缘层53上的第一源漏金属层。半导体层可以至少包括第一有源层，第一栅金属层可以至少包括第一栅电极和第一电容电极，第二栅金属层可以至少包括第二电容电极，第一源漏金属层可以至少包括第一源电极和第一漏电极。第一有源层、第一栅电极、第一源电极和第一漏电极可以组成第一晶体管401，第一电容电极和第二电容电极可以组成第一存储电容402。在另一些示例中，驱动电路层还可以包括位于第一源漏金属层远离衬底一侧的第六绝缘层和第二源漏金属层。然而，本实施例对此并不限定。
在一些示例中，如图2所示，发光元件43可以包括第一电极431、像素定义层434、有机发光层432和第二电极433。第一电极431设置在第五绝缘层55上，通过第四绝缘层54和第五绝缘层55上开设的过孔与第一晶体管401的第一漏电极连接。像素定义层434可以设置在第一电极431和第五绝缘层55上，像素定义层434上可以设置有像素开口，像素开口可以暴露出第一电极431的部分表面。有机发光层432至少部分设置在像素开口内，有机发光层432与第一电极431连接。第二电极433设置在有机发光层432上，第二电极433与有机发光层432连接。
在一些示例中，如图2所示，发光元件43的有机发光层432可以包括发光层(EML，Emitting Layer)，以及包括空穴注入层(HIL，Hole Injection Layer)、空穴传输层(HTL，Hole Transport Layer)、空穴阻挡层(HBL，Hole Block  Layer)、电子阻挡层(EBL，Electron Block Layer)、电子注入层(EIL，Electron Injection Layer)、电子传输层(ETL，Electron Transport Layer)中的一个或多个膜层。在第一电极431和第二电极433的电压驱动下，利用有机材料的发光特性根据需要的灰度发光。在一些示例中，不同颜色的发光元件的发光层不同。例如，红色发光元件包括红色发光层，绿色发光元件包括绿色发光层，蓝色发光元件包括蓝色发光层。为了降低工艺难度和提升良率，位于发光层一侧的空穴注入层和空穴传输层可以采用共通层，位于发光层另一侧的电子注入层和电子传输层可以采用共通层。在一些示例中，空穴注入层、空穴传输层、电子注入层和电子传输层中的任意一层或多层可以通过一次工艺(一次蒸镀工艺或一次喷墨打印工艺)制作，并通过形成的膜层表面段差或者通过表面处理等手段实现隔离。例如，相邻子像素对应的空穴注入层、空穴传输层、电子注入层和电子传输层中的任意一层或多层可以是隔离的。在一些示例中，有机发光层可以通过采用精细金属掩模版(FMM，Fine Metal Mask)或者开放式掩膜版(Open Mask)蒸镀制备形成，或者采用喷墨工艺制备形成。
在一些示例中，如图2所示，封装结构层44可以包括叠设的第一封装层、第二封装层和第三封装层。其中，第一封装层和第三封装层可采用无机材料，第二封装层可采用有机材料，第二封装层设置在第一封装层和第三封装层之间，可以保证外界水汽无法进入发光元件43。然而，本实施例对此并不限定。例如，封装层可以采用无机/有机/无机/有机/无机的五层叠设结构。
在一些示例中，如图2所示，触控结构层45可以包括：设置在封装结构层44远离衬底41一侧的第一触控绝缘层451、设置在第一触控绝缘层451远离衬底41一侧的触控电极层452以及设置在触控电极层452远离衬底41一侧的触控保护层455。本示例的触控结构层以FSLOC结构为例进行示意。然而，本实施例对此并不限定。
图3为本公开至少一实施例的显示面板的局部走线示意图。图3中以显示区域的若干条数据线和边框区域的若干条检测线为例进行示意，省略示意了其他走线。
在一些示例中，如图3所示，显示区域10可以包括：至少两条第一数据 线11、至少两条第二数据线12、以及多条第三数据线13。每条数据线可以与沿第一方向D1排布的多个显示单元Px电连接，配置为给所述多个显示单元Px提供数据信号。例如，第一数据线11和第二数据线12可以配置为与出射相同颜色光的显示单元电连接，比如，第一数据线11和第二数据线可以配置为与出射绿光的多个显示单元电连接。然而，本实施例对此并不限定。
在一些示例中，两条第一数据线11可以关于显示区域10沿第二方向D2的中线大致对称，两条第二数据线12可以关于显示区域10沿第二方向D2的中线大致对称。第一数据线11和第二数据线12可以不相邻，第一数据线11和第二数据线12之间可以设置多条第三数据线13。第一数据线11和第二数据线12之间设置的第三数据线13的数目需要使第一数据线11电连接的多个显示单元和第二数据线12电连接的多个显示单元被点亮时可以通过肉眼区分。两条第一数据线11可以不相邻，两条第一数据线11之间可以设置多条第三数据线13。两条第一数据线11之间设置的第三数据线13的数目需要使两条第一数据线11电连接的多个显示单元被点亮时可以通过肉眼区分。两条第二数据线12可以不相邻，两条第二数据线12之间可以设置多条第三数据线13。两条第二数据线12之间设置的第三数据线13的数目需要使两条第二数据线12电连接的多个显示单元被点亮时可以通过肉眼区分。例如，显示区域10内除第一数据线11和第二数据线12以外的数据线可以均作为第三数据线13。然而，本实施例对此并不限定。
在一些示例中，如图3所示，边框区域可以包括：多个检测控制单元(例如，第一检测控制单元35、第二检测控制单元36和第三检测控制单元37)、两条第一检测线31a和31b、两条第二检测线32a和32b、一条第三检测线33、以及一条检测控制线34。例如，多个检测控制单元可以位于第一边框区域21。一个第一检测控制单元35可以与一条第一检测线和至少一条第一数据线11电连接，一个第二检测控制单元36可以与一条第二检测线和至少一条第二数据线12电连接，一个第三检测控制单元37可以与一条第三检测线33和至少一条第三数据线13电连接。一条第三检测线33可以与多个第三检测控制单元37和多条第三数据线13电连接。检测控制线34可以与第一检测控制单元35、第二检测控制单元36和第三检测控制单元37电连接。然而， 本实施例对此并不限定。在另一些示例中，多个检测控制单元可以位于第二边框区域。
在一些示例中，如图3所示，两条第一检测线31a和31b可以关于显示面板沿第二方向D2的中线大致对称。例如，第一检测线31a可以位于边框区域的左半区域，第一检测线31b可以位于边框区域的右半区域。第一检测线31a可以包括：位于第一边框区域21的第一子走线311a、位于弯折区域221的第二子走线312a、以及位于走线引出区域222的第三子走线313a。第一检测线31b可以包括位于第一边框区域21的第一子走线311b、位于弯折区域221的第二子走线312b、以及位于走线引出区域222的第三子走线313b。第一子走线311a和311b可以为蛇形走线。其中，蛇形走线是一种弯折曲线。例如，走线一端沿一个方向延伸一段距离后，弯折迂回并向与该方向的相反方向延伸一段距离，再次弯折迂回而向该方向延伸，如此反复弯折迂回若干次，形成蛇形走线。在本示例中，第一子走线311a和311b可以沿着第一边框区域21远离显示区域10的方向进行绕线。例如，第一子走线311a和311b可以包括多个弧线段(例如三个弧线段)、以及连接在相邻弧线段之间的直线段。弧线段的形状可以与显示区域10左侧部分或右侧部分的边缘形状大致相同。第一子走线311a(或311b)的一端可以与第一检测控制单元35电连接，另一端可以与第二子走线312a(或312b)的一端电连接；第二子走线312a(或312b)的另一端可以与第三子走线313a(或313b)的一端电连接，第三子走线313a(或313b)的另一端可以通过检测连接线38与位于第一信号接入区域223的第一信号引脚391电连接。检测连接线38还可以延伸至第二信号接入区域224，并与位于第二信号接入区域224的第四信号引脚394电连接。第四信号引脚394可以作为测试引脚。例如，通过第四信号引脚394提供测试信号可以识别第一信号接入区域设置的集成电路是否存在不良。
在一些示例中，如图3所示，第一检测控制单元35可以位于第一检测线31a或31b靠近显示区域10的一侧。第一检测控制单元35可以包括：第一检测晶体管。第一检测晶体管的栅极可以与检测控制线34电连接，第一检测晶体管的第一极可以与第一检测线31a或31b的第一端电连接，第一检测晶体管的第二极可以与显示区域10的第一数据线11电连接。
在一些示例中，如图3所示，两条第二检测线32a和32b可以关于显示面板沿第二方向D2的中线大致对称。例如，第二检测线32a可以位于边框区域的左半区域，第二检测线32b可以位于边框区域的右半区域。第二检测线32a可以包括：位于第一边框区域21的第四子走线321a、位于弯折区域221的第五子走线322a以及位于走线引出区222的第六子走线323a。第二检测线32b可以包括：位于第一边框区域21的第四子走线321b、位于弯折区域221的第五子走线322b以及位于走线引出区222的第六子走线323b。第五子走线322a和322b可以为蛇形走线。第五子走线322a和322b可以沿着第二方向D2在弯折区域221内进行绕线。第四子走线321a(或321b)的一端可以与第二检测控制单元36电连接，另一端可以与第五子走线322a(或322b)的一端电连接；第五子走线322a(或322b)的另一端可以与第六子走线323a(或323b)的一端电连接，第六子走线323a(或323b)的另一端可以通过检测连接线38与位于第一信号接入区域223的第一信号引脚391电连接。
在一些示例中，如图3所示，第二检测控制单元36可以位于第二检测线32a或32b靠近显示区域10的一侧。第二检测控制单元36可以包括：第二检测晶体管。第二检测晶体管的栅极可以与检测控制线34电连接，第二检测晶体管的第一极可以与第二检测线32a或32b的第一端电连接，第二检测晶体管的第二极可以与显示区域10的第二数据线12电连接。
在一些示例中，如图3所示，第三检测线33可以包括位于第一边框区域21内的第七子走线331以及从第一边框区域21延伸至第二边框区域的第八子走线332。例如，第七子走线331可以为围绕显示区域10的环形走线。第八子走线332的一端与第七子走线331电连接，另一端可以与第一信号接入区域223内的第二信号引脚392电连接。
在一些示例中，如图3所示，第三检测控制单元37可以包括：第三检测晶体管。第三检测晶体管的栅极可以与检测控制线34电连接，第三检测晶体管的第一极可以与第三检测线33电连接，第三检测晶体管的第二极可以与显示区域10的第三数据线13电连接。
在一些示例中，如图3所示，检测控制线34可以包括位于第一边框区域 21内的第九子走线341以及从第一边框区域21延伸至第二边框区域的第十子走线342。例如，第九子走线341可以为围绕显示区域10的环形走线。例如，第九子走线341可以位于第七子走线331靠近显示区域10的一侧。第十子走线342的一端与第九子走线341电连接，另一端可以与第一信号接入区域223内的第三信号引脚393电连接。在本示例中，检测控制线34可以提供检测控制信号，配置为导通或断开多个检测控制单元。
在一些示例中，检测控制单元包括的检测晶体管可以为P型晶体管，检测控制线34通过提供低电平的检测控制信号，可以使得检测晶体管导通，提供高电平的检测控制信号可以使得检测晶体管截止。然而，本实施例对此并不限定。例如，检测晶体管可以为N型晶体管，检测控制线通过提供高电平的检测控制信号，使得检测晶体管导通，提供低电平的检测控制信号使得检测晶体管截止。
在一些示例中，在裂纹检测过程中，检测控制线34提供的检测控制信号可以使得检测晶体管导通，从而使得第一检测控制单元35、第二检测控制单元36和第三检测控制单元37均导通。第一检测线31a和31b、第二检测线32a和32b可以接收第一检测信号(例如高电平信号)，第三检测线33可以接收第二检测信号(例如高电平信号)。在显示面板没有裂纹时，由于第一检测控制单元35、第二检测控制单元36和第三检测控制单元37均导通，第一检测线31a和31b可以与对应的第一数据线11导通，第二检测线32a和32b可以与对应的第二数据线12导通，第三检测线33可以与对应的第三数据线13导通，从而给第一数据线11和第二数据线12提供第一检测信号，给第三数据线13提供第二检测信号，使得这些数据线电连接的显示单元均不发射光。显示面板的整个显示区域的显示单元表现为黑色，即显示区域显示暗图像。以第一检测线31a存在裂纹为例，由于第一检测线31a的布线电阻的增加而引起的电压降使得第一检测信号不能被传送至对应的第一数据线11，该条第一数据线11连接的显示单元可以发射光，第二数据线可以接收第一检测信号，第三数据线可以接收第二检测信号，第二数据线和第三数据线电连接的显示单元不发射光，从而在显示区域显示出与该条第一数据线11对应的第一亮线。同理，在第二检测线32a或32b存在裂纹时，第二检测线32a或 32b对应电连接的第二数据线12不能接收第一检测信号，所述第二数据线12电连接的显示单元可以发射光，其余数据线电连接的显示单元不发射光，可以在显示区域显示与所述第二数据线12对应的第二亮线。如此一来，可以根据第一亮线和第二亮线的位置来识别显示面板发生裂纹的位置。
在本示例中，通过第三检测控制单元和第三检测线来给没有连接第一检测线和第二检测线的数据线提供第二检测信号，使得显示区域显示暗图像，从而在显示区域出现亮线时可以便于人眼识别。在另一些示例中，显示面板可以不设置第三检测控制单元和第三检测线。此时，在进行裂纹检测过程中，可以直接给没有连接第一检测线和第二检测线的数据线提供第一检测信号，以使得这些数据线电连接的显示单元不发射光。
图4为本公开至少一实施例的显示面板的另一局部走线示意图。在一些示例中，如图4所示，第三检测线33的第八子走线332可以在第二边框区域与检测连接线38电连接，以配置为接收第一检测信号。在本示例中，第一信号接入区域223可以不设置第二信号引脚392。第一检测线31a和31b、第二检测线32a和32b以及第三检测线33可以接收相同的第一检测信号。第一检测线31a和31b、第三检测线33可以配置为对第一边框区域进行裂纹检测，第二检测线32a和32b可以配置为对弯折区域进行裂纹检测。关于本实施例的显示面板的其余结构可以参照前述实施例的说明，故于此不再赘述。
在一些示例中，在裂纹检测过程中，检测控制线34提供的检测控制信号可以使得检测晶体管导通，从而使得第一检测控制单元35、第二检测控制单元36和第三检测控制单元37均导通。第一检测线31a和31b、第二检测线32a和32b以及第三检测线33可以接收第一检测信号(例如高电平信号)。在显示面板没有裂纹时，由于第一检测控制单元35、第二检测控制单元36和第三检测控制单元37均导通，第一检测线31a和31b可以与对应的第一数据线11导通，第二检测线32a和32b可以与对应的第二数据线12导通，第三检测线33可以与对应的第三数据线13导通，从而给第一数据线11、第二数据线12和第三数据线13提供第一检测信号，使得这些数据线电连接的显示单元均不发射光。显示面板的整个显示区域的显示单元表现为黑色，即显示区域显示暗图像。以第一检测线31a存在裂纹为例，由于第一检测线31a 的布线电阻的增加而引起的电压降使得第一检测信号不能被传送至对应的第一数据线11，该条第一数据线11连接的显示单元可以发射光，其余数据线可以接收第一检测信号，其余数据线电连接的显示单元不发射光，从而在显示区域显示出与该条第一数据线11对应的第一亮线。同理，在第二检测线32a或32b存在裂纹时，第二检测线32a或32b对应电连接的第二数据线12不能接收第一检测信号，所述第二数据线12电连接的显示单元可以发射光，其余数据线电连接的显示单元不发射光，可以在显示区域显示与所述第二数据线12对应的第二亮线。在第三检测线33存在裂纹时，第三检测线33对应电连接的第三数据线13不能接收第一检测信号，所述第三数据线13电连接的显示单元可以发射光，其余数据线电连接的显示单元不发射光，可以在显示区域显示与第三数据线13对应的亮线。如此一来，可以根据亮线的位置来识别显示面板发生裂纹的位置。本示例中，第一检测信号可以通过三组检测线(第一检测线、第二检测线和第三检测线)同步实现边框裂纹检测，可以增加检测范围，提高检测效率。
在一些示例中，在第一检测线31a对应的第一数据线11电连接的显示单元发射光显示第一亮线时，可以识别出第一检测线31a存在裂纹。在第一检测线31b对应的第一数据线11电连接的显示单元发射光显示第一亮线时，可以识别出第一检测线31b存在裂纹。在第二检测线32a对应的第二数据线12电连接的显示单元发射光显示第二亮线时，可以识别出第二检测线32a存在裂纹。在第二检测线32b对应的第二数据线12电连接的显示单元发射光显示第二亮线时，可以识别出第二检测线32b存在裂纹。在第三检测线33对应的第三数据线13电连接的显示单元发射光显示亮线时，可以识别出第三检测线33存在裂纹。例如，第三检测线33可以配置为检测围绕显示区域四周的区域是否存在裂纹。
在本示例中，通过设置第一检测线31a在第一边框区域21的左侧区域进行绕线，第一检测线31a可以配置为主要检测第一边框区域21的左侧区域是否存在裂纹。通过设置第一检测线31b在第一边框区域21的右侧区域进行绕线，第一检测线31b可以配置为主要检测第一边框区域21的右侧区域是否存在裂纹。通过设置第二检测线32a在弯折区域221的左侧部分进行绕线，第 二检测线32a可以配置为主要检测弯折区域221的左侧部分是否存在裂纹。通过设置第二检测线32b在弯折区域221的右侧部分进行绕线，第二检测线32b可以配置为主要检测弯折区域221的右侧部分是否存在裂纹。
在本示例中，由于第一检测线连接第一数据线，第二检测线连接第二数据线，且第一检测线和第二检测线可以同步接收第一检测信号，因此可以同步通过对第一检测线和第二检测线进行裂纹检测，并根据显示区域的亮线显示位置同步识别第一检测线和第二检测线的位置是否存在裂纹，进而判断整个显示面板是否出现裂纹。相较于一些实现方式中对第一边框区域的裂纹采用亮线检测，对弯折区域的裂纹采用电阻检测的方式，本示例同步利用亮线检测来检测第一边框区域和弯折区域是否存在裂纹，可以减少检测工艺和时间，大大提升产能，而且可以降低生产成本，提高显示面板的良率。本示例通过设置第一检测线和第二检测线，并对第一检测线和第二检测线进行同步检测，可以增大检测范围。
图5为本公开至少一实施例的第一边框区域和第二边框区域的局部放大示意图。在一些示例中，如图5所示，边框区域可以包括：多条数据引出线61、多条驱动控制信号线62。多条数据引出线61可以关于显示面板沿第二方向D2的中线大致对称，多条驱动控制信号线62可以关于显示面板沿第二方向D2的中线大致对称。在图5中对多条数据引出线、多条驱动控制信号线分别进行整体示意。本实施例对于数据引出线和驱动控制信号线的数目并不限定。图5中省略示意了第一边框区域21的电路结构(例如包括栅极驱动电路、多路复用电路、测试电路和静电释放电路等)。
在一些示例中，如图5所示，至少一条数据引出线61可以包括：位于第一边框区域21的第一子数据引出线611、位于弯折区域221且沿第一方向D1延伸的数据连接线613、以及位于走线引出区域222且沿第一方向D1延伸的第二子数据引出线612。第一子数据引出线611和第二子数据引出线612可以通过弯折区域221的数据连接线613电连接。例如，第一子数据引出线61可以与多路复用电路电连接之后，沿显示区域边缘形状延伸至第一边框区域21靠近弯折区域221的区域，再沿第一方向D1向弯折区域221一侧延伸。第二子数据引出线612可以配置为与第一信号接入区域223的集成电路电连 接。在一些示例中，第一子数据引出线611和第二子数据引出线612可以与显示区域的第一栅金属层或第二栅金属层同层设置，数据连接线613可以与显示区域的第一源漏金属层同层设置。
在一些示例中，如图5所示，至少一条驱动控制信号线62可以包括：位于第一边框区域21的第一子驱动控制信号线621和第二子驱动控制信号线622、位于弯折区域221的驱动控制连接线626、位于走线引出区域222的第三子驱动控制信号线623、第四子驱动控制信号线624和第五子驱动控制信号线625。第一子驱动控制信号线621可以沿显示区域10边缘形状延伸，并与静电释放电路电连接后与沿第一方向D1延伸的第二子驱动控制信号线622电连接。第二子驱动信号控制线622可以通过沿第一方向D1延伸的驱动控制连接线626与沿第一方向D1延伸的第三子驱动信号控制线623电连接。第三子驱动控制信号线623可以与至少沿第二方向D2延伸的第四子驱动控制信号线624电连接，还可以与第五子驱动控制信号线625电连接。第五子驱动控制信号线625可以与第一信号接入区域223内的信号引脚电连接，第四子驱动控制信号线624可以与第二信号接入区域内的绑定引脚电连接。
在一些示例中，如图5所示，边框区域还可以设置有多条触控信号线。触控信号线可以包括位于第一边框区域的第一子触控信号线(图未示)、位于弯折区域221的触控连接线63、以及位于走线引出区域的第二子触控信号线(图未示)。第二子触控信号线可以沿第一方向D1延伸至第一信号接入区域223，例如可以与TDDI电路电连接。触控连接线63可以与显示区域的第一源漏金属层同层设置。在另一些示例中，位于走线引出区域的第二子触控信号线可以沿第一方向D1和第四方向D4延伸至第二信号接入区域，与第二信号接入区域的信号引脚电连接，并通过第二信号接入区域的信号引脚与柔性线路板(FPC)电连接。例如，在第二边框区域，触控信号线可以位于第二电源线65远离第一电源线64的一侧。
在一些示例中，如图5所示，边框区域还可以设置有第一电源线64和第二电源线65。例如，第一电源线64和第二电源线65可以为同层结构。第一电源线64和第二电源线65可以与显示区域的第一源漏金属层同层设置。
在一些示例中，如图5所示，第一电源线64可以包括位于第一边框区域 21的第一子电源线641、位于弯折区域221的第一电源连接线643、位于走线引出区域222的第二子电源线642。第一电源连接线643可以电连接第一子电源线641和第二子电源线642。第二子电源线642可以沿第一方向D1延伸，随后沿第二方向D2向两侧延伸，随后分别沿第三方向D3和第四方向D4向第二信号接入区域延伸，以便与第二信号接入区域的绑定引脚电连接。其中，第三方向D3和第四方向D4均与第一方向D1和第二方向D2交叉，第三方向D3与第四方向D4交叉，例如，第三方向D3可以垂直于第四方向D4。
在一些示例中，如图5所示，第二电源线65可以位于第一电源线64靠近显示面板边缘的一侧。第二电源线65可以包括：位于第一边框区域21的第三子电源线651、位于弯折区域221的第二电源连接线653、位于走线引出区域222的第四子电源线652。位于第二边框区域左侧区域的第四子电源线652可以先沿第一方向D1延伸，随后沿第四方向D4向第二信号接入区域延伸，位于第二边框区域右侧区域的第四子电源线652可以先沿第一方向D1延伸，随后沿第三方向D3向第二信号接入区域延伸。第四子电源线652可以与第二信号接入区域的绑定引脚电连接。
在一些示例中，如图5所示，在部分第一边框区域21，第一检测线31a的第一子走线311a可以位于第二电源线65的第三子电源线651远离显示区域10的一侧，第二检测线32a的第四子走线321a可以位于第二电源线65的第三子电源线651靠近显示区域10的一侧。同理，第一检测线31b的第一子走线311b可以位于第二电源线的第三子电源线远离显示区域10的一侧，第二检测线32b的第四子走线321b可以位于第二电源线的第三子电源线靠近显示区域10的一侧。
图6为图5中区域S1的局部放大示意图。在一些示例中，如图5和图6所示，第一检测线31a的第二子走线312a可以为沿第一方向D1延伸的直线段。第一子走线311a和第三子走线313a可以为同层结构，例如与显示区域的第二栅金属层同层设置。第二子走线312a可以与显示区域的第一源漏金属层同层设置。第二子走线312a的一端可以通过第三绝缘层开设的过孔与第一子走线311a电连接，另一端可以通过第三绝缘层开设的过孔与第三子走线 313a电连接。第二检测线32a的第五子走线322a可以包括沿第一方向D1的多个(例如五个)第一直线段以及连接相邻第一直线段的沿第二方向D2延伸的第二直线段。第二直线段可以将多个第一直线段串联连接。第五子走线322a可以与显示区域的第一源漏金属层同层设置。第四子走线321a可以与显示区域的第一栅金属层同层设置，第六子走线323a可以与显示区域的第二栅金属层同层设置。第五子走线322a的一端可以通过第三绝缘层和第二绝缘层开设的过孔与第四子走线321a电连接，另一端可以通过第三绝缘层开设的过孔与第六子走线323a电连接。在本示例中，第五子走线322a的第一直线段的数目越多，第二检测线32a可以检测的弯折区域的范围越广。
在一些示例中，如图5和图6所示，在弯折区域221，第一检测线31a的第二子走线312a和第二检测线32a的第五子走线322a可以位于第二电源线65的第二电源连接线653和多条触控连接线63之间。第二检测线32a的第五子走线322a可以位于第一检测线31a的第二子走线312a远离第二电源线65的第二电源连接线653的一侧。本示例中，通过在弯折区域将第二检测线设置在第二电源线远离显示面板边缘的一侧，有利于第二检测线对弯折区域进行裂纹检测。另外，通过在弯折区域将第一检测线和第二检测线相邻设置有利于走线排布。
图7为图5中区域S2的局部放大示意图。在一些示例中，如图5至图7所示，第一检测线31a的第三子走线313a可以先沿第一方向D1向远离显示区域一侧延伸，随后沿第三方向D3向显示面板沿第二方向的中线延伸，随后再沿第一方向D1向远离显示区域一侧延伸。第二检测线32a的第六子走线323a的延伸方向与第三子走线313a的延伸方向大致相同。第六子走线323a可以位于第三子走线313a靠近显示面板沿第二方向的中线一侧。关于第一检测线31b和第二检测线32b的结构可以参照第一检测线31a和第二检测线32a的结构，故于此不再赘述。
图8为图5中区域S3的局部放大示意图。图9为图5中区域S4的局部放大示意图。图10为图5中区域S5的局部放大示意图。在一些示例中，如图5至图10所示，第一检测线31a的第三子走线313a可以与第一检测连接线381电连接，第二检测线32a的第六子走线323a可以与第一检测连接线 381电连接。第一检测连接线381可以沿第二方向D2延伸，第一检测连接线381的第一端可以与沿第四方向D4延伸的第四检测连接线384电连接，第四检测连接线384可以与第五检测连接线385电连接，第五检测连接线385可以与第一信号接入区域的第一信号引脚电连接。第四检测连接线384可以依次沿第四方向D4、第二方向D2、第四方向D4和第一方向D1延伸至第二信号接入区域，并与第二信号接入区域的第四信号引脚电连接。第一检测连接线381的第二端可以与沿第一方向D1向显示区域一侧延伸的第二检测连接线382的第一端电连接，第二检测连接线382的第二端可以与沿第二方向D2延伸的第三检测连接线383电连接。第一检测线31b的第三子走线313b和第二检测线32b的第六子走线323b可以与第三检测连接线383电连接。第一检测连接线381、第二检测连接线382和第三检测连接线383可以位于第一电源线64远离显示区域10的一侧。在一些示例中，第四检测连接线384和第一检测连接线381可以为一体结构。第一检测连接线381和第三检测连接线383可以与显示区域的第一源漏金属层同层设置，第二检测连接线382可以与显示区域的第一栅金属层同层设置。
在本示例中，检测连接线38可以包括：第一检测连接线381、第二检测连接线382、第三检测连接线383、第四检测连接线384和第五检测连接线385。通过第一检测连接线381、第二检测连接线382和第三检测连接线383可以实现两条第一检测线31a和31b、以及两条第二检测线32a和32b的电连接；通过第四检测连接线384和第五检测连接线385可以实现两条第一检测线31a和31b和两条第二检测线32a和32b与第一信号接入区域内的同一个第一信号引脚电连接。通过第四检测连接线384还可以实现与第二信号接入区域内的第四信号引脚电连接。本示例的布线方式可以节省布线空间。
在一些示例中，如图8所示，第一检测连接线381还可以与第三检测线33的第八子走线332电连接，以实现给第三检测线33提供第一检测信号。在本示例中，第三检测线33同样可以接收第一信号引脚提供的第一检测信号。本示例的连接方式可以节省布线空间，而且可以减小信号引脚的占用空间。
在一些示例中，如图7和图8所示，检测控制线34的第十子走线342在走线引出区域222可以沿第一方向D1延伸，并与第一控制连接线386电 连接，还可以与第二控制连接线387电连接。第一控制连接线386的延伸方向与第一检测连接线381的延伸方向大致相同，且第一控制连接线386和第一检测连接线381在第一方向D1上相邻。
在一些示例中，如图5至图8所示，多条驱动控制信号线62可以包括：第一电压线62a、第二电压线62b、初始信号(INIT)线62c、输出信号线62d、起始信号(STV)线62e、第一时钟信号线62f、第二时钟信号线62g、测试控制线62h、第一测试信号线62i、第二测试信号线62j以及第三测试信号线62k。第一电压线62a和第二电压线62b可以配置为给栅极驱动电路提供电源信号。第一时钟信号线62f和第二时钟信号线62g可以配置为给栅极驱动电路提供时钟信号。起始信号线62e可以配置为给栅极驱动电路提供起始信号。初始信号线62c可以配置为给像素电路提供初始信号。输出信号线62d可以配置为传输栅极驱动电路的输出信号。测试控制线62h、第一测试信号线62i、第二测试信号线62j以及第三测试信号线62k可以配置为给测试电路提供信号。
在一些示例中，如图8所示，第一电压线62a的第三子驱动控制信号线623a、第二电压线62b的第三子驱动控制信号线623b、初始信号线62c的第三子驱动控制信号线623c、输出信号线62d的第三子驱动控制信号线623d、第三检测线33的第八子走线332、检测控制线34的第十子走线342、起始信号线62e的第三子驱动控制信号线623e、第一时钟信号线62f的第三子驱动控制信号线623f、第二时钟信号线62g的第三子驱动控制信号线623g、测试控制线62h的第三子驱动控制信号线623h、第一测试信号线62i的第三子驱动控制信号线623i、第二测试信号线62j的第三子驱动控制信号线623j以及第三测试信号线62k的第三子驱动控制信号线623k可以沿第二方向D2依次排布。
在一些示例中，如图7和图8所示，起始信号线62e的第四子驱动控制信号线624e、第一时钟信号线62f的第四子驱动控制信号线624f、第二时钟信号线62g的第四子驱动控制信号线624g、输出信号线62d的第四子驱动控制信号线624d、初始信号线62c的第四子驱动控制信号线624d、第二电压线62b的第四子驱动控制信号线624b、第一电压线62a的第四子驱动控制信号 线624a、第一控制连接线385、第一检测连接线381、测试控制线62h的第四子驱动控制信号线624h、第一测试信号线62i的第四子驱动控制信号线624i、第二测试信号线62j的第四子驱动控制信号线624j以及第三测试信号线62k的第四子驱动控制信号线624k可以沿第一方向D1依次排布。
在一些示例中，如图8所示，第一电压线62a的第三子驱动控制信号线623a与第四子驱动控制信号线624a和第五子驱动控制信号线625a电连接。第二电压线62b的第三子驱动控制信号线623b与第四子驱动控制信号线624b和第五子驱动控制信号线625b电连接。初始信号线62c的第三子驱动控制信号线623c与第四子驱动控制信号线624c电连接。输出信号线62d的第三子驱动控制信号线623d和第四子驱动控制信号线624d电连接。起始信号线62e的第三子驱动控制信号线623e与第四子驱动控制信号线624e和第五子驱动控制信号线625e电连接。第一时钟信号线62f的第三子驱动控制信号线623f与第四子驱动控制信号线624f和第五子驱动控制信号线625f电连接。第二时钟信号线62g的第三子驱动控制信号线623g与第四子驱动控制信号线624g和第五子驱动控制信号线625g电连接。测试控制线62h的第三子驱动控制信号线623h与第四子驱动控制信号线624h和第五子驱动控制信号线625h电连接。第一测试信号线62i的第三子驱动控制信号线623i与第四子驱动控制信号线624i和第五子驱动控制信号线625i电连接。第二测试信号线62j的第三子驱动控制信号线623j与第四子驱动控制信号线624j和第五子驱动控制信号线625j电连接。第三测试信号线62k的第三子驱动控制信号线623k与第四子驱动控制信号线624k和第五子驱动控制信号线625k电连接。
本示例中，将第一检测连接线381排布在多条第四子驱动控制信号线内，有利于连接第三检测线33，而且可以通过第二检测连接线382和第三检测连接线383实现信号转接。本示例的走线排布方式可以节省走线和引脚的占用空间，而且可以避免对其他信号产生影响。
在一些示例中，如图10所示，第四检测连接线384可以通过第五检测连接线385与位于第一信号接入区域的第一信号引脚391电连接。例如，第一信号引脚391可以包括叠设且相互电连接的第一子引脚和第二子引脚。第五检测连接线385可以与第一子引脚电连接。第五检测连接线385和第一子引 脚可以为一体结构，例如，可以与显示区域的第一栅金属层同层设置，第二子引脚可以与显示区域的第一源漏金属层同层设置。第一控制连接线386可以与第三控制连接线388电连接，第三控制连接线388可以与位于第一信号接入区域的第三信号引脚393电连接。关于第三控制连接线388和第三信号引脚393的连接方式与第五检测连接线385和第一信号引脚391的连接方式类似，故于此不再赘述。第三控制连接线388靠近第五检测连接线385的一侧还可以依次设置起始信号线62e、第一时钟信号线62f和第二时钟信号线62g与第一信号接入区域内的对应信号引脚的连接线。
本示例性实施例的显示面板的制备工艺可以利用已有成熟的制备设备即可实现，可以很好地与已有制备工艺兼容，工艺实现简单，易于实施，生产效率高，生产成本低，良品率高。
本实施例还提供一种裂纹检测方法，应用于如上所述的显示面板，包括：在对显示面板进行裂纹检测时，通过第一检测控制单元电连接第一检测线和第一数据线，通过第二检测控制单元电连接第二检测线和第二数据线，并向第一检测线和第二检测线提供第一检测信号；基于第一数据线和第二数据线电连接的多个显示单元的发光状态来确定第一检测线或第二检测线是否存在裂纹。
在一些示例中，第一数据线电连接的多个显示单元发射光在显示区域形成第一亮线，则确定第一检测线(例如第一边框区域)存在裂纹。第二数据线电连接的多个显示单元反射光在显示区域形成第二亮线，则确定第二检测线(例如弯折区域)存在裂纹。
本示例提供的裂纹检测方法，可以同步进行第一检测线和第二检测线的裂纹检测，可以节省检测工艺，实现对第一边框区域和弯折区域的有效快速检测，从而可以有效控制生产成本，并提高显示面板的良率。
本公开实施例还提供一种显示装置，包括前述实施例的显示面板。
图11为本公开至少一实施例的显示装置的示意图。在一些示例中，如图11所示，显示面板910可以为OLED显示面板。显示装置91可以为：OLED显示装置、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框或导航仪等任何具有显示功能的产品或部件。然而，本实施例对此并不限定。
本公开中的附图只涉及本公开涉及到的结构，其他结构可参考通常设计。在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。本领域的普通技术人员应当理解，可以对本公开的技术方案进行修改或者等同替换，而不脱离本公开技术方案的精神和范围，均应涵盖在本公开的权利要求的范围当中。

Claims (15)

  1. 一种显示面板，包括：
    衬底，包括显示区域和位于所述显示区域周边的边框区域，所述边框区域包括：围绕所述显示区域的第一边框区域和位于所述第一边框区域远离所述显示区域一侧的第二边框区域；所述第二边框区域至少包括弯折区域；
    多个显示单元、至少一条第一数据线和至少一条第二数据线，位于所述显示区域，所述第一数据线和所述第二数据线分别与所述多个显示单元中的部分显示单元电连接；
    至少一个第一检测控制单元和至少一个第二检测控制单元；
    至少一条第一检测线，至少位于所述第一边框区域，所述第一检测线的第一端通过所述第一检测控制单元与所述第一数据线电连接，所述第一检测线的第二端配置为接收第一检测信号；
    至少一条第二检测线，至少位于所述第二边框区域的弯折区域；所述第二检测线的第一端通过所述第二检测控制单元与所述第二数据线电连接，所述第二检测线的第二端配置为接收所述第一检测信号。
  2. 根据权利要求1所述的显示面板，其中，所述第一数据线电连接的多个显示单元被配置为在所述第一检测控制单元导通且所述第一检测线发生裂纹时发射光以显示第一亮线；
    所述第二数据线电连接的多个显示单元被配置为在所述第二检测控制单元导通且所述第二检测线发生裂纹时发射光以显示第二亮线。
  3. 根据权利要求1或2所述的显示面板，其中，所述第一检测线的第二端和所述第二检测线的第二端与同一个第一信号引脚电连接。
  4. 根据权利要求1至3中任一项所述的显示面板，其中，所述第二边框区域还包括：位于所述弯折区域远离所述显示区域一侧的走线引出区域和信号接入区域；
    在所述走线引出区域，所述第一检测线和所述第二检测线通过检测连接线电连接，所述检测连接线与所述信号接入区域的第一信号引脚电连接。
  5. 根据权利要求4所述的显示面板，其中，所述显示面板包括两条第一检测线和两条第二检测线，所述两条第一检测线沿第二方向位于所述显示区域的两侧，所述两条第二检测线沿所述第二方向位于所述显示区域的两侧；
    所述检测连接线包括：依次电连接的第一检测连接线、第二检测连接线和第三检测连接线，所述第一检测连接线与位于所述显示区域一侧的第一检测线和第二检测线电连接，所述第三检测连接线与位于所述显示区域另一侧的第一检测线和第二检测线电连接；
    所述第一检测连接线和所述第三检测连接线沿所述第二方向延伸，所述第二检测连接线沿第一方向延伸，所述第一方向与所述第二方向交叉。
  6. 根据权利要求5所述的显示面板，其中，所述第一检测连接线和所述第三检测连接线为同层结构，所述第二检测连接线位于所述第一检测连接线靠近所述衬底的一侧。
  7. 根据权利要求1至6中任一项所述的显示面板，其中，所述第一检测线包括位于所述第一边框区域的第一子走线，所述第一子走线为蛇形走线；
    所述第二检测线包括位于所述弯折区域的第五子走线，所述第五子走线为蛇形走线。
  8. 根据权利要求1至7中任一项所述的显示面板，其中，在所述第一边框区域，所述第一检测线的至少部分位于所述第二检测线远离所述显示区域的一侧。
  9. 根据权利要求1至8中任一项所述的显示面板，其中，所述边框区域还包括：第一电源线和第二电源线；在所述弯折区域，所述第二电源线位于所述第一检测线和第二检测线远离所述第一电源线的一侧。
  10. 根据权利要求1至9中任一项所述的显示面板，还包括：位于所述显示区域的至少一条第三数据线、位于所述第一边框区域的至少一条第三检测线以及位于所述边框区域的至少一个第三检测控制单元；所述第三检测线的第一端通过所述第三检测控制单元与所述第三数据线电连接，所述第三检测线的第二端配置为接收第二检测信号；
    所述第三数据线电连接的多个显示单元被配置为在所述第三检测控制单 元导通且接收到所述第二检测信号时显示暗线。
  11. 根据权利要求1至9中任一项所述的显示面板，还包括：位于所述显示区域的至少一条第三数据线、位于所述第一边框区域的至少一条第三检测线以及位于所述边框区域的至少一个第三检测控制单元；所述第三检测线的第一端通过所述第三检测控制单元与所述第三数据线电连接，所述第三检测线的第二端配置为接收所述第一检测信号；
    所述第三数据线电连接的多个显示单元被配置为在所述第三检测控制单元导通且所述第三检测线发生裂纹时发射光以显示亮线。
  12. 根据权利要求1至11中任一项所述的显示面板，其中，所述第一检测控制单元包括第一检测晶体管，所述第一检测晶体管的栅极与检测控制线电连接，所述第一检测晶体管的第一极与所述第一检测线电连接，所述第一检测晶体管的第二极与所述第一数据线电连接；
    所述第二检测控制单元包括第二检测晶体管，所述第二检测晶体管的栅极与所述检测控制线电连接，所述第二检测晶体管的第一极与所述第二检测线电连接，所述第二检测晶体管的第二极与所述第二数据线电连接。
  13. 根据权利要求1至12中任一项所述的显示面板，其中，所述至少一个第一检测控制单元和至少一个第二检测控制单元位于所述第一边框区域。
  14. 一种显示装置，包括如权利要求1至13中任一项所述的显示面板。
  15. 一种裂纹检测方法，应用于如权利要求1至13中任一项所述的显示面板，所述裂纹检测方法包括：
    在对显示面板进行裂纹检测时，通过第一检测控制单元导通第一检测线和第一数据线，通过第二检测控制单元导通第二检测线和第二数据线，并向所述第一检测线和所述第二检测线提供第一检测信号；
    基于所述第一数据线和第二数据线电连接的多个显示单元的发光状态来确定所述第一检测线或所述第二检测线是否存在裂纹。
PCT/CN2022/116100 2022-08-31 2022-08-31 显示面板、显示装置及裂纹检测方法 WO2024045018A1 (zh)

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