Classifications

• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
  • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
  • C23C18/18—Pretreatment of the material to be coated
  • C23C18/20—Pretreatment of the material to be coated of organic surfaces, e.g. resins
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
  • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
  • C23C18/1601—Process or apparatus
  • C23C18/1633—Process of electroless plating
  • C23C18/1635—Composition of the substrate
  • C23C18/1639—Substrates other than metallic, e.g. inorganic or organic or non-conductive
  • C23C18/1642—Substrates other than metallic, e.g. inorganic or organic or non-conductive semiconductor
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
  • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
  • C23C18/31—Coating with metals
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices

Definitions

• the present disclosure relates to a substrate liquid processing method and a substrate liquid processing apparatus.
• Electroless plating can be used to form fine wiring on semiconductor wafers (also simply referred to as "wafers").
• Patent Document 1 discloses an apparatus that uses electroless plating to fill vias (recesses) in a wafer with metal wiring.
• the present disclosure provides an advantageous technique for depositing plating metal on a substrate in good condition.
• One aspect of the present disclosure is a process of preparing a substrate including wiring and an insulating film provided on the wiring, the insulating film including a step of having a recess that penetrates to the wiring and exposing the wiring, and a reducing agent. a step of cleaning the surface of the insulating film, including the dividing surfaces defining the recesses, using a cleaning solution containing the first metal ions;
• the present invention relates to a substrate liquid processing method including the step of depositing plating metal in the recesses of the substrate.
• FIG. 1 is a diagram showing an example of a schematic configuration of a multilayer interconnection forming system.
• FIG. 2 is a diagram showing a configuration example of an electroless plating processing unit.
• FIG. 3 is a diagram showing an example of an enlarged cross section of a wafer (particularly a location near one recess).
• FIG. 4A is a diagram for explaining an example of the substrate liquid processing method according to the first modification, and shows an enlarged cross section of a wafer (particularly a location near one recess).
• FIG. 4B is a diagram for explaining an example of the substrate liquid processing method according to the first modification, and shows an enlarged cross section of the wafer (particularly a location near one recess).
• FIG. 4A is a diagram for explaining an example of the substrate liquid processing method according to the first modification, and shows an enlarged cross section of a wafer (particularly a location near one recess).
• FIG. 4B is a diagram for explaining an example of the substrate liquid processing method according to the first modification
• FIG. 4C is a diagram for explaining an example of the substrate liquid processing method according to the first modification, and shows an enlarged cross section of the wafer (particularly a location near one recess).
• FIG. 4D is a diagram for explaining an example of the substrate liquid processing method according to the first modification, and shows an enlarged cross section of the wafer (particularly a location near one recess).
• FIG. 4E is a diagram for explaining an example of the substrate liquid processing method according to the first modification, and shows an enlarged cross section of the wafer (particularly a location near one recess).
• FIG. 1 is a diagram showing a schematic configuration example of a multilayer wiring forming system 1. As shown in FIG. 1, the X-axis, Y-axis, and Z-axis are orthogonal to each other, the X-axis and Y-axis extend horizontally, and the positive direction of the Z-axis is a vertically upward direction.
• a multilayer wiring forming system (substrate liquid processing system) 1 shown in FIG. 1 includes a loading/unloading station 2, a processing station 3, and a control device 4.
• the loading/unloading station 2 includes a carrier mounting section 11 and a first transport section 12.
• a plurality of carriers C are placed on the carrier placement section 11, and each carrier C supports one or more wafers W in a horizontal state.
• the first transport section 12 is provided adjacent to the carrier mounting section 11 and includes a first substrate transport device 13 and a transfer section 14 .
• the first substrate transport device 13 transports the wafer W between each carrier C and the transfer section 14.
• the first substrate transfer device 13 of this example can move the wafer W in the horizontal and vertical directions while holding the wafer W, and rotate (spin) the wafer W around the vertical axis. It is possible.
• the transfer unit 14 temporarily supports the wafer W received from the first substrate transfer device 13 or temporarily supports the wafer W scheduled to be transferred to the first substrate transfer device 13.
• the wafer W transferred from the transfer unit 14 to the first substrate transfer device 13 is returned from the first substrate transfer device 13 to the corresponding carrier C.
• the processing station 3 is provided adjacent to the loading/unloading station 2 (particularly the first transport section 12) in the X direction, and includes a second transport section 15 and a plurality of processing units 16.
• the second transport unit 15 includes a second substrate transport device 20 that is movable on the transport path.
• the second substrate transfer device 20 can move the wafer W in the horizontal and vertical directions, and can rotate (spin) the wafer W around a vertical axis.
• the second transport section 15 transports the wafer W received from the delivery section 14 to a desired processing unit 16, transports the wafer W between the processing units 16, and transports the wafer W from the processing unit 16 to the delivery section 14. I do things.
• the plurality of processing units 16 included in the processing station 3 are arranged on both sides of the transport path of the second substrate transport device 20 (in the example shown in FIG. 1, the transport path extends in the X direction).
• the arrangement form and number of these processing units 16 are not limited to the example shown in FIG. 1, and any number of processing units 16 can be arranged in any form.
• each processing unit 16 is basically not limited, at least one or more processing units 16 are provided as an electroless plating processing unit (substrate liquid processing apparatus) 17.
• the electroless plating processing unit 17 performs electroless plating processing on the wafer W as described later.
• at least one processing unit 16 may be provided as a reverse sputtering unit 18 used in a first modification example (FIGS. 4A to 4E) to be described later.
• the plurality of processing units 16 included in the processing station 3 may include a plurality of electroless plating processing units 17, a plurality of CMP processing units, a plurality of heat processing units, and a plurality of cleaning processing units.
• the CMP (Chemical Mechanical Polishing) processing unit performs CMP processing on the wafer W.
• the heat treatment unit performs predetermined heat treatment on the wafer W.
• the cleaning processing unit performs cleaning processing on the wafer W, and includes, for example, a spin cleaning type cleaning device.
• the control device 4 is, for example, a computer, and includes a control section 21 and a storage section 22.
• the control unit 21 includes a microcomputer having a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), an input/output port, and various other circuits.
• the CPU of the microcomputer controls the first transport section 12, the second transport section 15, and each processing unit 16 (including the electroless plating processing unit 17) by reading and executing a program stored in the ROM. conduct.
• the program stored in the storage unit 22 of the control device 4 may be one that has been recorded on a computer-readable storage medium, and may be installed in the storage unit 22 from the storage medium.
• Examples of computer-readable storage media include hard disks (HD), flexible disks (FD), compact disks (CD), magnetic optical disks (MO), and memory cards.
• the storage unit 22 can be realized by, for example, a semiconductor memory device such as a RAM, a flash memory, or a storage device such as a hard disk or an optical disk.
• FIG. 2 is a diagram showing an example of the configuration of the electroless plating processing unit 17.
• FIG. 2 shows the inner configuration of the housing 30 in a transparent manner.
• the electroless plating processing unit 17 shown in FIG. 2 is configured as a single-wafer processing unit 16 that processes wafers W one by one, and includes a casing 30 and a substrate rotation and holding mechanism provided at least partially inside the casing 30. 31, a processing liquid supply mechanism 32, and a cup 33.
• the housing 30 has an opening/closing loading/unloading section (not shown).
• the wafer W transported by the second substrate transport device 20 (see FIG. 1) is carried into the inside of the housing 30 through the loading/unloading section in an open state, and is unloaded from the inside of the housing 30 through the loading/unloading section in an open state. be done.
• the loading/unloading section is kept in a closed state, and the loading/unloading section of the housing 30 is kept closed. The inflow of outside air into the interior is restricted.
• the substrate rotation and holding mechanism 31 is provided to hold the wafer W and to be rotatable together with the wafer W.
• the substrate rotation and holding mechanism 31 includes a hollow cylindrical rotation shaft 31a, a turntable 31b, a wafer chuck 31c, and a first rotation drive section (not shown).
• the length of the rotating shaft 31a in the vertical direction inside the housing 30 is changed by a second elevating mechanism (not shown) that is driven under the control of the control device 4 (see FIG. 1).
• the turntable 31b is attached to the upper end of the rotating shaft 31a.
• the wafer chuck 31c is provided on the outer periphery of the upper surface of the turntable 31b, and supports the wafer W.
• the first rotation drive unit transmits rotational power from a drive source such as a motor to the rotation shaft 31a, and rotates the rotation shaft 31a, the turntable 31b, and the wafer chuck 31c integrally.
• the substrate rotation holding mechanism 31 is driven under the control of the control device 4 (see FIG. 1), and the rotating shaft 31a, turntable 31b, and wafer chuck 31c are rotated by the rotational power transmitted from the first rotation driving section, and in turn, the wafer chuck The wafer W supported by 31c is rotated.
• the processing liquid supply mechanism 32 is driven under the control of the control device 4 (see FIG. 1), and supplies a processing liquid (for example, an electroless plating solution) to the surface of the wafer W held by the substrate rotation and holding mechanism 31.
• the processing liquid supply mechanism 32 of this example includes a processing liquid supply section 32a, an ejection head 32b, an ejection nozzle 32c, an arm 32d, a support shaft 32e, and a processing liquid supply path 32f.
• the processing liquid supply section 32a supplies the processing liquid to the ejection head 32b via the processing liquid supply path 32f.
• the processing liquid supplied to the ejection head 32b is ejected from the ejection nozzle 32c attached to the ejection head 32b, and is applied to the processing surface (upper surface) of the wafer W, for example.
• the discharge head 32b and the discharge nozzle 32c are attached to the tip of the arm 32d and move integrally with the arm 32d.
• the arm 32d is supported by a support shaft 32e so as to be movable up and down, and is provided inside the housing 30 so as to be movable in the up and down direction.
• the arm 32d is provided so as to be able to rotate (swivel) integrally with the support shaft 32e and move in the horizontal direction.
• the support shaft 32e is rotated around a central axis extending in the vertical direction by a second rotation drive unit (not shown).
• the processing liquid supply mechanism 32 having the above-described configuration can discharge the processing liquid toward any location on the processing surface (upper surface) of the wafer W from the discharge nozzle 32c positioned at a desired height position.
• the cup 33 has two discharge ports 33a and 33b arranged at different positions in the vertical direction, and receives the processing liquid scattered from the wafer W.
• the cup 33 is provided so as to be movable in the vertical direction by a second elevating mechanism (not shown) driven under the control of the control device 4 (see FIG. 1), and is located at the height of the two discharge ports 33a and 33b. is variable.
• the two discharge ports 33a and 33b are connected to liquid discharge mechanisms 34 and 35, respectively.
• the liquid discharge mechanisms 34 and 35 discharge the processing liquid collected at the two discharge ports 33a and 33b to the outside of the housing 30.
• the liquid discharge mechanism 34 has a recovery channel 34b and a waste channel 34c that are connected to the discharge port 33a via a channel switch 34a.
• the flow path switching device 34a switches the flow path into which the processing liquid from one discharge port 33a can flow, between the recovery flow path 34b and the waste flow path 34c.
• the recovery channel 34b is a channel for reusing the processing liquid recovered from one of the discharge ports 33a, and is provided with a cooling buffer 34d for cooling the processing liquid.
• the waste channel 34c is a channel for discarding the processing liquid recovered from one of the discharge ports 33a.
• the liquid discharge mechanism 35 has a waste channel 35a connected to the other discharge port 33b.
• the waste channel 35a is a channel for discarding the processing liquid recovered from the other outlet 33b.
• the processing liquid supply section 32a is provided to be able to supply the electroless plating solution and other processing liquids (for example, cleaning liquid and rinsing liquid) to the ejection head 32b and the ejection nozzle 32c as the processing liquid.
• the processing liquid supply mechanism 32 can perform a cleaning process using a cleaning liquid, a rinsing process using a rinsing liquid, or another liquid process on the wafer W before and after applying the electroless plating liquid to the wafer W. .
• processing liquid supply mechanism 32 is simply shown in FIG. 2, and one processing liquid supply section 32a, one processing liquid supply path 32f, one ejection head 32b, and one ejection nozzle 32c are shown.
• the number and configuration of the processing liquid supply section 32a, the processing liquid supply path 32f, the ejection head 32b, and the ejection nozzle 32c are not limited.
• a plurality of processing liquid supply sections 32a, processing liquid supply paths 32f, ejection heads 32b, and/or ejection nozzles 32c may be provided.
• a dedicated processing liquid supply section 32a, a processing liquid supply path 32f, a discharge head 32b, and/or a discharge nozzle 32c are provided.
• a dedicated processing liquid supply section 32a, processing liquid supply path 32f, ejection head 32b, and/or ejection nozzle 32c may be provided only for one or more specific types of processing liquid.
• the processing liquid supply section 32a, the processing liquid supply path 32f, the ejection head 32b, and/or the ejection nozzle 32c are shared.
• the "first metal ion" referred to here is a metal ion that is also included in the electroless plating solution, and is, for example, a metal ion derived from Co (cobalt), W (tungsten), or Ru (ruthenium).
• the electroless plating reaction (particularly the precipitation growth of plating metal) is affected by the wiring pattern layout (particularly the wiring pattern density) on the wafer W.
• the higher the density of the multiple recesses (e.g. vias and trenches) where the plating metal is to be deposited by electroless plating the easier it is to deposit the plating metal with good quality, and the lower the density of the multiple recesses, the easier it is for the plating metal to precipitate. It tends to be difficult.
• the plating metal when performing electroless plating under certain conditions, even if the plating metal can be properly deposited in multiple recesses provided at high density, the plating metal will not be properly deposited in multiple recesses provided at low density. Sometimes. Therefore, when creating wiring with various pattern densities on a single wafer W by electroless plating, the wiring in areas with high pattern density will be formed appropriately, but the wiring in areas with low pattern density will not be formed properly. There is.
• the inventor of the present invention actually performed an electroless plating process on a wafer W to form "wiring with high pattern density” and "wiring with low pattern density.” Specifically, a wafer W having a plurality of recesses (vias) in which Cu (copper) wiring is exposed at the bottom was prepared, and an electroless plating process was performed to deposit Co plating in the recesses.
• the inventor of the present invention has discovered that, due to the treatment (for example, etching treatment) performed on the wafer W prior to the electroless plating treatment, residue tends to accumulate in areas of the wafer W with a lower pattern density than in areas with a higher pattern density. has found out. Since the residue on the wafer W is a factor that inhibits the growth of the plating metal, it is thought that the growth of the plating metal tends to be slowed or inhibited at locations on the wafer W where the pattern density is lower than at locations where the pattern density is high.
• the inventor of the present invention believes that in pre-clean processing or normal alkaline cleaning processing for removing oxides on the wafer W, such etching residues (e.g., organic component residues) deposited on the wafer W are removed. It was confirmed that removal was difficult.
• etching residues e.g., organic component residues
• the inventor of the present invention effectively removed such etching residue by cleaning the wafer W using a cleaning solution containing the same metal ions as those contained in the electroless plating solution. I found out that it can be removed.
• the inventor of the present invention cleans the wafer W using a cleaning solution containing such metal ions, and then performs electroless plating to form wiring in the recesses (vias) at both high and low pattern density locations on the wafer W. It was confirmed that it could be formed appropriately.
• the inventor of the present invention conducted another verification in which after cleaning the treated surface of the wafer W using another cleaning solution that does not contain Co and W, electroless plating treatment is performed to deposit CoWB plating in the recesses of the treated surface. I also went there.
• the cleaning liquid used in the other verification had the same pH and TMAH (tetramethylammonium hydroxide) concentration as the "cleaning liquid mainly composed of Co and W" used in the above verification.
• the inventor of the present invention conducted the following verification to confirm the above findings.
• the inventor of the present invention confirmed the state of the treated surface of the wafer W that underwent the etching process and the state of growth of the plated metal on the treated surface of the wafer W that underwent the etching process.
• an etching process SiCN etching process
• SiCN film insulating film
• Electrolytic plating treatment was performed.
• electroless plating was performed on the treated surface of the Cu blanket wafer without performing SiCN etching.
• the exposed surface of the Cu wiring exposed at the bottom of each recess formed in the insulating film of the wafer W by the "Cu blanket wafer subjected to the SiCN etching treatment", and the exposed surface of the Cu wiring subjected to the etching treatment. is simulated.
• the "Cu blanket wafer not subjected to the SiCN etching process” simulates the exposed surface of the Cu wiring, which has not been affected by the etching process at all.
• the abnormal layer was caused by a residue resulting from the etching process, and was confirmed in the SEM image as a part with an irregular surface shape (surface condition).
• the processed surface of the wafer that had not undergone the SiCN etching process ie, the Cu surface without an abnormal layer was confirmed as a flat surface in the SEM image.
• the layer thickness of the CoWB plated metal deposited on the processed surface of the wafer that has undergone the SiCN etching process is approximately 60% of the layer thickness of the CoWB plated metal deposited on the processed surface of the wafer that has not undergone the SiCN etched process. It was confirmed that
• the inventor of the present invention sequentially performed SiCN etching treatment, DIW cleaning treatment, IPA cleaning treatment, DIW cleaning treatment, pre-clean treatment, DIW cleaning treatment, and IPA cleaning treatment on the treated surface of wafer W.
• the DIW cleaning process is a process in which DIW (Deionized Water) is supplied to the wafer processing surface to wash away the wafer processing surface.
• the IPA cleaning process is a process in which IPA (isopropyl alcohol) is supplied to the wafer processing surface to wash away the wafer processing surface.
• the pre-clean process is a process in which a pre-clean liquid for removing oxides is supplied to the wafer processing surface to wash the wafer processing surface.
• Each of the DIW cleaning process, IPA cleaning process, and preclean process was performed for about 1 minute.
• the inventor of the present invention sequentially performed SiCN etching treatment, DIW cleaning treatment, IPA cleaning treatment, DIW cleaning treatment, preclean treatment, precleaning treatment, DIW cleaning treatment, and IPA cleaning treatment on the treated surface of wafer W. As will be described later, after these cleaning treatments, electroless plating treatment was performed to deposit CoWB plating metal.
• the pre-cleaning process is a process in which a pre-cleaning liquid is supplied to the wafer processing surface to wash away the wafer processing surface.
• the inventor of the present invention prepared four types of pre-cleaning liquids (first to fourth pre-cleaning liquids) containing different components, and conducted verification by using these pre-cleaning liquids depending on their use.
• the first pre-cleaning solution contained cobalt sulfate heptahydrate, tungstic acid, citric acid monohydrate, and TMAH, and did not contain a reducing agent.
• the second pre-cleaning liquid contained cobalt sulfate heptahydrate, citric acid monohydrate, and TMAH, and did not contain tungstic acid or a reducing agent.
• the third pre-cleaning liquid contained citric acid monohydrate and TMAH, and did not contain cobalt sulfate heptahydrate, tungstic acid, or reducing agent.
• the fourth pre-cleaning liquid contained TMAH and did not contain cobalt sulfate heptahydrate, tungstic acid, citric acid monohydrate, or reducing agent.
• Each of the DIW cleaning process, IPA cleaning process, and pre-clean process was performed for about 1 minute.
• the pre-cleaning process was performed for about 10 minutes.
• the degree of abnormal layer on the wafer processing surface that has undergone pre-cleaning treatment with the third pre-cleaning solution is slightly smaller than the degree of abnormal layer on the wafer processing surface that has undergone pre-cleaning treatment with the second pre-cleaning solution. It was big.
• the inventor of the present invention performs the SiCN etching process, DIW cleaning process, IPA cleaning process, DIW cleaning process, pre-clean process, pre-cleaning process, DIW cleaning process, and IPA cleaning process on the processing surface of the wafer W as described above. After that, electroless plating treatment was performed.
• the inventor of the present invention conducted verification by using different pre-cleaning liquids (the first to fourth pre-cleaning liquids described above) containing different components.
• the second pre-cleaning solution containing cobalt sulfate/heptahydrate, citric acid/monohydrate, and TMAH we verified using multiple second pre-cleaning solutions with different concentrations of cobalt sulfate/heptahydrate. I did it.
• pre-cleaning solutions used had approximately the same pH (alkalinity). All prewash solutions used also contained approximately the same concentration of TMAH. Furthermore, all the first to third pre-cleaning solutions used contained approximately the same concentration of citric acid.
• FIG. 3 is a diagram showing an example of an enlarged cross section of the wafer W (particularly a location near one recess 43).
• the inventor of the present invention performed a substrate liquid processing method including pre-cleaning processing and electroless plating processing in the following flow.
• a wafer W (substrate) comprising a wiring (wiring containing Cu) 41 and an insulating film (SiCN film) 42 provided on the wiring 41 is prepared, and the substrate is rotated in the electroless plating unit 17 (see FIG. 2).
• the wafer W was supported by a holding mechanism (substrate support section) 31.
• the insulating film 42 has a plurality of recesses 43. Each recess 43 penetrates to the wiring 41 and exposes the wiring 41 at the bottom.
• the above-mentioned pre-cleaning liquid is supplied to the wafer W from the processing liquid supply mechanism (substrate cleaning section) 32 of the electroless plating processing unit 17 (see FIG. 2), and the processing surface of the wafer W is cleaned using the pre-cleaning liquid. (pre-cleaning treatment) was performed.
• the processing surface of the wafer W that undergoes the pre-cleaning process includes the surface 50 of the insulating film 42 (particularly the partitioning surface 51 that partitions each recess 43).
• the pre-cleaning process was performed using a heated pre-cleaning liquid, specifically, using a pre-cleaning liquid heated to 55° C. or higher (for example, about 80° C.).
• the electroless plating solution is supplied from the processing solution supply mechanism (electroless plating section) 32 of the electroless plating processing unit 17 (see FIG. 2) to the wafer W after the above-mentioned pre-cleaning process, and the electroless plating solution is supplied to each recess 43.
• An electroless plating process was performed to deposit the plated metal.
• the electroless plating solution actually used contained cobalt sulfate heptahydrate, tungstic acid, citric acid monohydrate, TMAH, and DMAB (dimethylamine borane; reducing agent) to deposit the CoWB plating metal. ) included.
• the electroless plating process was performed using the heated electroless plating solution, and specifically, it was performed using the electroless plating solution heated to 40° C. or higher (for example, about 65° C.).
• the inventor of the present invention measured the film thickness of the plating metal (CoWB) deposited on the wafer processing surface that had undergone the above-mentioned pre-cleaning treatment and electroless plating treatment.
• the concentration of cobalt sulfate in the second pre-cleaning solution is low (specifically, if it is lower than the concentration of cobalt sulfate in the first pre-cleaning solution)
• the thickness of the plated metal was small.
• the concentration of cobalt sulfate in the second pre-cleaning solution is high (specifically, higher than the concentration of cobalt sulfate in the first pre-cleaning solution)
• the wafer processing surface that has undergone the pre-cleaning process using the second pre-cleaning solution Now, a sufficient thickness of plating metal has been deposited.
• the concentration of cobalt sulfate in the second pre-cleaning solution was high, the thickness of the plating metal deposited on the wafer processing surface was slightly larger at locations with high pattern density than at locations with low pattern density.
• the inventor of the present invention conducted verification by changing the time period during which the wafer processing surface is immersed in the pre-cleaning liquid (pre-cleaning time). As a result, for all wafer processing surfaces that underwent precleaning using the first precleaning solution and the second precleaning solution, the longer the precleaning time, the greater the thickness of the plating metal deposited on the wafer processing surface. .
• etching residue can be effectively removed from the wafer processing surface.
• plating metal CoWB plating metal
• the plating metal deposited on the wafer processing surface by electroless plating includes a metal obtained by reducing metal ions (first metal ions) contained in the pretreatment liquid.
• the electroless plating reaction is expected to be promoted, and the deposition rate and film thickness increase rate of the plating metal on the wafer processing surface can be improved.
• the above-mentioned pre-cleaning solution and electroless plating solution are only examples, and the composition of the pre-cleaning solution and electroless plating solution is not limited. ) is also not limited. Therefore, the plating metal deposited on the wafer processing surface by the electroless plating process is not limited, and the plating metal may include, for example, at least one of cobalt, nickel, and ruthenium.
• the plating metal and the wiring 41 may include a common metal component.
• copper plating may be deposited on the copper wiring 41 exposed at the bottom of the recess 43 of the wafer W by applying an electroless plating solution containing copper-derived ions.
• ruthenium plating may be deposited on the ruthenium wiring 41 exposed at the bottom of the recess 43 of the wafer W by applying an electroless plating solution containing ions derived from ruthenium.
• the wiring 41 may include a metal that exhibits a greater ionization tendency than a metal obtained by reducing metal ions (first metal ions) commonly contained in the pre-cleaning solution and the electroless plating solution.
• first metal ions reducing metal ions
• the pre-cleaning treatment and the electroless plating treatment are performed in the same processing unit 16 (that is, the electroless plating treatment unit 17) in the above example, they may be performed in separate processing units 16. Further, the pre-cleaning treatment and the electroless plating treatment may be performed in the same substrate liquid processing system (multilayer wiring forming system 1), or may be performed in separate substrate liquid processing systems.
• the pre-cleaning treatment and the electroless plating treatment are performed in the same processing unit 16, and in particular, it is preferable that the opening/closing loading/unloading section of the processing unit 16 is maintained in a closed state.
• the quality of the plated metal deposited on the wafer W by electroless plating is improved by performing the pre-cleaning process and the electroless plating process in the same substrate liquid processing system rather than in separate substrate liquid processing systems. You can expect.
• the substrate liquid processing system referred to herein may refer to a general system including a loading/unloading station 2 and a processing station 3 as shown in FIG. 1, for example.
• the wafer W is sent from the loading/unloading station 2 to the processing station 3, and then is not returned to the loading/unloading station 2, but is subjected to pre-cleaning treatment and the aforementioned processing in one or more processing units 16 of the processing station 3.
• Electroless plating treatment may also be performed.
• the wafer W may be returned to the carry-in/out station 2 after the pre-cleaning process and the electroless plating process are performed.
• the substrate liquid processing method of the above-described embodiment may include a step of removing the wiring 41 exposed in the recess 43 of the wafer W before the pre-cleaning process is performed. Any method can be used to remove the wiring 41 exposed in the recess 43 of the wafer W, and for example, reverse sputtering may be used.
• FIGS. 4A to 4E are diagrams for explaining an example of the substrate liquid processing method according to the first modification, and show enlarged cross sections of the wafer W (particularly a location near one recess 43).
• a wafer W including a wiring 41 and an insulating film 42 provided on the wiring 41 is placed in the reverse sputtering unit 18 (processing unit 16 (see FIG. 1)) (see FIG. 4A).
• the insulating film 42 has a plurality of recesses 43 , each recess 43 penetrates to the wiring 41 , and the wiring 41 is exposed at the bottom of the recess 43 .
• the wafer W undergoes reverse sputtering processing in the reverse sputtering unit 18. That is, the reverse sputtering unit 18 uses the wafer W as a target and applies a high voltage to the wafer W to generate a glow discharge, thereby ionizing the reverse sputtering gas G that is filled around the wafer W and forming the concave portion. 43 to collide with the exposed wiring 41 (see FIG. 4B).
• the portion near the exposed surface of the wiring 41 exposed in the recess 43 is repelled by the reverse sputtering gas G, and a fresh surface (new surface) of the wiring 41 is exposed at the bottom of the recess 43.
• the portion of the wiring 41 that is repelled by the reverse sputtering gas G adheres to the surface 50 of the insulating film 42 (including the partitioning surface 51 that partitions the recess 43).
• the reverse sputtering unit 18 can perform the above-described reverse sputtering process using, for example, an apparatus adapted from a known sputtering apparatus that includes a voltage application device and a reverse sputtering gas supply device.
• the specific composition of the reverse sputtering gas G is also not limited.
• argon can be used as the reverse sputtering gas G, but any other gas (for example, a rare gas element other than argon or nitrogen) may be used. Good too.
• the wafer W is placed in the electroless plating processing unit 17 (processing unit 16 (see FIG. 1)).
• the wafer W undergoes the above-mentioned pre-cleaning process in the electroless plating unit 17, and the reverse sputtered metal 45 attached to the surface 50 of the insulating film 42 is removed (FIG. 4D).
• the reverse Sputtered metal 45 is removed from wafer W.
• the wiring 41 may include a metal that exhibits a greater ionization tendency than the metal obtained by reducing the metal ions (first metal ions) contained in both the pre-cleaning solution and the electroless plating solution.
• the exposed surface of the wiring 41 at the bottom of the recess 43 is dissolved into the pre-cleaning liquid, and a fresher surface of the wiring 41 can be exposed at the bottom of the recess 43.
• the plating metal 47 may have the same composition as the wiring 41 (for example, ruthenium), or may have a different composition from the wiring 41.
• the wiring 41 exposed in the recess 43 of the wafer W is removed before the pre-cleaning process is performed, and a fresh surface of the wiring 41 can be exposed at the bottom of the recess 43. .
• the reactivity of the subsequent electroless plating process can be improved.
• the Sputtered metal 45 can be effectively removed. Therefore, in the subsequent electroless plating process, the plating metal is grown from the bottom of the recess 43 while suppressing the growth of the plating metal from the surface 50 (for example, the partition surface 51) of the insulating film 42 to which the reverse sputtered metal 45 is attached. can be grown.
• the plating metal can be deposited in a bottom-up manner in each recess 43, and high-quality wiring (plated metal 47) can be formed in each recess 43 while preventing defects such as generation of voids.
• the inventor of the present invention verified the above-mentioned effects brought about by this modification.
• a plurality of wafers W that had undergone the above-described reverse sputtering process (see FIGS. 4A to 4C) were prepared. Then, some of these wafers W were subjected to the above-mentioned pre-cleaning process (FIG. 4D), and then electroless plating process was performed (see FIG. 4E). On the other hand, the other wafers W were subjected to the electroless plating process (see FIG. 4E) without being subjected to the above-mentioned pre-cleaning process (FIG. 4D).
• each recess 43 of the wafer W that has been subjected to electroless plating without undergoing pre-cleaning treatment is filled with plating metal 47 in a non-uniform state, and the insulating film 42 around each recess 43 is filled with plating metal 47. It was confirmed that the plated metal 47 was irregularly deposited on the surface 50 as well.
• the technical categories that embody the above-mentioned technical ideas are not limited.
• the device described above may be applied to other devices.
• the above-mentioned technical idea may be embodied by a computer program for causing a computer to execute one or more procedures (steps) included in the above-described method.
• the above-mentioned technical idea may be embodied by a computer-readable non-transitory recording medium on which such a computer program is recorded.

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• 2023
  • 2023-06-14 TW TW112122152A patent/TW202417685A/zh unknown
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  • 2023-06-15 KR KR1020257002898A patent/KR20250027803A/ko active Pending
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