WO2023226416A1 - 芯片的制备方法及芯片 - Google Patents

芯片的制备方法及芯片 Download PDF

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Publication number
WO2023226416A1
WO2023226416A1 PCT/CN2022/141060 CN2022141060W WO2023226416A1 WO 2023226416 A1 WO2023226416 A1 WO 2023226416A1 CN 2022141060 W CN2022141060 W CN 2022141060W WO 2023226416 A1 WO2023226416 A1 WO 2023226416A1
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chip
adhesive layer
glue
substrate
preparation
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PCT/CN2022/141060
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English (en)
French (fr)
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赵云飞
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上海闻泰电子科技有限公司
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Publication of WO2023226416A1 publication Critical patent/WO2023226416A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation

Definitions

  • the present disclosure relates to a chip preparation method and a chip.
  • the warping phenomenon of processed chip components is becoming more and more serious.
  • the purpose of preventing the chip component from warping is often achieved by slits and grooves on the surface or back of the chip component, or by clamping the chip component with a mechanical clamp.
  • slits and grooves can achieve the purpose of stress relief, this will damage the chip assembly and the debris generated may remain on the chip of the chip assembly, thereby affecting the performance of the chip.
  • the use of mechanical clamps requires that the chip assembly be Mechanical fixtures are added to the processing machines and chip components of different sizes require different mechanical fixtures, which will greatly increase the production cost of the chip.
  • the purpose of preventing the chip assembly from warping is achieved by slits and grooves on the surface or back of the chip assembly, or by clamping the chip assembly with a mechanical clamp.
  • slits and grooves can achieve the purpose of stress relief, this will damage the chip assembly and the debris generated may remain on the chip of the chip assembly, thereby affecting the performance of the chip.
  • the use of mechanical clamps requires that the chip assembly be Mechanical fixtures are added to the processing machines and chip components of different sizes require different mechanical fixtures, which will greatly increase the production cost of the chip.
  • a chip preparation method and a chip are provided.
  • a method of preparing a chip comprising the following steps:
  • the chip assembly including a substrate and at least one chip disposed on the substrate;
  • the preparation method further includes: inserting The glue layer with the chip component is heated.
  • the preparation method further includes : Place a heavy object on the side surface of the substrate facing away from the adhesive layer, so that the gravity of the heavy object exerts pressure on the chip component in a direction opposite to the warping direction of the chip component.
  • the surface on the side of the substrate facing away from the adhesive layer is a flat surface.
  • the glue layer includes at least one of photosensitive glue, acrylic structural glue, hot melt glue and super glue.
  • the adhesive layer includes at least two types of photosensitive adhesive, acrylic structural adhesive, hot melt adhesive and super glue, so that the expansion coefficient of each part in the adhesive layer is different.
  • the glue layer has a middle part and side edges located on the periphery of the middle part, and the corresponding expansion coefficient of the middle part of the glue layer is greater than the corresponding expansion coefficient of the side edges, so that the The expansion degree of the middle part of the glue layer is greater than the expansion degree of the sides of the glue layer.
  • the preparation method when the adhesive layer is a photosensitive adhesive layer, after inserting the chip component into the adhesive layer, and after peeling off the adhesive layer from the chip component Previously, the preparation method also included: irradiating the glue layer with an ultraviolet mercury lamp, and irradiating the glue layer with an ultraviolet mercury lamp configured to separate the glue layer from the chip component.
  • the preparation method further includes: removing the substrate.
  • the surface of the substrate used to form the adhesive layer is flat.
  • the glue layer is formed on the surface of the substrate by spin coating or adhesion.
  • the thickness of the glue layer is greater than the thickness of the chip.
  • the expansion coefficient of the glue layer is greater than the expansion coefficient of the substrate and the chip component.
  • the thickness of the substrate is greater than or equal to the thickness of the chip component.
  • a chip is prepared using the preparation method described in the first aspect.
  • Figure 1 is a flow chart of a chip preparation method disclosed in one or more embodiments of the present disclosure
  • Figure 2 is a schematic structural diagram of the chip disclosed in one or more embodiments of the present disclosure during the preparation process
  • Figure 3 is a schematic structural diagram of a chip disclosed in one or more embodiments of the present disclosure.
  • first, second, etc. in the description and claims of the present disclosure are used to distinguish different objects, rather than to describe a specific order of objects.
  • first camera and second camera are used to distinguish different cameras, not to describe a specific order of cameras.
  • words such as “exemplary” or “for example” mean examples, illustrations or explanations. Any embodiment or design described as “exemplary” or “such as” in the present disclosure is not intended to be construed as preferred or advantageous over other embodiments or designs. To be precise, the use of words such as “exemplary” or “such as” is intended to present relevant concepts in a specific manner. In addition, in the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "plurality" refers to both one or more than two.
  • the production step of a chip is usually to etch a semiconductor material to form a chip component including a chip and a substrate carrying the chip, and then form conductive materials on the positive and negative electrodes of the chip respectively, and finally remove the substrate, that is, the chip is separated from the substrate. The bottom is separated to complete the production of the chip.
  • the expansion coefficients of conductive materials and semiconductor materials are greatly different, and the thickness of the chip component at the location where the chip is located is different from the thickness of the chip component at the location where the chip is not located, therefore, it is difficult to produce the chip.
  • the present disclosure discloses a chip preparation method, which can effectively solve the problem of chip component warpage.
  • the technical solution of the present disclosure will be further described below with reference to the embodiments and drawings.
  • the present disclosure discloses a chip preparation method, which can improve the warping problem of the chip assembly 10 and reduce the production cost of the chip 12 without damaging the chip assembly 10 .
  • the preparation method includes the following steps:
  • Step 1 Provide chip components. (For details, please refer to (A) in Figure 2)
  • the chip component 10 includes a substrate 11 and at least one chip 12 provided on the substrate 11 .
  • the chip component 10 can be prepared by processing a provided semiconductor substrate to form a substrate 11 and at least one chip 12 disposed on the substrate 11 on the semiconductor substrate. It can be understood that the substrate 11 and at least one chip 12 provided on the substrate 11 can be formed on the semiconductor substrate by etching or laser engraving.
  • the positive electrode and the negative electrode of the chip 12 need to be formed at the same time.
  • conductive materials are formed on the positive and negative electrodes of the chip 12 respectively, so that the chip 12 can conduct electricity when used in circuit boards or electronic equipment.
  • conductive materials can be formed on the positive and negative electrodes of the chip through electroplating, chemical plating or sputtering.
  • the material of the semiconductor substrate may be silicon, sapphire, etc.
  • silicon or semiconductor materials to prepare the chip component 10 can enable the produced chip 12 to perform its corresponding functions.
  • production personnel can also select the material of the semiconductor substrate or process the semiconductor substrate so that when the produced chip 12 is applied to a circuit board or electronic device, the chip 12 can emit blue light, red light, or green light, etc.
  • the conductive material can be gold, silver or copper, etc., which can be selected according to the actual situation, and is not specifically limited here.
  • the chip 12 may be a digital chip or an analog chip.
  • the chip 12 can be used in the field of computer or logic control; when the chip 12 is an analog chip, the chip 12 can be used in the field of small signal amplification processing.
  • Step 2 Provide the base. (For details, please refer to (B) in Figure 2)
  • the substrate 20 can be a glass block, an iron block, a copper block, etc., which can be selected according to the actual situation.
  • a glass block is used as the substrate 20.
  • the glass block is light and low-cost, which helps reduce the cost of preparing the chip 12.
  • the glass block is transparent, which is good for transmitting light, so as to facilitate The degree of improvement in the warpage of the chip assembly 10 was observed.
  • Step 3 Form a glue layer on the surface of the substrate. (For details, please refer to (C) in Figure 2)
  • the glue layer 30 can be formed on the surface of the substrate 20 by spin coating or adhesion.
  • the spin coating method refers to the spin coating method, which is a commonly used preparation method in organic light-emitting diodes. It mainly includes three steps: batching, high-speed rotation and volatilization film formation, that is, the time, rotation speed and dripping time of the glue are controlled by the glue glue machine. The amount of liquid as well as the concentration and viscosity of the solution used are used to control the coating of the glue layer 30 on the surface of the substrate 20 and the thickness of the glue layer 30 .
  • the attachment method is to directly attach the prepared adhesive layer 30 to the surface of the base 20 .
  • the thickness of the adhesive layer 30 is greater than the thickness of the chip 12, which can ensure that the chip 12 can be fully inserted into the adhesive layer 30, and the surface of the substrate 11 with the chip 12 can be bonded to the adhesive layer 30, so that It is helpful to improve the problem of warpage of the chip component 10 . That is to say, if the thickness of the adhesive layer 30 is smaller than the thickness of the chip 12 , the surface of the substrate 11 with the chip 12 may not be completely bonded to the adhesive layer 30 , so that the adhesive layer 30 cannot be attached to the substrate 11 Applying force is not conducive to improving the warping problem of the chip assembly 10 .
  • the glue layer 30 includes at least one of photosensitive glue, acrylic structural glue, hot melt glue, super glue, etc.
  • the glue layer 30 can be made of photosensitive glue, acrylic structural glue, hot melt glue, super glue, etc.
  • the glue layer 30 can be made of photosensitive glue, or the glue layer 30 can be made of photosensitive glue and acrylate structural glue, or the glue layer 30 can be made of photosensitive glue, hot melt glue and Super glue can be prepared, etc., and can be selected according to actual needs, and is not specifically limited in this embodiment.
  • the adhesive layer 30 can be prepared by at least two methods selected from the group consisting of photosensitive adhesive, acrylic structural adhesive, hot melt adhesive, and super glue.
  • the glue layer 30 can be prepared by using glue with a smaller expansion coefficient at the glue layer 30 corresponding to the position where the chip component 10 has a larger degree of warpage, and the glue layer 30 can be prepared at the position where the chip component 10 has a smaller degree of warpage.
  • the glue layer 30 is made of glue with a large expansion coefficient, which is beneficial to improving the effect of the glue layer 30 on improving the warpage of the chip component 10 .
  • Step 4 Insert the chip component into the glue layer. (For details, please refer to (D) in Figure 2)
  • Inserting the chip assembly 10 into the adhesive layer 30 enables the chip 12 to be embedded in the adhesive layer 30 and the surface of the substrate 11 with the chip 12 to be bonded to the adhesive layer 30 . Since the direction of the adhesive force of the adhesive layer 30 on the chip 12 and the surface of the substrate 11 with the chip 12 is opposite to the warping direction of the chip assembly 10, the adhesive layer 30 exerts an adhesive force on the chip 12 and the surface of the substrate 11 with the chip 12. The adhesive force of the surface can pull the surface on which the chip 12 is mounted on the substrate 11 to a flat position, thereby improving the problem of warpage of the chip assembly 10 .
  • the adhesive force of the adhesive layer 30 to the chip component 10 is used to improve the warpage problem of the chip component 10, there is no need to slit or groove the chip component 10 or to set up additional mechanical clamps on the processing machine table of the chip component 10.
  • the steps to improve the warping problem of the chip component 10 are simple, which can reduce the damage to the structure of the chip component 10 and reduce the production cost of the chip component 10 , that is, it is beneficial to reduce the damage to the structure of the chip 12 and reduce the production cost of the chip 12 .
  • Step 5 Heat the glue layer where the chip component is inserted. (For details, please refer to (E) in Figure 2)
  • the chip component 10 warps in the direction away from the adhesive layer 30 , that is, the chip component 10 forms a concave and convex meniscus structure after warping, and the convex side of the chip component 10 is inserted into the adhesive layer 30 .
  • the extrusion force on the middle part of the glue layer 30 is greater than the extrusion force on the sides of the glue layer 30 .
  • the glue layer 30 with the chip component 10 inserted therein is heated, the glue layer 30 will expand.
  • the expansion degree of the middle part of the glue layer 30 is greater than the expansion degree of the sides of the glue layer 30, so that the deformation degree of the middle part of the chip component 10 is greater than the deformation degree of the side edges of the chip component 10, which is beneficial to further correcting the chip component. 10. Warping problem.
  • the expansion coefficient of the glue layer 30 must be greater than the expansion coefficients of the base 20 and the chip component 10. That is to say, the expansion coefficient of the glue layer 30 is greater than the expansion coefficient of the base 20, semiconductor materials and conductive materials. This can ensure that the deformation degree of the glue layer 30 after heating is greater than the deformation degree of the base 20 and the chip assembly 10, which can better improve the chip assembly. 10. Warping problem.
  • the deformation degree of the glue layer 30 after heating is less than the deformation degree of the substrate 20 and the chip component 10 , the deformation degree of the glue layer 30 may not keep up with the warping degree of the chip component 10 , and ultimately the problem of warping of the chip component 10 cannot be solved well. .
  • the thickness of the base 20 is greater than or equal to the thickness of the chip assembly 10 , which can make the structural strength of the base 20 greater than the structural strength of the chip assembly 10 , thereby helping to improve the problem of warpage of the chip assembly 10 . If the thickness of the substrate 20 is smaller than the thickness of the chip component 10 , the structural strength of the substrate 20 may be smaller than the structural strength of the chip 12 . When the glue layer 30 with the chip component 10 inserted is heated, the glue layer 30 deforms, thereby damaging the chip.
  • the component 10 and the base 20 generate forces, and since the structural strength of the base 20 is smaller than the structural strength of the chip 12 , the force exerted by the adhesive layer 30 on the base 20 may cause the base 20 to deform, while the adhesive layer 30 exerts a force on the chip component 10 The generated force cannot effectively improve the warping problem of the chip component 10 .
  • the thickness of the base 20 may generally be 0.8 mm to 1.2 mm.
  • the thickness of the base 20 may be 0.8 mm, 0.9 mm, 1.0 mm, 1.1 mm or 1.2 mm.
  • the thickness of the chip 12 can generally be 0.55mm to 0.75mm.
  • the thickness of the chip 12 can be 0.55mm, 0.60mm, 0.65mm, 0.70mm or 0.75mm.
  • the thickness of the substrate 20 and the thickness of the chip 12 can be determined according to actual conditions. The situation is determined, and there is no specific limitation in this embodiment.
  • the liner can be A heavy object is pressed on the surface of the bottom 11 away from the adhesive layer 30, so that the gravity of the heavy object can exert a pressure on the chip component 10 in the direction opposite to the warping direction of the chip component 10, thereby improving the ability to prevent the chip component 10 from warping. Improve results.
  • the contact surface between the weight pressed on the surface of the substrate 11 away from the adhesive layer 30 and the substrate 11 needs to be a flat surface, so as to ensure that the weight can press the shape of the substrate 11 to a flat state. , thereby improving the problem of warpage of the chip component 10 .
  • the aforementioned weight may be a glass block, an iron block, a copper block, etc.
  • the specific selection may be based on the actual situation, and is not specifically limited in this embodiment.
  • Step 6 Peel off the adhesive layer from the chip assembly. (For details, please refer to (F) in Figure 2)
  • the chip component 10 Since the chip component 10 is inserted into the glue layer 30 and the glue layer 30 with the chip component 10 inserted is heated, the problem of warping of the chip component 10 can be solved, that is, the chip component 10 at this time is a flat chip.
  • the component is 10 and can be directly applied to circuit boards or electronic devices. Therefore, the adhesive layer 30 of the chip assembly 10 can be peeled off for the next step.
  • the glue layer 30 includes at least one of photosensitive glue, acrylic structural glue, hot melt glue, super glue, and the like.
  • the adhesive layer 30 is an acrylic structural adhesive, hot melt adhesive or super glue
  • the method of peeling off the adhesive layer 30 from the chip component 10 is to manually peel off the adhesive layer 30 from the chip component 10 and then remove the remaining glue on the chip component 10 Layer 30.
  • the adhesive layer 30 is a photosensitive adhesive
  • the adhesive layer 30 is separated from the chip component 10 due to its viscosity, that is, the glue layer 30 is separated from the chip 12 and the substrate 11 , and the production personnel can directly remove the chip component 10 .
  • Using a photosensitive adhesive layer as the adhesive layer 30 and using a UV mercury lamp to illuminate the adhesive layer 30 can quickly separate the adhesive layer 30 from the chip component 10 , which is beneficial to improving the production efficiency of the chip 12 .
  • Step 7 Remove the substrate.
  • the substrate 11 needs to be removed to prevent the substrate 11 from affecting the performance of the chip 12 .
  • the following is an example of using the chip 12 on a circuit board.
  • the chips 12 can be soldered to the circuit board in batches, the chip 12 can be soldered to the circuit board and then the substrate 11 is removed, that is, the chip assembly 10 is peeled off. After the adhesive layer 30, the substrate 11 is removed to obtain individual chips 12.
  • the adhesive layer 30 with the chip assembly 10 inserted therein can be heated.
  • the specific time to remove the substrate can be determined based on the actual situation. It is worth noting that the method of removing the substrate 11 may be to use a knife to cut the chip 12 from the substrate 11, or other methods that can separate the chip 12 from the substrate 11, which is not specifically limited in this embodiment. .
  • the present disclosure also discloses a chip.
  • the chip 12 is prepared using the above-mentioned preparation method.
  • the chip 12 prepared using the aforementioned preparation method can solve the problem of warping of the chip 12 and reduce the production cost of the chip 12 without damaging the chip 12 .
  • the chip 12 can be a digital chip or an analog chip.
  • the chip 12 can be used in the field of computer or logic control; when the chip 12 is an analog chip, the chip 12 can be used for small signal amplification processing. field.
  • the chip preparation method and chip provided by the present disclosure can improve the problem of chip component warpage without destroying the structure of the chip component.
  • the preparation method has simple steps, is conducive to reducing the production cost of the chip, and has strong industrial applicability.

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Abstract

一种芯片的制备方法及芯片，该制备方法是提供基底（20）和芯片组件（10），该芯片组件（10）包括衬底（11）和设于衬底（11）上的至少一个芯片（12），接着在基底（20）的表面上形成胶层（30），然后将芯片组件（10）插入胶层（30）内，使得芯片（12）嵌入胶层（30），以及使得衬底（11）上设有芯片（12）的表面粘接在胶层（30）上，由于胶层（30）对衬底（11）的粘接力能够使得衬底（11）上设有芯片（12）的表面趋于平整，从而改善芯片组件（10）翘曲的问题，最后将芯片组件（10）剥离胶层（30）。

Description

芯片的制备方法及芯片
相关交叉引用
本公开要求于2022年8月23日提交中国专利局、申请号为202210587397.3、发明名称为“芯片的制备方法及芯片”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及芯片的制备方法及芯片。
背景技术
由于芯片组件趋向于轻薄化发展，导致了加工后的芯片组件的翘曲现象越来越严重。相关技术中常常通过在芯片组件的表面或者背面开缝刻槽，或者通过机械夹具夹取芯片组件从而实现防止芯片组件翘曲的目的。然而开缝刻槽虽然能够达到释放应力目的，但这样会破环芯片组件以及产生的碎屑可能残留在芯片组件的芯片上，从而影响芯片的使用性能，而采用机械夹具的方式需在芯片组件的加工机台上增设机械夹具且不同尺寸的芯片组件需采用不同的机械夹具，这将会大大增加芯片的生产成本。
发明内容
(一)要解决的技术问题
在现有技术中，通过在芯片组件的表面或者背面开缝刻槽，或者通过机械夹具夹取芯片组件从而实现防止芯片组件翘曲的目的。然而开缝刻槽虽然能够达到释放应力目的，但这样会破环芯片组件以及产生的碎屑可能残留在芯片组件的芯片上，从而影响芯片的使用性能，而采用机械夹具的方式需在芯片组件的加工机台上增设机械夹具且不同尺寸的芯片组件需采用不同的机械夹具，这将会大大增加芯片的生产成本。
(二)技术方案
根据本公开公开的各种实施例，提供一种芯片的制备方法及芯片。
一种芯片的制备方法，所述制备方法包括如下步骤：
提供芯片组件，所述芯片组件包括衬底和设于所述衬底上的至少一个芯片；
提供基底；
在所述基底的表面上形成胶层；
将所述芯片组件插入所述胶层内，以使得所述芯片嵌入所述胶层，以及使得所述衬底上设有所述芯片的表面粘接在所述胶层上；
将所述芯片组件剥离所述胶层。
作为本公开实施例一种可选的实施方式，在将所述芯片组件插入所述胶层内之后，以及在将所述芯片组件剥离所述胶层之前，所述制备方法还包括：对插有所述芯片组件的所述胶层进行加热。
作为本公开实施例一种可选的实施方式，在将所述芯片组件插入所述胶层之后，以及在对插有所述芯片组件的所述胶层进行加热之前，所述制备方法还包括：在所述衬底的背离所述胶层的一侧表面上放置重物，以使所述重物的重力对所述芯片组件施加与所述芯片组件的翘曲方向相反的压力。
作为本公开实施例一种可选的实施方式，所述衬底的背离所述胶层的一侧表面为平整表面。
作为本公开实施例一种可选的实施方式，所述胶层包括光敏胶、丙烯酸酯结构胶、热熔胶和强力胶中的至少一种。
作为本公开实施例一种可选的实施方式，所述胶层包括光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶中的至少两种，以使所述胶层中各部位的膨胀系数不同。
作为本公开实施例一种可选的实施方式，所述胶层具有中部和位于中部外周的侧边，所述胶层的中部对应的膨胀系数大于所述侧边对应的膨胀系数，以使所述胶层的中部的膨胀程度大于所述胶层的侧边的膨胀程度。
作为本公开实施例一种可选的实施方式，当所述胶层为光敏胶层时，在将所述芯片组件插入所述胶层内之后，以及在将所述芯片组件剥离所述胶层之前，所述制备方法还包括：采用紫外汞灯照射所述胶层，所述采用紫外汞灯照射所述胶层配置成使所述胶层与所述芯片组件分离。
作为本公开实施例一种可选的实施方式，在将所述芯片组件插入所述胶层内之后，以及在将所述芯片组件剥离所述胶层之前，或者，在将所述芯片组件剥离所述胶层之后，所述制备方法还包括：去除所述衬底。
作为本公开实施例一种可选的实施方式，用于形成所述胶层的所述基底的表面为平面。
作为本公开实施例一种可选的实施方式，所述胶层通过旋涂或者贴附的方式形成于所述基底的表面上。
作为本公开实施例一种可选的实施方式，所述胶层的厚度大于所述芯片的厚度。
作为本公开实施例一种可选的实施方式，所述胶层的膨胀系数大于所述基底和所述芯片组件的膨胀系数。
作为本公开实施例一种可选的实施方式，所述基底的厚度大于或等于所述芯片组件的厚度。
一种芯片，该芯片采用第一方面所述的制备方法制备而成。
本公开的其他特征和优点将在随后的说明书中阐述，并且，部分 地从说明书中变得显而易见，或者通过实施本公开而了解。本公开的目的和其他优点在说明书、权利要求书以及附图中所特别指出的结构来实现和获得，本公开的一个或多个实施例的细节在下面的附图和描述中提出。
为使本公开的上述目的、特征和优点能更明显易懂，下文特举可选实施例，并配合所附附图，作详细说明如下。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用来解释本公开的原理。
为了更清楚地说明本公开实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，对于本领域普通技术人员而言，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是本公开一个或多个实施例公开的芯片的制备方法的流程图；
图2是本公开一个或多个实施例公开的芯片在制备过程中的结构示意图；
图3是本公开一个或多个实施例公开的芯片的结构示意图。
主要附图标记说明：10、芯片组件；11、衬底；12、芯片；20、基底；30、胶层。
具体实施方式
为了能够更清楚地理解本公开的上述目的、特征和优点，下面将对本公开的方案进行进一步描述。需要说明的是，在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合。
在下面的描述中阐述了很多具体细节以便于充分理解本公开，但本公开还可以采用其他不同于在此描述的方式来实施；显然，说明书中的实施例只是本公开的一部分实施例，而不是全部的实施例。
本公开的说明书和权利要求书中的术语“第一”和“第二”等是用来区别不同的对象，而不是用来描述对象的特定顺序。例如，第一 摄像头和第二摄像头是为了区别不同的摄像头，而不是为了描述摄像头的特定顺序。
在本公开实施例中，“示例性的”或者“例如”等词来表示作例子、例证或说明。本公开实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念，此外，在本公开实施例的描述中，除非另有说明，“多个”的含义是指两个或两个以上。
相关技术中，芯片的生产步骤通常是在半导体材料上蚀刻形成包括芯片和承载芯片的衬底的芯片组件，然后再在芯片的正极和负极分别形成导电材料，最后去除衬底，即将芯片与衬底分离，从而完成芯片的生产工作。然而，由于导电材料的膨胀系数和半导体材料的膨胀系数差异较大，且设有芯片的位置处的芯片组件的厚度与未设有芯片的位置处的芯片组件的厚度不同，因此，在生产芯片的过程中，容易造成半导体材料和导电材料热失配的问题，从而导致芯片组件出现翘曲的问题，进而影响芯片和衬底的分离以及分离后芯片的使用性能。加之随着芯片趋于轻薄化发展，即芯片组件趋于轻薄化发展，这将导致在生产芯片的过程中，芯片组件翘曲的问题愈发严重。
基于此，本公开公开了一种芯片的制备方法，该制备方法能够有效地解决芯片组件翘曲的问题。下面将结合实施例和附图对本公开的技术方案作进一步的说明。
请一并参阅图1和图2，本公开公开了一种芯片的制备方法，该制备方法能够在不破坏芯片组件10的基础上，改善芯片组件10翘曲的问题以及降低芯片12的生产成本。具体地，该制备方法包括以下步骤：
步骤1：提供芯片组件。(具体可参阅图2中的(A))
其中，该芯片组件10包括衬底11和设于衬底11上的至少一个芯片12。该芯片组件10的制备方法可通过对提供的半导体基材进行处理，从而在半导体基材上形成衬底11和设于衬底11上的至少一个芯 片12。可以理解的是，可通过蚀刻或镭刻等方式在半导体基材上形成衬底11和设于衬底11上的至少一个芯片12。
值得注意的是，在半导体基材上形成衬底11和芯片12的过程中，需同时形成芯片12的正极和负极。然后，在芯片12的正极和负极上分别形成导电材料，使得芯片12应用于电路板或电子设备时，能够实现导电的作用。其中，可通过电镀、化学镀或喷溅等方式在芯片的正极和负极上分别形成导电材料。
可选地，半导体基材的材料可为硅或蓝宝石等，采用硅或半导体材料制备芯片组件10能够使得生产得到的芯片12能够发挥其相应的功能。此外，生产人员还可通过对对半导体基材的材料选择或者对半导体基材进行处理，使得生产得到的芯片12应用于电路板或电子设备时，芯片12能够发出蓝光、红光或绿光等。而导电材料可为金、银或铜等，具体可根据实际情况选择，此处不做具体限定。
可以理解的是，当衬底11上设有多个芯片12时，有利于批量改善芯片12翘曲的问题和节约材料。换言之，在提供的半导体材料上形成有尽可能多的芯片12，能够提高半导体材料的利用率，从而实现节约材料的目的。其次，当一个衬底11上形成有多个芯片12时，对芯片组件10进行一次改善翘曲的操作即可完成改善多个芯片12翘曲问题的目的，有利于提高改善芯片12翘曲问题的效率。
其中，芯片12可以为数字芯片或模拟芯片等。当芯片12为数字芯片时，芯片12可用于计算机或逻辑控制领域；当芯片12为模拟芯片时，芯片12可用于小信号放大处理领域。
步骤2：提供基底。(具体可参阅图2中的(B))
具体地，该基底20可为玻璃块、铁块或铜块等，具体可根据实际情况选择。本实施例优选基底20采用玻璃块，一方面是因为玻璃块较轻且成本低，有利于降低制备芯片12所需的成本，另一方面是玻璃块是透明的，有利于透射光线，以便于观察芯片组件10翘曲的改善程度。
步骤3：在基底的表面上形成胶层。(具体可参阅图2中的(C))
可选地，该胶层30可通过旋涂或贴附的方式形成于基底20的表面上。其中，旋涂的方式是指旋转涂抹法，是有机发光二极管中常用的制备方法，主要包括配料、高速旋转和挥发成膜三个步骤，即通过匀胶机控制匀胶的时间、转速和滴液量以及所用溶液的浓度和粘度，从而控制胶层30涂覆在基底20的表面上以及胶层30的厚度。而贴附的方式是将做好的胶层30直接贴附在基底20的表面上即可。
值得注意的是，为保证胶层30能够便捷且稳定地形成于基底20的表面上，需保证用于形成胶层30的基底20的表面为平面，从而使得胶层30能够较为容易的形成于基底20的表面上，且使得胶层30不易脱离基底20。
一些实施例中，胶层30的厚度大于芯片12的厚度，这样能够保证芯片12能够全部插入胶层30中，且衬底11上设有芯片12的表面能够粘接在胶层30上，从而有利于改善芯片组件10翘曲的问题。也即是说，如果胶层30的厚度小于芯片12的厚度，可能会导致衬底11上设有芯片12的表面无法完全粘接在胶层30上，从而使得胶层30无法对衬底11施加作用力，进而不利于改善芯片组件10翘曲的问题。
可选地，胶层30包括光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶等中的至少一种，例如胶层30可由光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶等中的一种、两种或更多种制备得到，如胶层30可由光敏胶制备得到，或者胶层30可由光敏胶和丙烯酸酯结构胶制备得到，或者胶层30可由光敏胶、热熔胶和强力胶制备得到等，具体可根据实际需求选择，本实施例不做具体限定。
值得注意的是，当芯片组件10在各个部位的翘曲程度不同时，胶层30可采用由光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶等中的至少两种制备得到的方式，这样，可以在芯片组件10的翘曲程度较大的位置对应的胶层30处，胶层30采用膨胀系数较小的胶制备得到，而在芯片组件10的翘曲程度较小的位置对应的胶层30处，胶层30采用膨胀系数较大的胶制备得到，从而有利于提高胶层30对芯片组件10翘曲的问题的改善效果。
步骤4：将芯片组件插入胶层内。(具体可参阅图2中的(D))
将芯片组件10插入胶层30内，能够使得芯片12嵌入胶层30，以及使得衬底11上设有芯片12的表面粘接在胶层30上。由于胶层30对芯片12和衬底11上设有芯片12的表面的粘接力的方向与芯片组件10的翘曲方向相反，使得胶层30对芯片12和衬底11上设有芯片12的表面的粘接力能够将衬底11上设有芯片12的表面拉至趋于平整的位置，从而改善芯片组件10翘曲的问题。此外，由于采用胶层30对芯片组件10的粘接力来改善芯片组件10翘曲的问题，无需在芯片组件10上开缝刻槽或者额外在芯片组件10的加工机台上设置机械夹具，且改善芯片组件10翘曲的问题的步骤简单，能够减少对芯片组件10结构的破坏以及降低芯片组件10的生产成本，即有利于减少对芯片12结构的破坏以及降低芯片12的生产成本。
步骤5：对插有芯片组件的胶层进行加热。(具体可参阅图2中的(E))
由于芯片组件10朝向背离胶层30的方向翘曲，即芯片组件10发生翘曲后形成一个凹凸型的弯月型结构，且芯片组件10的凸侧插入胶层30，这样，当芯片组件10插入胶层30后，胶层30的中部受到的挤压力度大于胶层30的侧边受到的挤压力度，当对插有芯片组件10的胶层30进行加热时，胶层30会发生膨胀，且胶层30的中部的膨胀程度大于胶层30的侧边的膨胀程度，从而使得芯片组件10的中部的形变程度大于芯片组件10的侧边的形变程度，进而有利于进一步地矫正芯片组件10翘曲的问题。
值得注意的是，为保证对插有芯片组件10的胶层30进行加热能够有效地解决芯片组件10翘曲的问题，需满足胶层30的膨胀系数大于基底20和芯片组件10的膨胀系数，即满足胶层30的膨胀系数大于基底20、半导体材料和导电材料的膨胀系数，这样能够保证胶层30加热后的形变程度大于基底20和芯片组件10的形变程度，能够更好地改善芯片组件10翘曲的问题。如果胶层30加热后的形变程度小于基底20和芯片组件10的形变程度，可能导致胶层30的形变程度赶不 上芯片组件10的翘曲程度，最终导致无法很好解决芯片组件10翘曲的问题。
一些实施例中，基底20的厚度大于或等于芯片组件10的厚度，这样能够使得基底20的结构强度大于芯片组件10的结构强度，从而有益于改善芯片组件10翘曲的问题。如果基底20的厚度小于芯片组件10的厚度，那么基底20的结构强度可能小于芯片12的结构强度，当对插有芯片组件10的胶层30进行加热时，胶层30发生形变，从而对芯片组件10和基底20产生作用力，而由于基底20的结构强度小于芯片12的结构强度，那么可能造成胶层30对基底20产生的作用力使得基底20发生形变，而胶层30对芯片组件10产生的作用力无法良好的改善芯片组件10翘曲的问题。
进一步地，基底20的厚度一般可为0.8mm～1.2mm，例如基底20的厚度可为0.8mm、0.9mm、1.0mm、1.1mm或1.2mm等。而芯片12的厚度一般可为0.55mm～0.75mm，例如芯片12的厚度可为0.55mm、0.60mm、0.65mm、0.70mm或0.75mm等，基底20的厚度和芯片12的厚度具体可根据实际情况确定，本实施例不做具体限定。
为了进一步提高对芯片组件10的翘曲问题的改善效果，一些实施例中，在将芯片组件10插入胶层30内之后，且在对插有芯片组件10的胶层进行加热之前，可在衬底11背离胶层30一侧的表面上压一个重物，从而使得重物的重力能够对芯片组件10施加一个与芯片组件10翘曲方向相反的压力，进而提高对芯片组件10翘曲问题的改善效果。
值得注意的是，压在衬底11背离胶层30一侧的表面上的重物与衬底11的接触面需为平整的表面，从而保证重物能够将衬底11的形状压至平整状态，从而改善芯片组件10翘曲的问题。
可选地，前述重物可为玻璃块、铁块或者铜块等，具体可根据实际情况选择，本实施例不做具体限定。
步骤6：将芯片组件剥离胶层。(具体可参阅图2中的(F))
由于将芯片组件10插入胶层30后以及对插有芯片组件10的胶层 30进行加热后，已经能够解决芯片组件10翘曲的问题了，也即，此时的芯片组件10为平整的芯片组件10了，可直接应用于电路板或电子设备上了。因此，可将芯片组件10剥离胶层30，以进行下一步操作。
由前述可知，胶层30包括光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶等中的至少一种。当胶层30为丙烯酸酯结构胶、热熔胶或强力胶等时，将芯片组件10剥离胶层30的方法是直接手动将芯片组件10剥离胶层30，然后去除芯片组件10上残留的胶层30。而当胶层30为光敏胶时，可以直接手动将芯片组件10剥离胶层30，然后去除芯片组件10上残留的胶层30，或者可以采用紫外汞灯照射胶层30，使得胶层30失去粘性，从而使得胶层30与芯片组件10分离，也即使得胶层30与芯片12和衬底11分离，进而生产人员直接将芯片组件10取走即可。采用光敏胶层作为胶层30，且采用紫外汞灯照射胶层30，能够快速地将胶层30与芯片组件10分离，有利于提高芯片12的生产效率。
步骤7：去除衬底。(具体可参阅图2中的(G))
当芯片12应用于电路板或电子设备时，需去除衬底11，防止衬底11对芯片12的使用性能造成影响。以下将以芯片12应用于电路板上进行举例说明，当芯片12能够批量地焊接于电路板上时，可以将芯片12焊接于电路板上后再去除衬底11，也即在芯片组件10剥离胶层30之后再去除衬底11，从而得到一个个单独的芯片12；当芯片12需一个个单独地焊接于电路板上时，可以在对插有芯片组件10的胶层30进行加热之后，以及在将芯片组件10剥离胶层30之前去除衬底11，也可以在芯片组件10剥离胶层30之后再去除衬底11，从而得到一个个单独的芯片，再将一个个单独的芯片焊接于电路板上，具体什么时候去除衬底可根据实际情况确定。值得注意的时，去除衬底11的方法可以是采用刀具将芯片12从衬底11上切割下来，也可以是采用其它能够使得芯片12与衬底11分离的方法，本实施例不做具体限定。
请参阅图3，本公开还公开了一种芯片，该芯片12采用上述的制备方法制备而成。采用前述制备方法制备而成的芯片12，能够在不破坏芯片12的基础上，解决芯片12翘曲的问题以及降低芯片12的生产 成本。
可选地，该芯片12可为数字芯片或模拟芯片等，当芯片12为数字芯片时，芯片12可用于计算机或逻辑控制领域；当芯片12为模拟芯片时，芯片12可用于小信号放大处理领域。
以上实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上实施例仅表达了本公开的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本公开构思的前提下，还可以做出若干变形和改进，这些都属于本公开的保护范围。因此，本公开专利的保护范围应以所附权利要求为准。
工业实用性
本公开提供的芯片制备方法及芯片，能够无需破坏芯片组件的结构即可改善芯片组件翘曲的问题，且该制备方法步骤简单，有利于降低芯片的生产成本，具有很强的工业实用性。

Claims (15)

  1. 一种芯片的制备方法，所述制备方法包括如下步骤：
    提供芯片组件，所述芯片组件包括衬底和设于所述衬底上的至少一个芯片；
    提供基底；
    在所述基底的表面上形成胶层；
    将所述芯片组件插入所述胶层内，以使得所述芯片嵌入所述胶层，以及使得所述衬底上设有所述芯片的表面粘接在所述胶层上；
    将所述芯片组件剥离所述胶层。
  2. 根据权利要求1所述的芯片的制备方法，其中，在将所述芯片组件插入所述胶层内之后，以及在将所述芯片组件剥离所述胶层之前，所述制备方法还包括：
    对插有所述芯片组件的所述胶层进行加热。
  3. 根据权利要求2所述的芯片的制备方法，其中，在将所述芯片组件插入所述胶层之后，以及在对插有所述芯片组件的所述胶层进行加热之前，所述制备方法还包括：
    在所述衬底的背离所述胶层的一侧表面上放置重物，以使所述重物的重力对所述芯片组件施加与所述芯片组件的翘曲方向相反的压力。
  4. 根据权利要求3所述的芯片制备方法，其中，所述衬底的背离所述胶层的一侧表面为平整表面。
  5. 根据权利要求1所述的芯片的制备方法，其中，所述胶层包括光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶中的至少一种。
  6. 根据权利要求5所述的芯片制备方法，其中，所述胶层包括光敏胶、丙烯酸酯结构胶、热熔胶以及强力胶中的至少两种，以使所述胶层中各部位的膨胀系数不同。
  7. 根据权利要求6所述的芯片制备方法，其中，所述胶层具有中部和位于中部外周的侧边，所述胶层的中部对应的膨胀系数大于所述侧边对应的膨胀系数，以使所述胶层的中部的膨胀程度大于所述胶层的 侧边的膨胀程度。
  8. 根据权利要求5所述的芯片的制备方法，其中，当所述胶层为光敏胶层时，在将所述芯片组件插入所述胶层内之后，以及在将所述芯片组件剥离所述胶层之前，所述制备方法还包括：
    采用紫外汞灯照射所述胶层，所述采用紫外汞灯照射所述胶层配置成使所述胶层与所述芯片组件分离。
  9. 根据权利要求1所述的芯片的制备方法，其中，在将所述芯片组件插入所述胶层内之后，以及在将所述芯片组件剥离所述胶层之前，或者，在将所述芯片组件剥离所述胶层之后，所述制备方法还包括：
    去除所述衬底。
  10. 根据权利要求1-9任一项所述的芯片的制备方法，其中，用于形成所述胶层的所述基底的表面为平面。
  11. 根据权利要求1-9任一项所述的芯片的制备方法，其中，所述胶层通过旋涂或者贴附的方式形成于所述基底的表面上。
  12. 根据权利要求1-9任一项所述的芯片的制备方法，其中，所述胶层的厚度大于所述芯片的厚度。
  13. 根据权利要求1-9任一项所述的芯片的制备方法，其中，所述胶层的膨胀系数大于所述基底和所述芯片组件的膨胀系数。
  14. 根据权利要求1-9任一项所述的芯片的制备方法，其中，所述基底的厚度大于或等于所述芯片组件的厚度。
  15. 一种芯片，所述芯片采用权利要求1-14任一项所述的制备方法制备而成。
PCT/CN2022/141060 2022-05-25 2022-12-22 芯片的制备方法及芯片 WO2023226416A1 (zh)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201017779A (en) * 2008-10-16 2010-05-01 Chun-Ming Huang Manufacturing process for improvement on warpage of molded packaging parts in fields of semiconductors and photo-electrics
CN112967971A (zh) * 2020-05-27 2021-06-15 重庆康佳光电技术研究院有限公司 一种Micro-LED的转移基板及其制备方法
CN114937610A (zh) * 2022-05-25 2022-08-23 西安闻泰信息技术有限公司 芯片的制备方法及芯片

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201017779A (en) * 2008-10-16 2010-05-01 Chun-Ming Huang Manufacturing process for improvement on warpage of molded packaging parts in fields of semiconductors and photo-electrics
CN112967971A (zh) * 2020-05-27 2021-06-15 重庆康佳光电技术研究院有限公司 一种Micro-LED的转移基板及其制备方法
CN114937610A (zh) * 2022-05-25 2022-08-23 西安闻泰信息技术有限公司 芯片的制备方法及芯片

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