WO2023188973A1 - 発光素子駆動装置、発光装置、及び車両 - Google Patents

発光素子駆動装置、発光装置、及び車両 Download PDF

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Publication number
WO2023188973A1
WO2023188973A1 PCT/JP2023/005738 JP2023005738W WO2023188973A1 WO 2023188973 A1 WO2023188973 A1 WO 2023188973A1 JP 2023005738 W JP2023005738 W JP 2023005738W WO 2023188973 A1 WO2023188973 A1 WO 2023188973A1
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WO
WIPO (PCT)
Prior art keywords
light emitting
emitting element
voltage
error amplifier
driving device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/005738
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English (en)
French (fr)
Japanese (ja)
Inventor
涼 ▲高▼木
啓 青木
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Rohm Co Ltd
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Rohm Co Ltd
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Filing date
Publication date
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Priority to JP2024511424A priority Critical patent/JPWO2023188973A1/ja
Publication of WO2023188973A1 publication Critical patent/WO2023188973A1/ja
Priority to US18/891,075 priority patent/US20250016898A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10—Controlling the intensity of the light
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10—Controlling the intensity of the light
    • H05B45/14—Controlling the intensity of the light using electrical feedback from LEDs or from LED modules
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/32—Pulse-control circuits
    • H05B45/325—Pulse-width modulation [PWM]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

Definitions

  • the invention disclosed herein relates to a light emitting element driving device, a light emitting device using the same, and a vehicle.
  • the light emitting element driving device disclosed herein includes an error amplifier, a driving section, and a suppressing section.
  • the error amplifier is configured to output a voltage corresponding to a difference between a voltage corresponding to a current flowing through the light emitting element and a reference voltage, and to be switched between operation and non-operation according to a control signal.
  • the driving section is configured to drive a switching element of a voltage supply section configured to supply voltage to the light emitting element based on the output voltage of the error amplifier.
  • the suppressing section is configured to suppress an increase in the output voltage of the error amplifier when the error amplifier switches from non-operation to operation.
  • the light emitting device disclosed herein includes a light emitting element driving device having the above configuration and the light emitting element.
  • the vehicle disclosed herein has a light emitting device with the above configuration.
  • FIG. 1 is a diagram showing an example of the configuration of a light emitting device.
  • FIG. 2 is a diagram showing current and voltage waveforms.
  • FIG. 3 is a diagram showing an example of the configuration of a PWM dimming signal generation section provided in the LED driver IC.
  • FIG. 4 is a diagram illustrating a configuration example of a PWM dimming signal generation section provided in an LED driver IC.
  • FIG. 5 is a diagram showing the waveform of the current flowing through the light emitting diode.
  • FIG. 6 is an external view (front view) of a vehicle in which the light emitting device is mounted.
  • FIG. 7 is an external view (rear view) of a vehicle in which the light emitting device is mounted.
  • FIG. 8 is an external view of the LED headlight module.
  • FIG. 9 is an external view of the LED turn lamp module.
  • FIG. 10 is an external view of the LED rear lamp module.
  • a MOS field effect transistor is defined as having a gate structure that is a "layer made of a conductor or a semiconductor such as polysilicon with a low resistance value," “an insulating layer,” and "P-type, A field effect transistor consisting of at least three layers of "N-type or intrinsic semiconductor layers”. That is, the structure of the gate of the MOS field effect transistor is not limited to the three-layer structure of metal, oxide, and semiconductor.
  • the reference voltage refers to a voltage that is constant in an ideal state, and is actually a voltage that may vary slightly due to temperature changes or the like.
  • FIG. 1 is a diagram showing an example of the configuration of a light emitting device.
  • the light emitting device 100 shown in FIG. 1 includes light emitting diodes Z1 to Z3 that are light emitting elements, and an LED (Light Emitting Diode) driver IC (Integrated Circuit) 101 that is a light emitting element driving device that drives the light emitting elements.
  • LED Light Emitting Diode
  • IC Integrated Circuit
  • a capacitor C1 In addition to the light emitting diodes Z1 to Z3, a capacitor C1, an inductor L1, an output capacitor C2, and a sense resistor R1 are externally connected to the LED driver IC 101.
  • the LED driver IC 101 has a terminal PINP, a terminal BOOT, a terminal SW, a terminal PINN, a terminal SNSP, and a terminal SINN to establish electrical connection with the outside.
  • the first end of the capacitor C1 is connected to the terminal BOOT.
  • a second end of the capacitor C1 and a first end of the inductor L1 are connected to the terminal SW.
  • the second end of the inductor L1 is connected to the anode of the light emitting diode Z1, the first end of the output capacitor C2, and the ground potential.
  • the cathode of the light emitting diode Z1 is connected to the anode of the light emitting diode Z2.
  • the cathode of light emitting diode Z2 is connected to the anode of light emitting diode Z3.
  • the cathode of the light emitting diode Z2 is connected to the terminal SNSP and the first end of the sense resistor R1.
  • the second end of the sense resistor R1 is connected to the terminal SINN and the second end of the output capacitor C2.
  • the LED driver IC 101 includes a constant voltage circuit 1, a control circuit 2, an operational amplifier 3, an adder 4, an error amplifier 5, an oscillator 6, a slope circuit 7, a comparator 8, drivers 9 and 10, and N It includes channel type MOS transistors 11 and 12, a delay section 13, and a diode D1.
  • the constant voltage circuit 1 generates a constant voltage VDRV using the input voltage VIN supplied to the terminal PINP, and supplies it to each part of the LED driver IC 101 including the anode of the diode D1.
  • the cathode of diode D1 is connected to terminal BOOT.
  • a bootstrap circuit constituted by diode D1 and capacitor C1 generates a voltage VBOOT at terminal BOOT that is higher than voltage VSW applied to terminal SW.
  • a gate signal G1 is output from the output terminal Q of the control circuit 2.
  • a gate signal G2 is output from the inverting output terminal Q of the control circuit 2.
  • the control circuit 2 sets the gate signal G1 by a signal supplied to a set terminal SET, and resets the gate signal G1 by a signal supplied to a reset terminal RST. Note that the control circuit 2 operates when the PWM dimming signal PWMDIM is at a HIGH level, and does not operate when the PWM dimming signal PWMDIM is at a LOW level. When the control circuit 2 is not operating, both gate signals G1 and G2 are at LOW level.
  • the non-inverting input terminal of the operational amplifier 3 is connected to the terminal SNSP, and the inverting input terminal of the operational amplifier 3 is connected to the terminal SINN.
  • the operational amplifier 3 outputs a voltage corresponding to the voltage across the sense resistor R1.
  • the output voltage of the operational amplifier 3 is offset by the adder 4 so that it increases by 0.2V.
  • Feedback voltage VFB generated by adder 4 is supplied to an inverting input terminal of error amplifier 5.
  • the feedback voltage VFB is a voltage based on the current ILED flowing through the light emitting diodes Z1 to Z3.
  • the error amplifier 5 generates an error voltage VERR according to the difference between the feedback voltage VEB and the reference voltage VISET.
  • the reference voltage VISET is a voltage for setting the value of the current ILED flowing through the light emitting diodes Z1 to Z3. The larger the reference voltage VISET, the larger the value of the current ILED flowing through the light emitting diodes Z1 to Z3.
  • the oscillator 6 generates a clock signal CK.
  • the clock signal CK is supplied to the slope circuit 7 and the set terminal SET of the control circuit 2.
  • the slope circuit 7 generates a slope voltage VSLP obtained by adding a voltage according to ripple information of the current IL flowing through the inductor L1 to a triangular or sawtooth ramp waveform voltage using the clock signal CK.
  • the comparator 8 compares the error voltage VERR and the slope voltage VSLP and supplies the comparison result to the reset terminal RST of the control circuit 2.
  • the driver 9 supplies a drive signal obtained by amplifying the gate signal G1 to the gate of the MOS transistor 11.
  • a voltage VBOOT is supplied to the positive power supply terminal of the driver 9, and a voltage VSW is supplied to the negative power supply terminal of the driver 9.
  • the driver 10 supplies a drive signal obtained by amplifying the gate signal G2 to the gate of the MOS transistor 12.
  • the voltage VDRV is supplied to the positive power supply terminal of the driver 10, and the voltage applied to the terminal PINN is supplied to the negative power supply terminal of the driver 9.
  • the drain of the MOS transistor 11 is connected to the terminal PINP.
  • the source of MOS transistor 11 and the drain of MOS transistor 12 are connected to terminal SW.
  • the source of MOS transistor 12 is connected to terminal PINN.
  • a voltage supply section composed of MOS transistors 11 and 12, an inductor L1, and an output capacitor C2 supplies voltage to the light emitting diodes Z1 to Z3.
  • the delay unit 13 will be described later.
  • the LED driver IC 101 is a negative-polarity buck-boost DC/DC converter type LED driver IC.
  • energy is stored in the inductor L1 when the MOS transistor 11 is on and the MOS transistor 12 is off. Further, in the light emitting device 100, when the MOS transistor 11 is off and the MOS transistor 12 is on, the current IL flowing through the inductor L1 negatively charges the output capacitor C2.
  • the error amplifier 5 operates when the PWM dimming signal PWMDIM is at HIGH level. When the error amplifier 5 is in operation, it outputs an error voltage VERR corresponding to the difference between the feedback voltage VEB and the reference voltage VISET from its output terminal. When the error amplifier 5 is operating, the MOS transistors 11 and 12 perform a switching operation, and as shown in FIG. 2, the current IL flowing through the inductor L1 has a triangular waveform, and the voltage VSW has a pulse waveform.
  • the error amplifier 5 When the PWM dimming signal PWMDIM is at LOW level, the error amplifier 5 becomes inactive. When the error amplifier 5 is inactive, the output terminal of the error amplifier 5 is in a HIGH impedance state.
  • the LED driver IC 101 has a PWM dimming signal generation section.
  • 3 and 4 are diagrams showing an example of the configuration of a PWM dimming signal generation section provided in the LED driver IC 101.
  • the PWM dimming signal generation section of the configuration example shown in FIGS. 3 and 4 includes a current source 14, resistors 15 and 17, comparators 16 and 18, and an oscillator 19.
  • the LED driver IC 101 further includes a terminal DRV, a terminal DSET, and a terminal GNDIN for establishing electrical connection with the outside.
  • the constant voltage VDRV output from the constant voltage circuit 1 is supplied to the terminal DRV, the first end of the current source 14, and the positive power terminal of the comparator 16.
  • a second end of current source 14 is connected to terminal DSET and a non-inverting input terminal of comparator 16 .
  • the terminal GNDIN is connected to the first end of the resistor 15 and the negative power supply terminal of the comparator 16.
  • a second end of resistor 15 is connected to an inverting input terminal of comparator 16 .
  • the output terminal of the comparator 16 is connected to the first end of the resistor 17 and the non-inverting input terminal of the comparator 18.
  • the second end of the resistor 17 is connected to the terminal SINN (see FIG. 1).
  • the output signal of oscillator 19 is fed to the inverting input terminal of comparator 18.
  • the output signal of the oscillator 19 is a sawtooth signal whose bottom value is V1 and whose top value is V2.
  • Comparator 18 outputs a PWM dimming signal PWMDIM.
  • the frequency of the PWM dimming signal PWMDIM is internally fixed.
  • a capacitor C3 and resistors R2 and R3 are externally connected to the LED driver IC 101.
  • a first end of the capacitor C3 and a first end of the resistor R2 are connected to the terminal DRV.
  • a second end of resistor R2 and a first end of resistor R3 are connected to terminal DSET.
  • a second end of the capacitor C3 and a second end of the resistor R3 are connected to the terminal GNDIN.
  • the frequency of the PWM dimming signal PWMDIM is the same as the frequency of the output signal of the oscillator 19.
  • the on-duty of the PWM dimming signal PWMDIM is determined by the voltage applied to the terminal DSET.
  • the frequency of the PWM dimming signal PWMDIM is determined by a signal input from the outside to the terminal DSET.
  • a capacitor C3 is externally connected to the LED driver IC 101.
  • a first end of capacitor C3 is connected to terminal DRV.
  • the second end of capacitor C3 is connected to terminal GNDIN.
  • a PWM signal is supplied to the terminal DSET.
  • the PWM dimming signal PWMDIM becomes HIGH level
  • the PWM dimming signal PWMDIM becomes LOW level. Therefore, in the configuration shown in FIG. 3, the frequency of the PWM dimming signal PWMDIM is the same as the frequency of the PWM signal supplied to the terminal DSET.
  • the delay unit 13 suppresses a rise in the error voltage VERR output from the error amplifier 5 when the error amplifier 5 switches from non-operation to operation. This suppresses overshoot of the current ILED flowing through the light emitting diodes Z1 to Z3 when the error amplifier 5 switches from non-operation to operation, as shown in FIG.
  • the delay unit 13 is configured to switch the error amplifier 5 from non-operation to operation with a delay from the switching of the PWM dimming signal PWMDIM from the LOW level to the HIGH level.
  • the delay time of the delay unit 13 may be set to the time until the charging of the output capacitor C2 is completed and the feedback voltage VFB rises to around the reference voltage VISET.
  • the delay unit 13 generates a delay time from the switching timing of the PWM dimming signal PWMDIM from the LOW level to the HIGH level. If the delay section 13 is configured with a logic circuit, this delay time can be easily generated.
  • the delay time can be fixed by holding the delay time in a register in the logic circuit.
  • a detection circuit that detects that the output voltage VOUT has reached a set value may be provided in the LED driver IC 101, and the delay unit 13 may use the output of the detection circuit as a trigger to determine the end of the delay.
  • the delay time can be varied.
  • the light emitting devices described above include, for example, a headlight (including high beam/low beam/small lamp/fog lamp, etc. as appropriate) of the vehicle X10, a light source for day/night driving (DRL) X12, a tail lamp ( It can be suitably used as a small lamp, a back lamp, etc.) X13, a stop lamp X14, a turn lamp X15, etc.
  • the light emitting device described above may be provided as a module (such as the LED headlight module Y10 in FIG. 8, the LED turn lamp module Y20 in FIG. 9, and the LED rear lamp module Y30 in FIG. 10). Further, it may be provided in the form of a drive device with a light emitting number control function, which is a semi-finished product obtained by removing external components such as a light emitting diode and a light emitting element driving IC from the light emitting device described above.
  • the configuration of the present invention is not limited to this.
  • an organic EL (Electro Luminescence) ) elements can also be used.
  • a PWM dimming signal was used, but a pulse modulation dimming signal other than the PWM dimming signal may be used instead of the PWM dimming signal.
  • pulse modulation dimming signals other than PWM dimming signals include PFM (Pulse Frequency Modulation) dimming signals and PDM (Pulse Density Modulation) dimming signals.
  • the error voltage VERR output from the error amplifier 5 increases when the error amplifier 5 switches from non-operation to operation by utilizing the delay in switching the error amplifier 5 from non-operation to operation. is suppressed.
  • the increase in the error voltage VERR output from the error amplifier 5 when the error amplifier 5 switches from non-operation to operation may be suppressed by a method other than delay.
  • a clamp circuit that clamps the error voltage VERR output from the error amplifier 5 may be provided instead of the delay section 13, a clamp circuit that clamps the error voltage VERR output from the error amplifier 5 may be provided.
  • the error voltage VERR output from the error amplifier 5 changes depending on the reference voltage VISET, it is not possible to uniquely set the clamp voltage. Therefore, the circuit configuration of the clamp circuit becomes complicated.
  • a discharge circuit may be provided instead of the delay section 13.
  • the discharge circuit discharges the error voltage VERR to lower the error voltage VERR when the PWM dimming signal PWMDIM is at a LOW level.
  • the error voltage VERR is lowered, it takes time for the error voltage VERR to rise when the PWM dimming signal PWMDIM switches from the LOW level to the HIGH level. Therefore, when the on-duty of the PWM dimming signal PWMDIM is small, the current ILED flowing through the light emitting diodes Z1 to Z3 cannot be output. In other words, the guaranteed operation range becomes narrower.
  • the light emitting element driving device (101) described above outputs a voltage corresponding to the difference between a voltage corresponding to the current flowing through the light emitting elements (Z1 to Z3) and a reference voltage, and is switched between operation and non-operation by a control signal. and a switching element (11, 12) of a voltage supply section (11, 12, L1, C2) configured to supply a voltage to the light emitting element.
  • a drive unit (2, 9, 10) configured to drive based on voltage, and configured to suppress an increase in the output voltage of the error amplifier when the error amplifier switches from non-operation to operation. This is a configuration (first configuration) including a suppressing section (13).
  • the light emitting element driving device having the first configuration described above can suppress overshoot of the current flowing through the light emitting element.
  • control signal may be a PWM dimming signal (second configuration).
  • the light emitting element driving device having the second configuration described above can increase the versatility of the control signal.
  • the suppressing section may switch the error amplifier from non-operation to operation with a delay from the switching of the control signal from the first level to the second level.
  • the light emitting element driving device having the third configuration described above can avoid complication of the circuit configuration and narrowing of the guaranteed operation range.
  • the delay time may be fixed (fourth configuration).
  • the suppressing section can be realized with a simple configuration.
  • the suppressing unit continues the delay until the voltage supplied from the voltage supply unit to the light emitting element reaches a set value (fifth configuration). You can.
  • the light emitting element driving device having the fifth configuration described above can optimize the delay time.
  • the delay time may be variable (sixth configuration).
  • the light emitting element driving device having the sixth configuration described above can adjust the delay time.
  • the suppressing section may be a logic circuit (seventh configuration).
  • the light emitting element driving device having the seventh configuration can easily generate a delay time.
  • the light emitting device (100) described above has a configuration (eighth configuration) including the light emitting element driving device having any of the first to seventh configurations and the light emitting element.
  • the light emitting device with the eighth configuration can suppress overshoot of the current flowing through the light emitting element.
  • the light emitting device of the eighth configuration further includes a sense resistor (R1) for detecting the current flowing through the light emitting element, and the light emitting element and the sense resistor are directly connected in series (a configuration in which the light emitting element and the sense resistor are directly connected in series). 9).
  • the light emitting device of the ninth configuration has a configuration in which a switch is not provided between the light emitting element and the sense resistor, so that cost reduction can be achieved.
  • the vehicle (X10) described above has a configuration (tenth configuration) including the light emitting device of the eighth or ninth configuration.
  • the vehicle with the tenth configuration can suppress overshoot of the current flowing through the light emitting element.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)
PCT/JP2023/005738 2022-03-31 2023-02-17 発光素子駆動装置、発光装置、及び車両 Ceased WO2023188973A1 (ja)

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JP2024511424A JPWO2023188973A1 (https=) 2022-03-31 2023-02-17
US18/891,075 US20250016898A1 (en) 2022-03-31 2024-09-20 Light-emitting element driving device, light-emitting device, and vehicle

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JP2022-060073 2022-03-31
JP2022060073 2022-03-31

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US18/891,075 Continuation US20250016898A1 (en) 2022-03-31 2024-09-20 Light-emitting element driving device, light-emitting device, and vehicle

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