WO2023140057A1 - 単結晶ＡｌＮ基板、単結晶ＡｌＮ基板を用いた半導体ウェハ、及びこれらの製造方法 - Google Patents

単結晶ＡｌＮ基板、単結晶ＡｌＮ基板を用いた半導体ウェハ、及びこれらの製造方法 Download PDF

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WO2023140057A1
WO2023140057A1 PCT/JP2022/047879 JP2022047879W WO2023140057A1 WO 2023140057 A1 WO2023140057 A1 WO 2023140057A1 JP 2022047879 W JP2022047879 W JP 2022047879W WO 2023140057 A1 WO2023140057 A1 WO 2023140057A1
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layer
aln
single crystal
substrate
aln substrate
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French (fr)
Japanese (ja)
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亨 木下
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Stanley Electric Co Ltd
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Stanley Electric Co Ltd
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Priority to US18/726,142 priority Critical patent/US20250063859A1/en
Priority to CN202280087906.4A priority patent/CN118510945A/zh
Priority to EP22922207.0A priority patent/EP4467690A4/en
Publication of WO2023140057A1 publication Critical patent/WO2023140057A1/ja
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/822—Materials of the light-emitting regions
    • H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H10H20/825—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
    • C30B29/68—Crystals with laminate structure, e.g. "superlattices"
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates

Definitions

  • the present invention relates to a single-crystal AlN substrate applicable to the production of semiconductor devices including light-emitting elements such as light-emitting diodes (LEDs) and semiconductor lasers (Laser Diodes (LD)), semiconductor wafers using single-crystal AlN substrates, and manufacturing methods thereof.
  • LEDs light-emitting diodes
  • LD Laser Diodes
  • an AlN substrate is suitable as a substrate for laminating AlGaN-based semiconductor layers when manufacturing semiconductor devices such as deep-ultraviolet light-emitting elements using AlGaN-based semiconductors.
  • Patent Document 1 discloses a Group III nitride laminate having an n-type Al X Ga 1-X N (0.5 ⁇ X ⁇ 1) layer lattice-matched with the AlN single crystal substrate on the AlN single crystal substrate.
  • the present invention has been made in view of the above points, and an object of the present invention is to provide a single-crystal AlN substrate, a semiconductor wafer using the single-crystal AlN substrate, and a method for manufacturing these, which can manufacture highly reliable semiconductor devices at a high yield.
  • a single-crystal AlN substrate according to the present invention is a single-crystal AlN substrate having a flat surface that is an Al-polar surface, a first surface having an inclined surface formed from the outer edge of the flat surface to a side surface, and a second surface that is an N-polar surface opposite to the first surface. and the distance from the flat surface in the direction perpendicular to the flat surface is 0.2 mm or more and 0.3 mm or less.
  • a single crystal AlN substrate according to the present invention is a single crystal AlN substrate having a flat surface that is an Al polar surface, a first surface that has an inclined surface formed from the outer edge of the flat surface to the side surface, and a second surface that is an N polar surface opposite to the first surface, the PVT-AlN layer formed by the PVT method, the lower surface being the second surface, and the PVT-AlN layer formed on the upper surface of the PVT-AlN layer by the HVPE method.
  • the layer thickness of the HVPE-AlN layer on the end surface of the single crystal AlN substrate is 1/5 or less of the layer thickness of the PVT-AlN layer.
  • the method for manufacturing a single-crystal AlN substrate according to the present invention comprises a step (A) of growing a HVPE-AlN layer by HVPE on a PVT-AlN layer formed by a PVT method to form a template substrate whose upper surface is an Al-polar surface, and a chamfering step (B) of chamfering the periphery of the upper surface of the HVPE-AlN layer to form an inclined surface that is inclined from the outer edge of the flat surface that is an Al-polar surface to the side surface of the single-crystal AlN substrate. and, after the chamfering step (B), the layer thickness of the HVPE-AlN layer on the side surface of the single crystal AlN substrate is 1 ⁇ 5 or less of the layer thickness of the PVT-AlN layer.
  • the method for manufacturing a semiconductor wafer according to the present invention is a method for manufacturing a semiconductor wafer in which a semiconductor layer is formed on a single crystal AlN substrate, and includes a step (A) of growing an HVPE-AlN layer by HVPE on a PVT-AlN layer formed by PVT to form a template substrate having an Al polar surface on the upper surface; A chamfering step (B) of forming an inclined surface inclined toward the side surface of the crystalline AlN substrate, an immersion treatment step (C) of immersing the upper surface of the HVPE-AlN layer in an acid solution after the chamfering step (B), and an AlN layer and an Al layer on the HVPE-AlN layer by MOCVD after the immersion treatment step (C).
  • the layer thickness of the HVPE-AlN layer is 1 ⁇ 5 or less of the layer thickness of the PVT-AlN layer.
  • FIG. 1 is a top view of a semiconductor wafer according to Example 1;
  • FIG. 3 is a cross-sectional view showing the structure of the edge of the semiconductor wafer according to Example 1;
  • FIG. 4 is a diagram showing a pretreatment step with an acid solution in the semiconductor wafer manufacturing process of Example 1.
  • FIG. FIG. 6 is a partially enlarged view of the drawing showing the pretreatment process of FIG. 5;
  • FIG. 10 is a cross-sectional view showing the structure of the edge of a semiconductor wafer according to Example 2;
  • FIG. 10 is a cross-sectional view showing the structure of the end portion of a single-crystal AlN substrate according to a modified example of Example 2;
  • FIG. 11 is a cross-sectional view showing the structure of the edge of a semiconductor wafer according to Example 3;
  • the semiconductor wafer 100 is formed on a single-crystal AlN substrate 11 with a semiconductor layer to be an ultraviolet light emitting diode (ultraviolet LED), which is an ultraviolet semiconductor light emitting element.
  • an ultraviolet light emitting diode ultraviolet LED
  • FIG. 1 is a top view of the semiconductor wafer 100 of this embodiment.
  • a semiconductor wafer 100 is configured by stacking a semiconductor layer 13 on a single-crystal AlN substrate 11 .
  • the semiconductor layer 13 is indicated by a virtual line (chain double-dashed line).
  • the outer edge of the semiconductor layer 13 is drawn inside the outer edge of the substrate 11 , but it should be understood that the semiconductor layer 13 is laminated over the entire upper surface of the substrate 11 .
  • the direction in which the semiconductor layer 13 exists when viewed from the substrate 11 will be described as being above the semiconductor wafer 100 .
  • the single-crystal AlN substrate 11 is a disk-shaped substrate having a substantially circular planar shape centered on a point C when viewed from above.
  • An orientation flat OF indicating the crystal orientation of the single-crystal AlN substrate 11 is formed at one place on the outer periphery of the single-crystal AlN substrate 11 .
  • the single-crystal AlN substrate 11 has a first surface S1 on which the semiconductor layer 13 is formed, a flat surface FS, and an inclined surface RP that is inclined from the outer edge of the flat surface FS to the end of the single-crystal AlN substrate 11, that is, to the outer edge when viewed from above.
  • the inclined surface RP is formed to have a constant width d1.
  • the inclined surface RP is formed in a region between the edge of the single-crystal AlN substrate 11 and a position spaced radially inward from the edge by the distance d1.
  • the inclined surface RP extends inward from the edge of the single-crystal AlN substrate 11 by a distance d1 when viewed from above.
  • FIG. 2 is a partially enlarged cross-sectional view showing the shape of the semiconductor wafer 100 in the vicinity of its edge in the cross section of the semiconductor wafer 100 taken along the line 2-2 passing through the center C shown in FIG.
  • the single-crystal AlN substrate 11 consists of a PVT-AlN layer 11A, which is an AlN seed substrate produced by a physical vapor transport (PVT) method, and a HVPE-AlN layer 11B, which is an AlN thick film grown on the PVT-AlN layer 11A by a hydride vapor phase epitaxy (HVPE) method. It has a two-layer structure.
  • PVT physical vapor transport
  • HVPE-AlN layer 11B which is an AlN thick film grown on the PVT-AlN layer 11A by a hydride vapor phase epitaxy (HVPE) method. It has a two-layer structure.
  • the single-crystal AlN substrate 11 has a first surface S1, which is an upper surface, a surface opposite to the first surface, that is, a second surface S2, which is a lower surface, and a side surface S3.
  • the first surface S1 has the flat surface FS and the inclined surface RP.
  • the flat surface FS is a surface planarized by polishing with a known polishing method such as chemical mechanical polishing (CMP).
  • CMP chemical mechanical polishing
  • the flat surface FS is a C surface and an Al polar surface. Therefore, it is resistant to an etchant such as a mixed solution of phosphoric acid and sulfuric acid or hydrofluoric acid, which etches the natural oxide film on the surface.
  • the flat surface FS may be a crystal plane slightly inclined from the C-plane, that is, having a so-called OFF angle. Although the OFF angle is not particularly limited, setting it in the range of 0.1 to 0.5° facilitates obtaining good smoothness when an AlGaN layer is laminated on the S1 surface.
  • the direction of slight inclination may also be determined as appropriate, but it is preferably the M-axis direction in which a linear step-terrace structure can be obtained.
  • the inclined surface RP is formed so as to be inclined downward from the outer edge of the flat surface FS toward the end of the single-crystal AlN substrate 11, that is, the side surface S3, in other words, in the direction toward the second surface S2. That is, the inclined surface RP is an inclined surface that slopes downward toward the outside of the substrate 11 .
  • the inclined surface RP is a chamfered portion obtained by chamfering the corner between the surface and the end surface of the single crystal AlN substrate 11 .
  • the inclined surface RP is a tapered portion having a tapered shape formed between the flat surface FS of the single crystal AlN substrate 11 and the side surface S3.
  • the inclined surface RP extends a distance d1 in the direction along the flat surface FS from the outer edge or terminal end of the flat surface FS. That is, the width of the inclined surface RP is d1. Width d1 is the distance measured from the outer edge or end of flat surface FS.
  • the inclined surface RP extends from the flat surface FS by a distance d2 in a direction perpendicular to the flat surface FS in a side view. That is, the depth or height of the inclined surface RP is d2.
  • the height d2 is a distance measured from the upper end of the side surface S3 of the side portion of the single-crystal AlN substrate 11 perpendicular to the flat surface FS in a side view.
  • the inclined surface RP may include a curved surface and may have a rounded (R) cross-sectional shape.
  • the width d1 of the sloping surface RP when it has a rounded cross-sectional shape is measured from the outer edge or end of the flat surface FS, as in the non-rounded case.
  • the height d2 of the inclined surface RP when it has a rounded cross-sectional shape is also measured from the upper end of the surface perpendicular to the flat surface FS, that is, the upper end of the side surface S3.
  • the distance d1 from the end of the single crystal AlN substrate 11 is 0.45 mm or more and 0.75 mm or less (0.45 ⁇ d1 ⁇ 0.75).
  • the width d1 of the inclined surface RP when viewed from above is 0.45 mm or more and 0.75 mm or less.
  • the inclined surface RP is formed to a position where the distance d2 from the flat surface FS in the direction perpendicular to the flat surface FS is 0.2 mm or more and 0.3 mm or less.
  • the height d2 of the inclined surface RP is 0.2 mm or more and 0.3 mm or less (0.2 ⁇ d2 ⁇ 0.3).
  • the inclined surface RP having the dimensions d1 and d2 described above is inclined at an angle of 23° or more and 29° or less with respect to the flat surface FS.
  • the angle between the inclined surface RP and the flat surface FS is 23° or more and 29° or less (23° ⁇ a ⁇ 29° in FIG. 2).
  • the single-crystal AlN substrate 11 in this embodiment is first produced by growing a disk-shaped single-crystal AlN substrate using a seed substrate as a seed, and is formed by grinding the outer edge of the first surface S1 of the single-crystal AlN substrate 11, that is, the element growth surface, out of the main surfaces of the produced disk-shaped substrate to form an inclined surface RP.
  • a disk-shaped substrate produced using a seed substrate is susceptible to slip dislocation due to residual stress at the peripheral edge of the growth surface when subject to temperature changes during the growth of the semiconductor layer.
  • the above-described inclined surface RP is a portion formed by removing the portion where slip dislocation is likely to occur.
  • the single-crystal AlN substrate 11 having the inclined surface RP in this embodiment is a substrate from which the above-described portion where slip dislocation is likely to occur has been removed.
  • the second surface S2 may be a flat surface planarized by polishing with a known polishing method such as chemical mechanical polishing, or may be a mechanically polished surface, a so-called lapped surface.
  • the second plane S2 is a ⁇ C plane and an N-polar plane. Therefore, it has a property of being etched by an etchant such as a mixed solution of phosphoric acid and sulfuric acid or hydrofluoric acid, which etches the natural oxide film on the surface. Therefore, from the viewpoint of slowing down the progress of etching, the surface is preferably flattened.
  • the side surface S3 is a side end surface of the single crystal AlN substrate 11, and is a surface perpendicular to the substrate surface and a surface perpendicular to the flat surface FS.
  • the side surface S3 may be rougher than the first surface S1 and the second surface S2.
  • the semiconductor layer 13 is formed by stacking a plurality of AlGaN-based semiconductor layers including an active layer on the first surface S1 of the single-crystal AlN substrate 11 by epitaxial growth.
  • FIG. 3 is an enlarged view of portion A surrounded by a dashed line in FIG.
  • the semiconductor layer 13 is formed by epitaxially growing an n-type AlGaN layer 14 (hereinafter also referred to as an n-type Al x Ga 1-x N (0 ⁇ x ⁇ 1) layer 14), an active layer 15, an AlGaN layer 16, a p-type AlGaN layer 17 and a p-type GaN layer 18 on a single-crystal AlN substrate 11 in this order.
  • an n-type AlGaN layer 14 hereinafter also referred to as an n-type Al x Ga 1-x N (0 ⁇ x ⁇ 1) layer 14
  • an active layer an AlGaN layer 16
  • a p-type AlGaN layer 17 and a p-type GaN layer 18 on a single-crystal AlN substrate 11 in this order.
  • the n-type AlGaN layer 14 is a Si (silicon)-doped n-type conductive layer.
  • the Al composition of the n-type AlGaN layer 14 can be appropriately determined so as to obtain sufficient transmittance for the desired emission wavelength of ultraviolet light. For example, in an ultraviolet semiconductor light emitting device using the semiconductor wafer 100, ultraviolet light emitted from the light emitting layer passes through the n-type AlGaN layer 14 and the single crystal AlN substrate 11 and is emitted to the outside.
  • the Al composition of the n-type AlGaN layer 14 increases, the bandgap of the n-type AlGaN layer increases, and accordingly, it becomes possible to transmit ultraviolet light having a shorter wavelength.
  • the n-type Al x Ga 1-x N (0 ⁇ x ⁇ 1) layer 14 may be formed of a plurality of layers with different Al compositions.
  • the n-type Al x Ga 1-x N (0 ⁇ x ⁇ 1) layer 14 may include a laminated film in which an AlN layer and an Al x Ga 1-x N (0.5 ⁇ x ⁇ 1) layer are laminated in this order.
  • an AlN buffer layer may be provided between the single-crystal AlN substrate 11 and the n-type AlGaN layer 14 .
  • the n-type Al x Ga 1-x N (0 ⁇ x ⁇ 1) layer 14 can be a composition gradient layer in which the Al composition is gradient in the stacking direction, that is, in the direction away from the single crystal AlN substrate 11 .
  • the n-type AlGaN layer 14 consists of a first n-type Al X1 Ga 1-X1 N layer 14A and a second n-type Al X2 Ga 1-X2 N layer 14B, as shown in FIG.
  • the first n-type Al X1 Ga 1-X1 N layer 14A can be a composition gradient layer in which the Al composition X1 decreases from 1.0 to 0.75 in the stacking direction
  • the second n-type Al X2 Ga 1-X2 N layer 14B can be a composition gradient layer in which the Al composition X2 decreases from 0.75 to 0.70.
  • the film thickness of the n-type AlGaN layer 14 is not particularly limited and is appropriately determined.
  • the thickness of the n-type AlGaN layer 14 is preferably 0.5 ⁇ m or more and 2 ⁇ m or less. From the viewpoint of reducing the resistance value of the n-type AlGaN layer, the thickness of the n-type AlGaN layer is preferably thick.
  • the n-type AlGaN layer is likely to undergo lattice relaxation and generate dislocations.
  • the n-type AlGaN layer 14 is formed as a laminated structure consisting of the above-described first n-type Al X1 Ga 1-X1 N layer 14A and the second n-type Al X2 Ga 1-X2 N layer 14B
  • the first n-type Al X1 Ga 1-X1 N layer 14A has a layer thickness of 200 nm
  • the second n-type Al X2 Ga 1-X2 N layer has a thickness of 200 nm.
  • Layer 14B may be 1000 nm thick.
  • the film thicknesses of the first n-type Al X1 Ga 1-X1 N layer 14A and the second n-type Al X2 Ga 1-X2 N layer 14B are not limited to the numbers given as examples, and can be appropriately determined so that the total film thickness is 2.0 ⁇ m or less.
  • the concentration of Si doped into the n-type AlGaN layer 14 may be appropriately determined so as to obtain the desired n-type conductivity, but from the viewpoint of reducing the resistance value of the n-type AlGaN layer 14, it is preferably 1 ⁇ 10 18 to 1 ⁇ 10 20 cm ⁇ 3 , more preferably 5 ⁇ 10 18 to 5 ⁇ 10 19 cm ⁇ 3 .
  • the Si doping concentration may be constant in the film thickness direction in the n-type AlGaN layer 14, or may be modulated doping with a different Si concentration in the film thickness direction.
  • the active layer (ACT) 15 has a quantum well structure composed of barrier layers made of Al A1 Ga 1-A1 N layers and well layers made of Al A2 Ga 1-A2 N layers.
  • the emission peak wavelength of the active layer 15 is in the range of 210-300 nm. Since the wavelength of light emitted from the active layer 15 is determined by the Al composition and film thickness of the well layer, the Al composition and film thickness can be appropriately determined so as to obtain a desired emission wavelength within the above wavelength range.
  • the film thickness of the well layer can be set in the range of 2 to 10 nm, and the Al composition can be determined so as to obtain the desired emission wavelength.
  • the Al composition and film thickness of the barrier layer are not particularly limited.
  • the well layer and the barrier layer may be n-type layers doped with Si.
  • Both the well layer and the barrier layer may be Si-doped layers, or a structure in which only the well layer or only the barrier layer is doped with Si may be used.
  • the doping Si concentration is not particularly limited, but is preferably in the range of 1 ⁇ 10 17 to 5 ⁇ 10 18 cm ⁇ 3 .
  • the number of quantum well layers is not particularly limited, and may be a multiple quantum well (MQW: Multi Quantum Well) structure in which a plurality of well layers are formed, or a single quantum well (SQW: Single Quantum Well) structure.
  • MQW Multi Quantum Well
  • SQW Single Quantum Well
  • the number of well layers is preferably determined within the range of 1-5.
  • the Al Y1 Ga 1-Y1 N layer 16 is a layer provided adjacently on the active layer 15 .
  • the Al Y1 Ga 1-Y1 N layer 16 functions as an electron blocking layer (EBL) for suppressing overflow of electrons injected into the active layer 15 to the p-type Al Y2 Ga 1-Y2 N layer 17 . Therefore, the Al Y1 Ga 1-Y1 N layer 16 has a larger bandgap than the active layer 15 and the p-type Al Y2 Ga 1-Y2 N layer 17 described later, and the Al composition Y1 of the Al Y1 Ga 1-Y1 N layer 16 is determined within the range of 0.8 ⁇ Y1 ⁇ 1.0.
  • the Al composition of the AlGaN layer epitaxially grown on the substrate 11 becomes higher.
  • the Al composition Y1 is preferably 0.9 ⁇ Y1 ⁇ 1.0 in order to sufficiently exhibit the function as an electron blocking layer.
  • the Al Y1 Ga 1-Y1 N layer 16 may be an undoped layer or doped with a p-type dopant as long as it can function as an electron blocking layer.
  • a p-type dopant material for the Al Y1 Ga 1-Y1 N layer 16 Mg (magnesium), Zn (zinc), Be (beryllium), C (carbon), or the like can be used. In particular, it is preferable to use Mg, which is commonly used as a p-type dopant material for AlGaN layers.
  • the p-type dopant material may be uniformly doped in the stacking direction of the Al Y1 Ga 1-Y1 N layer 16, or the concentration of the dopant material may be varied in the stacking direction.
  • the p-type dopant concentration in the Al Y1 Ga 1-Y1 N layer 16 is not particularly limited, but is preferably 5 ⁇ 10 18 to 1 ⁇ 10 20 cm ⁇ 3 in order to obtain a function as an electron blocking layer, and particularly preferably 1 ⁇ 10 19 to 8 ⁇ 10 19 cm ⁇ 3 from the viewpoint of increasing the efficiency of carrier injection into the light emitting layer.
  • the Al Y1 Ga 1-Y1 N layer 16 of the present invention may contain no n-type dopant or may contain n-type dopant at a concentration less than the n-type dopant contained in the p-type Al Y2 Ga 1-Y2 N layer 17 described below.
  • the n-type impurity concentration in the Al Y1 Ga 1-Y1 N layer 16 is preferably 1 ⁇ 10 18 cm ⁇ 3 or less. According to the findings of the inventors, it is known that dopant diffusion occurs between the adjacent Al Y1 Ga 1-Y1 N layer 16 and the p-type Al Y2 Ga 1-Y2 N layer 17 during its growth.
  • the n-type dopant concentration in the Al Y1 Ga 1-Y1 N layer 16 is higher than that in the p-type Al Y2 Ga 1-Y2 N layer 17 , the n-type dopant diffuses from the Al Y1 Ga 1-Y1 N layer 16 into the p-type Al Y2 Ga 1-Y2 N layer 17 and the p-type Al Y2 Ga 1-Y2 N layer 1 Precise control of the n-type dopant concentration in 7 can be difficult.
  • At least the n-type dopant in the Al Y1 Ga 1-Y1 N layer 16 should be less than the n-type dopant contained in the p-type Al Y2 Ga 1-Y2 N layer 17.
  • the thickness of the Al Y1 Ga 1-Y1 N layer 16 may be appropriately determined so as to function as an electron blocking layer and to efficiently inject holes from the p-type Al Y2 Ga 1-Y2 N layer 17 into the active layer. If the film thickness is less than 1 nm, electrons tunnel and the function as an electron blocking layer is reduced. Considering these, the film thickness of the Al Y1 Ga 1-Y1 N layer 16 is preferably 2 to 20 nm, more preferably 5 to 15 nm.
  • the Mg doped in the Al Y1 Ga 1-Y1 N layer 16 can have a concentration difference in the stacking direction.
  • an undoped AlN layer 16A with a layer thickness of 1 to 5 nm may be laminated on the side in contact with the active layer 15, and a Mg-doped p-type AlN layer 16B may be laminated with a thickness of 5 to 15 nm.
  • the Mg doping concentration is preferably 5 ⁇ 10 18 to 1 ⁇ 10 20 cm ⁇ 3 , and particularly preferably 1 ⁇ 10 19 to 8 ⁇ 10 19 cm ⁇ 3 as described above.
  • the p-type Al Y2 Ga 1-Y2 N layer 17 of the present invention is formed on the Al Y1 Ga 1-Y1 N layer 16 and functions as a p-type clad layer.
  • the p-type Al Y2 Ga 1-Y2 N layer 17 is co-doped with a p-type impurity serving as an acceptor and an n-type impurity serving as a donor.
  • Mg magnesium, Zn (zinc), Be (beryllium), C (carbon), or the like can be used as the p-type impurity with which the p-type Al Y2 Ga 1-Y2 N layer 17 is doped.
  • Mg which is generally used as a p-type dopant material for AlGaN semiconductors.
  • Si, Ge (germanium), Se (selenium), S (sulfur), O (oxygen), and the like can be used as n-type impurities.
  • Si which is generally used as an n-type dopant material.
  • the p-type impurity amount with which the p-type Al Y2 Ga 1-Y2 N layer 17 is doped is preferably 1 ⁇ 10 17 to 1.2 ⁇ 10 20 cm ⁇ 3 . Also, J. Applmaru Physmaru, Volmaru 95, no. 8, 15 April (2004), it is believed that the amount of nitrogen defects, which is considered to be a cause of deterioration, increases as the amount of p-type impurities in the p-type Al Y2 Ga 1-Y2 N layer 17 increases. Therefore, when the p-type impurity amount exceeds 1.2 ⁇ 10 20 cm ⁇ 3 , the amount of nitrogen defects formed in the initial stage becomes too large, making it difficult to obtain a high power retention rate.
  • the p-type impurity concentration can be appropriately determined within the above range in consideration of such a trade-off, but in order to obtain a higher output retention rate and a higher output, it is preferably 1 ⁇ 10 19 to 5 ⁇ 10 19 cm ⁇ 3 , more preferably 1 ⁇ 10 19 to 4 ⁇ 10 19 cm ⁇ 3 .
  • the n-type impurity amount with which the p-type Al Y2 Ga 1-Y2 N layer 17 is doped is preferably 1.1 ⁇ 10 18 or more and 9.0 ⁇ 10 18 cm ⁇ 3 or less, more preferably 1.8 ⁇ 10 18 or more and 8.0 ⁇ 10 18 cm ⁇ 3 or less. With these n-type impurity amounts, a light-emitting device with high luminous efficiency can be obtained.
  • the p-type impurity and n-type impurity doped into the p-type Al Y2 Ga 1-Y2 N layer 17 may have a constant concentration within the layer or may have a concentration difference in the lamination direction.
  • the side in contact with the Al Y1 Ga 1-Y1 N layer 16 may be a co-doping layer, and the remaining p-type Al Y2 Ga 1-Y2 N layer 17 may be a layer not doped with n-type impurities.
  • the Al composition Y2 of the p-type Al Y2 Ga 1-Y2 N layer 17 is 0.5 or more and 1.0 or less, and the Al composition Y1 of the Al Y1 Ga 1-Y1 N layer 16 is less than or equal to Y1.
  • the Al composition Y2 of the p-type Al Y2 Ga 1-Y2 N layer 17 preferably exceeds the Al composition of the barrier layer of the active layer and is equal to or less than the Al composition Y1 of the Al Y1 Ga 1-Y1 N layer 16 in the case of a structure in which Y2 is constant in the stacking direction.
  • the difference between the Al composition of the barrier layer of the active layer and the Al composition Y2 of the p-type Al Y2 Ga 1-Y2 N layer 17 is preferably 0.5 or more.
  • the Al composition Y2 of the p-type Al Y2 Ga 1-Y2 N layer 17 is preferably larger than the Al composition of the n-type AlGaN layer 14, which enhances the effect of suppressing carrier overflow to the p-type layer and increases the luminous efficiency of the ultraviolet light emitting device.
  • the Al composition Y2 of the p-type Al Y2 Ga 1-Y2 N layer 17 is preferably 0.6 or more and 0.9 or less in the case of a structure in which Y2 is a constant value in the stacking direction.
  • the p-type Al Y2 Ga 1-Y2 N layer 17 may be a composition gradient layer in which the Al composition Y2 changes in the stacking direction.
  • a polarization doping effect is obtained in the p-type Al Y2 Ga 1-Y2 N layer 17, making it easier to obtain a higher hole concentration and, as a result, increasing the injection efficiency of holes into the active layer.
  • the Al composition on the side in contact with the Al Y1 Ga 1-Y1 N layer 16 is preferably 0.95 to 1.0, and the Al composition on the surface layer of the p-type Al Y2 Ga 1-Y2 N layer 17 on the opposite side is preferably 0.60 to 0.85.
  • the thickness of the p-type Al Y2 Ga 1-Y2 N layer 17 is not particularly limited, but may be appropriately determined within the range of 10 to 150 nm. When the thickness of the p-type Al Y2 Ga 1-Y2 N layer 17 is less than 10 nm, it becomes difficult to obtain the aforementioned effect of suppressing carrier overflow. From this point of view, the thickness of the p-type Al Y2 Ga 1-Y2 N layer 17 is preferably 40 to 120 nm, more preferably 50 to 100 nm.
  • a p-type GaN layer 18 doped with a p-type dopant may be formed on the p-type Al Y2 Ga 1-Y2 N layer 17 for the purpose of reducing the contact resistance with the electrode.
  • the p-type dopant material the known p-type dopant materials described above can be used, but Mg is preferably used for the same reason.
  • the Mg doping concentration in the p-type GaN layer 18 is not particularly limited, but is preferably 1 ⁇ 10 18 to 2 ⁇ 10 20 cm ⁇ 3 in order to lower the resistance value in the p-type GaN layer and the contact resistance with the electrode.
  • the thickness of the p-type GaN layer 18 is not particularly limited, and may be appropriately determined within the range of 5 to 500 nm.
  • All of the AlGaN layers 14 , 15 , 16 , 17 except for the p-type GaN layer 18 are crystal-grown in a lattice-matched state with the single-crystal AlN substrate 11 , and therefore have a low dislocation density equivalent to that of the single-crystal AlN substrate 11 .
  • the single-crystal AlN substrate 11 is not particularly limited, but in view of the quality of the semiconductor layer 13 grown on the single-crystal AlN substrate 11, it preferably has a low dislocation density.
  • the dislocation density of the single crystal AlN substrate 11 is preferably 10 6 cm ⁇ 2 or less, more preferably 10 4 cm ⁇ 2 or less.
  • the surface roughness (RMS) of the flat surface FS of the single-crystal AlN substrate 11 is preferably 5.0 nm or less, more preferably 1.0 nm or less, and still more preferably 0.5 nm or less.
  • the absorption coefficient of the single-crystal AlN substrate 11 is preferably 20 cm ⁇ 1 or less, more preferably 10 cm ⁇ 1 or less.
  • the absorption coefficient can be lowered and the light transmittance can be ensured.
  • the carbon concentration in the single crystal AlN substrate 11 is preferably 5 ⁇ 10 17 cm ⁇ 3 or less.
  • FIG. 4 is a flow chart showing an outline of the manufacturing process of the semiconductor wafer 100.
  • a template substrate for manufacturing the single crystal AlN substrate 11 is prepared (step S101).
  • the PVT-AlN layer 11A is produced by the PVT method, and using this as a seed substrate, the HVPE-AlN layer 11B is grown on the PVT-AlN layer 11A by the HVPE method to make a single-crystal AlN substrate with a two-layer structure a template substrate.
  • the upper surface of the PVT-AlN layer 11A is an Al polar surface
  • the HVPE-AlN layer 11B is laminated on the upper surface. Therefore, the upper surface of the HVPE-AlN layer 11B, which is the upper surface of the template substrate, is an Al-polar surface
  • a single crystal AlN is formed by HVPE on a single crystal AlN formed by PVT to form a single crystal AlN substrate 11 .
  • the portion of the single crystal AlN substrate 11 formed by the PVT method may be removed. By doing so, it is possible to ensure the light transmittance of the substrate after the formation of the light emitting element.
  • step S101 the upper surface of the HVPE-AlN layer 11B is the Al-polar surface, and the lower surface of the PVT-AlN layer 11A is the N-polar surface.
  • step S101 the single-crystal AlN substrate 11 prepared in step S101 is chamfered on the outer peripheral portion on the surface side to produce the single-crystal AlN substrate 11 (step S102).
  • step S102 chamfering is performed to form the inclined surface RP shown in FIG.
  • the inclined surface RP is formed to a position where the distance from the end of the single-crystal AlN substrate 11 is 0.45 mm or more and 0.75 mm or less in the direction along the flat surface FS, and is formed to a position where the distance from the flat surface FS is 0.2 mm or more and 0.3 mm or less in the direction perpendicular to the flat surface FS.
  • the inclined surface RP is formed such that the distance d1 from the end portion of the single-crystal AlN substrate 11 shown in FIG.
  • step S102 chamfering is performed by grinding using a known chamfering machine, for example.
  • the portions where orientation flats or notches are formed are similarly ground so as to have inclined surfaces RP.
  • step S103 chemical mechanical polishing is performed to form the flat surface FS and the second surface S2 (step S103).
  • the inclined surface RP may be rounded by chemical mechanical polishing in step S103 after chamfering.
  • a single crystal AlN substrate 11 is manufactured through steps S101 to S103.
  • step S104 only the flat surface FS of the single crystal AlN substrate 11 is brought into contact with the acid solution, and the back surface of the single crystal AlN substrate 11, that is, the second surface S2 in FIG. 2 is exposed from the acid solution and held for a predetermined processing time.
  • step S104 only the flat surface FS is processed while the second surface S2 of the single-crystal AlN substrate 11 is exposed from the acid solution in order to prevent the second surface S2 from being etched by the acid solution, which is the etchant for removing the native oxide film.
  • FIG. 5 is a cross-sectional view showing how only the flat surface FS of the single-crystal AlN substrate 11 is immersed in the acid solution AC using a Teflon (registered trademark) jig TL in step S104 of the above manufacturing process.
  • LL indicates the liquid level of the acid solution AC.
  • the jig TL has a container portion CT that contains liquid and a support portion SP that is fixed to the container portion and supports the wafer.
  • the support portion SP has a receiving portion TR having a substrate receiving surface TRS having a downwardly convex bottom shape.
  • the receiving portion TR supports the single-crystal AlN substrate 11 via a substrate-receiving surface TRS that contacts the boundary between the flat surface FS and the inclined surface RP of the single-crystal AlN substrate 11 .
  • the receiving part is made of, for example, a mesh-like member, and the acid solution AC in the container part CT passes through the mesh-like member to reach the flat surface FS of the single-crystal AlN substrate 11 .
  • the acid solution AC is injected into the jig TL so that the liquid surface LL of the acid solution AC is at a height that just contacts the flat surface FS.
  • FIG. 6 is an enlarged view of portion B surrounded by a dashed line in FIG. In FIG. 6, the jig TL is omitted.
  • the acid solution AC when the acid solution AC is injected so that the liquid surface LL of the acid solution AC is at a height that contacts the flat surface FS, the acid solution AC spreads over the entire flat surface FS. At that time, as shown in FIG. 6, the acid solution AC tries to crawl up toward the side surface S3 due to the influence of surface tension.
  • the angle ⁇ (contact angle ⁇ , not shown) formed by the tangent drawn to the liquid surface from the point where the acid solution AC and the side surface S3 are in contact with the side surface S3 is compared with the angle ⁇ b (the contact angle ⁇ b between the inclined surface RP and the acid solution AC) formed between the tangent line drawn from the point where the acid solution AC and the inclined surface RP contact the liquid surface and the inclined surface RP.
  • the distance d1 (width) from the end of the single-crystal AlN substrate 11 and the vertical distance d2 (height) from the flat surface FS are set sufficiently larger than in the conventional mere chamfering process.
  • the inclined surface RP serves to prevent the acid solution AC that has spread on the flat surface FS from reaching the side surface S3.
  • the acid solution AC reaches the side surface S3, climbs up the side surface S3, and reaches the second surface S2.
  • the portion of the second surface S2 reached by the acid solution AC is etched, and the thickness and surface roughness of the single-crystal AlN substrate 11 become uneven.
  • a region along the outer periphery of the second surface S2 is partially etched, resulting in a portion with large irregularities and surface roughness.
  • the second surface S2 is a surface that is in contact with a susceptor that heats the substrate 11 when the semiconductor layer 13 is grown on the substrate 11 . If the above-described irregularities and large surface roughness portions are formed on this surface, the crystal growth temperature becomes uneven when forming the AlGaN layer on the single crystal AlN substrate 11, and when semiconductor devices are formed from such a semiconductor wafer, the reliability of the formed semiconductor devices is lowered, and the yield of the semiconductor devices is lowered.
  • the inclined surface RP is provided to prevent the acid solution AC from entering the back surface.
  • the inclined surface RP is provided so that the distance d1 from the end of the single-crystal AlN substrate 11 is 0.45 mm or more and 0.75 mm or less (0.45 ⁇ d1 ⁇ 0.75), and the distance d2 from the flat surface FS in the direction perpendicular to the flat surface FS is 0.2 mm or more and 0.3 mm or less (0.2 ⁇ d2 ⁇ 0.3).
  • Such a dimension of the inclined surface RP is a dimension capable of preventing the acid solution AC from entering the second surface S2 of the single-crystal AlN substrate 11, while minimizing a portion that cannot be used as a device due to a reduction in the area of the flat surface FS of the single-crystal AlN substrate 11 due to the provision of the inclined surface RP when a semiconductor device is formed. Therefore, a highly reliable semiconductor device can be obtained without lowering the yield.
  • step S105 the semiconductor wafer 100 is obtained by growing the n-type AlGaN layer 14, the active layer 15, the AlGaN layer 16, the p-type AlGaN layer 17 and the p-type GaN layer 18 shown in FIG.
  • a group III raw material gas (Al, Ga) raw material gas and a group V (N) raw material gas are supplied onto the single crystal AlN substrate 11 together with a carrier gas such as hydrogen and/or nitrogen.
  • a carrier gas such as hydrogen and/or nitrogen.
  • Known raw material gases can be used without particular limitation for the group III (Al, Ga) raw material gas and the group V (N) raw material gas used here.
  • gases such as trimethylaluminum, triethylaluminum, trimethylgallium, and triethylgallium can be used as group III source gases.
  • Ammonia is usually used as the group V source gas.
  • known materials can be used without limitation as dopant source gases for Mg and Si, such as biscyclopentadienylmagnesium, monosilane, and tetraethylsilane.
  • the supply amount ratio (V/III ratio) of the Group III raw material gas and the Group V raw material gas may be appropriately determined so as to obtain desired characteristics, but is preferably set within the range of 500 to 10,000.
  • the growth temperature of each layer constituting the semiconductor layer 13 is not particularly limited and may be appropriately determined so as to obtain the desired characteristics of each layer and the characteristics of the ultraviolet LED.
  • the semiconductor layer 13 can be manufactured by a known crystal growth method such as a molecular beam epitaxy (MBE) method in addition to the MOCVD method.
  • MBE molecular beam epitaxy
  • the MOCVD method which has high productivity and is widely used industrially, is preferable.
  • the semiconductor layer 13 was formed on the single crystal AlN substrate 11, and the semiconductor wafer 100 was obtained.
  • a first example sample and a second example sample were manufactured in which the inclined surface RP of the semiconductor wafer 100 had the following dimensions.
  • a first comparative sample and a second comparative sample having a conventional chamfered structure having a chamfered portion located at a position corresponding to the inclined surface RP and smaller in height and width than the inclined surface RP, and otherwise similar to the semiconductor wafer 100 were fabricated.
  • the dimensions of the conventional chamfered portion are represented by a distance d1 measured from the outer edge or end of the flat surface FS in the direction along the flat surface FS, and a distance d2 measured from the upper end of the surface perpendicular to the flat surface FS on the side of the single crystal AlN substrate in side view.
  • the first comparative sample and the second comparative sample have the following dimensions.
  • the single crystal AlN substrate of the comparative example has strain caused during crystal growth and the like when manufacturing the single crystal AlN substrate. Therefore, when a semiconductor layer was grown on the semiconductor layer, the crystal partly moved mainly at the outer periphery of the substrate when the stress was released due to the influence of the temperature rise during growth, etc., and it is thought that the linear defect occurred due to the step on the substrate surface.
  • the dimension of the inclined surface RP of this embodiment is a dimension that can sufficiently relax the strain that causes the linear defect.
  • the single-crystal AlN substrate 11 in the semiconductor wafer 100 of this embodiment has a first surface S1, a second surface S2 opposite to the first surface, and a side surface S3.
  • the first surface S1 has a flat surface FS and an inclined surface RP formed so as to incline from the outer edge of the flat surface FS to the side surface S3 toward the second surface S2.
  • the flat surface FS is an Al-polar surface
  • the second surface S2 is an N-polar surface.
  • the inclined surface RP is formed to a position that is 0.45 mm or more and 0.75 mm or less from the end of the single crystal AlN substrate 11 in the direction along the flat surface FS.
  • the inclined surface RP is formed to a position that is 0.2 mm or more and 0.3 mm or less from the flat surface FS in the direction perpendicular to the flat surface FS.
  • a semiconductor wafer 100 of this embodiment has a semiconductor layer 13 formed on a first surface S1 of a single-crystal AlN substrate 11 .
  • the acid solution can be prevented from spreading to the side surface S3 and the second surface S2. It is possible to prevent a decrease in reliability of the device due to temperature unevenness or the like during the growth of the semiconductor layer 13 .
  • the above dimensions of the inclined surface RP of the present embodiment are sufficiently large to prevent wraparound. Moreover, it can be said that the above dimension of the inclined surface RP of the present embodiment is a dimension large enough to relax the strain of the single-crystal AlN substrate 11 and prevent linear defects.
  • the configuration of a semiconductor wafer 200 according to Example 2 will be described with reference to FIG.
  • the semiconductor wafer 200 is different from the semiconductor wafer 100 of the first embodiment in that it has an inclined surface RP2 instead of the inclined surface RP, and is configured similarly to the semiconductor wafer 100 in other respects.
  • the inclined surface RP2 is formed on the first surface S1 of the single crystal AlN substrate 11 so as to be inclined from the outer edge of the flat surface FS to the edge of the single crystal AlN substrate 11.
  • the inclined surface RP2 is formed so that the layer thickness d3 of the HVPE-AlN layer 11B is 1/5 (one-fifth) or less of the layer thickness d4 of the PVT-AlN layer 11A at the side surface S3, that is, the end of the single-crystal AlN substrate 11.
  • the layer thickness of the PVT-AlN layer 11A is, for example, 0.25 mm, may be 0.1 to 0.37 mm, or may be 0.23 mm on average.
  • the layer thickness of the HVPE-AlN layer 11B is, for example, 0.25 mm, may be 0.15 to 0.43 mm, and may be, for example, an average of 0.27 mm.
  • HVPE-AlN layer a single-crystal AlN layer
  • PVT-AlN layer a single-crystal AlN layer formed by PVT to form a two-layer structure
  • strain tends to remain in the HVPE-AlN layer.
  • the AlN thick film is grown on the PVT-AlN layer by the HVPE method, the crystal lattice plane warps in a state where the C plane is convex downward, and the HVPE-AlN layer is subjected to tensile strain.
  • the layer thickness of the HVPE-AlN layer 11B on the side surface S3 is reduced to 1/5 or less of the layer thickness of the PVT-AlN layer 11A, it is possible to remove portions where strain is particularly likely to remain, and to suppress the occurrence of linear defects.
  • the layer thickness of the HVPE-AlN layer 11B on the side surface S3 is 1/5 or less of the layer thickness of the PVT-AlN layer 11A
  • the layer thickness of the HVPE-AlN layer 11B on the side surface S3 is preferably 100 ⁇ m or less, and more preferably 50 ⁇ m or less, from the viewpoint of sufficiently reducing residual strain to suppress slip defects.
  • the inclined surface RP2 is preferably inclined at an angle of 23° or more and 29° or less with respect to the flat surface FS.
  • the angle between the inclined surface RP2 and the flat surface FS is 23° or more and 29° or less (23° ⁇ a ⁇ 29° in FIG. 7).
  • the width of the inclined surface RP2 is 0.5 mm to 0.6 mm and the height is 0.25 mm, 23° ⁇ a ⁇ 29°.
  • the inclined surface RP2 is preferably formed so that the distance d1 from the end of the single crystal AlN substrate 11 is 0.45 mm or more and 0.75 mm (0.45 ⁇ d1 ⁇ 0.75), and the distance d2 from the flat surface FS in the direction perpendicular to the flat surface FS is 0.2 mm or more and 0.3 mm or less (0.2 ⁇ d2 ⁇ 0.3).
  • the width and height of the inclined surface RP2 can be secured by forming the inclined surface RP2 at an angle of 23° or more and 29° or less with respect to the flat surface FS or satisfying 0.45 ⁇ d1 ⁇ 0.75 and 0.2 ⁇ d2 ⁇ 0.3.
  • the inclined surface RP2 can prevent the acid solution from creeping up the side surface S3 and reaching the second surface S2. As a result, it is possible to prevent the reliability of the device from deteriorating due to temperature unevenness or the like during the growth of the semiconductor layer 13 .
  • a third comparative example sample having a layer thickness d4 of the PVT-AlN layer 11A of 0.25 mm, a layer thickness of the HVPE-AlN layer 11B of 0.23 mm, d1 of 0.28 mm, d2 of 0.17 mm, and d3 of 0.06 mm (24% of the layer thickness of the PVT-AlN layer 11A) was prepared, pyramidal unevenness was formed on the edge of the second surface, and the acid solution It was confirmed that wraparound to the second surface S2 of was occurring. Also, a linear defect occurred in the semiconductor layer 13 .
  • Example 2 it is possible to provide a single-crystal AlN substrate, a semiconductor wafer using the single-crystal AlN substrate, and a method for manufacturing these, which can manufacture highly reliable semiconductor devices with a high yield.
  • FIG. 8 is a cross-sectional view showing the structure of the end portion of a semiconductor wafer 200A according to this modification.
  • the semiconductor wafer 200A is formed so that the inclined surface RP2 and the layer thickness d3 of the HVPE-AlN layer 11B on the side surface S3 of the single-crystal AlN substrate 11 are zero. In other words, the semiconductor wafer 200A has the HVPE-AlN layer 11B completely removed from the side surface S3 of the single-crystal AlN substrate 11, and the ground surface reaches the PVT-AlN layer 11A.
  • the semiconductor wafer 200A is configured similarly to the semiconductor wafer 200 in other respects.
  • strain is likely to occur in the outer peripheral portion. According to this embodiment, it is believed that the portion where the strain of the HVPE-AlN layer 11B is particularly likely to remain can be removed more reliably, and the occurrence of linear defects in the semiconductor wafer 200A can be suppressed.
  • the inclined surface RP2 is preferably inclined at an angle of 23° or more and 29° or less with respect to the flat surface FS.
  • the angle between the inclined surface RP2 and the flat surface FS is 23° or more and 29° or less (23° ⁇ a ⁇ 29° in FIG. 7).
  • the inclined surface RP2 is preferably formed so that the distance d1 from the end of the single-crystal AlN substrate 11 is 0.45 mm or more and 0.75 mm or less (0.45 ⁇ d1 ⁇ 0.75), and the distance d2 from the flat surface FS in the direction perpendicular to the flat surface FS is 0.2 mm or more and 0.3 mm or less (0.2 ⁇ d2 ⁇ 0.3).
  • the inclined surface RP2 can prevent the acid solution from reaching the second surface S2 during the pretreatment when the semiconductor layer 13 is grown, and it is possible to prevent the reliability of the device from deteriorating due to the temperature unevenness during the growth of the semiconductor layer 13.
  • FIG. 9 is a cross-sectional view showing the structure of the edge of the semiconductor wafer 300 according to the third embodiment.
  • the semiconductor wafer 300 is configured similarly to the semiconductor wafer 100 of Example 1 in that it has a single-crystal AlN substrate 21 having a single-layer structure instead of the single-crystal AlN substrate 11 having a multilayer structure.
  • the single-crystal AlN substrate 21 is, for example, a single-layer single-crystal AlN substrate formed by the PVT method.
  • the single-crystal AlN substrate 21 has the same structure as the single-crystal AlN substrate 21 of Example 1, except that it has a single-layer structure.
  • the single-crystal AlN substrate 21 has a first surface S1 that is an upper surface, a second surface S2 that is a lower surface, and a side surface S3.
  • the first surface S1 has a flat surface FS and an inclined surface RP.
  • the flat surface FS is an Al-polar surface
  • the second surface S2 is an N-polar surface.
  • the inclined surface RP is formed so as to be inclined downward from the outer edge of the flat surface FS toward the end of the single-crystal AlN substrate 11, that is, the side surface S3, in other words, in the direction toward the second surface S2.
  • the inclined surface RP is formed with dimensions similar to those of the first embodiment. Specifically, it is formed to a position of 0.45 mm or more and 0.75 mm or less from the end of the single crystal AlN substrate 11 .
  • the width d1 of the inclined surface RP in top view that is, the distance d1 from the end of the single-crystal AlN substrate 11 shown in FIG. 9 is 0.45 mm or more and 0.75 mm or less (0.45 ⁇ d1 ⁇ 0.75).
  • the inclined surface RP is formed to a position that is 0.2 mm or more and 0.3 mm or less from the flat surface FS in the direction perpendicular to the flat surface FS.
  • the height d2 of the inclined surface RP that is, the distance d2 from the flat surface FS in the direction perpendicular to the flat surface FS shown in FIG. 9 is 0.2 mm or more and 0.3 mm or less (0.2 ⁇ d2 ⁇ 0.3).
  • the inclined surface RP having the dimensions d1 and d2 described above is inclined at an angle of 23° or more and 29° or less with respect to the flat surface FS.
  • the angle between the inclined surface RP and the flat surface FS is 23° or more and 29° or less (23° ⁇ a ⁇ 29° in FIG. 9).
  • the semiconductor wafer 300 of the present embodiment when only the flat surface FS is immersed in an acid solution as a pretreatment for forming the semiconductor layer 13, the acid solution can be prevented from reaching the side surface S3 and the second surface S2 by the inclined surface RP. Therefore, it is possible to prevent the reliability of the device from deteriorating due to uneven temperature during the growth of the semiconductor layer 13 due to etching of a part of the second surface S2.
  • the single-crystal AlN substrate 21 has a single-layer structure.
  • a two-layer structure consisting of a PVT-AlN layer and an HVPE-AlN layer is more conspicuous. Therefore, by providing the inclined surface RP, it is possible to remove the portion where the distortion may occur. Also in this point, it is possible to prevent the reliability of the device from deteriorating.
  • the semiconductor wafer using the single-crystal AlN substrate according to the above embodiment is applicable to the manufacture of an ultraviolet light emitting diode (ultraviolet LED) as an ultraviolet semiconductor light emitting element, the present invention is not limited to this.
  • the semiconductor wafer according to the above embodiment may be configured as a semiconductor wafer for an ultraviolet semiconductor laser element (ultraviolet LD: Laser Diode).
  • the single-crystal AlN substrates and semiconductor wafers according to the above examples can be applied to electronic devices such as Schottky barrier diodes and HEMTs, in addition to light-emitting devices.
  • the diameter of the single-crystal AlN substrate can be, for example, about 45 to 100 mm, but is not limited to this.
  • the diameter may be larger than 100 mm, and a suitable thickness may be determined according to the diameter.
  • the metal organic chemical vapor phase deposition (MOCVD) method may be used when manufacturing the single crystal AlN substrate, but from the viewpoint of the growth rate, it is more realistic to use the PVT method or the HVPE method.

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PCT/JP2022/047879 2022-01-20 2022-12-26 単結晶ＡｌＮ基板、単結晶ＡｌＮ基板を用いた半導体ウェハ、及びこれらの製造方法 Ceased WO2023140057A1 (ja)

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CN202280087906.4A CN118510945A (zh) 2022-01-20 2022-12-26 氮化铝单晶基板、使用氮化铝单晶基板的半导体晶圆及其制造方法
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WO2018051772A1 (ja) 2016-09-14 2018-03-22 スタンレー電気株式会社 Ｉｉｉ族窒化物積層体、及び該積層体を有する半導体デバイス
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