WO2023092978A1 - 显示基板及显示装置 - Google Patents

显示基板及显示装置 Download PDF

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Publication number
WO2023092978A1
WO2023092978A1 PCT/CN2022/096228 CN2022096228W WO2023092978A1 WO 2023092978 A1 WO2023092978 A1 WO 2023092978A1 CN 2022096228 W CN2022096228 W CN 2022096228W WO 2023092978 A1 WO2023092978 A1 WO 2023092978A1
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Prior art keywords
layer
sub
electrode
orthographic projection
driving backplane
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PCT/CN2022/096228
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English (en)
French (fr)
Inventor
李育豪
董学
陈小川
童慧
申晓斌
黄冠达
吴操
卜维亮
王辉
焦志强
Original Assignee
京东方科技集团股份有限公司
云南创视界光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 云南创视界光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to GB2318338.7A priority Critical patent/GB2621786A/en
Priority to US18/026,365 priority patent/US20240099066A1/en
Priority to CN202280001575.8A priority patent/CN116548084A/zh
Publication of WO2023092978A1 publication Critical patent/WO2023092978A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/32—Stacked devices having two or more layers, each emitting at different wavelengths
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes

Definitions

  • the present application relates to the field of display technology, in particular to a display substrate and a display device.
  • OLED Organic Light Emitting Diode
  • the OLED display panel may include: a driving backplane, and a plurality of light emitting devices located on the driving backplane.
  • Each light-emitting device includes: a first electrode, a light-emitting layer and a second electrode arranged in layers along the distance from the driving backplane in order.
  • the first electrodes in each light emitting device are electrically connected to the driving backplane. In this way, when a voltage is applied to the first electrode, an electric field will be formed between the first electrode and the second electrode, so that the light-emitting layer located between the first electrode and the second electrode will generate photons under the action of this electric field to emit light to the outside. Light is emitted, thereby enabling the OLED display panel to display images.
  • the light-emitting layer in the OLED display panel is usually formed after evaporation of the entire layer by evaporation process, that is, the light-emitting layers in each light-emitting device are connected together, which will lead to poor display effect of the OLED display panel .
  • Embodiments of the present application provide a display substrate and a display device.
  • the problem of poor display effect of the display panel in the prior art can be solved, and the technical solution is as follows:
  • a display substrate including:
  • a driving backplane a first electrode layer located on one side of the driving backplane, the first electrode layer has a plurality of first electrodes, and the first electrodes are electrically connected to the driving backplane;
  • An organic light-emitting layer located on the side of the pixel definition layer away from the driving backplane includes: a plurality of organic material layers stacked in a direction perpendicular to and away from the driving backplane, at least part of the The part of the organic material layer located inside the isolation groove is disconnected from the part located outside the isolation groove;
  • the second electrode layer is located on the side of the organic light-emitting layer away from the driving backplane.
  • the sidewall of the partition groove has a concave structure.
  • the pixel definition layer includes: a first sub-definition layer and a second sub-definition layer stacked in a direction perpendicular to and away from the driving substrate, and the isolation groove runs through the first definition layer and the second sub-definition layer.
  • the second sub-definition layer, the side of the second sub-definition layer close to the partition groove protrudes from the side of the first sub-definition layer close to the partition groove.
  • the isolation groove includes: a first sub-isolation groove located in the first sub-definition layer, and a second sub-isolation groove located in the second sub-definition layer;
  • the orthographic projection of the second sub-isolation slot on the driving backplane is located within the orthographic projection of the first sub-isolation slot on the driving backplane, and the second sub-isolation slot is in the The outer boundary of the orthographic projection on the driving backplane does not coincide with the outer boundary of the orthographic projection of the first sub-isolation groove on the driving backplane.
  • the distance range between the outer boundary of the orthographic projection of the second sub-isolation slot on the drive backplane and the outer boundary of the orthographic projection of the first sub-isolation slot on the drive backplane For: 0.05 microns to 0.1 microns.
  • the pixel definition layer further includes: a third sub-definition layer located on a side of the first sub-definition layer close to the driving backplane;
  • the orthographic projection of the partition groove on the driving backplane is located within the orthographic projection of the third sub-definition layer on the driving backplane;
  • the isolation slot further includes: a third sub-isolation slot located in the third sub-definition layer, and the orthographic projection of the third sub-isolation slot on the driving backplane is located in the first sub-isolation slot within the orthographic projection on the drive backplane, and the outer boundary of the orthographic projection of the third sub-isolation slot on the drive backplane is the same as the orthographic projection of the first sub-isolation slot on the drive backplane Projected outer boundaries do not coincide.
  • the first sub-definition layer is made of silicon nitride material, and the second sub-definition layer and the third sub-definition layer are both made of silicon oxide material.
  • the pixel definition layer further includes: The protection layer between the third sub-definition layer and the first sub-definition layer, the orthographic projection of the partition groove on the driving backplane is located within the orthographic projection of the protection layer on the backplane.
  • the angle between the sidewall of the isolation groove and the side of the pixel definition layer close to the driving backplane is in the range of 70° to 110°.
  • the display substrate further includes: an auxiliary support layer provided on the same layer as the first electrode layer but made of a different material, the thickness of the auxiliary support layer being less than or equal to the thickness of the first electrode layer;
  • the orthographic projection of the partition groove on the driving backplane is located within the orthographic projection of the auxiliary supporting layer on the driving backplane.
  • the auxiliary supporting layer has a plurality of hollow structures corresponding to the plurality of first electrodes one by one, and the outer boundary of the orthographic projection of the hollow structures on the driving backplane is connected to the first electrodes.
  • the outer boundaries of the orthographic projections on the drive backplane coincide.
  • the thickness of the auxiliary supporting layer is greater than or equal to half of the thickness of the first electrode layer.
  • the isolation grooves are distributed around the periphery of each of the pixel openings.
  • the depth of the isolation groove ranges from 70 nm to 140 nm, and the minimum width of the isolation groove ranges from 200 nm to 700 nm.
  • the angle between the sidewall of the pixel opening and the side of the pixel definition layer close to the driving backplane is in the range of 70° to 90°.
  • the orthographic projection of the pixel opening on the driving backplane is located within the orthographic projection of the corresponding first electrode on the driving backplane.
  • the distance between the outer boundary of the orthographic projection of the pixel opening on the driving backplane and the outer boundary of the orthographic projection of the corresponding first electrode on the driving backplane is greater than or equal to 150 nanometers.
  • the thickness of the organic light-emitting layer is greater than or equal to three times the thickness of the pixel definition layer.
  • the display substrate further includes: an encapsulation layer located on a side of the second electrode layer away from the driving backplane.
  • a display device which is characterized in that it includes: a driver chip and a display panel, the display panel is any one of the above-mentioned display panels, and the driver chip is used to apply control to the display panel Signal.
  • a display substrate comprising: a driving backplane, a first electrode layer, a pixel definition layer, an organic light-emitting layer and a second electrode layer.
  • the pixel definition layer has partition grooves. Because at least part of the organic material layer is located inside the isolation groove, it is disconnected from the portion outside the isolation groove. Therefore, the organic material layers between any two adjacent light-emitting devices are separated by the isolation grooves.
  • the electric field formed between the first electrode and the second electrode layer makes the leakage current generated by some organic material layers in each light emitting device separated by the isolation groove, that is, makes The leakage current generated by the organic material layer in the light emitting device will not be laterally directed to the organic material layer adjacent to the light emitting device, so that the light emission of this light emitting device will not affect the light emission of adjacent light emitting devices. In this way, it can ensure that the display effect of the display substrate is better.
  • FIG. 1 is a top view of a display substrate provided by an embodiment of the present application.
  • Fig. 2 is the film structure schematic diagram at A-A ' place shown in Fig. 1;
  • Fig. 3 is a schematic diagram of the film layer structure of a light emitting device provided in the embodiment of the present application.
  • Fig. 4 is a schematic structural diagram of a pixel definition layer provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of another pixel definition layer provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of a layer structure of a pixel definition layer provided in an embodiment of the present application.
  • Fig. 7 is a schematic diagram of the layer structure of another pixel definition layer provided by the embodiment of the present application.
  • Fig. 8 is a physical diagram of a display substrate provided by an embodiment of the present application.
  • Fig. 9 is a schematic diagram of the layer structure of another pixel definition layer provided by the embodiment of the present application.
  • Fig. 10 is a schematic structural diagram of another pixel definition layer provided by the embodiment of the present application.
  • Fig. 11 is a schematic cross-sectional view at the B-B' place shown in Fig. 1;
  • Fig. 12 is the physical figure shown in Fig. 11;
  • FIG. 13 is a schematic diagram of a film layer structure of a display substrate provided by an embodiment of the present application.
  • a silicon-based OLED display panel may include: a driving backplane, and a plurality of light emitting devices located on the driving backplane.
  • Each light-emitting device includes: a first electrode, a light-emitting layer and a second electrode arranged in layers along the distance from the driving backplane in order.
  • the first electrodes in each light emitting device are electrically connected to the driving backplane.
  • the light-emitting layer may be composed of multiple sub-light-emitting layers stacked, and each sub-light-emitting layer is connected in series through a charge generation layer.
  • the color of the light emitted by the light-emitting layer can be determined by a plurality of sub-light-emitting layers. For example, if the light-emitting layer needs to emit white light, a sub-light-emitting layer that can emit red light, a sub-light-emitting layer that can emit green light, and a sub-light-emitting layer that can emit blue light can be stacked so that the light-emitting layer emits white light.
  • each sub-light-emitting layer may include: a hole injection layer, a hole transport layer, a light-emitting material layer, an electron transport layer, and an electron injection layer that are stacked.
  • the charge generation layer is generally made of a material with better conductivity, so that each sub-light-emitting layer can emit light, and then the light-emitting layer has a better light-emitting effect.
  • the light-emitting layer in the OLED display panel is usually formed by vapor-depositing the entire layer through an evaporation process, that is, the sub-light-emitting layer and the charge generation layer in each light-emitting device are connected together.
  • the charge generation layers in each light emitting device are also connected together, and the conductivity of the charge generation layer is better. Therefore, when a light emitting device emits light, the charge generation layer in the light emitting device may generate a lateral leakage current, which may cause the light emitting device adjacent to the light emitting device to also emit light, which may cause OLED display The display of the panel is poor.
  • Figure 1 is a top view of a display substrate provided by an embodiment of the present application
  • Figure 2 is a schematic diagram of the film layer structure at A-A' shown in Figure 1
  • the display substrate 000 may include: a driving backplane 100 , a first electrode layer 200 , a pixel definition layer 300 , an organic light emitting layer 400 and a second electrode layer 500 .
  • the first electrode layer 200 in the display substrate 000 is located on one side of the driving backplane 100 , the first electrode layer 200 has a plurality of first electrodes 201 , and the first electrodes 201 are electrically connected to the driving backplane 100 .
  • the pixel definition layer 300 in the display substrate 000 is located on the side of the first electrode layer 200 facing away from the drive backplane 100.
  • the pixel definition layer 300 has a plurality of pixel openings K corresponding to the plurality of first electrodes 201 one-to-one, and is located on two sides. At least part of the first electrode 201 is located in the corresponding pixel opening K.
  • the part of the first electrode 201 located in the pixel opening K, the part of the organic light emitting layer 400 located in the pixel opening K, and the part of the second electrode layer 500 located in the pixel opening K can form a Light emitting devices.
  • this light emitting device may be an OLED light emitting device.
  • the organic light-emitting layer 400 in the display substrate 000 is located on the side of the pixel definition layer 300 away from the driving backplane 100, and the organic light-emitting layer 400 may include: a plurality of organic material layers 400a stacked in a direction perpendicular to and away from the driving backplane 100, At least a portion of the organic material layer 400 a inside the isolation groove U is disconnected from a portion outside the isolation groove U.
  • the second electrode layer 500 in the display substrate 000 is located on the side of the organic light emitting layer 400 away from the driving backplane 100 .
  • the organic material layer 400a between any two adjacent light emitting devices is disconnected by the isolation groove U.
  • the electric field formed between the first electrode 201 and the second electrode layer 500 makes the leakage current generated by part of the organic material layer 400a in each light emitting device separated by the isolation groove U, That is, the leakage current generated by the organic material layer 400a in the light emitting device will not be laterally directed into the organic material layer 400a adjacent to the light emitting device, so that the light emission of the light emitting device will not affect the adjacent light emitting device The luminescence is affected. In this way, it can ensure that the display effect of the display substrate is better.
  • the display substrate provided by the embodiment of the present application includes: a driving backplane, a first electrode layer, a pixel definition layer, an organic light emitting layer and a second electrode layer.
  • the pixel definition layer has partition grooves. Because at least part of the organic material layer is located inside the isolation groove, it is disconnected from the portion outside the isolation groove. Therefore, the organic material layers between any two adjacent light-emitting devices are separated by the isolation grooves.
  • the electric field formed between the first electrode and the second electrode layer makes the leakage current generated by some organic material layers in each light emitting device separated by the isolation groove, that is, makes The leakage current generated by the organic material layer in the light emitting device will not be laterally directed to the organic material layer adjacent to the light emitting device, so that the light emission of this light emitting device will not affect the light emission of adjacent light emitting devices. In this way, it can ensure that the display effect of the display substrate is better.
  • FIG. 3 is a schematic diagram of a film layer structure of a light emitting device provided in an embodiment of the present application.
  • Each organic material layer 400a in the organic light emitting layer 400 can be any one of the hole injection layer HIL, the hole transport layer HTL, the light emitting material layer EML, the electron transport layer ETL, the electron injection layer EIL and the charge generation layer CGL.
  • the hole injection layer HIL, the hole transport layer HTL, the light emitting material layer EML, the electron transport layer ETL and the electron injection layer EIL stacked along the side away from the driving backplane 100 can form a sub-light emitting layer.
  • the organic light-emitting layer 400 in the display substrate provided in the embodiment of the present application includes multiple sub-light-emitting layers as an example for schematic illustration.
  • the multiple sub-light-emitting layers contained in the organic light-emitting layer 400 can be respectively : a red sub-emission layer 400R, a green sub-emission layer 400G, and a blue sub-emission layer 400B.
  • any two adjacent sub-light-emitting layers in the organic light-emitting layer 400 may be connected through the charge generation layer CGL.
  • the display substrate 000 can connect the various sub-light-emitting layers in series along the direction away from the driving backplane 100 through the charge generation layer CGL.
  • each sub-emission layer in the organic light-emitting layer 400 can emit light, and the light emitted by each sub-emission layer It can be mixed into white light and emitted.
  • the charge generation layer CGL is usually made of a material with good conductivity, the lateral leakage current generated by the charge generation layer CGL is relatively large during the light-emitting process of the light-emitting device, and each organic material in the organic light-emitting layer 400 The layers 400a are all formed by evaporation process. Therefore, the charge generation layer CGL needs to be separated by the separation groove U in the pixel definition layer 300 , for example, the part of the charge generation layer CGL inside the separation groove U is separated from the part outside the separation groove U.
  • the lateral leakage current generated by the charge generation layer CGL will not be directed to the light-emitting device adjacent to this light-emitting device, thereby reducing the probability of crosstalk between any two adjacent light-emitting devices.
  • the display effect of the display substrate is better.
  • the isolation groove U can not only isolate the charge generation layer CGL, but also isolate other organic light-emitting layers.
  • the isolation groove U can isolate the hole injection layer HIL, the hole transport layer HTL, and the light-emitting material layer. At least one of the EML, the electron transport layer ETL, and the electron injection layer EIL is partitioned. In this way, the probability of crosstalk between any two adjacent light emitting devices can be further reduced.
  • FIG. 4 is a schematic structural diagram of a pixel definition layer provided in an embodiment of the present application.
  • the part of the organic material layer 400a deposited in the isolation groove U can be located in the concave structure O, while the part of the organic material layer 400a deposited outside the isolation groove U Located on the pixel definition layer 300 .
  • FIG. 5 is a schematic structural diagram of another pixel definition layer provided in the embodiment of the present application.
  • the pixel definition layer 300 may include: a first sub-definition layer 301 and a second sub-definition layer 302 stacked vertically and away from the driving substrate 100 , and the isolation groove U runs through the first sub-definition layer 301 and the second sub-definition layer 302 .
  • the side of the second sub-definition layer 302 close to the isolation groove U protrudes from the side of the first sub-definition layer 301 close to the isolation groove U.
  • the protruding part of the second sub-definition layer 302 relative to the first sub-definition layer 301 can form a concave structure O with the side surface of the first sub-definition layer 301 and the driving backplane 100 .
  • the first sub-definition layer 301 and the second sub-definition layer 302 can be prepared using different materials.
  • the display substrate 000 can form the recessed structure O in the pixel definition layer 300 according to the difference in etching rate of the first sub-definition layer 301 and the second sub-definition layer 302 by the etching substance.
  • the first sub-definition layer 301 may be made of silicon nitride material
  • the second sub-definition layer 302 may be made of silicon oxide material.
  • the isolation groove U in the pixel definition layer 300 may include: a first sub-isolation groove U1 located in the first sub-definition layer 301 , and a second sub-isolation groove U2 located in the second sub-definition layer 302 .
  • the orthographic projection of the second sub-isolation slot U2 on the drive backplane 100 is located within the orthographic projection of the first sub-isolation slot U1 on the drive backplane 100, and the orthographic projection of the second sub-isolation slot U2 on the drive backplane 100
  • the outer boundary of the projection does not coincide with the outer boundary of the orthographic projection of the first sub-isolation groove U1 on the driving backplane 100 .
  • the second sub-isolation groove U2 in the second sub-definition layer 302 protrudes from the first sub-isolation groove U1 in the first sub-definition layer 301 , that is, a concave structure O is formed in the isolation groove U.
  • the distance between the outer boundary of the orthographic projection of the second sub-isolation slot U2 on the drive backplane 100 and the outer boundary of the orthographic projection of the first sub-isolation slot U1 on the drive backplane 100 ranges from : 0.05 microns to 0.1 microns.
  • the protruding part of the second sub-isolation groove U2 relative to the first sub-isolation groove U1 is less, so that the second sub-isolation groove U1 Part of the pixel definition layer 300 in the layer 302 close to the second sub-isolation groove U2 will not collapse.
  • FIG. 6 is a schematic diagram of a layer structure of a pixel definition layer provided in an embodiment of this application.
  • the pixel definition layer 300 may further include: a third sub-definition layer 303 located on a side of the first sub-definition layer 301 close to the driving backplane 100 . It should be noted that there are many situations for the structure of the pixel definition layer 300, and the embodiment of the present application takes the following two situations as examples for schematic illustration:
  • the orthographic projection of the isolation groove U in the pixel definition layer 300 on the driving backplane 100 is located within the orthographic projection of the third sub-definition layer 303 on the driving backplane 100 .
  • the depth of the isolation groove U is guaranteed to be relatively shallow, so as to ensure that the subsequent formation of the second electrode layer 500 is relatively gentle.
  • the probability of longitudinal leakage between the flat second electrode layer 500 and the first electrode 201 is relatively low.
  • FIG. 7 is a schematic diagram of a layer structure of another pixel definition layer provided by an embodiment of this application.
  • the pixel definition layer 300 may further include:
  • the orthographic projection of the isolation groove U on the drive backplane 100 is located within the orthographic projection of the protection layer 304 on the backplane.
  • the protective layer 304 in the pixel definition layer 300 may be made of aluminum oxide material.
  • the third sub-definition layer 303 can be protected by the protective layer 304, so as to prevent the third sub-definition layer 303 from being etched by the etching substance. Lose. Therefore, although the etching time of the etching substance on the first sub-definition layer 301 is relatively long, the etching substance will not etch the third sub-definition layer 303, so as to ensure that the third sub-definition layer 303 does not appear A groove that communicates with the partition groove U.
  • FIG. 8 is a physical diagram of a display substrate provided by an embodiment of the present application.
  • the isolation slot U in the pixel definition layer 300 may further include: a third sub-isolation slot U3 located in the third sub-definition layer 303, and the orthographic projection of the third sub-isolation slot U3 on the driving backplane 100 is located in the first sub-isolation slot U1 is within the orthographic projection of the drive backplane 100, and the outer boundary of the orthographic projection of the third sub-isolation slot U3 on the drive backplane 100 is the same as the outer boundary of the orthographic projection of the first sub-isolation slot U1 on the drive backplane 100 do not coincide.
  • the isolation groove U has the third sub-isolation groove U3, there are more organic material layers 400a that can be accommodated in the isolation groove U, so that the isolation groove U can isolate the part of the organic light-emitting layer corresponding to any two adjacent light-emitting devices. 400 works better.
  • the outer boundary of the orthographic projection of the third sub-isolation groove U3 on the drive backplane 100 may be completely identical to the outer boundary of the orthographic projection of the second sub-isolation groove U2 on the drive backplane 100. coincide.
  • the outer boundary of the orthographic projection of the third sub-separation slot U3 on the drive backplane 100 may at least partially not coincide with the outer boundary of the orthographic projection of the second sub-separation slot U2 on the drive backplane 100 .
  • the orthographic projection of the third sub-separation slot U3 on the drive backplane 100 is within the orthographic projection of the second sub-separation slot U2 on the drive backplane 100, or that the second sub-separation slot U2 is on the drive backplane 100
  • the orthographic projection of is located within the orthographic projection of the third sub-isolation groove U3 on the driving backplane 100 . This embodiment of the present application does not limit it.
  • the first sub-definition layer 301 in the pixel definition layer 300 may be made of silicon nitride material, and the second sub-definition layer 302 and the third sub-definition layer 303 may be made of silicon oxide material.
  • the display substrate 000 can form the recessed structure O in the pixel definition layer 300 according to the difference in the etching rate of the silicon nitride and silicon oxide by the etching substance. For example, as shown in FIG.
  • the first sub-definition layer 301 is easily etched, and the first sub-definition layer 301 is easily etched.
  • the second sub-definition layer 302 is not easy to be etched, so that the side of the second sub-definition layer 302 close to the isolation groove U protrudes from the side of the first sub-definition layer 301 close to the isolation groove U, and then in the pixel definition layer 300 A concave structure O is formed.
  • FIG. 10 is a schematic structural diagram of another pixel definition layer provided by an embodiment of the present application.
  • the angle ⁇ 1 between the sidewall of the isolation groove U in the pixel definition layer 300 and the side of the pixel definition layer 300 close to the driving backplane 100 ranges from 70° to 110°.
  • FIG. 10 shows the case where the angle ⁇ 1 between the sidewall of the isolation groove U and the side of the pixel definition layer 300 close to the driving backplane 100 is an obtuse angle.
  • the side wall of the isolation groove U when the angle ⁇ 1 between the side wall of the isolation groove U in the pixel definition layer 300 and the side of the pixel definition layer 300 close to the driving backplane 100 is 70° to 90°, the side wall of the isolation groove U
  • the slope of the included angle between the wall and the side of the pixel definition layer 300 close to the driving backplane 100 is relatively large, so that the film layers of the organic material layer 400a on both sides of the sidewall of the isolation groove U are staggered, that is, the organic material layer 400a is separated by the isolation groove U. U disconnected. In this way, the part of the organic light-emitting layer 400 corresponding to any two adjacent light-emitting devices will not experience crosstalk.
  • the display substrate 000 may also include: an auxiliary support set on the same layer as the first electrode layer 200 but made of different materials layer 600 , the thickness of the auxiliary support layer 600 is less than or equal to the thickness of the first electrode layer 200 .
  • the thickness of the auxiliary support layer 600 is smaller than that of the first electrode layer 200 .
  • the thickness of the auxiliary support layer 600 may also be equal to the thickness of the first electrode layer 200 , which is not limited in this embodiment of the present application.
  • the orthographic projection of the isolation groove U on the driving backplane 100 is located within the orthographic projection of the auxiliary supporting layer 600 on the driving backplane 100 .
  • the auxiliary support layer 600 can make the isolation groove U higher than the first electrode layer 200 .
  • the area between the two first electrodes 201 has the isolation groove U, it will not cause a large slope in the part of the second electrode layer 500 located in the area where the isolation groove U is located, so that the second electrode layer 500 The overall slope is relatively gentle, thereby making the second electrode layer 500 relatively gentle.
  • the second electrode layer 500 is relatively gentle, so that vertical leakage between the second electrode layer 500 and the first electrode 201 is not easy to occur.
  • the auxiliary supporting layer 600 has a plurality of hollow structures corresponding to the plurality of first electrodes 201 one-to-one, and the outer boundary of the orthographic projection of the hollow structures on the driving backplane 100 is the same as that of the first electrodes 201 on the driving backplane.
  • the outer boundaries of the orthographic projections on the plate 100 coincide.
  • the hollow structure is disposed in contact with the first electrodes 201 between any two first electrodes 201 . In this way, the area between any two first electrodes 201 is filled with the auxiliary support layer 600 , which can further improve the flatness of the second electrode layer 500 .
  • the thickness of the auxiliary support layer 600 is greater than or equal to half of the thickness of the first electrode layer 200 . In this way, after the above-mentioned pixel definition layer 300 is formed on the auxiliary supporting layer 600 , the part of the pixel definition layer 300 near the isolation groove U of the first electrode 201 is relatively gentle. In this way, because the part of the pixel definition layer 300 located near the isolation groove U of the first electrode 201 is relatively gentle.
  • the second electrode layer 500 corresponding to the part of the pixel definition layer 300 that is located at the first electrode 201 near the isolation groove U
  • the second electrode layer 500 does not have a large slope, that is, this part of the second electrode layer 500 is relatively gentle.
  • the isolation grooves U in the pixel definition layer 300 are distributed around the periphery of each pixel opening K.
  • one pixel opening K may correspond to one light emitting device.
  • the isolation groove U in the pixel definition layer 300 can isolate the organic material layer 400 a in each light emitting device in the display substrate 000 , so that each light emitting device in the display substrate 000 does not have crosstalk.
  • the depth H1 of the isolation groove U in the pixel definition layer 300 ranges from 70 nm to 140 nm, and the minimum width D1 of the isolation groove U ranges from 200 nm to 700 nm.
  • the depth H1 of the isolation groove U is less than or equal to the thickness of the pixel definition layer 300 . In this way, it can be ensured that the isolation groove U can effectively isolate the organic material layer 400a.
  • FIG. 11 is a schematic cross-sectional view at B-B' shown in FIG. 1 .
  • the angle ⁇ 2 between the sidewall of the pixel opening K and the side of the pixel definition layer 300 close to the driving backplane 100 ranges from 70° to 90°.
  • the organic light emitting layer 400 formed at the sidewall of the pixel opening K At least part of the organic material layer 400a will also be disconnected, that is, the organic material layer 400a corresponding to a part of the area inside the pixel opening K corresponds to a part of the area located on the side wall of the pixel opening K away from the outside of the pixel opening K The organic material layer 400a is disconnected.
  • each light-emitting device is equal to the area of the orthographic projection of the pixel opening K where the light-emitting device is located on the driving backplane 100, thereby ensuring that the effective light-emitting area of each light-emitting device is controllable, so that further Improve the display effect of the display substrate.
  • the angle ⁇ 2 between the side wall of the display substrate 000 and the side wall of the pixel opening K and the side of the pixel definition layer 300 close to the driving backplane 100, and the partition groove U in the above embodiment can further ensure any The organic material layer 400a between two adjacent light emitting devices does not have lateral leakage current.
  • the plurality of second electrodes 201 in the second electrode layer 200 are composed of the first sub-electrode 201a, the second sub-electrode 201b, the third sub-electrode 201b, and the electrode 201c and the fourth sub-electrode 201d.
  • both the first sub-electrode 201a and the third sub-electrode 201c can be made of at least one of titanium or titanium nitride
  • the second sub-electrode 201b can be made of aluminum
  • the fourth sub-electrode 201d can be made of indium tin oxide (English: Indium Tin Oxide; Abbreviation: ITO).
  • the outer boundary of the orthographic projection of the fourth sub-electrode 201d on the driving backplane 100 shown in FIG. The projection's outer boundaries coincide.
  • the orthographic projections of the first sub-electrode 201a, the second sub-electrode 201b and the third sub-electrode 201c on the driving backplane 100 are within the orthographic projection of the fourth sub-electrode 201d on the driving backplane 100 , so that the fourth sub-electrode 201d can cover the sidewalls of the first sub-electrode 201a, the second sub-electrode 201b and the third sub-electrode 201c.
  • This embodiment of the present application does not limit this.
  • the second electrode layer 500 is made of at least one of transparent conductive material or semi-transparent conductive material.
  • the second electrode layer 500 may be made of indium zinc oxide (English: Indium Zinc Oxide; abbreviation: IZO).
  • FIG. 12 is a physical diagram shown in FIG. 11 .
  • the orthographic projection of the pixel opening K in the pixel definition layer 300 on the driving backplane 100 is located within the corresponding orthographic projection of the first electrode 201 on the driving backplane 100 . That is, the pixel definition layer 300 covers the edge portion of the first electrode 201 .
  • sidewalls of the first electrodes 201 may have burrs or depressions. In this way, the part of the pixel definition layer 300 covering the edge of the first electrode 201 protects the first electrode 201 on the side of the first electrode 201 close to the isolation groove U.
  • the part of the pixel definition layer 300 covering the edge of the first electrode 201 effectively prevents the first electrode 201 and the second electrode layer 500 with burrs from appearing sharp. Discharge, and then lead to the breakdown of the light emitting devices in the display substrate 000 .
  • the outer boundary of the orthographic projection of the pixel opening K in the pixel definition layer 300 on the driving backplane 100 and the corresponding first electrode 201 on the driving backplane 100 The distance D2 between the outer boundaries of the orthographic projection is greater than or equal to 150 nm.
  • the pixel definition layer 300 has the partition groove U
  • the part of the second electrode layer 500 corresponding to the partition groove U has poor morphology, and this part of the second electrode layer 500 may have a larger slope angle (such as The situation shown in Figure 8).
  • the display substrate 000 needs to allow the pixel definition layer 300 to cover the edge of the first electrode 201 by at least 150 nanometers, so that the distance between the part of the first electrode 201 in the pixel opening K and the second electrode layer 500 is relatively large. In this way, it can effectively reduce the probability that the second electrode layer 500 and the first electrode 201 have a tip discharge, causing the light emitting device in the display substrate 000 to be broken down.
  • the thickness H2 of the organic light emitting layer 400 is greater than or equal to three times the thickness H3 of the pixel definition layer 300 .
  • the side of the organic light emitting layer 400 formed on the pixel definition layer 300 facing away from the driving backplane 100 is relatively gentle, so that the second electrode layer 500 subsequently formed on the organic light emitting layer 400 is also relatively gentle.
  • the probability of vertical leakage between the second electrode layer 500 and the first electrode 201 is relatively low. For example, as shown in FIG.
  • this part of the organic light emitting layer 400 is relatively gentle, so that the part of the organic light emitting layer 400 corresponds to the first electrode 201.
  • the second electrode layer 500 is also relatively flat. Moreover, since the thickness H2 of the organic light-emitting layer 400 and the thickness H3 of the pixel definition layer 300 are relatively large, at the edge position covering the first electrode 201 in the pixel definition layer 300, the second electrode layer 500 and the first electrode 201 farther away. In this way, the probability of vertical leakage between the second electrode layer 500 and the first electrode 201 is also low.
  • the thickness H2 of the organic light emitting layer 400 may range from 250 nm to 450 nm, and the thickness H3 of the pixel definition layer 300 may range from 70 nm to 140 nm.
  • the thickness H2 of the organic light emitting layer 400 may be 333 nm.
  • FIG. 13 is a schematic diagram of a film layer structure of a display substrate provided in the embodiment of the present application.
  • the display substrate 000 may further include: an encapsulation layer 700 located on a side of the second electrode layer 500 away from the driving backplane 100 .
  • the driving backplane 100 has a plurality of pixel driving circuits T, and the plurality of pixel driving circuits T are located on the substrate 101 .
  • Each pixel driving circuit T may include: an active layer t1 , a gate t2 , a source t3 , a drain t4 and a transfer electrode t5 .
  • a plurality of pixel driving circuits T may be electrically connected to the first electrodes 201 in the light emitting device in one-to-one correspondence.
  • the active layer t1 and the gate t2 may be insulated by the first gate insulating layer 800 , and the active layer t1 is electrically connected to the source t3 and the drain t4 respectively.
  • the source t3 and the drain t4 are arranged in the same layer, that is, the source t3 and the drain t4 belong to a part of the same conductive pattern.
  • the conductive pattern where the source t3 and the drain t4 are located can be insulated from the gate t2 by the second insulating layer 900 .
  • the active layer t1 , the gate t2 , the source t3 and the drain t4 can form a thin film transistor, and the embodiment of the present application is schematically illustrated by taking the thin film transistor as a low-gate thin film transistor as an example. In other optional implementation manners, the thin film transistor may also be a top-gate thin film transistor, which is not limited in this embodiment of the present application.
  • One of the source t3 and the drain t4 in the driving backplane 100 may be electrically connected to the first electrode 201 through the via electrode t5 .
  • the via electrode t5 and the drain electrode t4 are insulated by the second insulating layer 1000 .
  • each pixel driving circuit T may be electrically connected to the first electrode 201 in the corresponding light emitting device through the transfer electrode t5.
  • the encapsulation layer 700 may include: a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer that are stacked.
  • the encapsulation layer 700 is used for encapsulating the display substrate 000 to prevent the organic light emitting layer 400 in the display substrate 000 from being corroded by components such as moisture and oxygen in the air, causing it to be damaged. In this way, the service life of the light emitting device can be effectively improved through the encapsulation layer 700 .
  • the display substrate provided by the embodiment of the present application includes: a driving backplane, a first electrode layer, a pixel definition layer, an organic light emitting layer and a second electrode layer.
  • the pixel definition layer has partition grooves. Because at least part of the organic material layer is located inside the isolation groove, it is disconnected from the portion outside the isolation groove. Therefore, the organic material layers between any two adjacent light-emitting devices are separated by the isolation grooves.
  • the electric field formed between the first electrode and the second electrode layer makes the leakage current generated by some organic material layers in each light emitting device separated by the isolation groove, that is, makes The leakage current generated by the organic material layer in the light emitting device will not be laterally directed to the organic material layer adjacent to the light emitting device, so that the light emission of this light emitting device will not affect the light emission of adjacent light emitting devices. In this way, it can ensure that the display effect of the display substrate is better.
  • the embodiment of the present application also provides a display device.
  • the display device may be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.
  • the display device may include: a driving chip and a display substrate.
  • the display substrate may be an OELD display substrate or an Active Matrix Organic Light Emitting Diode (English: Active Matrix-Organic Light Emitting Diode; AM-OLED for short) display substrate.
  • the display substrate may be the display substrate in the above embodiments.
  • it may be the display substrate shown in FIG. 2 , FIG. 4 , FIG. 5 , FIG. 6 , FIG. 7 , FIG. 9 , FIG. 10 , FIG. 11 or FIG. 13 .
  • the driving chip is connected with the display substrate, and is used for providing electrical signals to the display substrate, so that the display substrate can display images.
  • first and second are used for descriptive purposes only, and should not be construed as indicating or implying relative importance.
  • the term “plurality” means two or more, unless otherwise clearly defined.

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Abstract

本申请公开了一种显示基板及显示装置，属于显示技术领域。显示基板，包括：驱动背板、第一电极层、像素定义层、有机发光层和第二电极层。由于至少部分有机材料层中位于隔断槽内的部分，与位于隔断槽外的部分断开。因此任意两个相邻的发光器件之间的有机材料层均被隔断槽断开。这样，当第一电极上加载电压时，第一电极和第二电极层之间形成的电场，使得各个发光器件中的部分有机材料层产生的漏电流被隔断槽隔开，也即是，使得发光器件中的有机材料层产生的漏电流不会横向导向至与这个发光器件相邻的有机材料层中，进而使得这个发光器件的发光不会对相邻的发光器件的发光造成影响。如此，可以保证显示基板的显示效果较好。

Description

显示基板及显示装置
本申请要求于2022年04月22日提交的申请号为PCT/CN2022/088548、发明名称为“显示装置、显示面板及其制造方法”的PCT申请的优先权，以及2021年11月29日提交的申请号为PCT/CN2021/133886、发明名称为“显示基板”的PCT申请的优先权，都全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别涉及一种显示基板及显示装置。
背景技术
随着显示技术的发展，显示装置的使用越来越广泛。其中，有机发光二极管(英文：Organic Light Emitting Diode，简称：OLED)显示面板，受到了越来越广泛的关注。
OLED显示面板可以包括：驱动背板，以及位于驱动背板上的多个发光器件。每个发光器件包括：沿远离驱动背板依次层叠设置的第一电极、发光层和第二电极。其中，各个发光器件中的第一电极均与驱动背板电连接。这样，当第一电极上加载电压时，第一电极和第二电极之间会形成电场，使得位于第一电极和第二电极之间的发光层在这个电场的作用下产生光子，以向外发出光线，进而使得OLED显示面板能够显示画面。
然而，OLED显示面板内的发光层通常是采用蒸镀工艺整层蒸镀后形成的，也即是，各个发光器件中的发光层是连接在一起的，会导致OLED显示面板的显示效果较差。
发明内容
本申请实施例提供了一种显示基板及显示装置。可以解决现有技术的显示面板的显示效果较差的问题，所述技术方案如下：
一方面，提供了一种显示基板，包括：
驱动背板；位于所述驱动背板一侧的第一电极层，所述第一电极层具有多 个第一电极，所述第一电极与所述驱动背板电连接；
位于所述第一电极层背离所述驱动背板一侧的像素定义层，所述像素定义层具有与所述多个第一电极一一对应的多个像素开孔，以及位于两个相邻的所述像素开孔之间的隔断槽，所述第一电极中的至少部分位于对应的像素开孔内；
位于所述像素定义层背离所述驱动背板一侧的有机发光层，所述有机发光层包括：沿垂直且远离所述驱动背板的方向层叠设置的多个有机材料层，至少部分所述有机材料层中位于所述隔断槽内的部分，与位于所述隔断槽外的部分断开；
以及，位于所述有机发光层背离所述驱动背板一侧第二电极层。
可选的，所述隔断槽的侧壁上具有凹陷结构。
可选的，所述像素定义层包括：沿垂直且远离所述驱动基板的方向层叠设置的第一子定义层和第二子定义层，所述隔断槽贯穿所述第一定义层和所述第二子定义层，所述第二子定义层中靠近所述隔断槽的一侧凸出于所述第一子定义层靠近所述隔断槽的一侧。
可选的，所述隔断槽包括：位于所述第一子定义层内的第一子隔断槽，以及位于所述第二子定义层内的第二子隔断槽；
其中，所述第二子隔断槽在所述驱动背板上的正投影位于所述第一子隔断槽在所述驱动背板上的正投影内，且所述第二子隔断槽在所述驱动背板上的正投影的外边界与所述第一子隔断槽在所述驱动背板上的正投影的外边界不重合。
可选的，所述第二子隔断槽在所述驱动背板上的正投影的外边界与所述第一子隔断槽在所述驱动背板上的正投影的外边界之间的距离范围为：0.05微米至0.1微米。
可选的，所述像素定义层还包括：位于所述第一子定义层靠近所述驱动背板一侧的第三子定义层；
其中，所述隔断槽在所述驱动背板上的正投影位于所述第三子定义层在所述驱动背板上的正投影内；
或者，所述隔断槽还包括：位于所述第三子定义层内的第三子隔断槽，所述第三子隔断槽在所述驱动背板上的正投影位于所述第一子隔断槽在所述驱动背板上的正投影内，且所述第三子隔断槽在所述驱动背板上的正投影的外边界 与所述第一子隔断槽在所述驱动背板上的正投影的外边界不重合。
可选的，所述第一子定义层由氮化硅材料制成，所述第二子定义层和所述第三子定义层均由氧化硅材料制成。
可选的，当所述隔断槽在所述驱动背板上的正投影位于所述第三子定义层在所述驱动背板上的正投影内时，所述像素定义层还包括：位于所述第三子定义层与所述第一子定义层之间的保护层，所述隔断槽在所述驱动背板上的正投影位于所述保护层在所述背板上的正投影内。
可选的，所述隔断槽的侧壁与所述像素定义层靠近所述驱动背板一面之间的夹角范围为：70°至110°。
可选的，所述显示基板还包括：与所述第一电极层同层设置但材料不同的辅助支撑层，所述辅助支撑层的厚度小于或等于所述第一电极层的厚度；
其中，所述隔断槽在所述驱动背板上的正投影位于所述辅助支撑层在所述驱动背板上的正投影内。
可选的，所述辅助支撑层具有与所述多个第一电极一一对应的多个镂空结构，所述镂空结构在所述驱动背板上的正投影的外边界与所述第一电极在所述驱动背板上的正投影的外边界重合。
可选的，所述辅助支撑层的厚度大于或等于所述第一电极层厚度的一半。
可选的，所述隔断槽环绕分布在各个所述像素开孔的外围。
可选的，所述隔断槽的深度的范围为70纳米至140纳米，所述隔断槽的最小宽度的范围为200纳米至700纳米。
可选的，所述像素开孔的侧壁与所述像素定义层靠近所述驱动背板一面之间的夹角范围为：70°至90°。
可选的，所述像素开口在所述驱动背板上的正投影位于对应的第一电极在所述驱动背板上的正投影内。
可选的，所述像素开口在所述驱动背板上的正投影的外边界与对应的第一电极在所述驱动背板上的正投影的外边界之间的距离大于或等于150纳米。
可选的，所述有机发光层的厚度大于或等于所述像素定义层的厚度的三倍。
可选的，所述显示基板还包括：位于所述第二电极层背离所述驱动背板一侧的封装层。
另一方面，提供了一种显示装置，其特征在于，包括：驱动芯片和显示面 板，所述显示面板为上述任一所述的显示面板，所述驱动芯片用于向所述显示面板施加控制信号。
本申请实施例提供的技术方案带来的有益效果至少包括：
一种显示基板，包括：驱动背板、第一电极层、像素定义层、有机发光层和第二电极层。其中，像素定义层中具有隔断槽。由于至少部分有机材料层中位于隔断槽内的部分，与位于隔断槽外的部分断开。因此任意两个相邻的发光器件之间的有机材料层均被隔断槽断开。这样，当第一电极上加载电压时，第一电极和第二电极层之间形成的电场，使得各个发光器件中的部分有机材料层产生的漏电流被隔断槽隔开，也即是，使得发光器件中的有机材料层产生的漏电流不会横向导向至与这个发光器件相邻的有机材料层中，进而使得这个发光器件的发光不会对相邻的发光器件的发光造成影响。如此，可以保证显示基板的显示效果较好。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的一种显示基板的俯视图；
图2是图1示出的A-A’处的膜层结构示意图；
图3是本申请实施例提供的一种发光器件的膜层结构示意图；
图4是本申请实施例提供的一种像素定义层的结构示意图；
图5是本申请实施例提供的另一种像素定义层的结构示意图；
图6是本申请实施例提供的一种像素定义层的膜层结构示意图；
图7是本申请实施例提供的另一种像素定义层的膜层结构示意图；
图8是本申请实施例提供的一种显示基板的实物图；
图9是本申请实施例提供的再一种像素定义层的膜层结构示意图；
图10是本申请实施例提供的又一种像素定义层的结构示意图；
图11是图1示出的B-B’处的截面示意图；
图12是图11所示的实物图；
图13是本申请实施例提供的一种显示基板的膜层结构示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施方式作进一步地详细描述。
在相关技术中，硅基OLED显示面板可以包括：驱动背板，以及位于驱动背板上的多个发光器件。每个发光器件包括：沿远离驱动背板依次层叠设置的第一电极、发光层和第二电极。其中，各个发光器件中的第一电极均与驱动背板电连接。这样，当第一电极上加载电压时，第一电极和第二电极之间会形成电场，使得位于第一电极和第二电极之间的发光层在这个电场的作用下产生光子，以向外发出光线，进而使得OLED显示面板能够显示画面。
其中，发光层可以由多个层叠设置的子发光层组成，且各个子发光层之间通过电荷生成层串联起来。这样，发光层发出光线的颜色，可以由多个子发光层决定。例如，若发光层需要发出白色的光线，则可以将能够发出红色光线的子发光层、绿色光线的子发光层和蓝色光线的子发光层层叠设置，以使发光层发出白色的光线。这里，每个子发光层均可以包括：层叠设置的空穴注入层、空穴传输层、发光材料层、电子传输层和电子注入层。这样，当第一电极上加载电压时，第一电极和第二电极之间形成的电场，使得电子和空穴结合成高能态的激子，而高能态的激子不稳定，很容易跃迁为低能态的激子并释放能量，且在释放能量时会产生光子，以向外发射波长在一定范围的光线。这里，电荷生成层通常由导电性较好的材料制成，以使各个子发光层均能够发出光线，进而使得发光层的发光效果较好。
然而，OLED显示面板内的发光层通常是采用蒸镀工艺整层蒸镀后形成的，也即是，各个发光器件中的子发光层和电荷生成层是连接在一起的。这样，由于各个发光器件中的电荷生成层也是连接在一起的，并且电荷生成层的导电性较好。因此，在某个发光器件发光的过程中，这个发光器件内的电荷生成层可能会产生横向漏电流，该漏电流可能会让与这个发光器件相邻的发光器件也发光，进而可能导致OLED显示面板的显示效果较差。
请参考图1和图2，图1是本申请实施例提供的一种显示基板的俯视图，图 2是图1示出的A-A’处的膜层结构示意图。该显示基板000可以包括：驱动背板100、第一电极层200、像素定义层300、有机发光层400和第二电极层500。
显示基板000中的第一电极层200位于驱动背板100的一侧，第一电极层200具有多个第一电极201，第一电极201与驱动背板100电连接。
显示基板000中的像素定义层300位于第一电极层200背离驱动背板100的一侧，像素定义层300具有与多个第一电极201一一对应的多个像素开孔K，以及位于两个相邻的像素开孔K之间的隔断槽U，第一电极201中的至少部分位于对应的像素开孔K内。这里，第一电极201中位于像素开孔K内的部分，有机发光层400中位于这个像素开孔K内的部分，以及第二电极层500中位于这个像素开孔K内的部分能够组成一个发光器件。例如，这个发光器件可以为OLED发光器件。
显示基板000中的有机发光层400位于像素定义层300背离驱动背板100的一侧，有机发光层400可以包括：沿垂直且远离驱动背板100的方向层叠设置的多个有机材料层400a，至少部分有机材料层400a中位于隔断槽U内的部分，与位于隔断槽U外的部分断开。
显示基板000中的第二电极层500位于有机发光层400背离驱动背板100的一侧。
在本申请中，由于至少部分有机材料层400a中位于隔断槽U内的部分，与位于隔断槽U外的部分断开。因此，任意两个相邻的发光器件之间的有机材料层400a均被隔断槽U断开。这样，当第一电极201上加载电压时，第一电极201和第二电极层500之间形成的电场，使得各个发光器件中的部分有机材料层400a产生的漏电流被隔断槽U隔开，也即是，使得发光器件中的有机材料层400a产生的漏电流不会横向导向至与这个发光器件相邻的有机材料层400a中，进而使得这个发光器件的发光不会对相邻的发光器件的发光造成影响。如此，可以保证显示基板的显示效果较好。
综上所述，本申请实施例提供的显示基板，包括：驱动背板、第一电极层、像素定义层、有机发光层和第二电极层。其中，像素定义层中具有隔断槽。由于至少部分有机材料层中位于隔断槽内的部分，与位于隔断槽外的部分断开。因此任意两个相邻的发光器件之间的有机材料层均被隔断槽断开。这样，当第一电极上加载电压时，第一电极和第二电极层之间形成的电场，使得各个发光 器件中的部分有机材料层产生的漏电流被隔断槽隔开，也即是，使得发光器件中的有机材料层产生的漏电流不会横向导向至与这个发光器件相邻的有机材料层中，进而使得这个发光器件的发光不会对相邻的发光器件的发光造成影响。如此，可以保证显示基板的显示效果较好。
在本申请中，如图3所示，图3是本申请实施例提供的一种发光器件的膜层结构示意图。有机发光层400中的各个有机材料层400a可以均为空穴注入层HIL、空穴传输层HTL、发光材料层EML、电子传输层ETL、电子注入层EIL和电荷生成层CGL中的任意一个。其中，沿背离驱动背板100一侧层叠设置的空穴注入层HIL、空穴传输层HTL、发光材料层EML、电子传输层ETL和电子注入层EIL可以组成一个子发光层。需要说明的是，本申请实施例提供的显示基板中的有机发光层400包含多个子发光层为例进行示意性说明的，示例的，有机发光层400内所包含的多个子发光层可以分别为：红色子发光层400R、绿色子发光层400G和蓝色子发光层400B。
在这种情况下，有机发光层400中任意两个相邻的子发光层之间可以通过电荷生成层CGL连接。这样，显示基板000可以通过电荷生成层CGL将沿背离驱动背板100的方向的各个子发光层串联起来。如此，当第一电极层200上加载电压时，第一电极层200和第二电极层500之间形成的电场，有机发光层400中各个子发光层均可发光，各个子发光层发出的光线可以混合为白光后出射。这里，由于电荷生成层CGL通常是由导电性较好的材料制成的，在发光器件发光的过程中，电荷生成层CGL产生的横向漏电流较大，且有机发光层400中的各个有机材料层400a均是通过蒸镀工艺形成的。因此，需要通过像素定义层300中的隔断槽U将电荷生成层CGL隔断，例如，电荷生成层CGL中位于隔断槽U内的部分，与位于隔断槽U外的部分断开。这样，在某个发光器件发光时，电荷生成层CGL产生的横向漏电流不会导向与这个发光器件相邻的发光器件，进而可以降低任意相邻的两个发光器件发生串扰情况的概率，进使得显示基板的显示效果较好。
还需要说明的是，隔断槽U不仅可以将电荷生成层CGL隔断，还可以将其他的有机发光层隔断，例如，隔断槽U可以将空穴注入层HIL、空穴传输层HTL、发光材料层EML、电子传输层ETL和电子注入层EIL中的至少一者隔断。这样，可以进一步的降低任意相邻的两个发光器件发生串扰情况的概率。
在本申请中，像素定义层300的结构有多种，本申请实施例仅以以下两种可选的实现方式为例进行示意性的说明。
第一种可选的实现方式，请参考图4，图4是本申请实施例提供的一种像素定义层的结构示意图。像素定义层300中的隔断槽U的侧壁上具有凹陷结构O。这样，显示基板000通过蒸镀工艺形成有机材料层400a的过程中，沉积在隔断槽U内的部分有机材料层400a可以位于凹陷结构O内，而沉积在隔断槽U外的部分有机材料层400a位于像素定义层300上。如此，由于隔断槽U的侧壁上具有凹陷结构O，因此凹陷结构O内沉积的有机材料层400a，与像素定义层像层300上沉积的有机材料层400a会从隔断槽U的侧壁处断开。也即是，有机材料层400a中位于隔断槽U内的部分与位于隔断槽U外的部分会断开。
在本申请实施例中，请参考图5，图5是本申请实施例提供的另一种像素定义层的结构示意图。像素定义层300可以包括：沿垂直且远离驱动基板100的方向层叠设置的第一子定义层301和第二子定义层302，隔断槽U贯穿第一定义层301和第二子定义层302。第二子定义层302中靠近隔断槽U的一侧凸出于第一子定义层301靠近隔断槽U的一侧。如此，第二子定义层302相对于第一子定义层301凸出的部分，与第一子定义层301的侧面及驱动背板100能够组成凹陷结构O。这里，为了保证在像素定义层300中能够形成该凹陷结构O，可以让第一子定义层301和第二子定义层302采用不同的材料制备得到。这样，显示基板000根据刻蚀物质对第一子定义层301和第二子定义层302刻蚀速率的不同，可以在像素定义层300内形成凹陷结构O。示例的，第一子定义层301可以由氮化硅材料制成，第二子定义层302可以由氧化硅材料制成。
在本申请中，像素定义层300中的隔断槽U可以包括：位于第一子定义层301内的第一子隔断槽U1，以及位于第二子定义层302内的第二子隔断槽U2。
其中，第二子隔断槽U2在驱动背板100上的正投影位于第一子隔断槽U1在驱动背板100上的正投影内，且第二子隔断槽U2在驱动背板100上的正投影的外边界与第一子隔断槽U1在驱动背板100上的正投影的外边界不重合。这样，第二子定义层302内的第二子隔断槽U2会凸出于第一子定义层301内的第一子隔断槽U1，也即是，在隔断槽U内形成了凹陷结构O。
在本申请实施例中，第二子隔断槽U2在驱动背板100上的正投影的外边界与第一子隔断槽U1在驱动背板100上的正投影的外边界之间的距离范围为： 0.05微米至0.1微米。这样，在通过刻蚀工艺形成第一子隔断槽U1和第二子隔断槽U2后，第二子隔断槽U2相对于第一子隔断槽U1凸出的部分较少，以使第二子定义层302内靠近第二子隔断槽U2的部分像素定义层300不会出现塌陷的情况。如此，有效的保证了在隔断槽U的结构较为稳定的同时，还能够让沉积在像素定义层300上的有机发光层400中的至少部分有机材料发光层400a被隔断槽断开。
在本申请中，请参考图6，图6是本申请实施例提供的一种像素定义层的膜层结构示意图。像素定义层300还可以包括：位于第一子定义层301靠近驱动背板100一侧的第三子定义层303。需要说明的是，像素定义层300的结构有多种情况，本申请实施例以以下两种情况为例进行示意性的说明：
第一种情况，如图6所示，像素定义层300中的隔断槽U在驱动背板100上的正投影位于第三子定义层303在驱动背板100上的正投影内。这样，可以保证隔断槽U能够对有机材料层400a进行隔断的前提下，保证隔断槽U的深度较浅，以保证后续形成的第二电极层500较为平缓，这样，当第一电极201和第二电极层500之间形成的电场时，平缓的第二电极层500与第一电极201之间出现纵向漏电的概率较低。
在本申请中，请参考图7，图7是本申请实施例提供的另一种像素定义层的膜层结构示意图。当隔断槽U在驱动背板100上的正投影位于第三子定义层303在驱动背板100上的正投影内时，像素定义层300还可以包括：位于第三子定义层303与第一子定义层301之间的保护层304，隔断槽U在驱动背板100上的正投影位于保护层304在背板上的正投影内。这里，像素定义层300中的保护层304可以由氧化铝材料制成。这样，在通过刻蚀物质对第一子定义层301进行刻蚀时，可以通过保护层304对第三子定义层303进行保护，以防止第三子定义层303也被该刻蚀物质刻蚀掉。因此，尽管刻蚀物质对第一子定义层301的刻蚀时间较长，该刻蚀物质也不会对第三子定义层303进行刻蚀，以保证第三子定义层303中不会出现与隔断槽U连通的凹槽。
在这种情况下，请参考图8，图8是本申请实施例提供的一种显示基板的实物图。后续在该像素定义层300上形成有机发光层400和第二电极层500后，显示基板00中与隔断槽U对应的部分第二电极层500较为平缓。
第二种情况，请参考图9，图9是本申请实施例提供的再一种像素定义层的 膜层结构示意图。像素定义层300中的隔断槽U还可以包括：位于第三子定义层303内的第三子隔断槽U3，第三子隔断槽U3在驱动背板100上的正投影位于第一子隔断槽U1在驱动背板100上的正投影内，且第三子隔断槽U3在驱动背板100上的正投影的外边界与第一子隔断槽U1在驱动背板100上的正投影的外边界不重合。这样，由于隔断槽U中具有第三子隔断槽U3，因此隔断槽U中能够容纳的有机材料层400a较多，使得隔断槽U的隔断任意两个相邻的发光器件对应的部分有机发光层400的效果更好。
需要说明的是，如图9所示，第三子隔断槽U3在驱动背板100上的正投影的外边界可以与第二子隔断槽U2在驱动背板100上的正投影的外边界完全重合。在其他可能的实现方式中，第三子隔断槽U3在驱动背板100上的正投影的外边界可以与第二子隔断槽U2在驱动背板100上的正投影的外边界至少部分不重合。但需要保证第三子隔断槽U3在驱动背板100上的正投影位于第二子隔断槽U2在驱动背板100上的正投影内，或者，第二子隔断槽U2在驱动背板100上的正投影位于第三子隔断槽U3在驱动背板100上的正投影内。本申请实施例对此不做限定。
在本申请实施例中，像素定义层300中的第一子定义层301可以由氮化硅材料制成，第二子定义层302和第三子定义层303可以由氧化硅材料制成。这样，显示基板000根据刻蚀物质对氮化硅和氧化硅刻蚀速率的不同，可以在像素定义层300内形成凹陷结构O。示例的，如图5所示，当刻蚀物质对氮化硅的刻蚀速率较快，刻蚀物质对氧化硅的刻蚀速率较慢时，第一子定义层301容易被刻蚀，第二子定义层302不容易被刻蚀，使得第二子定义层302中靠近隔断槽U的一侧凸出于第一子定义层301靠近隔断槽U的一侧，进而在像素定义层300内形成凹陷结构O。
第二种可选的实现方式，请参考图10，图10是本申请实施例提供的又一种像素定义层的结构示意图。像素定义层300中的隔断槽U的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α1范围为：70°至110°。这里，图10示出的是隔断槽U的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α1为钝角的情况。
在本申请实施例中，当像素定义层300中的隔断槽U的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α1为70°至90°时，隔断槽U的侧壁 与像素定义层300靠近驱动背板100一面的夹角坡度较大，使得隔断槽U的侧壁两侧的有机材料层400a的膜层错开分布，也即是，有机材料层400a被隔断槽U断开。这样，使得任意两个相邻的发光器件对应的部分有机发光层400，不会出现串扰的情况。当像素定义层300中的隔断槽U的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α1为90°至110°时，隔断槽U中靠近驱动背板100一侧的宽度较大，隔断槽U中背离驱动背板100一侧的宽度较小，使得隔断槽U的侧壁两侧的有机材料层400a被隔断槽U断开的效果更好。这样，任意两个相邻的发光器件对应的部分有机发光层400，出现串扰的情况的概率更低。
针对上述两种可选的实现方式，如图5、图6、图7、图9和图10所示，显示基板000还可以包括：与第一电极层200同层设置但材料不同的辅助支撑层600，辅助支撑层600的厚度小于或等于第一电极层200的厚度。这里，如图5、图6、图7、图9和图10所示，辅助支撑层600的厚度小于第一电极层200的厚度。在其他可能的实现方式中辅助支撑层600的厚度还可以等于第一电极层200的厚度，本申请实施例对此不做限定。
其中，隔断槽U在驱动背板100上的正投影位于辅助支撑层600在驱动背板100上的正投影内。这样，辅助支撑层600可以使得隔断槽U高于第一电极层200。如此，尽管两个第一电极201之间的区域具有隔断槽U，也不会导致第二电极层500中位于隔断槽U所在区域内的部分出现较大的坡度，使得第二电极层500的整体坡度较缓，进而使得第二电极层500的较为平缓。这样，当第一电极201和第二电极层500之间形成的电场时，第二电极层500较为平缓，使得第二电极层500和第一电极201之间不容易出现纵向漏电的情况。
在本申请实施例中，辅助支撑层600具有与多个第一电极201一一对应的多个镂空结构，镂空结构在驱动背板100上的正投影的外边界与第一电极201在驱动背板100上的正投影的外边界重合。这里，镂空结构在任意两个第一电极201之间与第一电极201接触设置。这样，使得任意两个第一电极201之间的区域内均被辅助支撑层600填充，可以进一步的提高第二电极层500的平坦性。
在本申请中，辅助支撑层600的厚度大于或等于第一电极层200厚度的一半。这样，在该辅助支撑层600上形成上述像素定义层300后，像素定义层300 中位于第一电极201靠近隔断槽U处的部分较为平缓。如此，由于像素定义层300中位于第一电极201靠近隔断槽U处的部分较为平缓。因此，后续在该像素定义层300上形成有机发光层400和第二电极层500后，第二电极层500中与像素定义层300中位于第一电极201靠近隔断槽U处的部分对应的第二电极层500不会出现较大的坡度，也即是这部分第二电极层500较为平缓。
在本申请实施例中，如图1所示，像素定义层300中的隔断槽U环绕分布在各个像素开孔K的外围。这里，一个像素开孔K可以对应一个发光器件。像素定义层300中的隔断槽U能够将显示基板000中的各个发光器件中的有机材料层400a隔断开，使得显示基板000中的各个发光器件均不会出现串扰的情况。
在本申请中，如图8所示，像素定义层300中的隔断槽U的深度H1的范围为70纳米至140纳米，隔断槽U的最小宽度D1的范围为200纳米至700纳米。这里，隔断槽U的深度H1小于或等于像素定义层300的厚度。如此，可以保证隔断槽U能够有效的对有机材料层400a进行隔断。
在本申请实施例中，请参考图11，图11是图1示出的B-B’处的截面示意图。像素开孔K的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α2范围为：70°至90°。这里，由于像素开孔K的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α2较大，因此，在该像素开孔K的侧壁处形成的有机发光层400中的至少部分有机材料层400a也会被断开，也即是，位于像素开孔K内的部分区域对应的有机材料层400a，与位于像素开孔K侧壁背离像素开孔K外的部分区域对应的有机材料层400a断开。如此，保证每个发光器件的有效发光面积等于这个发光器件所在的像素开孔K在驱动背板100上正投影的面积，进而可以确保各个发光器件的有效发光面积是可控的，从而可以进一步的提高显示基板的显示效果。
需要说明的是，这里，显示基板000通过像素开孔K的侧壁与像素定义层300靠近驱动背板100一面之间的夹角α2，以及上述实施例中隔断槽U，可以进一步的确保任意两个相邻的发光器件之间的有机材料层400a不会出现横向漏电流的情况。
在本申请实施例中，第二电极层200中的多个第二电极201均是由沿背离驱动背板100的方向依次层叠设置的第一子电极201a、第二子电极201b、第三子电极201c和第四子电极201d组成。其中，第一子电极201a和第三子电极201c 均可以由钛或氮化钛中的至少一种制成，第二子电极201b可以由铝制成，第四子电极201d可以由氧化铟锡(英文：Indium Tin Oxide；简称：ITO)制成。这里，图11示出的第四子电极201d在驱动背板100上的正投影的外边界与第一子电极201a、第二子电极201b和第三子电极201c在驱动背板100上的正投影的外边界重合。在其他可能的实现方式中，第一子电极201a、第二子电极201b和第三子电极201c在驱动背板100上的正投影位于第四子电极201d在驱动背板100上的正投影内，使得第四子电极201d可以覆盖第一子电极201a、第二子电极201b和第三子电极201c的侧壁。本申请实施例对此不做限定。
需要说明的是，为了保证发光器件发出的光线可以穿过第二电极层500，第二电极层500由透明导电材料或半透明导电材料中的至少一种制成。例如，第二电极层500可以由氧化铟锌(英文：Indium Zinc Oxide；简称：IZO)制成。
在本申请中，请参考图12，图12是图11所示的实物图。像素定义层300中的像素开口K在驱动背板100上的正投影位于对应的第一电极201在驱动背板100上的正投影内。也即是，像素定义层300覆盖第一电极201的边缘部分。这里，通常情况下，在驱动背板100上形成图案化的第一电极层200的过程中，第一电极201的侧壁会出现毛刺或凹陷等不良情况。这样，覆盖第一电极201的边缘的这一部分像素定义层300让第一电极201靠近隔断槽U一侧的第一电极201被保护起来。如此，在第一电极201和第二电极层500加载电压后，覆盖第一电极201的边缘的这一部分像素定义层300有效的避免了具有毛刺的第一电极201与第二电极层500出现尖端放电，进而导致显示基板000中的发光器件被击穿的情况。
在本申请实施例中，如图8和图12所示，像素定义层300中的像素开口K在驱动背板100上的正投影的外边界与对应的第一电极201在驱动背板100上的正投影的外边界之间的距离D2大于或等于150纳米。这里，由于像素定义层300中具有隔断槽U，因此，与隔断槽U对应的部分第二电极层500的形貌较差，这部分第二电极层500可能会有较大的坡度角(如图8所示)的情况。在这种情况下，为了避免由于第二电极层500的形貌较差，导致第二电极层500与第一电极201出现尖端放电，进而导致显示基板000中的发光器件被击穿的情况。本申请中，显示基板000需要让像素定义层300覆盖第一电极201的边缘至少150纳米，以使的像素开孔K内的部分第一电极201与第二电极层500 的距离较远。如此，可以有效的降低第二电极层500与第一电极201出现尖端放电，导致显示基板000中的发光器件被击穿的概率。
在本申请中，有机发光层400的厚度H2大于或等于像素定义层300的厚度H3的三倍。这样，像素定义层300上形成的有机发光层400背离驱动背板100一侧较为平缓，使得后续在该有机发光层400上形成的第二电极层500也较为平缓。如此，第二电极层500与第一电极201之间出现纵向漏电的概率较低。例如，如图12所示，在像素定义层300中覆盖第一电极201的边缘的部分上形成有机发光层400后，该部分有机发光层400较为平缓，使得与该部分有机发光层400对应第二电极层500也较为平缓。并且，由于有机发光层400的厚度H2和像素定义层300的厚度H3均较大，因此，在像素定义层300中覆盖第一电极201的边缘位置处，第二电极层500与第一电极201的距离较远。这样，第二电极层500与第一电极201之间出现纵向漏电的概率也较低。
需要说明的是，有机发光层400的厚度H2范围可以为：250纳米至450纳米，像素定义层300的厚度H3范围可以为：70纳米至140纳米。例如，当像素定义层300的厚度H3为89纳米时，有机发光层400的厚度H2可以为333纳米。
在本申请实施例中，请参考图13，图13是本申请实施例提供的一种显示基板的膜层结构示意图。显示基板000还可以包括：位于第二电极层500背离述驱动背板100一侧的封装层700。
在本申请中，驱动背板100中具有多个像素驱动电路T，多个像素驱动电路T均位于衬底101上。每个像素驱动电路T可以包括：有源层t1、栅极t2、源极t3、漏极t4和转接电极t5。这里，多个像素驱动电路T可以与发光器件中的第一电极201一一对应电连接。
其中，有源层t1与栅极t2之间可以通过第一栅极绝缘层800绝缘，且该有源层t1分别与源极t3和漏极t4电连接。通常情况下，源极t3和漏极t4同层设置，也即是，该源极t3和漏极t4属于同一个导电图形中的一部分。源极t3和漏极t4所在的导电图形可以与栅极t2之间通过第二绝缘层900绝缘。
需要说明的是，有源层t1、栅极t2、源极t3和漏极t4能够组成薄膜晶体管，且本申请实施例是以薄膜晶体管为低栅型薄膜晶体管为例进行示意性说明的。在其他的可选的实现方式中，该薄膜晶体管还可以为顶栅型薄膜晶体管，本申 请实施例对此不作限定。
驱动背板100中的源极t3和漏极t4中的一个可以通过转接电极t5与第一电极201电连接。示例的，转接电极t5与漏极t4之间通过第二绝缘层1000绝缘。这里，每个像素驱动电路T可以通过转接电极t5与对应的发光器件中的第一电极201电连接。示例的，转接电极t5与第一电极层200之间具有第一平坦层1100。
封装层700可以包括：层叠设置的第一无机封装层、有机封装层和第二无机封装层。封装层700用于对显示基板000进行封装，以避免显示基板000中的有机发光层400被空气中的水分和氧气等成分的侵蚀，导致其被损坏。如此，通过封装层700可以有效的提高发光器件的使用寿命。
综上所述，本申请实施例提供的显示基板，包括：驱动背板、第一电极层、像素定义层、有机发光层和第二电极层。其中，像素定义层中具有隔断槽。由于至少部分有机材料层中位于隔断槽内的部分，与位于隔断槽外的部分断开。因此任意两个相邻的发光器件之间的有机材料层均被隔断槽断开。这样，当第一电极上加载电压时，第一电极和第二电极层之间形成的电场，使得各个发光器件中的部分有机材料层产生的漏电流被隔断槽隔开，也即是，使得发光器件中的有机材料层产生的漏电流不会横向导向至与这个发光器件相邻的有机材料层中，进而使得这个发光器件的发光不会对相邻的发光器件的发光造成影响。如此，可以保证显示基板的显示效果较好。
本申请实施例还提供了一种显示装置。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置可以包括：驱动芯片和显示基板。其中，显示基板可以为OELD显示基板或者有源矩阵有机发光二极体(英文：Active Matrix-Organic Light Emitting Diode；简称：AM-OLED)显示基板。
在本申请实施例中，显示基板可以为上述实施例中的显示基板。例如，其可以为图2、图4、图5、图6、图7、图9、图10、图11或图13示出的显示基板。该驱动芯片与显示基板连接，用于为显示基板提供电信号，以使显示基板能够显示图像。
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。 而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间唯一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。
在本申请中，术语“第一”和“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
以上所述仅为本申请的可选的实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (20)

  1. 一种显示基板，其特征在于，包括：
    驱动背板；
    位于所述驱动背板一侧的第一电极层，所述第一电极层具有多个第一电极，所述第一电极与所述驱动背板电连接；
    位于所述第一电极层背离所述驱动背板一侧的像素定义层，所述像素定义层具有与所述多个第一电极一一对应的多个像素开孔，以及位于两个相邻的所述像素开孔之间的隔断槽，所述第一电极中的至少部分位于对应的像素开孔内；
    位于所述像素定义层背离所述驱动背板一侧的有机发光层，所述有机发光层包括：沿垂直且远离所述驱动背板的方向层叠设置的多个有机材料层，至少部分所述有机材料层中位于所述隔断槽内的部分，与位于所述隔断槽外的部分断开；
    以及，位于所述有机发光层背离所述驱动背板一侧第二电极层。
  2. 根据权利要求1所述的显示基板，其特征在于，所述隔断槽的侧壁上具有凹陷结构。
  3. 根据权利要求2所述的显示基板，其特征在于，所述像素定义层包括：沿垂直且远离所述驱动基板的方向层叠设置的第一子定义层和第二子定义层，所述隔断槽贯穿所述第一定义层和所述第二子定义层，所述第二子定义层中靠近所述隔断槽的一侧凸出于所述第一子定义层靠近所述隔断槽的一侧。
  4. 根据权利要求3所述的显示基板，其特征在于，所述隔断槽包括：位于所述第一子定义层内的第一子隔断槽，以及位于所述第二子定义层内的第二子隔断槽；
    其中，所述第二子隔断槽在所述驱动背板上的正投影位于所述第一子隔断槽在所述驱动背板上的正投影内，且所述第二子隔断槽在所述驱动背板上的正投影的外边界与所述第一子隔断槽在所述驱动背板上的正投影的外边界不重合。
  5. 根据权利要求4所述的显示基板，其特征在于，所述第二子隔断槽在所述驱动背板上的正投影的外边界与所述第一子隔断槽在所述驱动背板上的正投影的外边界之间的距离范围为：0.05微米至0.1微米。
  6. 根据权利要求4所述的显示基板，其特征在于，所述像素定义层还包括：位于所述第一子定义层靠近所述驱动背板一侧的第三子定义层；
    其中，所述隔断槽在所述驱动背板上的正投影位于所述第三子定义层在所述驱动背板上的正投影内；
    或者，所述隔断槽还包括：位于所述第三子定义层内的第三子隔断槽，所述第三子隔断槽在所述驱动背板上的正投影位于所述第一子隔断槽在所述驱动背板上的正投影内，且所述第三子隔断槽在所述驱动背板上的正投影的外边界与所述第一子隔断槽在所述驱动背板上的正投影的外边界不重合。
  7. 根据权利要求6所述的显示基板，其特征在于，所述第一子定义层由氮化硅材料制成，所述第二子定义层和所述第三子定义层均由氧化硅材料制成。
  8. 根据权利要求7所述的显示基板，其特征在于，当所述隔断槽在所述驱动背板上的正投影位于所述第三子定义层在所述驱动背板上的正投影内时，所述像素定义层还包括：位于所述第三子定义层与所述第一子定义层之间的保护层，所述隔断槽在所述驱动背板上的正投影位于所述保护层在所述背板上的正投影内。
  9. 根据权利要求1所述的显示基板，其特征在于，所述隔断槽的侧壁与所述像素定义层靠近所述驱动背板一面之间的夹角范围为：70°至110°。
  10. 根据权利要求1至9任一所述的显示基板，其特征在于，所述显示基板还包括：与所述第一电极层同层设置但材料不同的辅助支撑层，所述辅助支撑层的厚度小于或等于所述第一电极层的厚度；
    其中，所述隔断槽在所述驱动背板上的正投影位于所述辅助支撑层在所述 驱动背板上的正投影内。
  11. 根据权利要求10所述的显示基板，其特征在于，所述辅助支撑层具有与所述多个第一电极一一对应的多个镂空结构，所述镂空结构在所述驱动背板上的正投影的外边界与所述第一电极在所述驱动背板上的正投影的外边界重合。
  12. 根据权利要求10所述的显示基板，其特征在于，所述辅助支撑层的厚度大于或等于所述第一电极层厚度的一半。
  13. 根据权利要求1至9任一所述的显示基板，其特征在于，所述隔断槽环绕分布在各个所述像素开孔的外围。
  14. 根据权利要求1至9任一所述的显示基板，其特征在于，所述隔断槽的深度的范围为70纳米至140纳米，所述隔断槽的最小宽度的范围为200纳米至700纳米。
  15. 根据权利要求1至9任一所述的显示基板，其特征在于，所述像素开孔的侧壁与所述像素定义层靠近所述驱动背板一面之间的夹角范围为：70°至90°。
  16. 根据权利要求1至9任一所述的显示基板，其特征在于，所述像素开口在所述驱动背板上的正投影位于对应的第一电极在所述驱动背板上的正投影内。
  17. 根据权利要求16所述的显示基板，其特征在于，所述像素开口在所述驱动背板上的正投影的外边界与对应的第一电极在所述驱动背板上的正投影的外边界之间的距离大于或等于150纳米。
  18. 根据权利要求1至9任一所述的显示基板，其特征在于，所述有机发光层的厚度大于或等于所述像素定义层的厚度的三倍。
  19. 根据权利要求1至9任一所述的显示基板，其特征在于，所述显示基板还包括：位于所述第二电极层背离所述驱动背板一侧的封装层。
  20. 一种显示装置，其特征在于，包括：驱动芯片和显示面板，所述显示面板为权利要求1至19任一所述的显示面板，所述驱动芯片用于向所述显示面板施加控制信号。
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