WO2023065206A9 - 显示基板以及显示装置 - Google Patents

显示基板以及显示装置 Download PDF

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WO2023065206A9
WO2023065206A9 PCT/CN2021/125240 CN2021125240W WO2023065206A9 WO 2023065206 A9 WO2023065206 A9 WO 2023065206A9 CN 2021125240 W CN2021125240 W CN 2021125240W WO 2023065206 A9 WO2023065206 A9 WO 2023065206A9
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Prior art keywords
sub
electrodes
electrode
layer
display substrate
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PCT/CN2021/125240
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English (en)
French (fr)
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WO2023065206A1 (zh
Inventor
杨宗顺
李云龙
卢鹏程
黄冠达
张大成
李育豪
余洪涛
童慧
申晓斌
闻林刚
吴操
李世鹏
邹建明
杨超
孙涛
陶雄
何云川
Original Assignee
京东方科技集团股份有限公司
云南创视界光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 云南创视界光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2021/125240 priority Critical patent/WO2023065206A1/zh
Priority to CN202180003026.XA priority patent/CN116326246A/zh
Priority to DE112021008378.3T priority patent/DE112021008378T5/de
Priority to US17/916,187 priority patent/US20240215311A1/en
Publication of WO2023065206A1 publication Critical patent/WO2023065206A1/zh
Publication of WO2023065206A9 publication Critical patent/WO2023065206A9/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks

Definitions

  • Embodiments of the present disclosure relate to a display substrate and a display device.
  • Silicon-based micro-display organic light-emitting display panels have the advantages of miniaturization and high pixel density (Pixel Per Inch, PPI for short), and have gradually become the focus of attention in the display field.
  • Silicon-based microdisplay organic light-emitting display panels for example, can be used in virtual reality (Virtual Reality, referred to as VR) technology and augmented reality (Augmented Reality, referred to as AR) technology, which can achieve excellent display effects.
  • VR Virtual Reality
  • AR Augmented Reality
  • the display substrate has a plurality of sub-pixels arranged in an array, and includes a driving circuit substrate, a plurality of first electrodes, and a pixel defining layer.
  • An electrode is arranged on the driving circuit substrate, and is electrically connected to the output ends of the plurality of pixel driving circuits respectively through the plurality of first via holes, wherein each of the plurality of first electrodes includes a laminated layer
  • the first sub-electrode layer, the second sub-electrode layer, and the transition layer between the first sub-electrode layer and the second sub-electrode layer are provided, the transition layer has a first opening, and the first sub-electrode
  • a plurality of sub-pixel openings of an electrode wherein, the orthographic projection of the first opening of the transition layer of at least one of the plurality of first electrodes on the driving circuit substrate is located on the driving circuit substrate of the pixel defining layer The interior of the orthographic projection on .
  • the whole of the first electrodes and the sub-pixel openings is symmetrical in the first direction, and the whole of the sub-pixel openings is symmetrical in the second direction.
  • Asymmetric wherein the first direction is perpendicular to the second direction.
  • the orthographic projection of at least one of the plurality of first via holes on the driving circuit substrate is located at the position of the pixel defining layer on the driving circuit substrate.
  • the interior of the orthographic projection is located at the position of the pixel defining layer on the driving circuit substrate.
  • the orthographic projections of the plurality of first via holes on the driving circuit substrate are respectively located at the orthographic projections of the plurality of first openings on the driving circuit substrate. Projection interior.
  • the display substrate provided in at least one embodiment of the present disclosure further includes a plurality of first connection electrodes, wherein the plurality of first connection electrodes are respectively arranged in the plurality of first via holes, so that the plurality of first connection electrodes
  • the first ends of the first connection electrodes are respectively electrically connected to the output ends of the plurality of pixel driving circuits, and the second ends of the plurality of first connection electrodes are respectively electrically connected to the plurality of first electrodes;
  • a second end of a connecting electrode protrudes from a surface of the protective insulating layer away from the driving circuit substrate.
  • the orthographic projections of the plurality of first connection electrodes on the driving circuit substrate are respectively located at the orthographic projections of the plurality of first openings on the driving circuit substrate. Projection interior.
  • each of the plurality of sub-pixels includes two first connection electrodes, and in a plane parallel to the surface of the driving circuit substrate, the two first The connecting electrodes are arranged along the first direction.
  • each of the plurality of first electrodes further includes a third sub-electrode layer, and the third sub-electrode layer is disposed close to the second sub-electrode layer.
  • One side of the driving circuit substrate is connected to the first connection electrode, and the first sub-electrode layer is disposed on a side of the second sub-electrode layer away from the driving circuit substrate.
  • the material of the third sub-electrode includes titanium, and the material of the first connecting electrode includes tungsten.
  • the material of the second sub-electrode layer includes aluminum or silver.
  • the material of the first sub-electrode layer includes a transparent metal oxide.
  • the material of the transition layer includes silicon oxide, silicon nitride or silicon oxynitride.
  • the display substrate provided in at least one embodiment of the present disclosure further includes a plurality of second connection electrodes, wherein the plurality of second connection electrodes are respectively disposed in the first openings of the transition layer of the plurality of first electrodes, so that the first ends of the plurality of second connection electrodes are respectively connected to the first sub-electrode layers of the plurality of first electrodes, and the second ends of the plurality of second connection electrodes are respectively connected to the plurality of first sub-electrode layers.
  • the second sub-electrodes of one electrode are electrically connected.
  • the first ends of the plurality of second connection electrodes respectively protrude from the first sub-electrode layer of the plurality of first electrodes away from the driving circuit substrate. surface.
  • the thickness of the second connection electrode is greater than the thickness of the third sub-electrode layer.
  • the second connection electrode covers the first opening and extends to a surface of the multi-transition layer away from the driving circuit substrate.
  • the pixel defining layer includes a recessed structure at the position of the first opening.
  • the material of the second connection electrode includes titanium.
  • the planar shape of the first opening is V-shaped.
  • the V-shaped opening faces toward the center of the first electrode.
  • the planar shape of the plurality of first electrodes is polygonal, and the planar shape of the plurality of sub-pixel openings is circular or elliptical.
  • At least one embodiment of the present disclosure further provides a display device, which includes the display substrate provided by the embodiment of the present disclosure.
  • 1A is a schematic cross-sectional view of a silicon-based display substrate
  • 1B is another schematic cross-sectional view of a silicon-based display substrate
  • FIG. 2 is a schematic partial cross-sectional view of another silicon-based display substrate
  • FIG. 3 is a schematic plan view of an anode of a sub-pixel in a silicon-based display substrate
  • FIG. 4 is a schematic plan view of an anode and a sub-pixel opening of a sub-pixel in a silicon-based display substrate;
  • FIG. 5 is a schematic plan view of a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 6 is a schematic partial cross-sectional view of the display substrate shown in FIG. 5 along line M-M;
  • FIG. 7 is a schematic plan view of a first electrode and a sub-pixel opening of a sub-pixel in a display substrate provided by at least one embodiment of the present disclosure
  • FIG. 8 is a scanning electron micrograph of a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 9 is another scanning electron microscope image of a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 10 is another schematic cross-sectional view of the display substrate shown in FIG. 5 along line M-M;
  • FIG. 11 is another schematic cross-sectional view of the display substrate shown in FIG. 5 along line M-M;
  • Fig. 12 is another scanning electron micrograph of the display substrate provided by at least one embodiment of the present disclosure.
  • 13A-13D are schematic plan views of multiple functional layers of the first electrode in the display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 13E is a schematic plan view of a pixel defining layer in a display substrate provided by at least one embodiment of the present disclosure.
  • FIG. 1A shows a schematic cross-sectional view of a silicon-based display substrate.
  • the silicon-based display substrate includes a driving circuit substrate 10 and a plurality of light emitting devices 50 and other structures.
  • the silicon-based display substrate includes a plurality of sub-pixels arranged in an array, each sub-pixel includes a light emitting device 50 and a driving circuit 20 disposed in the driving circuit substrate 10, and the driving circuit 20 is configured to drive the light emitting device 50 to emit light.
  • the light emitting device 50 includes an anode 51 , a luminescent material layer 52 and a cathode 53 , and the anode 21 is connected to the driving circuit 20 through a through hole in the insulating layer 30 .
  • a pixel defining layer 40 is disposed on the anode 51 , and the pixel defining layer 40 has a plurality of sub-pixel openings, and each sub-pixel opening exposes the anode 51 of one light emitting device 50 , thereby defining the light emitting area of the light emitting device 50 .
  • FIG. 1B shows another schematic cross-sectional view of a silicon-based display substrate.
  • the driving circuit 20 includes structures such as a driving transistor T1 and a connecting electrode 70 .
  • the driving transistor T1 includes a source electrode S, a drain electrode D, and a semiconductor layer M between the source electrode S and the drain electrode D, and one of the source electrode S and the drain electrode D (here, the drain electrode D) is connected through the connection electrode 70 is electrically connected to the anode 51.
  • the semiconductor layer M is a channel region formed between the source electrode S and the drain electrode D, for example.
  • the driving transistor T1 further includes a gate electrode G, and the gate electrode G, the source electrode S and the drain electrode D respectively correspond to three electrode connection parts.
  • the gate electrode G is electrically connected to the gate electrode connection portion 10g
  • the source electrode S is electrically connected to the source electrode connection portion 10s
  • the drain electrode D is electrically connected to the drain electrode connection portion 10d.
  • the drain electrode D of the drive transistor T1 is electrically connected to the connection electrode 70 through the drain electrode connection portion 10d
  • the gate electrode G and the source electrode S are electrically connected to the scanning line and the power supply line through the gate electrode connection portion 10g and the source electrode connection portion 10s, respectively.
  • the scan line provides an on signal
  • the drive transistor T1 is in the on state
  • the electrical signal provided by the power line can be transmitted to the anode 51 through the drain electrode D of the drive transistor T1 , the drain electrode connection part 102d and the connection electrode 70 . Due to the voltage difference formed between the anode 51 and the cathode 53, an electric field is formed between the two, and the luminescent material layer 52 emits light under the action of the electric field.
  • the silicon-based display substrate may further include an encapsulation layer 60 disposed on the light emitting device 50 and a color filter 70 disposed on the encapsulation layer 60 .
  • the encapsulation layer 60 can encapsulate and protect the light emitting device 50, for example, can also play a role of planarization to provide a flat surface.
  • the light-emitting device 50 of each sub-pixel can emit white light.
  • the colors of the color filters 70 arranged on the light-emitting device 50 of each sub-pixel are different, such as red, green and blue, so as to realize full-color display.
  • the light-emitting device 50 of each sub-pixel can emit light of different colors, such as red, green and blue, etc., at this time, the color of the color filter 70 arranged on the light-emitting device 50 of each sub-pixel is consistent with the light emitting
  • the colors of the light emitted by the devices 50 are the same, so that the color purity of the light emitted by the light emitting device 50 can be improved.
  • the anode 51 since the anode 51 has a multi-layer stacked structure and its thickness is relatively large, the anode 51 and the pixel defining layer 40 as a whole will present a structure as shown in FIG. 2 , as shown in FIG. 2 ,
  • the anode 51 has a multi-layer laminate structure, and there is a connection structure 51A in the multi-layer laminate structure, which is used to connect the functional layers arranged at intervals in the multi-layer laminate structure.
  • the sub-pixel opening 41 of the pixel defining layer 40 is located in the middle of the anode 51 , so that the middle of the anode 51 forms the light-emitting area of the light-emitting device 50 . At this time, the sub-pixel opening 41 is centrally symmetrical to the anode 51 as a whole.
  • FIG. 3 shows a schematic plan view of the anode 51 of a sub-pixel
  • FIG. 4 shows a schematic plan view of the sub-pixel opening 41 and the anode 51 of a sub-pixel.
  • the sub-pixel of the pixel defining layer 40 The opening 41 is located in the middle of the anode 51 , and the sub-pixel opening 41 is centrally symmetrical to the anode 51 as a whole.
  • connection structure 51A when the anode 51 reflects the light emitted by the luminescent material layer 52, the connection structure 51A will refract the light, and the refracted light can exit from the sub-pixel opening 41, and due to the refracted The propagation direction of the light is different from the propagation direction of other emitted light, thus causing uneven light emission from the sub-pixels, thereby affecting the display effect of the display substrate.
  • At least one embodiment of the present disclosure provides a display substrate.
  • the display substrate has a plurality of sub-pixels arranged in an array, and includes a driving circuit substrate, a plurality of first electrodes, and a pixel defining layer.
  • the driving circuit substrate includes a plurality of sub-pixels.
  • the outgoing light of the plurality of sub-pixels of the display substrate is more uniform, so that the display substrate has a better display effect.
  • FIG. 5 shows a schematic plan view of the display substrate
  • FIG. 6 shows a partial cross-sectional view of the display substrate along line M-M in FIG. 5 .
  • the display substrate has a display area AA and a peripheral area NA surrounding the display area AA.
  • the display substrate also has a plurality of sub-pixels P arranged in an array, and the plurality of sub-pixels P are arranged in the display area AA.
  • the display substrate includes a driving circuit substrate 110, a plurality of first electrodes 150, and a pixel defining layer 140.
  • the driving circuit substrate 10 includes a plurality of pixel driving circuits 120 for a plurality of sub-pixels P and covers a plurality of pixel driving circuits.
  • the protective insulating layer 130 of the circuit 120, the protective insulating layer 130 includes a plurality of first via holes 131 exposing the output terminals 121 of the plurality of pixel driving circuits 120, and a plurality of first electrodes 150 are arranged on the driving circuit substrate 110, respectively through multiple The first via holes 131 are electrically connected to the output terminals 121 of the plurality of pixel driving circuits 120 .
  • each first electrode 150 includes a first sub-electrode layer 151, a second sub-electrode layer 152, and a transition between the first sub-electrode layer 151 and the second sub-electrode layer 152 that are stacked.
  • layer 153 the transition layer 153 has a first opening 153A, and the first sub-electrode layer 151 and the second sub-electrode layer 152 are electrically connected through the first opening 153A.
  • each sub-pixel P includes a pixel driving circuit 120 and a light emitting device, and the pixel driving circuit 120 is configured to drive the light emitting device to emit light.
  • the pixel driving circuit 120 may include structures such as driving transistors and connecting electrodes. For details, refer to FIG. 1B and its related descriptions, which will not be repeated here.
  • a light emitting device may include an anode, a cathode, and a layer of light emitting material therebetween.
  • the first electrode 150 can be used as the anode of the light emitting device, and at this time, the second sub-electrode layer 152 can be used as a reflective electrode for reflecting light emitted by the light emitting material layer formed thereon, so as to improve the light extraction rate of the light emitting device.
  • the material of the second sub-electrode layer 152 may include metal materials or alloy materials with high reflectivity such as aluminum or silver.
  • the first sub-electrode layer 151 has a higher work function and light transmittance, and the material of the first sub-electrode layer 151 may include transparent metal oxides, such as indium tin oxide (ITO), indium zinc oxide (IZO), Gallium Zinc Oxide (GZO), etc.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • GZO Gallium Zinc Oxide
  • the transition layer 153 can improve the adhesive force between the first sub-electrode layer 151 and the second sub-electrode layer 152, avoiding the direct connection between the first sub-electrode layer 151 and the second sub-electrode layer 152 to cause two The latter are easy to separate, thereby improving the structural stability of the first electrode.
  • the material of the transition layer 153 may include an insulating material, such as an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.
  • the pixel defining layer 140 is disposed on a side of the plurality of first electrodes 150 away from the driving circuit substrate 110 , and includes a plurality of sub-pixel openings 141 respectively exposing the plurality of first electrodes 150 .
  • the pixel defining layer 140 may use organic insulating materials such as polyimide.
  • the orthographic projection of the first opening 153A of the transition layer 153 of at least one of the plurality of first electrodes 150 on the driving circuit substrate 10 is located inside the orthographic projection of the pixel defining layer 140 on the driving circuit substrate 110 .
  • the orthographic projection of the first opening 153A of the transition layer 153 of each first electrode 150 on the driving circuit substrate 10 is located inside the orthographic projection of the pixel defining layer 140 on the driving circuit substrate 110 .
  • the pixel defining layer 140 can block the first opening 153A, preventing the light emitted by the luminescent material layer reflected by the second sub-electrode layer 152 from being refracted by the material filled in the first opening 153A and then exiting the sub-pixel opening 141 to affect the Light uniformity of light emitting devices.
  • the light emitted by the luminescent material layer reflected by the second sub-electrode layer 152 can be evenly emitted from the sub-pixel opening 141, thereby improving the light uniformity of the display device, and further improving The light emission uniformity of the entire display panel improves the display effect of the display panel.
  • FIG. 7 shows a schematic plan view of a first electrode of a sub-pixel and a sub-pixel opening.
  • the opening 141 as a whole is symmetrical in a first direction (for example, the horizontal direction in FIG. 7 ), and asymmetric in a second direction (for example, the vertical direction in FIG. 7 ), and the first direction is perpendicular to the second direction.
  • the sub-pixel opening 141 does not expose the first opening 153A, that is, the pixel defining layer 140 can fully cover the first opening 153A.
  • the orthographic projection of at least one of the plurality of first via holes 131 on the driving circuit substrate 110 is located inside the orthographic projection of the pixel defining layer 140 on the driving circuit substrate 110 .
  • the orthographic projection of each first via hole 131 on the driving circuit substrate 110 is located inside the orthographic projection of the pixel defining layer 140 on the driving circuit substrate 110 .
  • the display substrate further includes a plurality of first connection electrodes 160, and the plurality of first connection electrodes 160 are respectively arranged in the plurality of first via holes 131, so that the plurality of first connection electrodes 160
  • the first terminals 161 of a connection electrode 160 are respectively electrically connected to the output terminals 121 of the plurality of pixel driving circuits 120
  • the second terminals 162 of the plurality of first connection electrodes 160 are respectively electrically connected to the plurality of first electrodes 150 .
  • the second end 162 of the first connection electrode 160 protrudes from the surface of the protective insulating layer 130 away from the driving circuit substrate 110 (ie, the upper surface of the protective insulating layer 130 in the figure), thereby facilitating the connection between the first connecting electrode 160 and the first Robust connection of electrodes 150.
  • the first electrode 150 formed thereon will also have a corresponding shape change, for example, the first electrode 150 of the first electrode 150
  • the surface of the second sub-electrode layer 152 close to the driving circuit substrate 110 has a recessed portion, so when the recessed portion reflects the light emitted by the luminescent material layer, uneven reflected light may also occur, affecting the display effect of the display substrate.
  • the pixel defining layer 140 can also block the first via hole 131, that is, block the first connecting electrode 160, so as to block the light reflected by the concave part of the second sub-electrode layer 152, and avoid the light caused by the second sub-electrode layer 152
  • the protruding of a connection electrode 160 causes the non-uniformity of light reflected by the second sub-electrode layer 152 .
  • the orthographic projections of the plurality of first connection electrodes 160 on the driving circuit substrate 110 are respectively located inside the orthographic projections of the plurality of first openings 153A on the driving circuit substrate 110 .
  • the structures in the first electrode 150 that affect the uniformity of light output from the light-emitting device are all concentrated at substantially the same position, thereby reducing the space occupied by the structures in the first electrode 150 that affect the uniformity of light output from the light-emitting device to ensure that the sub-pixel opening 141 may also have a size sufficient to form a light emitting area of a light emitting device.
  • each first electrode 150 may correspond to one or more first via holes 131, thereby also having one or more first connecting electrodes 160, and two first via holes 160 are shown in FIG. 6 and FIG.
  • One via hole 131 and two first connection electrodes 160 are taken as examples.
  • the orthographic projection of each first via hole 131 on the driving circuit substrate 110 is respectively located inside the orthographic projection of the plurality of first openings 153A on the driving circuit substrate 110 .
  • the orthographic projection of the first connection electrode 160 in a via hole 131 on the driving circuit substrate 110 is also located inside the orthographic projection of the plurality of first openings 153A on the driving circuit substrate 110 .
  • the pixel defining layer 140 can fully cover the first via hole 131 and the first connection electrode 160 at substantially the same position.
  • two first connection electrodes 160 are arranged in a first direction (vertical direction in the drawing).
  • the first direction is a column direction or a row direction of sub-pixels in the display substrate.
  • the minimum distance L between the sub-pixel opening 141 and the first opening 153A can be 0.1 ⁇ m-0.3 ⁇ m, such as 0.15 ⁇ m, 0.2 ⁇ m or 0.25 ⁇ m, etc., to ensure that the uneven The light of the sub-pixels is sufficiently blocked to prevent the light refracted at a large angle from passing through the sub-pixel openings 141 .
  • each first electrode 150 may further include a third sub-electrode layer 155, and the third sub-electrode layer 155 is disposed on the second sub-electrode layer 152 close to the driving circuit substrate 110. and connected to the first connection electrode 160 , the first sub-electrode layer 151 is disposed on the side of the second sub-electrode layer 152 away from the driving circuit substrate 110 .
  • the third sub-electrode 155 can be used as a connection electrode to realize an effective connection between the first electrode 150 and the first connection electrode 160 , and can reduce the contact resistance between the first electrode 150 and the first connection electrode 160 .
  • the material of the third sub-electrode 155 includes titanium, and the material of the first connection electrode 160 includes tungsten. The contact resistance between titanium and tungsten is small, so using the above materials to form the third sub-electrode 155 and the first connection electrode 160 can improve the overall electrical connection effect and signal transmission effect between the first electrode 150 and the pixel driving circuit 120 .
  • the display substrate may further include a plurality of second connection electrodes 154, and the plurality of second connection electrodes 154 are respectively arranged on the first transition layers 153 of the plurality of first electrodes 150.
  • the first ends 154A of the plurality of second connection electrodes 154 are respectively connected to the first sub-electrode layers 151 of the plurality of first electrodes
  • the second ends 154B of the plurality of second connection electrodes 154 are respectively connected to the plurality of The second sub-electrode 152 of the first electrode is electrically connected.
  • the first sub-electrode layer 151 and the second sub-electrode 152 are electrically connected through the second connection electrode 154 .
  • the first end 154A of the second connection electrode 154 protrudes from the surface of the first sub-electrode layer 151 away from the driving circuit substrate 110, thereby facilitating the connection between the second connection electrode 154 and the first sub-electrode layer 151. Strong connection.
  • the material of the second connection electrode 154 may include metal materials such as titanium.
  • the contact resistance between the second connection electrode 154 and the first sub-electrode layer 151 and the second sub-electrode 152 is small, which is beneficial to improve the effect of electrical connection and signal transmission.
  • the planar shape of the first opening 153A may be V-shaped.
  • the V-shaped opening faces toward the center of the first electrode 150 . Therefore, the first opening 153A can avoid space for the arrangement of the sub-pixel opening 141 while maintaining a relatively large opening area.
  • the planar shape of the plurality of first electrodes 150 may be polygonal, such as pentagonal or hexagonal (in the case shown in the figure), etc., and the plurality of sub-pixel openings 141
  • the planar shape may be a circle (in the case shown in the figure), an ellipse, or the like.
  • the V-shaped opening angle a can be 110°-160°, such as 120°, 150°, etc., so that the first opening 153A can fully occupy the peripheral space of the sub-pixel opening 141 , improve space utilization.
  • FIG. 8 and FIG. 9 respectively show the scanning electron microscope schematic diagrams of the multiple first electrodes 150 and the multiple sub-pixel openings 141.
  • the multiple first electrodes 150 have six polygonal, and two adjacent rows of first electrodes 150 are staggered, so that the shapes of adjacent two rows of first electrodes 150 are complementary to make full use of the arrangement space, so that in the same arrangement space, the first electrodes 150 The greater the number, the greater the resolution of the formed display substrate.
  • the pixel defining layer 140 blocks the second connection electrode 154.
  • the surface of the pixel defining layer 140 also has a protrusion 140A correspondingly, but since the sub-pixel opening 141 does not expose the second connection electrode 154, the light emitted by the light-emitting device in the sub-pixel opening 141 can still have high uniformity .
  • the thickness of the second connection electrode 154 is greater than the thickness of the third sub-electrode layer 155 .
  • the thickness of the third sub-electrode layer 155 can be 5nm-15nm, such as 10nm
  • the thickness of the second sub-electrode layer 152 can be 90nm-110nm, such as 100nm
  • the thickness of the transition layer 153 can be 25nm-10nm.
  • the thickness of the second connection electrode 154 can be 15nm-30nm, such as 20nm, at this time, the thickness of the second connection electrode 154 is greater than the thickness of the transition layer 153, thus the first electrode 150 is on the second connection electrode 154 The position is reflected as a prominent form.
  • the second connection electrode 154 covers the first opening 153A and extends to the surface of the transition layer 153 away from the driving circuit substrate 110 .
  • the pixel defining layer 140 includes a recessed structure at the position of the first opening 153A.
  • FIG. 12 shows a scanning electron microscope image of the display substrate shown in FIG. 11. As shown in FIG. The surface is concave, thereby forming the form of pits.
  • the thickness of the third sub-electrode layer 155 can be 5nm-15nm, such as 10nm
  • the thickness of the second sub-electrode layer 152 can be 90nm-110nm, such as 100nm
  • transition layer The thickness of 153 can be 25nm-35nm, such as 30nm
  • the thickness of the second connection electrode 154 can be 5nm-15nm, such as 10nm
  • the thickness of the second connection electrode 154 is smaller than the thickness of the transition layer 153, thus the first electrode 150 is embodied in the form of a pit at the position of the second connection electrode 154 .
  • FIGS. 13A-13D show schematic plan views of multiple functional layers of the first electrode;
  • FIG. 13E shows a schematic plan view of a pixel defining layer.
  • FIG. 13A shows a schematic plan view of the second sub-electrode layer and the third sub-electrode layer.
  • the second sub-electrode layer 152 and the third sub-electrode layer 155 have the same planar shape, both hexagon.
  • the distance between the second sub-electrode layer 152 (or the third sub-electrode layer 155 ) of adjacent sub-pixels is 0.9 microns.
  • FIG. 13B shows a schematic plan view of the transition layer. For example, as shown in FIG.
  • the transition layer 153 has a first opening 153A, and the first opening 153A is V-shaped.
  • the first opening 153A is about 0.4252 microns, and at the top of the V-shape, the width of the first opening 153A is about 0.402 microns.
  • FIG. 13C shows a schematic plan view of the second connection electrode.
  • the second connection electrode 154 is correspondingly V-shaped.
  • the width of the second connection electrode 154 is The width of the second connecting electrode 154 is about 0.6265 microns, and at the top of the V shape, the width is about 0.722 microns.
  • the second connection electrode 154 covers the first opening 153A and extends to the surface of the transition layer 153 away from the driving circuit substrate 110 .
  • FIG. 13D shows a schematic plan view of the first sub-electrode layer.
  • the planar shape of the first sub-electrode layer 151 is hexagonal.
  • the distance between the first sub-electrode layers 151 of adjacent sub-pixels is 0.7 microns.
  • FIG. 13E shows a schematic plan view of a pixel defining layer.
  • the pixel defining layer 140 has a sub-pixel opening 141 , and the shape of the sub-pixel opening 141 is circular.
  • the pitch of the sub-pixel openings 141 of adjacent sub-pixels is 1.1 ⁇ m.
  • FIG. 10 shows another schematic cross-sectional view of the display substrate in FIG. 5 along line M-M.
  • structures such as a luminescent material layer 170 and a second electrode layer 180 are formed on the first electrode 150.
  • the first electrode 150, the luminescent material layer 170 and the second electrode layer 180 together form a light emitting device.
  • the second electrode The layer can be used as the cathode of the light-emitting device, for example, metal materials or alloy materials such as lithium, aluminum, magnesium, and silver can be used.
  • the luminescent material layer 170 can include a luminescent layer and an auxiliary luminescent layer that assists the luminescent layer to emit light.
  • the auxiliary luminescent layer can be a hole injection layer, a hole transport layer, an electron blocking layer, an electron injection layer, an electron transport layer, and a hole blocking layer.
  • the embodiment of the present disclosure does not limit the specific form of the luminescent material layer 170 .
  • an encapsulation layer 190 can also be formed on the second electrode layer, and the encapsulation layer 190 can be a composite encapsulation layer composed of an organic encapsulation layer and an inorganic encapsulation layer.
  • the organic encapsulation layer can be made of organic materials such as polyimide and resin, and the inorganic encapsulation layer Inorganic materials such as silicon oxide, silicon nitride, or silicon oxynitride can be used.
  • the color filter layer 200 may include a plurality of color filters, and each color filter is disposed corresponding to the sub-pixel opening 141 to filter light emitted from the sub-pixel opening 141 .
  • the lens layer 210 can include a plurality of lenses 211, and each lens 211 can be arranged corresponding to the sub-pixel opening 141.
  • the lens 211 can be a convex lens, and the plane shape is a circle or a square, etc.
  • the sub-pixel opening 141 The planar shape (for example, circular shape) can be matched with the lens 211 to improve the light output brightness of the sub-pixel.
  • the lens layer 210 may also include other structures such as an adhesive layer and a cover plate.
  • other structures such as an adhesive layer and a cover plate.
  • the driving circuit substrate 10 can be formed using a silicon-based substrate and semiconductor manufacturing technology, for example, it can be completed in a wafer factory. Therefore, the display substrate provided in the embodiments of the present disclosure can The substrate 10 is formed by forming structures such as the first electrode, the luminescent material layer, the second electrode layer and the encapsulation layer, and the preparation process is simple. Moreover, since the manufacturing process of the silicon-based driving circuit substrate is mature and its performance is stable, it is suitable for manufacturing highly integrated micro-display devices. Therefore, the display substrate provided by the embodiment of the present disclosure may be a silicon-based micro organic light emitting diode display substrate.
  • At least one embodiment of the present disclosure further provides a display device, which includes the display substrate provided by the embodiment of the present disclosure.
  • the display device can be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, a VR display device, and the like.

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Abstract

一种显示基板以及显示装置，该显示基板包括驱动电路基板(110)、多个第一电极(150)以及像素界定层(140)，驱动电路基板(110)包括多个像素驱动电路(120)以及保护绝缘层(130)，保护绝缘层(130)包括暴露多个像素驱动电路(120)的输出端(121)的多个第一过孔(131)，多个第一电极(150)分别通过多个第一过孔(131)与多个像素驱动电路(120)的输出端(121)电连接，多个第一电极(150)的每个包括叠层设置的第一子电极层(151)、第二子电极层(152)以及第一子电极层(151)和第二子电极层(152)之间的过渡层(153)，过渡层(153)中具有第一开口(153A)，第一子电极层(151)和第二子电极层(152)通过第一开口(153A)电连接；像素界定层(140)包括分别暴露多个第一电极(150)的多个子像素开口(141)；多个第一电极(150)中的至少一个的过渡层(153)的第一开口(153A)在驱动电路基板(110)上的正投影位于像素界定层(140)在驱动电路基板(110)上的正投影的内部。该显示基板具有更好的出光均匀性，从而具有更好的显示效果。

Description

显示基板以及显示装置 技术领域
本公开的实施例涉及一种显示基板以及显示装置。
背景技术
硅基微显示有机发光显示面板具有微型化和高像素密度(Pixel Per Inch,简称PPI)等优势，逐步成为显示领域的关注焦点。硅基微显示有机发光显示面板例如可以用于虚拟现实(Virtual Reality,简称VR)技术和增强现实(Augmented Reality，简称AR)技术中，可以实现优异的显示效果。
发明内容
本公开至少一实施例提供一种显示基板，该显示基板具有阵列排布的多个子像素，且包括驱动电路基板、多个第一电极以及像素界定层，驱动电路基板包括用于所述多个子像素的多个像素驱动电路以及覆盖所述多个像素驱动电路的保护绝缘层，其中，所述保护绝缘层包括暴露所述多个像素驱动电路的输出端的多个第一过孔，多个第一电极设置在所述驱动电路基板上，分别通过所述多个第一过孔与所述多个像素驱动电路的输出端电连接，其中，所述多个第一电极的每个包括叠层设置的第一子电极层、第二子电极层以及所述第一子电极层和所述第二子电极层之间的过渡层，所述过渡层中具有第一开口，所述第一子电极层和所述第二子电极层通过所述第一开口电连接；像素界定层设置在所述多个第一电极的远离所述驱动电路基板的一侧，包括分别暴露所述多个第一电极的多个子像素开口；其中，所述多个第一电极中的至少一个的过渡层的第一开口在所述驱动电路基板上的正投影位于所述像素界定层在所述驱动电路基板上的正投影的内部。
例如，本公开至少一实施例提供的显示基板中，对于对应设置的第一电极和子像素开口，所述第一电极和所述子像素开口的整体在第一方向上对称，在第二方向上非对称，其中，所述第一方向垂直于所述第二方向。
例如，本公开至少一实施例提供的显示基板中，所述多个第一过孔中的至少一个在所述驱动电路基板上的正投影位于所述像素界定层在所述驱动电路基板上的正投影的内部。
例如，本公开至少一实施例提供的显示基板中，所述多个第一过孔在所述驱动电路基板上的正投影分别位于所述多个第一开口在所述驱动电路基板上的正投影内部。
例如，本公开至少一实施例提供的显示基板还包括多个第一连接电极，其中，所述多个第一连接电极分别设置在所述多个第一过孔中，以使所述多个第一连接电极的第一端分别与所述多个像素驱动电路的输出端电连接，所述多个第一连接电极的第二端分别与所述多个第一电极电连接；所述第一连接电极的第二端突出于所述保护绝缘层的远离所述驱动电路基板的表面。
例如，本公开至少一实施例提供的显示基板中，所述多个第一连接电极在所述驱动电路基板上的正投影分别位于所述多个第一开口在所述驱动电路基板上的正投影内部。
例如，本公开至少一实施例提供的显示基板中，所述多个子像素的每个包括两个第一连接电极，在平行于所述驱动电路基板的表面的平面中，所述两个第一连接电极沿第一方向排列。
例如，本公开至少一实施例提供的显示基板中，所述多个第一电极的每个还包括第三子电极层，所述第三子电极层设置在所述第二子电极层的靠近所述驱动电路基板的一侧，并与所述第一连接电极连接，所述第一子电极层设置在所述第二子电极层的远离所述驱动电路基板的一侧。
例如，本公开至少一实施例提供的显示基板中，所述第三子电极的材料包括钛，所述第一连接电极的材料包括钨。
例如，本公开至少一实施例提供的显示基板中，所述第二子电极层的材料包括铝或银。
例如，本公开至少一实施例提供的显示基板中，所述第一子电极层的材料包括透明金属氧化物。
例如，本公开至少一实施例提供的显示基板中，所述过渡层的材料包括氧化硅、氮化硅或者氮氧化硅。
例如，本公开至少一实施例提供的显示基板还包括多个第二连接电极，其中，所述多个第二连接电极分别设置在所述多个第一电极的过渡层的第一开口中，以使所述多个第二连接电极的第一端分别与所述多个第一电极的第一子电极层连接，所述多个第二连接电极的第二端分别与所述多个第一电极的第二子电极电连接。
例如，本公开至少一实施例提供的显示基板中，所述多个第二连接电极的第一端分别突出于所述多个第一电极的第一子电极层的远离所述驱动电路基板的表面。
例如，本公开至少一实施例提供的显示基板中，所述第二连接电极的厚度大于所述第三子电极层的厚度。
例如，本公开至少一实施例提供的显示基板中，所述第二连接电极覆盖所述第一开口并延伸至所述多渡层的远离所述驱动电路基板的表面。
例如，本公开至少一实施例提供的显示基板中，所述像素界定层在所述第一开口位置处包括凹陷结构。
例如，本公开至少一实施例提供的显示基板中，所述第二连接电极的材料包括钛。
例如，本公开至少一实施例提供的显示基板中，所述第一开口的平面形状呈V字形。
例如，本公开至少一实施例提供的显示基板中，所述V字形的开口朝向所述第一电极的中心。
例如，本公开至少一实施例提供的显示基板中，所述多个第一电极的平面形状呈多边形，所述多个子像素开口的平面形状呈圆形或者椭圆形。
本公开至少一实施例还提供一种显示装置，该显示装置包括本公开实施例提供的显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为一种硅基显示基板的截面示意图；
图1B为一种硅基显示基板的另一截面示意图；
图2为另一种硅基显示基板的部分截面示意图；
图3为一种硅基显示基板中一个子像素的阳极的平面示意图；
图4为一种硅基显示基板中一个子像素的阳极与子像素开口的平面示意图；
图5为本公开至少一实施例提供的显示基板的平面示意图；
图6为图5所示的显示基板沿M-M线的部分截面示意图；
图7为本公开至少一实施例提供的显示基板中一个子像素的第一电极与子像素开口的平面示意图；
图8为本公开至少一实施例提供的显示基板的扫描电镜图；
图9为本公开至少一实施例提供的显示基板的另一扫描电镜图；
图10为图5所示的显示基板沿M-M线的另一截面示意图；
图11为图5所示的显示基板沿M-M线的再一截面示意图；
图12为本公开至少一实施例提供的显示基板的再一扫描电镜图；
图13A-图13D为本公开至少一实施例提供的显示基板中第一电极的多个功能层的平面示意图；以及
图13E为本公开至少一实施例提供的显示基板中像素界定层的平面示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他 元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
微型OLED属于一种硅基显示器件。由于硅基器件优良的电学特性和极细微的器件尺寸，有利于实现高度集成化。例如，图1A示出了一种硅基显示基板的截面示意图，如图1A所示，硅基显示基板包括驱动电路基板10以及多个发光器件50等结构。
例如，硅基显示基板包括阵列排布的多个子像素，每个子像素包括发光器件50以及设置在驱动电路基板10中的驱动电路20，驱动电路20配置为驱动发光器件50发光。发光器件50包括阳极51、发光材料层52以及阴极53，阳极21通过绝缘层30中的通孔与驱动电路20连接。阳极51上设置有像素界定层40，像素界定层40具有多个子像素开口，每个子像素开口暴露一个发光器件50的阳极51，从而限定该发光器件50的发光区域。
例如，图1B示出了硅基显示基板的另一截面示意图。在一些实施例中，如图1B所示，驱动电路20包括驱动晶体管T1和连接电极70等结构。驱动晶体管T1包括源电极S、漏电极D和半导体层M，半导体层M位于源电极S和漏电极D之间，源电极S和漏电极D之一(此处为漏电极D)通过连接电极70与阳极51电连接。半导体层M例如为源电极S和漏电极D之间形成的沟道区。
例如，如图1B所示，驱动晶体管T1还包括栅电极G，栅电极G、源电极S和漏电极D分别对应三个电极连接部。例如，栅电极G电连接于栅电极连接部10g，源电极S电连接于源电极连接部10s，漏电极D电连接于漏电极连接部10d。例如，驱动晶体管T1的漏电极D通过漏电极连接部10d电连接于连接电极70，栅电极G和源电极S分别通过栅电极连接部10g和源电极连接部10s电连接于扫描线和电源线。在扫描线提供开启信号，驱动晶体管T1处于开启状态，由电源线提供的电信号可经过驱动晶体管T1的漏电极D、漏电极连接部102d和连接电极70传输到阳极51。由于阳极51与阴极53之间形成电压差，在二者之间形成电场，发光材料层52在该电场作用下发光。
例如，如图1A和图1B所示，硅基显示基板还可以包括设置在发光器 件50上的封装层60以及设置在封装层60上的彩色滤光片70。封装层60可以对发光器件50进行封装与保护，例如还可以起到平坦化的作用，以提供一个平坦的表面。例如，每个子像素的发光器件50可以发出白光，此时，每个子像素的发光器件50上设置的彩色滤光片70的颜色不同，例如为红色、绿色和蓝色等，从而实现全彩显示；或者，每个子像素的发光器件50可以分别发出不同颜色的光，例如红色、绿色和蓝色等，此时，每个子像素的发光器件50上设置的彩色滤光片70的颜色与该发光器件50发出的光的颜色相同，从而可以提高该发光器件50的发出的光的色纯度。
例如，在本公开的一些实施例中，由于阳极51具有多层叠层结构，其厚度较大，因此阳极51和像素界定层40整体会呈现如图2所示的结构，如图2所示，阳极51具有多层叠层结构，且在多层叠层结构中存在连接结构51A，用于连接在多层叠层结构中间隔设置的功能层。例如，像素界定层40的子像素开口41处于阳极51的中间部位，使得阳极51的中间部位形成为发光器件50的发光区域，此时，子像素开口41与阳极51的整体呈中心对称。
例如，图3示出了一个子像素的阳极51的平面示意图，图4示出了一个子像素的子像素开口41以及阳极51的平面示意图，如图4所示，像素界定层40的子像素开口41处于阳极51的中间部位，子像素开口41与阳极51的整体呈中心对称。此时，结合图2和图4，在阳极51反射发光材料层52发出的光时，连接结构51A会对光线产生折射作用，被折射的光可以从子像素开口41出射，并且由于被折射的光的传播方向与其他出射光的传播方向不同，因此会导致子像素出光不均匀，进而影响显示基板的显示效果。
本公开至少一实施例提供一种显示基板，该显示基板具有阵列排布的多个子像素，且包括驱动电路基板、多个第一电极以及像素界定层，驱动电路基板包括用于多个子像素的多个像素驱动电路以及覆盖多个像素驱动电路的保护绝缘层，保护绝缘层包括暴露多个像素驱动电路的输出端的多个第一过孔，多个第一电极设置在驱动电路基板上，分别通过多个第一过孔与多个像素驱动电路的输出端电连接，多个第一电极的每个包括叠层设置的第一子电极层、第二子电极层以及第一子电极层和第二子电极层之间的过渡层，过渡层中具有第一开口，第一子电极层和第二子电极层通过第一开口电连接；像素界定层设置在多个第一电极的 远离驱动电路基板的一侧，包括分别暴露多个第一电极的多个子像素开口；其中，多个第一电极中的至少一个的过渡层的第一开口在驱动电路基板上的正投影位于像素界定层在驱动电路基板上的正投影的内部。
本公开至少一实施例提供的上述显示基板的多个子像素的出射光更均匀，使得显示基板具有更好的显示效果。
下面，通过几个具体的实施例来详细介绍本公开实施例提供的显示基板。
本公开至少一实施例提供一种显示基板，图5示出了该显示基板的平面示意图，图6示出了图5中的显示基板沿M-M线的部分截面示意图。
如图5和图6所示，该显示基板具有显示区域AA以及围绕显示区域AA的周边区域NA，显示基板还具有阵列排布的多个子像素P，多个子像素P设置在显示区域AA中。
如图6所示，显示基板包括驱动电路基板110、多个第一电极150以及像素界定层140，驱动电路基板10包括用于多个子像素P的多个像素驱动电路120以及覆盖多个像素驱动电路120的保护绝缘层130，保护绝缘层130包括暴露多个像素驱动电路120的输出端121的多个第一过孔131，多个第一电极150设置在驱动电路基板110上，分别通过多个第一过孔131与多个像素驱动电路120的输出端121电连接。
例如，如图6所示，每个第一电极150包括叠层设置的第一子电极层151、第二子电极层152以及第一子电极层151和第二子电极层152之间的过渡层153，过渡层153中具有第一开口153A，第一子电极层151和第二子电极层152通过第一开口153A电连接。
例如，在一些实施例中，每个子像素P包括像素驱动电路120和发光器件，像素驱动电路120配置为驱动发光器件发光。像素驱动电路120可以包括驱动晶体管以及连接电极等结构，具体可以参见图1B及其相关描述，这里不再赘述。发光器件可以包括阳极、阴极以及二者之间的发光材料层。例如，第一电极150可以作为发光器件的阳极，此时，第二子电极层152可以作为反射电极，用于反射其上形成的发光材料层发出的光，以提高发光器件的出光率。
例如，第二子电极层152的材料可以包括铝或银等具有高反射率的 金属材料或者合金材料。例如，第一子电极层151具有较高的功函数以及光透过率，第一子电极层151的材料可以包括透明金属氧化物，例如氧化铟锡(ITO)、氧化铟锌(IZO)、氧化镓锌(GZO)等。由此，被第二子电极层152反射的光可以几乎无损失地穿过第一子电极层151，以提高发光器件的出光效率和出光亮度。
本公开的实施例中，过渡层153可以提高第一子电极层151和第二子电极层152之间的粘结力，避免第一子电极层151和第二子电极层152直接连接导致二者容易分离，进而提高第一电极的结构稳定性。例如，在一些示例中，过渡层153的材料可以包括绝缘材料，例如氧化硅、氮化硅或者氮氧化硅等无机绝缘材料。
例如，像素界定层140设置在多个第一电极150的远离驱动电路基板110的一侧，包括分别暴露多个第一电极150的多个子像素开口141。例如，像素界定层140可以采用聚酰亚胺等有机绝缘材料。
例如，多个第一电极150中的至少一个的过渡层153的第一开口153A在驱动电路基板10上的正投影位于像素界定层140在驱动电路基板110上的正投影的内部。例如，每个第一电极150的过渡层153的第一开口153A在驱动电路基板10上的正投影均位于像素界定层140在驱动电路基板110上的正投影的内部。
由此，像素界定层140可以遮挡住第一开口153A，避免第二子电极层152反射的发光材料层发出的光被第一开口153A中填充的材料折射后从子像素开口141中出射而影响发光器件的出光均匀性。例如，如图6所示，通过上述设计，第二子电极层152反射的发光材料层发出的光可以从均匀地从子像素开口141中出射，从而提高了显示器件的出光均匀性，进而提高整个显示面板的出光均匀性，提高显示面板的显示效果。
例如，图7示出了一个子像素的第一电极和子像素开口的平面示意图，如图7所示，对于一个子像素中对应设置的第一电极150和子像素开口141，第一电极150和子像素开口141的整体在第一方向(例如图7中的水平方向)上对称，在第二方向(例如图7中的竖直方向)上非对称，第一方向垂直于第二方向。由此，子像素开口141不会暴露出第一开口153A，也即像素界定层140可以充分遮挡住第一开口153A。
例如，在一些实施例中，多个第一过孔131中的至少一个在驱动电路基板110上的正投影位于像素界定层140在驱动电路基板110上的正投影的内部。例如，每个第一过孔131在驱动电路基板110上的正投影均位于像素界定层140在驱动电路基板110上的正投影的内部。
例如，在一些实施例中，如图6所示，显示基板还包括多个第一连接电极160，多个第一连接电极160分别设置在多个第一过孔131中，以使多个第一连接电极160的第一端161分别与多个像素驱动电路120的输出端121电连接，多个第一连接电极160的第二端162分别与多个第一电极150电连接。例如，第一连接电极160的第二端162突出于保护绝缘层130的远离驱动电路基板110的表面(即图中保护绝缘层130的上表面)，由此利于第一连接电极160与第一电极150的稳固连接。
由于第一连接电极160的第二端162突出于保护绝缘层130的远离驱动电路基板110的表面，使得其上形成的第一电极150也会相应地具有形状变化，例如第一电极150的第二子电极层152的靠近驱动电路基板110的表面具有凹陷部，因此在该凹陷部反射发光材料层发出的光时，也可能会出现反射光不均匀的现象，影响显示基板的显示效果。
本公开的实施例中，像素界定层140还可以遮挡住第一过孔131，也即遮挡第一连接电极160，从而可以遮挡被第二子电极层152的凹陷部反射的光，避免由于第一连接电极160的突出导致第二子电极层152反射光不均匀性的现象。
例如，在一些实施例中，多个第一连接电极160在驱动电路基板110上的正投影分别位于多个第一开口153A在驱动电路基板110上的正投影内部。由此，第一电极150中影响发光器件出光均匀性的结构均集中在基本相同的位置，从而减小第一电极150中影响发光器件出光均匀性的结构所占据的空间，以保证子像素开口141还可以具有足够的大小，以形成发光器件的发光区域。
例如，在一些实施例中，每个第一电极150可以对应一个或多个第一过孔131，从而也具有一个或多个第一连接电极160，图6和图7中示出两个第一过孔131和两个第一连接电极160作为示例。如图6和图7所示，每个第一过孔131在驱动电路基板110上的正投影分别位于多个第一开口153A在驱动电路基板110上的正投影内部，此时，每个第 一过孔131中的第一连接电极160在驱动电路基板110上的正投影也分别位于多个第一开口153A在驱动电路基板110上的正投影内部。由此，像素界定层140可以在基本相同的位置充分遮挡第一过孔131以及第一连接电极160。
例如，在平行于驱动电路基板110的表面的平面中，如图7所示，两个第一连接电极160沿第一方向(图中的竖直方向)排列。例如，第一方向为显示基板中子像素的列方向或者行方向。
例如，在一些实施例中，如图6所示，子像素开口141与第一开口153A的最小距离L可以为0.1μm-0.3μm，例如0.15μm、0.2μm或者0.25μm等，以保证不均匀的光被充分遮挡，避免被大角度折射的光从子像素开口141中通过。
例如，在一些实施例中，如图6所示，每个第一电极150还可以包括第三子电极层155，第三子电极层155设置在第二子电极层152的靠近驱动电路基板110的一侧，并与第一连接电极160连接，第一子电极层151设置在第二子电极层152的远离驱动电路基板110的一侧。
例如，第三子电极155可以作为连接电极，用于实现第一电极150与第一连接电极160的有效连接，并且可以降低第一电极150与第一连接电极160的接触电阻。例如，在一些示例中，第三子电极155的材料包括钛，第一连接电极160的材料包括钨。钛与钨之间接触电阻较小，因此采用上述材料形成第三子电极155和第一连接电极160可以整体提高第一电极150与像素驱动电路120的电连接效果以及信号传输效果。
例如，在一些实施例中，如图6所示，显示基板还可以包括多个第二连接电极154，多个第二连接电极154分别设置在多个第一电极150的过渡层153的第一开口153A中，以使多个第二连接电极154的第一端154A分别与多个第一电极的第一子电极层151连接，多个第二连接电极154的第二端154B分别与多个第一电极的第二子电极152电连接。由此，第一子电极层151和第二子电极152通过第二连接电极154实现电连接。
例如，如图6所示，第二连接电极154的第一端154A突出于第一子电极层151的远离驱动电路基板110的表面，从而利于第二连接电极154与第一子电极层151的稳固连接。
例如，在一些实施例中，第二连接电极154的材料可以包括钛等金属材料。此时，第二连接电极154与第一子电极层151和第二子电极152之间的接触电阻较小，有利于提高电连接效果以及信号传输效果。
例如，在一些实施例中，如图7所示，第一开口153A的平面形状可以呈V字形。例如，V字形的开口朝向第一电极150的中心。由此，第一开口153A可以在保持具有较大的开口面积的同时，为子像素开口141的设置避让空间。
例如，在一些实施例中，如图7所示，多个第一电极150的平面形状可以呈多边形，例如五边或者六边形(图中示出的情况)等，多个子像素开口141的平面形状可以呈圆形(图中示出的情况)或者椭圆形等。例如，在一些示例中，如图7所示，V字形的开口角度a可以为110度-160度，例如120度、150度等，从而第一开口153A可以充分占据子像素开口141的周边空间，提高空间利用率。
例如，图8和图9分别示出了多个第一电极150与多个子像素开口141的扫描电镜示意图，如图8和图9所示，在该示例中，多个第一电极150呈六边形，并且相邻的两行第一电极150错位排列，使得相邻的两行第一电极150的形状互补，以充分利用排布空间，以使相同的排布空间内，第一电极150的数量更多，因此使形成的显示基板的分辨率更大。
例如，如图9所示，由于第二连接电极154的第一端154A突出于第一子电极层151的远离驱动电路基板110的表面，像素界定层140遮挡住第二连接电极154，此时，像素界定层140的表面也相应地具有突出部140A，但是由于子像素开口141不会暴露第二连接电极154，因此发光器件在子像素开口141中出射的光依然可以具有较高的均匀性。
例如，在一些实施例中，第二连接电极154的厚度大于第三子电极层155的厚度。
例如，在一些示例中，第三子电极层155的厚度可以为5nm-15nm，例如10nm，第二子电极层152的厚度可以为90nm-110nm，例如100nm，过渡层153的厚度可以为25nm-35nm，例如30nm，第二连接电极154的厚度可以为15nm-30nm，例如20nm，此时，第二连接电极154的厚度大于过渡层153的厚度，由此第一电极150在第二连接电极154的位 置处体现为突出的形式。
例如，在另一些示例中，如图11所示，第二连接电极154覆盖第一开口153A并延伸至过渡层153的远离驱动电路基板110的表面。例如，像素界定层140在第一开口153A的位置处包括凹陷结构。
例如，图12示出了图11所示的显示基板的扫描电镜图，如图12所示，第二连接电极154的第一端154A相对于第一子电极层151的远离驱动电路基板110的表面凹陷，由此形成凹坑的形式。
例如，在图11和图12所示的示例中，第三子电极层155的厚度可以为5nm-15nm，例如10nm，第二子电极层152的厚度可以为90nm-110nm，例如100nm，过渡层153的厚度可以为25nm-35nm，例如30nm，第二连接电极154的厚度可以为5nm-15nm，例如10nm，此时，第二连接电极154的厚度小于过渡层153的厚度，由此第一电极150在第二连接电极154的位置处体现为凹坑的形式。
例如，图13A-图13D示出了第一电极的多个功能层的平面示意图；图13E示出了像素界定层的平面示意图。例如，图13A示出了第二子电极层和第三子电极层的平面示意图，例如，如图13A所示，第二子电极层152和第三子电极层155的平面形状相同，均为六边形。例如，相邻的子像素的第二子电极层152(或第三子电极层155)的间距为0.9微米。例如，图13B示出了过渡层的平面示意图，例如，如图13B所示，过渡层153具有第一开口153A，第一开口153A呈V字形，例如，在V字形的直线部分，第一开口153A的宽度约为0.4252微米，在V字形的顶端，第一开口153A的宽度约为0.402微米。例如，图13C示出了第二连接电极的平面示意图，例如，如图13C所示，第二连接电极154相应地呈V字形，例如，在V字形的直线部分，第二连接电极154的宽度约为0.6265微米，在V字形的顶端，第二连接电极154的宽度约为0.722微米。此时，第二连接电极154覆盖第一开口153A且延伸至过渡层153的远离驱动电路基板110的表面。例如，图13D示出了第一子电极层的平面示意图，例如，如图13D所示，第一子电极层151的平面形状为六边形。例如，相邻的子像素的第一子电极层151的间距为0.7微米。
例如，图13E示出了像素界定层的平面示意图，例如，如图13E所示，像素界定层140具有子像素开口141，子像素开口141的形状为圆 形。例如，相邻的子像素的子像素开口141的间距为1.1微米。
例如，图10示出了图5中的显示基板沿M-M线的另一截面示意图。如图10所示，第一电极150上还形成有发光材料层170以及第二电极层180等结构，第一电极150、发光材料层170和第二电极层180共同组成发光器件，第二电极层可以作为发光器件的阴极，例如可以采用锂、铝、镁、银等金属材料或者合金材料。发光材料层170可以包括发光层以及辅助发光层发光的辅助发光层，例如，辅助发光层可以为空穴注入层、空穴传输层、电子阻挡层、电子注入层、电子传输层和空穴阻挡层中的一种或多种，本公开的实施例对发光材料层170的具体形式不做限定。
例如，第二电极层上还可以形成封装层190，封装层190可以采用有机封装层和无机封装层叠层的复合封装层，有机封装层可以采用聚酰亚胺、树脂等有机材料，无机封装层可以采用氧化硅、氮化硅或者氮氧化硅等无机材料。
例如，在一些实施例中，封装层190上还可以形成彩色滤光片层200、透镜层210等其他功能层。例如，彩色滤光片层200可以包括多个彩色滤光片，每个彩色滤光片对应于子像素开口141设置，以过滤从子像素开口141出射的光。例如，透镜层210可以包括多个透镜211，每个透镜211可以对应于子像素开口141设置，例如，透镜211可以为凸透镜，平面形状为圆形或者正方形等，此时，子像素开口141的平面形状(例如圆形)可与透镜211向匹配，以提高子像素的出光亮度。
例如，透镜层210上还可以包括粘结层、盖板等其他结构，具体可以参考相关技术，本公开的实施例对显示基板的其他结构不做具体限定。
例如，本公开的实施例中，驱动电路基板10可以采用硅基基板以及半导体制造技术形成，例如可以在晶圆厂制作完成，因此，本公开实施例提供的显示基板可以通过直接在该驱动电路基板10上形成第一电极、发光材料层、第二电极层以及封装层等结构而形成，制备工艺简单。并且，由于硅基驱动电路基板的制作工艺成熟，性能稳定，适于制作高集成度的微型显示器件。因此，本公开实施例提供的显示基板可以为硅基微型有机发光二极管显示基板。
本公开至少一实施例还提供一种显示装置，该显示装置包括本公开实施例提供的显示基板。例如，该显示装置可以为：手机、平板电脑、电 视机、显示器、笔记本电脑、数码相框、导航仪、VR显示设备等任何具有显示功能的产品或部件。
还有以下几点需要说明：
(1)本公开实施例的附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本公开的实施例的附图中，层或区域的厚度被放大或缩小，即这些附图并非按照实际的比例绘制。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”或者可以存在中间元件。
(3)在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。
以上，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，本公开的保护范围应以权利要求的保护范围为准。

Claims (22)

  1. 一种显示基板，具有阵列排布的多个子像素，且包括：
    驱动电路基板，包括用于所述多个子像素的多个像素驱动电路以及覆盖所述多个像素驱动电路的保护绝缘层，其中，所述保护绝缘层包括暴露所述多个像素驱动电路的输出端的多个第一过孔，
    多个第一电极，设置在所述驱动电路基板上，分别通过所述多个第一过孔与所述多个像素驱动电路的输出端电连接，其中，所述多个第一电极的每个包括叠层设置的第一子电极层、第二子电极层以及所述第一子电极层和所述第二子电极层之间的过渡层，所述过渡层中具有第一开口，所述第一子电极层和所述第二子电极层通过所述第一开口电连接；以及
    像素界定层，设置在所述多个第一电极的远离所述驱动电路基板的一侧，包括分别暴露所述多个第一电极的多个子像素开口；
    其中，所述多个第一电极中的至少一个的过渡层的第一开口在所述驱动电路基板上的正投影位于所述像素界定层在所述驱动电路基板上的正投影的内部。
  2. 根据权利要求1所述的显示基板，其中，对于对应设置的第一电极和子像素开口，所述第一电极和所述子像素开口的整体在第一方向上对称，在第二方向上非对称，其中，所述第一方向垂直于所述第二方向。
  3. 根据权利要求1或2所述的显示基板，其中，所述多个第一过孔中的至少一个在所述驱动电路基板上的正投影位于所述像素界定层在所述驱动电路基板上的正投影的内部。
  4. 根据权利要求1-3任一所述的显示基板，其中，所述多个第一过孔在所述驱动电路基板上的正投影分别位于所述多个第一开口在所述驱动电路基板上的正投影内部。
  5. 根据权利要求1-4任一所述的显示基板，还包括多个第一连接电极，
    其中，所述多个第一连接电极分别设置在所述多个第一过孔中，以使所述多个第一连接电极的第一端分别与所述多个像素驱动电路的输出端电连接，所述多个第一连接电极的第二端分别与所述多个第一电极电连接；
    所述第一连接电极的第二端突出于所述保护绝缘层的远离所述驱动电路基板的表面。
  6. 根据权利要求5所述的显示基板，其中，所述多个第一连接电极在所述驱动电路基板上的正投影分别位于所述多个第一开口在所述驱动电路基板上的正投影内部。
  7. 根据权利要求6所述的显示基板，其中，所述多个子像素的每个包括两个第一连接电极，在平行于所述驱动电路基板的表面的平面中，所述两个第一连接电极沿第一方向排列。
  8. 根据权利要求1-7任一所述的显示基板，其中，所述多个第一电极的每个还包括第三子电极层，所述第三子电极层设置在所述第二子电极层的靠近所述驱动电路基板的一侧，并与所述第一连接电极连接，
    所述第一子电极层设置在所述第二子电极层的远离所述驱动电路基板的一侧。
  9. 根据权利要求8所述的显示基板，其中，所述第三子电极的材料包括钛，所述第一连接电极的材料包括钨。
  10. 根据权利要求1-9任一所述的显示基板，其中，所述第二子电极层的材料包括铝或银。
  11. 根据权利要求1-10任一所述的显示基板，其中，所述第一子电极层的材料包括透明金属氧化物。
  12. 根据权利要求1-11任一所述的显示基板，其中，所述过渡层的材料包括氧化硅、氮化硅或者氮氧化硅。
  13. 根据权利要求8所述的显示基板，还包括多个第二连接电极，
    其中，所述多个第二连接电极分别设置在所述多个第一电极的过渡层的第一开口中，以使所述多个第二连接电极的第一端分别与所述多个第一电极的第一子电极层连接，所述多个第二连接电极的第二端分别与所述多个第一电极的第二子电极电连接。
  14. 根据权利要求13所述的显示基板，其中，所述多个第二连接电极的第一端分别突出于所述多个第一电极的第一子电极层的远离所述驱动电路基板的表面。
  15. 根据权利要求13所述的显示基板，其中，所述第二连接电极的厚度大于所述第三子电极层的厚度。
  16. 根据权利要求13所述的显示基板，其中，所述第二连接电极覆盖所述第一开口并延伸至所述多渡层的远离所述驱动电路基板的表面。
  17. 根据权利要求16所述的显示基板，其中，所述像素界定层在所述第一开口位置处包括凹陷结构。
  18. 根据权利要求13所述的显示基板，其中，所述第二连接电极的材料包括钛。
  19. 根据权利要求1-18任一所述的显示基板，其中，所述第一开口的平面形状呈V字形。
  20. 根据权利要求19所述的显示基板，其中，所述V字形的开口朝向所述第一电极的中心。
  21. 根据权利要求1-20任一所述的显示基板，其中，所述多个第一电极的平面形状呈多边形，所述多个子像素开口的平面形状呈圆形或者椭圆形。
  22. 一种显示装置，包括权利要求1-21任一所述的显示基板。
PCT/CN2021/125240 2021-10-21 2021-10-21 显示基板以及显示装置 WO2023065206A1 (zh)

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