WO2023032667A1 - 半導体装置、および半導体装置の取付け構造 - Google Patents

半導体装置、および半導体装置の取付け構造 Download PDF

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Publication number
WO2023032667A1
WO2023032667A1 PCT/JP2022/031038 JP2022031038W WO2023032667A1 WO 2023032667 A1 WO2023032667 A1 WO 2023032667A1 JP 2022031038 W JP2022031038 W JP 2022031038W WO 2023032667 A1 WO2023032667 A1 WO 2023032667A1
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Prior art keywords
semiconductor device
signal terminal
conductive layer
thickness direction
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/031038
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English (en)
French (fr)
Japanese (ja)
Inventor
諒介 福田
昂平 谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
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Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2023545425A priority Critical patent/JPWO2023032667A1/ja
Priority to CN202280059479.9A priority patent/CN117897808A/zh
Priority to DE112022003874.8T priority patent/DE112022003874T5/de
Publication of WO2023032667A1 publication Critical patent/WO2023032667A1/ja
Priority to US18/420,305 priority patent/US20240203849A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Definitions

  • the present disclosure relates to a semiconductor device and its mounting structure.
  • Patent Document 1 discloses an example of a semiconductor device (power module) in which a plurality of semiconductor elements are electrically connected to a conductor layer.
  • the semiconductor device is electrically connected to a plurality of signal terminals.
  • the plurality of signal terminals protrude in the thickness direction with respect to the sealing resin.
  • the semiconductor device When using the semiconductor device disclosed in Patent Document 1, the semiconductor device is attached to a heat sink to ensure heat dissipation.
  • the mounting member used in that case is generally made of metal.
  • the upper surface of the sealing resin is pressed against the mounting member. In this case, when the size of the semiconductor device is reduced, the distance between the mounting member and the signal terminal becomes shorter. As a result, there is a concern that the dielectric breakdown voltage of the semiconductor device may be lowered, and countermeasures are desired.
  • the present disclosure provides a semiconductor device and its mounting structure capable of suppressing a decrease in dielectric strength of the device due to the arrangement of signal terminals and mounting members while miniaturizing the device. is one of the issues.
  • a semiconductor device provided by a first aspect of the present disclosure includes a semiconductor element, a first surface facing in a thickness direction, a sealing resin covering the semiconductor element, a sealing resin projecting from the first surface, and the a first signal terminal electrically connected to a semiconductor element, the sealing resin having a second surface facing the same side as the first surface in the thickness direction, the first surface including a first region located on the opposite side of the first signal terminal with the second surface interposed therebetween in a first direction perpendicular to the direction and in which a mounting member can be arranged; , the position of the second surface is different from the position of the first area.
  • the semiconductor device provided by the first aspect of the present disclosure when the semiconductor device provided by the first aspect of the present disclosure is attached to the heat sink using the mounting member that is a conductor, the semiconductor device The mounting member is pressed against the first region of the.
  • the semiconductor device and the mounting structure thereof it is possible to reduce the size of the semiconductor device while suppressing a decrease in dielectric strength of the semiconductor device due to the arrangement of the signal terminals and mounting members. .
  • FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure
  • FIG. FIG. 2 is a perspective view corresponding to FIG. 1, and omits illustration of the sealing resin.
  • FIG. 3 is a perspective view corresponding to FIG. 1, omitting the illustration of the sealing resin and the second conductive member.
  • 4 is a plan view of the semiconductor device shown in FIG. 1.
  • FIG. 5 is a plan view corresponding to FIG. 4 and sees through the sealing resin.
  • 6 is a partially enlarged view of FIG. 5.
  • FIG. FIG. 7 is a plan view corresponding to FIG. 4, in which the first conductive member is seen through and illustration of the sealing resin and the second conductive member is omitted.
  • 8 is a right side view of the semiconductor device shown in FIG. 1.
  • FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure
  • FIG. 2 is a perspective view corresponding to FIG. 1, and omits illustration of the sealing resin
  • FIG. 9 is a bottom view of the semiconductor device shown in FIG. 1.
  • FIG. 10 is a cross-sectional view taken along line XX of FIG. 5.
  • FIG. 11 is a cross-sectional view along line XI-XI in FIG.
  • FIG. 12 is a partially enlarged view of the first element shown in FIG. 11 and its periphery.
  • FIG. 13 is a partially enlarged view of the second element shown in FIG. 11 and its periphery.
  • 14 is a cross-sectional view taken along line XIV-XIV in FIG. 5.
  • FIG. 15 is a cross-sectional view along line XV-XV in FIG. 5.
  • FIG. 16 is a partially enlarged view of the first signal terminal and its periphery shown in FIG. 11.
  • FIG. 17 is a plan view of the mounting structure of the semiconductor device shown in FIG. 1.
  • FIG. 18 is a front view of the mounting structure shown in FIG. 17
  • FIG. 19 is a plan view of a semiconductor device according to a second embodiment of the present disclosure
  • FIG. 20 is a right side view of the semiconductor device shown in FIG. 19.
  • FIG. 21 is a front view of the semiconductor device shown in FIG. 19.
  • FIG. 22 is a cross-sectional view of the semiconductor device shown in FIG. 19.
  • FIG. 23 is a partially enlarged view of FIG. 19.
  • FIG. 24 is a partially enlarged view of FIG. 22.
  • FIG. 25 is a plan view of a semiconductor device according to a third embodiment of the present disclosure
  • FIG. 26 is a front view of the semiconductor device shown in FIG. 25.
  • FIG. 27 is a cross-sectional view of the semiconductor device shown in FIG. 25.
  • FIG. 28 is a partially enlarged view of FIG. 27.
  • FIG. 1 A semiconductor device A10 according to the first embodiment of the present disclosure will be described based on FIGS. 1 to 16.
  • FIG. The semiconductor device A10 includes a support 11, a first conductive layer 121, a second conductive layer 122, a first input terminal 13, an output terminal 14, a second input terminal 15, a first signal terminal 161, a fourth signal terminal 171, a plurality of semiconductor element 21 , first conduction member 31 , second conduction member 32 and sealing resin 50 . Further, the semiconductor device A10 includes a second signal terminal 162, a fifth signal terminal 172, a pair of third signal terminals 163, a pair of sixth signal terminals 173, a seventh signal terminal 18, a pair of thermistors 22, and a pair of control wirings. 60.
  • the permeated sealing resin 50 is indicated by an imaginary line (chain double-dashed line).
  • the first conductive member 31 is transparent, and the sealing resin 50 and the second conductive member 32 are omitted.
  • the transparent first conduction member 31 is indicated by imaginary lines.
  • the thickness direction of the plurality of semiconductor elements 21 is called "thickness direction z" for convenience.
  • a direction perpendicular to the thickness direction z is called a “first direction x”.
  • a direction orthogonal to both the thickness direction z and the first direction x is called a "second direction y”.
  • the semiconductor device A 10 converts the DC power supply voltage applied to the first input terminal 13 and the second input terminal 15 into AC power by the semiconductor element 21 .
  • the converted AC power is input from the output terminal 14 to a power supply object such as a motor.
  • the semiconductor device A10 is used, for example, in a power conversion circuit such as an inverter.
  • the support 11 is located on the side opposite to the plurality of semiconductor elements 21 with the first conductive layer 121 and the second conductive layer 122 interposed in the thickness direction z.
  • the support 11 supports the first conductive layer 121 and the second conductive layer 122 .
  • the support 11 is composed of a DBC (Direct Bonded Copper) substrate.
  • the support 11 includes an insulating layer 111, an intermediate layer 112 and a heat dissipation layer 113.
  • FIG. The support 11 is covered with a sealing resin 50 except for part of the heat dissipation layer 113 .
  • the insulating layer 111 includes a portion interposed between the intermediate layer 112 and the heat dissipation layer 113 in the thickness direction z.
  • the insulating layer 111 is made of a material with relatively high thermal conductivity.
  • Insulating layer 111 is made of ceramics containing, for example, aluminum nitride (AlN).
  • the insulating layer 111 may be made of an insulating resin sheet instead of ceramics.
  • the thickness of insulating layer 111 is thinner than the thickness of each of first conductive layer 121 and second conductive layer 122 .
  • the intermediate layer 112 is positioned between the insulating layer 111 and the first conductive layer 121 and the second conductive layer 122 in the thickness direction z.
  • the intermediate layer 112 includes a pair of regions spaced apart from each other in the first direction x.
  • the composition of the intermediate layer 112 includes copper (Cu). As shown in FIG. 7, the intermediate layer 112 is surrounded by the periphery of the insulating layer 111 when viewed in the thickness direction z.
  • the heat dissipation layer 113 is located on the opposite side of the intermediate layer 112 with the insulating layer 111 interposed therebetween in the thickness direction z. As shown in FIG. 9, the heat dissipation layer 113 is exposed from the sealing resin 50. As shown in FIG. A heat sink (not shown) is bonded to the heat dissipation layer 113 .
  • the composition of the heat dissipation layer 113 contains copper.
  • the thickness of the heat dissipation layer 113 is thicker than the thickness of the insulating layer 111 .
  • the heat dissipation layer 113 is surrounded by the periphery of the insulating layer 111 when viewed in the thickness direction z.
  • the first conductive layer 121 and the second conductive layer 122 are bonded to the support 11 as shown in FIGS.
  • the composition of first conductive layer 121 and second conductive layer 122 includes copper.
  • the first conductive layer 121 and the second conductive layer 122 are positioned apart from each other in the first direction x.
  • the first conductive layer 121 has a first major surface 121A and a first back surface 121B facing opposite sides in the thickness direction z.
  • the first principal surface 121A faces the plurality of semiconductor elements 21 .
  • the first back surface 121B is joined to one of the pair of regions of the intermediate layer 112 via the first adhesive layer 19 .
  • the first adhesive layer 19 is a brazing material containing silver (Ag) in its composition, for example.
  • the second conductive layer 122 has a second major surface 122A and a second back surface 122B facing opposite sides in the thickness direction z.
  • the second main surface 122A faces the same side as the first main surface 121A in the thickness direction z.
  • the second back surface 122B is joined to the other of the pair of regions of the intermediate layer 112 via the first adhesive layer 19 .
  • Each of the plurality of semiconductor elements 21 is mounted on either the first conductive layer 121 or the second conductive layer 122, as shown in FIGS.
  • the semiconductor element 21 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).
  • the semiconductor element 21 may be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a diode.
  • the semiconductor element 21 is an n-channel MOSFET with a vertical structure.
  • Semiconductor device 21 includes a compound semiconductor substrate.
  • the composition of the compound semiconductor substrate includes silicon carbide (SiC).
  • the multiple semiconductor elements 21 include multiple first elements 21A and multiple second elements 21B.
  • the structure of each of the plurality of second elements 21B is the same as the structure of each of the plurality of first elements 21A.
  • a plurality of first elements 21A are mounted on the first main surface 121A of the first conductive layer 121 .
  • the multiple first elements 21A are arranged along the second direction y.
  • a plurality of second elements 21B are mounted on the second main surface 122A of the second conductive layer 122 .
  • the multiple second elements 21B are arranged along the second direction y.
  • the plurality of semiconductor elements 21 have a first electrode 211, a second electrode 212, a third electrode 213 and a fourth electrode 214.
  • the first electrode 211 faces either the first conductive layer 121 or the second conductive layer 122. As shown in FIGS. A current corresponding to power before being converted by the semiconductor element 21 flows through the first electrode 211 . That is, the first electrode 211 corresponds to the drain electrode of the semiconductor element 21 .
  • the second electrode 212 is located on the opposite side of the first electrode 211 in the thickness direction z. A current corresponding to the power converted by the semiconductor element 21 flows through the second electrode 212 . That is, the second electrode 212 corresponds to the source electrode of the semiconductor element 21 .
  • the third electrode 213 is positioned on the same side as the second electrode 212 in the thickness direction z.
  • a gate voltage for driving the semiconductor element 21 is applied to the third electrode 213 . That is, the third electrode 213 corresponds to the gate electrode of the semiconductor element 21 .
  • the area of the third electrode 213 is smaller than the area of the second electrode 212 when viewed in the thickness direction z.
  • the fourth electrode 214 is positioned on the same side as the second electrode 212 in the thickness direction z, and is positioned next to the third electrode 213 in the second direction y.
  • the potential of the fourth electrode 214 is equal to the potential of the second electrode 212 . Therefore, the fourth electrode 214 is used for measuring the potential of the second electrode 212 corresponding to the source electrode.
  • the conductive bonding layer 23 is interposed between one of the first conductive layer 121 and the second conductive layer 122 and one of the first electrodes 211 of the plurality of semiconductor elements 21, as shown in FIGS. ing.
  • Conductive bonding layer 23 is, for example, solder.
  • the conductive bonding layer 23 may contain a sintered body of metal particles.
  • the first electrodes 211 of the plurality of first elements 21A are electrically connected to the first major surface 121A of the first conductive layer 121 via the electrically conductive bonding layer 23 . Thereby, the first electrodes 211 of the plurality of first elements 21A are electrically connected to the first conductive layer 121 .
  • the first electrodes 211 of the plurality of second elements 21B are electrically connected to the second major surface 122A of the second conductive layer 122 via the electrically conductive bonding layer 23 . Thereby, the first electrodes 211 of the plurality of second elements 21B are electrically connected to the second conductive layer 122 .
  • the first input terminal 13 is located on the opposite side of the second conductive layer 122 with the first conductive layer 121 interposed in the first direction x, and 121 is connected. Thereby, the first input terminal 13 is electrically connected to the first electrodes 211 of the plurality of first elements 21A through the first conductive layer 121 .
  • the first input terminal 13 is a P terminal (positive electrode) to which a DC power supply voltage to be converted is applied.
  • the first input terminal 13 extends from the first conductive layer 121 in the first direction x.
  • the first input terminal 13 has a covered portion 13A and an exposed portion 13B. As shown in FIG. 11 , the covering portion 13A is connected to the first conductive layer 121 and covered with the sealing resin 50 .
  • the covering portion 13A is flush with the first major surface 121A of the first conductive layer 121 .
  • the exposed portion 13B extends in the first direction x from the covered portion 13A and is exposed from the sealing resin 50 .
  • the thickness of the first input terminal 13 is thinner than the thickness of the first conductive layer 121 .
  • the output terminal 14 is located on the opposite side of the first conductive layer 121 with the second conductive layer 122 interposed in the first direction x, and is connected to the second conductive layer 122. linked. Thereby, the output terminal 14 is electrically connected to the first electrodes 211 of the plurality of second elements 21B via the second conductive layer 122 .
  • the AC power converted by the semiconductor element 21 is output from the output terminal 14 .
  • the output terminal 14 includes a pair of regions separated from each other in the second direction y. Alternatively, output terminal 14 may be of a single construction that does not include a pair of regions.
  • the output terminal 14 has a covered portion 14A and an exposed portion 14B. As shown in FIG.
  • the covering portion 14A is connected to the second conductive layer 122 and covered with the sealing resin 50 .
  • the covering portion 14A is flush with the second main surface 122A of the second conductive layer 122 .
  • the exposed portion 14B extends in the first direction x from the covered portion 14A and is exposed from the sealing resin 50 .
  • the thickness of the output terminal 14 is thinner than the thickness of the second conductive layer 122 .
  • the second input terminal 15 is located on the same side as the first input terminal 13 with respect to the first conductive layer 121 and the second conductive layer 122 in the first direction x. It is located away from the first conductive layer 121 and the second conductive layer 122 .
  • the second input terminal 15 is electrically connected to the second electrodes 212 of the plurality of second elements 21B.
  • the second input terminal 15 is an N terminal (negative electrode) to which a DC power supply voltage to be converted is applied.
  • the second input terminal 15 includes a pair of regions spaced apart from each other in the second direction y.
  • a first input terminal 13 is positioned between the pair of regions in the second direction y.
  • the second input terminal 15 has a covered portion 15A and an exposed portion 15B. As shown in FIG. 10 , the covering portion 15A is located apart from the first conductive layer 121 and covered with the sealing resin 50 .
  • the exposed portion 15B extends from the covered portion 15A in the first direction x and is exposed from the sealing resin 50 .
  • the pair of control wirings 60 includes a first signal terminal 161, a second signal terminal 162, a pair of third signal terminals 163, a fourth signal terminal 171, a fifth signal terminal 172, a pair of sixth signal terminals 173, and a plurality of signal terminals. constitutes a part of the conductive path with the semiconductor element 21 of .
  • the pair of control wires 60 includes a first wire 601 and a second wire 602 .
  • the first wiring 601 is positioned between the plurality of first elements 21A and the first input terminal 13 and the second input terminal 15 in the first direction x.
  • the first wiring 601 is joined to the first major surface 121A of the first conductive layer 121 .
  • the first wiring 601 also constitutes part of the conductive path between the seventh signal terminal 18 and the first conductive layer 121 .
  • the second wiring 602 is positioned between the plurality of second elements 21B and the output terminal 14 in the first direction x.
  • the second wiring 602 is joined to the second major surface 122A of the second conductive layer 122 .
  • the pair of control wirings 60 has an insulating layer 61 , multiple wiring layers 62 , a metal layer 63 and multiple sleeves 64 .
  • the pair of control wirings 60 are covered with the sealing resin 50 except for a part of each of the plurality of sleeves 64 .
  • the insulating layer 61 includes portions interposed between the plurality of wiring layers 62 and the metal layer 63 in the thickness direction z.
  • Insulating layer 61 is made of ceramics, for example.
  • the insulating layer 61 may be made of an insulating resin sheet instead of ceramics.
  • the plurality of wiring layers 62 are positioned on one side of the insulating layer 61 in the thickness direction z.
  • the composition of the plurality of wiring layers 62 contains copper.
  • the plurality of wiring layers 62 includes a first wiring layer 621 , a second wiring layer 622 , a pair of third wiring layers 623 , a fourth wiring layer 624 and a fifth wiring layer 625 .
  • the pair of third wiring layers 623 are adjacent to each other in the second direction y.
  • the metal layer 63 is located on the opposite side of the plurality of wiring layers 62 with the insulating layer 61 interposed in the thickness direction z.
  • the composition of metal layer 63 includes copper.
  • the metal layer 63 of the first wiring 601 is bonded to the first major surface 121A of the first conductive layer 121 by the second adhesive layer 68 .
  • the metal layer 63 of the second wiring 602 is bonded to the second main surface 122A of the second conductive layer 122 by the second adhesive layer 68.
  • the second adhesive layer 68 is made of a material that may or may not be electrically conductive.
  • the second adhesive layer 68 is solder, for example.
  • each of the multiple sleeves 64 is joined to one of the multiple wiring layers 62 by a third adhesive layer 69 .
  • the plurality of sleeves 64 are made of a conductive material such as metal.
  • Each of the plurality of sleeves 64 has a tubular shape extending along the thickness direction z.
  • One ends of the plurality of sleeves 64 are electrically connected to one of the plurality of wiring layers 62 .
  • end faces 641 corresponding to the other ends of the sleeves 64 are exposed from a first face 511 of the sealing resin 50, which will be described later.
  • the third adhesive layer 69 has conductivity.
  • the third adhesive layer 69 is solder, for example.
  • One thermistor 22 of the pair of thermistors 22 is conductively joined to the pair of third wiring layers 623 of the first wiring 601, as shown in FIG.
  • the other thermistor 22 of the pair of thermistors 22 is electrically connected to the pair of third wiring layers 623 of the second wiring 602 as shown in FIG.
  • a pair of thermistors 22 are, for example, NTC (Negative Temperature Coefficient) thermistors.
  • An NTC thermistor has a characteristic that its resistance gradually decreases with temperature rise.
  • a pair of thermistors 22 are used as temperature sensors for the semiconductor device A10.
  • a first signal terminal 161, a second signal terminal 162, a pair of third signal terminals 163, a fourth signal terminal 171, a fifth signal terminal 172, a pair of sixth signal terminals 173, and a seventh signal terminal 18 are shown in FIG. 3, it consists of a metal pin extending in the thickness direction z. These terminals protrude from a first surface 511 of the sealing resin 50, which will be described later. Further, these terminals are individually press-fitted into a plurality of sleeves 64 of the pair of control wirings 60 . Each of these terminals is thereby supported by one of the plurality of sleeves 64 and electrically connected to one of the plurality of wiring layers 62 .
  • the first signal terminal 161 is press-fitted into the sleeve 64 joined to the first wiring layer 621 of the first wiring 601 among the plurality of sleeves 64 of the pair of control wirings 60. there is Thereby, the first signal terminal 161 is supported by the sleeve 64 and electrically connected to the first wiring layer 621 of the first wiring 601 . Furthermore, the first signal terminal 161 is electrically connected to the third electrodes 213 of the plurality of first elements 21A. A gate voltage for driving the plurality of first elements 21A is applied to the first signal terminal 161 .
  • the second signal terminal 162 is located next to the first signal terminal 161 in the second direction y, as shown in FIG. As shown in FIG. 7 , the second signal terminal 162 is press-fitted into the sleeve 64 joined to the second wiring layer 622 of the first wiring 601 among the plurality of sleeves 64 of the pair of control wirings 60 . Thereby, the second signal terminal 162 is supported by the sleeve 64 and electrically connected to the second wiring layer 622 of the first wiring 601 . Furthermore, the second signal terminal 162 is electrically connected to the fourth electrodes 214 of the plurality of first elements 21A. A voltage corresponding to the maximum current among the currents flowing through the fourth electrodes 214 of the plurality of first elements 21A is applied to the second signal terminal 162 .
  • the pair of third signal terminals 163 are located on the opposite side of the second signal terminal 162 with the first signal terminal 161 interposed therebetween in the second direction y.
  • the pair of third signal terminals 163 are adjacent to each other in the second direction y.
  • the pair of third signal terminals 163 are connected to the pair of sleeves 64 joined to the pair of third wiring layers 623 of the first wiring 601 among the plurality of sleeves 64 of the pair of control wirings 60. Pressed in individually.
  • the pair of third signal terminals 163 are supported by the pair of sleeves 64 and electrically connected to the pair of third wiring layers 623 of the first wiring 601 .
  • the pair of third signal terminals 163 are electrically connected to the thermistor 22 among the pair of thermistors 22 that is electrically connected to the pair of third wiring layers 623 of the first wiring 601 .
  • the fourth signal terminal 171 is press-fitted into the sleeve 64 joined to the first wiring layer 621 of the second wiring 602 among the plurality of sleeves 64 of the pair of control wirings 60. there is Thereby, the fourth signal terminal 171 is supported by the sleeve 64 and electrically connected to the first wiring layer 621 of the second wiring 602 . Furthermore, the fourth signal terminal 171 is electrically connected to the third electrodes 213 of the plurality of second elements 21B. A gate voltage for driving the plurality of second elements 21B is applied to the fourth signal terminal 171 .
  • the fifth signal terminal 172 is located next to the fourth signal terminal 171 in the second direction y, as shown in FIG. As shown in FIG. 7, the fifth signal terminal 172 is press-fitted into the sleeve 64 joined to the second wiring layer 622 of the second wiring 602 among the plurality of sleeves 64 of the pair of control wirings 60 . Thereby, the fifth signal terminal 172 is supported by the sleeve 64 and electrically connected to the second wiring layer 622 of the second wiring 602 . Furthermore, the fifth signal terminal 172 is electrically connected to the fourth electrodes 214 of the plurality of second elements 21B. A voltage corresponding to the maximum current among the currents flowing through the fourth electrodes 214 of the plurality of second elements 21B is applied to the fifth signal terminal 172 .
  • the pair of sixth signal terminals 173 are located on the opposite side of the fifth signal terminal 172 with the fourth signal terminal 171 interposed therebetween in the second direction y.
  • the pair of sixth signal terminals 173 are adjacent to each other in the second direction y.
  • the pair of sixth signal terminals 173 are connected to the pair of sleeves 64 joined to the pair of third wiring layers 623 of the second wiring 602 among the plurality of sleeves 64 of the pair of control wirings 60. Pressed in individually.
  • the pair of sixth signal terminals 173 are supported by the pair of sleeves 64 and electrically connected to the pair of third wiring layers 623 of the second wiring 602 .
  • the pair of sixth signal terminals 173 are electrically connected to the thermistor 22 of the pair of thermistors 22 that is conductively joined to the pair of third wiring layers 623 of the second wiring 602 .
  • the seventh signal terminal 18 is located on the opposite side of the first signal terminal 161 with the second signal terminal 162 interposed therebetween in the second direction y. As shown in FIG. 7 , the seventh signal terminal 18 is press-fitted into the sleeve 64 joined to the fifth wiring layer 625 of the first wiring 601 among the plurality of sleeves 64 of the pair of control wirings 60 . Thereby, the seventh signal terminal 18 is supported by the sleeve 64 and electrically connected to the fifth wiring layer 625 of the first wiring 601 . Furthermore, the seventh signal terminal 18 is electrically connected to the first conductive layer 121 . A voltage corresponding to the DC power input to the first input terminal 13 and the second input terminal 15 is applied to the seventh signal terminal 18 .
  • the plurality of first wires 41 are conductively joined to the third electrodes 213 of the plurality of first elements 21A and the fourth wiring layer 624 of the first wiring 601, as shown in FIG.
  • the plurality of third wires 43 are conductively joined to the fourth wiring layer 624 of the first wiring 601 and the first wiring layer 621 of the first wiring 601 as shown in FIG. Thereby, the first signal terminal 161 is electrically connected to the third electrodes 213 of the plurality of first elements 21A.
  • the composition of the plurality of first wires 41 and the plurality of third wires 43 contains gold (Au).
  • the composition of the plurality of first wires 41 and the plurality of third wires 43 may contain copper or aluminum.
  • the plurality of first wires 41 are conductively joined to the third electrodes 213 of the plurality of second elements 21B and the fourth wiring layer 624 of the second wiring 602, as shown in FIG.
  • the plurality of third wires 43 are conductively joined to the fourth wiring layer 624 of the second wiring 602 and the first wiring layer 621 of the second wiring 602 as shown in FIG.
  • the fourth signal terminal 171 is electrically connected to the third electrodes 213 of the plurality of second elements 21B.
  • the plurality of second wires 42 are conductively joined to the fourth electrodes 214 of the plurality of first elements 21A and the second wiring layer 622 of the first wiring 601, as shown in FIG. Thereby, the second signal terminal 162 is electrically connected to the fourth electrodes 214 of the plurality of first elements 21A. Further, the plurality of second wires 42 are electrically connected to the fourth electrodes 214 of the plurality of second elements 21B and the second wiring layer 622 of the second wiring 602, as shown in FIG. Thereby, the fifth signal terminal 172 is electrically connected to the fourth electrodes 214 of the plurality of second elements 21B.
  • the composition of the plurality of second wires 42 includes gold. In addition, the composition of the plurality of second wires 42 may contain copper or aluminum.
  • the fourth wire 44 is conductively joined to the fifth wiring layer 625 of the first wiring 601 and the first main surface 121A of the first conductive layer 121, as shown in FIG. Thereby, the seventh signal terminal 18 is electrically connected to the first conductive layer 121 .
  • the composition of the fourth wire 44 includes gold.
  • the composition of the fourth wire 44 may contain copper or aluminum.
  • the first conductive member 31 is conductively joined to the second electrodes 212 of the plurality of first elements 21A and the second main surface 122A of the second conductive layer 122, as shown in FIG. Thereby, the second electrodes 212 of the plurality of first elements 21A are electrically connected to the second conductive layer 122 .
  • the composition of the first conduction member 31 contains copper.
  • the first conducting member 31 is a metal clip.
  • the first conducting member 31 has a main body portion 311 , a plurality of first joint portions 312 , a plurality of first connecting portions 313 , a second joint portion 314 and a second connecting portion 315 .
  • the main body part 311 constitutes the main part of the first conducting member 31 . As shown in FIG. 7, the body portion 311 extends in the second direction y. As shown in FIG. 13 , the body portion 311 straddles between the first conductive layer 121 and the second conductive layer 122 .
  • the multiple first bonding portions 312 are individually bonded to the second electrodes 212 of the multiple first elements 21A.
  • Each of the multiple first joints 312 faces the second electrode 212 of one of the multiple first elements 21A.
  • the plurality of first connecting portions 313 are connected to the main body portion 311 and the plurality of first joint portions 312 .
  • the plurality of first connecting parts 313 are positioned apart from each other in the second direction y.
  • the plurality of first connecting portions 313 when viewed in the second direction y, are arranged on the first main surface 121A of the first conductive layer 121 as they go from the plurality of first joint portions 312 toward the main body portion 311 . sloping away from
  • the second joint portion 314 is joined to the second main surface 122A of the second conductive layer 122. As shown in FIGS. The second joint portion 314 faces the second main surface 122A. The second joint portion 314 extends in the second direction y. The dimension of the second joint portion 314 in the second direction y is equal to the dimension of the main body portion 311 in the second direction y.
  • the second connecting portion 315 is connected to the main body portion 311 and the second joint portion 314 .
  • the second connecting portion 315 is inclined away from the second main surface 122A of the second conductive layer 122 from the second joint portion 314 toward the main body portion 311 .
  • the dimension of the second connecting portion 315 in the second direction y is equal to the dimension of the main body portion 311 in the second direction y.
  • the semiconductor device A10 further includes a first conductive bonding layer 33, as shown in FIGS.
  • the first conductive bonding layer 33 is interposed between the second electrodes 212 of the plurality of first elements 21A and the plurality of first bonding portions 312 .
  • the first conductive bonding layer 33 electrically connects the second electrodes 212 of the plurality of first elements 21 ⁇ /b>A and the plurality of first bonding portions 312 .
  • the first conductive bonding layer 33 is solder, for example.
  • the first conductive bonding layer 33 may contain a sintered body of metal particles.
  • the semiconductor device A10 further includes a second conductive bonding layer 34, as shown in FIG.
  • the second conductive bonding layer 34 is interposed between the second main surface 122A of the second conductive layer 122 and the second bonding portion 314 .
  • the second conductive bonding layer 34 conductively bonds the second main surface 122 ⁇ /b>A and the second bonding portion 314 .
  • the second conductive bonding layer 34 is solder, for example.
  • the second conductive bonding layer 34 may contain a sintered body of metal particles.
  • the second conductive member 32 is conductively joined to the second electrodes 212 of the plurality of second elements 21B and the covering portion 15A of the second input terminal 15, as shown in FIG. Thereby, the second electrodes 212 of the plurality of second elements 21B are electrically connected to the second input terminal 15 .
  • the composition of the second conducting member 32 contains copper.
  • the second conducting member 32 is a metal clip.
  • the second conduction member 32 includes a pair of main body portions 321, a plurality of third joint portions 322, a plurality of third connection portions 323, a pair of fourth joint portions 324, a pair of fourth connection portions 325, and a plurality of intermediate portions 326. , and a plurality of lateral beam portions 327 .
  • the pair of body parts 321 are positioned apart from each other in the second direction y.
  • the pair of body portions 321 extends in the first direction x.
  • the pair of body portions 321 are arranged parallel to the first main surface 121A of the first conductive layer 121 and the second main surface 122A of the second conductive layer 122 .
  • the pair of main body portions 321 are located farther from the first main surface 121A and the second main surface 122A than the main body portion 311 of the first conduction member 31 is.
  • the plurality of intermediate portions 326 are positioned apart from each other in the second direction y and positioned between the pair of main body portions 321 in the second direction y.
  • the multiple intermediate portions 326 extend in the first direction x.
  • the dimension in the first direction x of each of the plurality of intermediate portions 326 is smaller than the dimension in the first direction x of each of the pair of main body portions 321 .
  • the plurality of third joints 322 are individually joined to the second electrodes 212 of the plurality of second elements 21B.
  • Each of the plurality of third joints 322 faces one of the second electrodes 212 of the plurality of second elements 21B.
  • the plurality of third connecting portions 323 are connected to both sides of the plurality of third joint portions 322 in the second direction y. Furthermore, the plurality of third connecting portions 323 are connected to one of the pair of main body portions 321 and the plurality of intermediate portions 326 . As viewed in the first direction x, each of the plurality of third connecting portions 323 moves from one of the plurality of third joint portions 322 toward one of the pair of main body portions 321 and the plurality of intermediate portions 326. It is inclined away from the second major surface 122A of the second conductive layer 122 .
  • the pair of fourth joint portions 324 are joined to the cover portion 15A of the second input terminal 15. As shown in FIG. A pair of fourth joint portions 324 are opposed to the covering portion 15A.
  • the pair of fourth connecting portions 325 are connected to the pair of main body portions 321 and the pair of fourth joint portions 324 .
  • the pair of fourth connecting portions 325 is inclined away from the first main surface 121A of the first conductive layer 121 from the pair of fourth joint portions 324 toward the pair of main body portions 321. are doing.
  • the plurality of lateral beam portions 327 are arranged along the second direction y.
  • the plurality of horizontal beam portions 327 includes regions that individually overlap the plurality of first joint portions 312 of the first conduction member 31 .
  • Both sides in the second direction y of the lateral beam portion 327 positioned at the center in the second direction y among the multiple lateral beam portions 327 are connected to the multiple intermediate portions 326 .
  • Both sides in the second direction y of the remaining two horizontal beam portions 327 among the plurality of horizontal beam portions 327 are connected to one of the pair of main body portions 321 and one of the plurality of intermediate portions 326 .
  • the plurality of horizontal beam portions 327 are convex toward the side facing the first main surface 121A of the first conductive layer 121 in the thickness direction z.
  • the semiconductor device A10 further includes a third conductive bonding layer 35, as shown in FIGS.
  • the third conductive bonding layer 35 is interposed between the second electrodes 212 of the multiple second elements 21B and the multiple third bonding portions 322 .
  • the third conductive bonding layer 35 electrically connects the second electrodes 212 of the plurality of second elements 21B and the plurality of third bonding portions 322 .
  • the third conductive bonding layer 35 is solder, for example.
  • the third conductive bonding layer 35 may contain a sintered body of metal particles.
  • the semiconductor device A10 further includes a fourth conductive bonding layer 36, as shown in FIG.
  • the fourth conductive bonding layer 36 is interposed between the covering portion 15A of the second input terminal 15 and the pair of fourth bonding portions 324 .
  • the fourth conductive bonding layer 36 conductively bonds the covering portion 15A and the pair of fourth bonding portions 324 .
  • the fourth conductive bonding layer 36 is solder, for example.
  • the fourth conductive bonding layer 36 may contain a sintered body of metal particles.
  • the sealing resin 50 includes a first conductive layer 121, a second conductive layer 122, a plurality of semiconductor elements 21, a first conductive member 31 and a second conductive member. 32 are covered. Furthermore, the sealing resin 50 partially covers each of the support 11 , the first input terminal 13 , the output terminal 14 and the second input terminal 15 .
  • the sealing resin 50 has electrical insulation. Sealing resin 50 is made of a material containing, for example, black epoxy resin. As shown in FIGS. 4 and 8 to 11, the sealing resin 50 has a first surface 511, a bottom surface 52, a pair of first side surfaces 53, a pair of second side surfaces 54, and a pair of recesses 55.
  • FIG. 10 the sealing resin 50 includes a first conductive layer 121, a second conductive layer 122, a plurality of semiconductor elements 21, a first conductive member 31 and a second conductive member. 32 are covered. Furthermore, the sealing resin 50 partially covers each of the support 11 , the first input terminal 13 , the output terminal 14 and the
  • the first surface 511 faces the same side as the first main surface 121A of the first conductive layer 121 in the thickness direction z.
  • the bottom surface 52 faces the side opposite to the first surface 511 in the thickness direction z.
  • the heat dissipation layer 113 of the support 11 is exposed from the bottom surface 52 .
  • the pair of first side surfaces 53 are positioned apart from each other in the first direction x.
  • the pair of first side surfaces 53 faces the first direction x and extends in the second direction y.
  • the pair of first side surfaces 53 are connected to the first surface 511 .
  • the exposed portion 13B of the first input terminal 13 and the exposed portion 15B of the second input terminal 15 are exposed from one first side surface 53 of the pair of first side surfaces 53 .
  • the exposed portion 14B of the output terminal 14 is exposed from the other first side surface 53 of the pair of first side surfaces 53 .
  • the pair of second side surfaces 54 are positioned apart from each other in the second direction y.
  • the pair of second side surfaces 54 face opposite sides in the second direction y and extend in the first direction x.
  • a pair of second side surfaces 54 are connected to the first surface 511 and the bottom surface 52 .
  • the pair of recessed portions 55 are formed on the first side surface from which the exposed portion 13B of the first input terminal 13 and the exposed portion 15B of the second input terminal 15 of the pair of first side surfaces 53 are exposed. It is recessed from 53 toward the first direction x.
  • the pair of recesses 55 extend from the first surface 511 to the bottom surface 52 in the thickness direction z.
  • the pair of recesses 55 are located on both sides of the first input terminal 13 in the second direction y.
  • the first surface 511 of the sealing resin 50 includes a first region 511A.
  • a mounting member 82 which will be described later, can be arranged in the first region 511A.
  • the range of the first area 511A is indicated by hatching in FIG.
  • the sealing resin 50 has a second surface 512 .
  • the second surface 512 faces the same side as the first surface 511 in the thickness direction z.
  • the first region 511A is located on the opposite side of the first signal terminal 161 with the second surface 512 interposed therebetween in the first direction x.
  • the position of the second surface 512 differs from the position of the first region 511A in the thickness direction z.
  • the second surface 512 is located between the plurality of semiconductor elements 21 and the first region 511A in the thickness direction z.
  • the sealing resin 50 further has a third surface 513 and a fourth surface 514.
  • the third surface 513 faces the side where the first signal terminal 161 is located in the first direction x, and is between the first region 511A and the second surface 512 in each of the thickness direction z and the first direction x.
  • the fourth surface 514 is positioned between the second surface 512 and the first signal terminal 161 in the first direction x.
  • the fourth surface 514 faces the third surface 513 .
  • a pair of grooves 56 recessed from the first surface 511 are formed in the sealing resin 50.
  • the pair of grooves 56 are positioned opposite to each other with the first region 511A interposed therebetween in the first direction x and extend in the second direction y.
  • a pair of grooves 56 includes a second surface 512 , a third surface 513 and a fourth surface 514 . Therefore, the second surface 512, the third surface 513 and the fourth surface 514 extend in the second direction y.
  • FIG. 17 The mounting structure B includes a semiconductor device A10, a heat sink 81, mounting members 82, and a plurality of fastening members 83. As shown in FIG.
  • the mounting member 82 is used to mount the semiconductor device A10 to the heat sink 81.
  • the mounting member 82 is a conductor containing metal.
  • the mounting member 82 is, for example, a leaf spring.
  • the mounting member 82 is positioned between the first signal terminal 161 and the fourth signal terminal 171 in the first direction x.
  • a plurality of fastening members 83 are utilized to secure the mounting member 82 to the heat sink 81 at both ends of the mounting member 82 .
  • the plurality of fastening members 83 are bolts, for example.
  • the semiconductor device A10 includes a sealing resin 50 having a first surface 511 and a second surface 512 facing the same side in the thickness direction z, and protruding from the first surface 511 and electrically connected to the semiconductor element 21 (first element 21A). and a first signal terminal 161 that
  • the first surface 511 includes a first region 511A located on the opposite side of the first signal terminal 161 across the second surface 512 in the first direction x and in which the mounting member 82 can be arranged.
  • the position of the second surface 512 is different from the position of the first region 511A in the thickness direction z. As a result, the creepage distance (distance along the surface of the sealing resin 50) of the sealing resin 50 from the first signal terminal 161 to the first region 511A is increased.
  • the semiconductor device A10 it is possible to suppress a decrease in dielectric strength of the semiconductor device A10 caused by the arrangement of the signal terminals and the mounting member 82 while miniaturizing the semiconductor device A10.
  • the sealing resin 50 has a third surface 513 facing the first direction x and located between the semiconductor element 21 and the first region 511A in the thickness direction z.
  • the third surface 513 is positioned between the first region 511A and the second surface 512 in the first direction x.
  • the sealing resin 50 has a fourth surface 514 located between the second surface 512 and the first signal terminal 161 in the first direction x.
  • the fourth surface 514 faces the third surface 513 . This further increases the creeping distance of the sealing resin 50 from the first signal terminal 161 to the first region 511A.
  • the second surface 512 and the third surface 513 extend in the second direction y.
  • the creepage distance of the sealing resin 50 reaching 511A can also be increased.
  • the semiconductor device A10 further includes a support 11 located on the side opposite to the semiconductor element 21 with the first conductive layer 121 and the second conductive layer 122 interposed therebetween.
  • the first conductive layer 121 and the second conductive layer 122 are bonded to the support 11 .
  • the support 11 includes an insulating layer 111 and a heat dissipation layer 113 located on the side opposite to the first conductive layer 121 and the second conductive layer 122 with the insulating layer 111 interposed therebetween.
  • the thickness of the heat dissipation layer 113 is greater than the thickness of the insulating layer 111, the heat conduction efficiency of the heat dissipation layer 113 in the direction perpendicular to the thickness direction z is improved. It is preferable for improvement of
  • the sealing resin 50 has a pair of recesses 55 recessed in the first direction x from the first side surfaces 53 of the pair of first side surfaces 53 where the first input terminal 13 and the second input terminal 15 are exposed.
  • the pair of recesses 55 are located on both sides of the first input terminal 13 in the second direction y.
  • the composition of the first conduction member 31 and the second conduction member 32 contains copper. Thereby, the electrical resistance of the first conduction member 31 and the second conduction member 32 can be reduced compared to the case where the first conduction member 31 and the second conduction member 32 are wires containing aluminum in their composition. This is suitable for allowing a larger current to flow through the semiconductor element 21 .
  • FIG. 22 A semiconductor device A20 according to the second embodiment of the present disclosure will be described with reference to FIGS. 19 to 24.
  • FIG. 22 the same reference numerals are given to the same or similar elements of the semiconductor device A10 described above, and overlapping descriptions are omitted.
  • the position in FIG. 22 is the same as the position in FIG. 11 showing the semiconductor device A10.
  • the configuration of the sealing resin 50 of the semiconductor device A20 differs from that of the semiconductor device A10.
  • the second surface 512 of the sealing resin 50 is located on the opposite side of the semiconductor element 21 with the first region 511A interposed therebetween in the thickness direction z.
  • the third surface 513 of the sealing resin 50 faces the first region 511A in the first direction x.
  • the fourth surface 514 faces the side opposite to the third surface 513 in the first direction x and is separated from the first signal terminal 161 .
  • the sealing resin 50 is formed with a plurality of protrusions 57 protruding from the first surface 511.
  • the multiple protrusions 57 include a second surface 512 , a third surface 513 and a fourth surface 514 .
  • the plurality of protrusions 57 includes a first signal terminal 161, a second signal terminal 162, a pair of third signal terminals 163, a fourth signal terminal 171, a fifth signal terminal 172, and a pair of sixth signal terminals. They are arranged individually for the signal terminal 173 and the seventh signal terminal 18 .
  • the multiple projections 57 individually overlap the end surfaces 641 of the multiple sleeves 64 .
  • the plurality of protrusions 57 has an inner peripheral surface 571 and an outer peripheral surface 572.
  • the inner peripheral surface 571 and the outer peripheral surface 572 rise from the first surface 511 .
  • the inner peripheral surface 571 surrounds the first signal terminal 161 when viewed in the thickness direction z.
  • Inner peripheral surface 571 includes fourth surface 514 .
  • a cavity is provided between the inner peripheral surface 571 and the first signal terminal 161 .
  • the outer peripheral surface 572 surrounds the inner peripheral surface 571 when viewed in the thickness direction z.
  • the outer peripheral surface 572 includes the third surface 513 . Accordingly, the range of the second surface 512 in the semiconductor device A20 is indicated by hatching in FIG.
  • the semiconductor device A20 includes a sealing resin 50 having a first surface 511 and a second surface 512 facing the same side in the thickness direction z, and protruding from the first surface 511 and electrically connected to the semiconductor element 21 (first element 21A). and a first signal terminal 161 that The first surface 511 includes a first region 511A located on the opposite side of the first signal terminal 161 across the second surface 512 in the first direction x and in which the mounting member 82 can be arranged. The position of the second surface 512 is different from the position of the first region 511A in the thickness direction z.
  • the semiconductor device A20 even with the semiconductor device A20, it is possible to suppress a decrease in dielectric strength of the semiconductor device A20 caused by the arrangement of the signal terminals and the mounting member 82 while miniaturizing the semiconductor device A20. Furthermore, since the semiconductor device A20 has the same configuration as the semiconductor device A10, the semiconductor device A20 also exhibits the effects of the configuration.
  • the sealing resin 50 has an inner peripheral surface 571 including the fourth surface 514 and an outer peripheral surface 572 including the third surface 513.
  • a cavity is provided between the inner peripheral surface 571 and the first signal terminal 161 . This makes it possible to increase the withstand voltage between the first signal terminal 161 and the fourth surface 514 .
  • FIG. 27 A semiconductor device A30 according to the third embodiment of the present disclosure will be described based on FIGS. 25 to 28.
  • FIG. 27 the same reference numerals are given to the same or similar elements of the semiconductor device A10 described above, and overlapping descriptions are omitted.
  • the position in FIG. 27 is the same as the position in FIG. 11 showing the semiconductor device A10.
  • the configuration of the sealing resin 50 of the semiconductor device A30 differs from that of the semiconductor device A10.
  • the second surface 512 of the sealing resin 50 is located on the opposite side of the semiconductor element 21 with the first region 511A interposed therebetween in the thickness direction z.
  • the third surface 513 of the sealing resin 50 faces the first region 511A in the first direction x.
  • the sealing resin 50 does not have the fourth surface 514 in the semiconductor device A30.
  • the sealing resin 50 is formed with a first ridge portion 581 and a second ridge portion 582 protruding from the first surface 511.
  • the first protruding line portion 581 and the second protruding line portion 582 are positioned opposite to each other with the first region 511A interposed therebetween in the first direction x and extend in the second direction y.
  • the first ridge portion 581 and the second ridge portion 582 include a second surface 512 and a third surface 513 . As shown in FIG. 25, part of the second surface 512 is sandwiched between the first signal terminal 161 and the second signal terminal 162 .
  • the third surface 513 straddles the first signal terminal 161 and the second signal terminal 162 when viewed in the first direction x.
  • the first protruding portion 581 integrally surrounds the first signal terminal 161, the second signal terminal 162, the pair of third signal terminals 163, and the seventh signal terminal .
  • the second ridge portion 582 surrounds the fourth signal terminal 171 , the fifth signal terminal 172 , and the pair of sixth signal terminals 173 integrally.
  • the first protruding line portion 581 and the second protruding line portion 582 cover one of the end surfaces 641 of the plurality of sleeves 64 .
  • the semiconductor device A30 includes a sealing resin 50 having a first surface 511 and a second surface 512 facing the same side in the thickness direction z, and protruding from the first surface 511 and electrically connected to the semiconductor element 21 (first element 21A). and a first signal terminal 161 that The first surface 511 includes a first region 511A located on the opposite side of the first signal terminal 161 across the second surface 512 in the first direction x and in which the mounting member 82 can be arranged. The position of the second surface 512 is different from the position of the first region 511A in the thickness direction z.
  • the semiconductor device A30 As well, it is possible to reduce the size of the semiconductor device A30 and suppress the deterioration of the dielectric strength of the semiconductor device A30 caused by the arrangement of the signal terminals and the mounting member 82 . Furthermore, since the semiconductor device A30 has the same configuration as the semiconductor device A10, the semiconductor device A30 also exhibits the effects of the configuration.
  • the third surface 513 of the sealing resin 50 straddles the first signal terminal 161 and the second signal terminal 162 when viewed in the first direction x.
  • the creepage distance of the sealing resin 50 reaching 511A can also be increased.
  • Appendix 1 a semiconductor element; a sealing resin having a first surface facing the thickness direction and covering the semiconductor element; a first signal terminal projecting from the first surface and conducting to the semiconductor element;
  • the sealing resin has a second surface facing the same side as the first surface in the thickness direction, The first surface is located on the opposite side of the first signal terminal with the second surface interposed therebetween in a first direction orthogonal to the thickness direction, and a first surface on which a mounting member can be arranged. containing the area, A semiconductor device, wherein the position of the second surface is different from the position of the first region in the thickness direction.
  • the sealing resin has a third surface facing the first direction and positioned between the first region and the second surface in the thickness direction;
  • the semiconductor device according to appendix 1 wherein the third surface is located between the first region and the second surface in the first direction.
  • Appendix 3. the second surface is located between the semiconductor element and the first region in the thickness direction;
  • the sealing resin has a fourth surface positioned between the second surface and the first signal terminal in the first direction,
  • Appendix 5. 5 5.
  • the semiconductor device according to appendix 3 or 4 wherein the second surface and the third surface extend in a second direction orthogonal to the thickness direction and the first direction.
  • Appendix 6. The second surface is located on the opposite side of the semiconductor element with the first region interposed therebetween in the thickness direction, The semiconductor device according to appendix 2, wherein the third surface faces the side where the first region is located in the first direction.
  • Appendix 7. further comprising a second signal terminal projecting from the first surface and conducting to the semiconductor element; the second signal terminal is positioned next to the first signal terminal in a second direction orthogonal to the thickness direction and the first direction; 7.
  • the sealing resin has a fourth surface positioned between the second surface and the first signal terminal in the first direction, 7.
  • the sealing resin has an inner peripheral surface that rises from the first surface and surrounds the first signal terminal when viewed in the thickness direction, The inner peripheral surface includes the fourth surface, 10.
  • the sealing resin has an outer peripheral surface that rises from the first surface and surrounds the inner peripheral surface when viewed in the thickness direction, 11.
  • Appendix 12. further comprising a first conductive layer and a second conductive layer spaced apart from each other in the first direction;
  • the semiconductor device includes a first device and a second device, The first element is conductively bonded to the first conductive layer, 12.
  • Appendix 14 further comprising a support located on the side opposite to the semiconductor element with the first conductive layer and the second conductive layer sandwiched therebetween in the thickness direction; the support includes an insulating layer, 14.
  • the support includes a heat dissipation layer located on the side opposite to the first conductive layer and the second conductive layer with the insulating layer sandwiched therebetween in the thickness direction; 16.
  • the mounting member is a conductor, 17.

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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PCT/JP2022/031038 2021-09-06 2022-08-17 半導体装置、および半導体装置の取付け構造 Ceased WO2023032667A1 (ja)

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JP2023545425A JPWO2023032667A1 (https=) 2021-09-06 2022-08-17
CN202280059479.9A CN117897808A (zh) 2021-09-06 2022-08-17 半导体装置以及半导体装置的安装结构
DE112022003874.8T DE112022003874T5 (de) 2021-09-06 2022-08-17 Halbleiterbauteil und montagestruktur für das halbleiterbauteil
US18/420,305 US20240203849A1 (en) 2021-09-06 2024-01-23 Semiconductor device and mounting structure for semiconductor device

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004039700A (ja) * 2002-06-28 2004-02-05 Fuji Electric Holdings Co Ltd 半導体パワーモジュール
JP2007073743A (ja) * 2005-09-07 2007-03-22 Denso Corp 半導体装置
JP2011181879A (ja) * 2010-02-04 2011-09-15 Denso Corp 半導体装置およびその製造方法
WO2020129195A1 (ja) * 2018-12-19 2020-06-25 新電元工業株式会社 半導体装置、及び、半導体装置の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6594000B2 (ja) 2015-02-26 2019-10-23 ローム株式会社 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004039700A (ja) * 2002-06-28 2004-02-05 Fuji Electric Holdings Co Ltd 半導体パワーモジュール
JP2007073743A (ja) * 2005-09-07 2007-03-22 Denso Corp 半導体装置
JP2011181879A (ja) * 2010-02-04 2011-09-15 Denso Corp 半導体装置およびその製造方法
WO2020129195A1 (ja) * 2018-12-19 2020-06-25 新電元工業株式会社 半導体装置、及び、半導体装置の製造方法

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