WO2023032190A1 - 電力変換装置 - Google Patents

電力変換装置 Download PDF

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Publication number
WO2023032190A1
WO2023032190A1 PCT/JP2021/032622 JP2021032622W WO2023032190A1 WO 2023032190 A1 WO2023032190 A1 WO 2023032190A1 JP 2021032622 W JP2021032622 W JP 2021032622W WO 2023032190 A1 WO2023032190 A1 WO 2023032190A1
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WIPO (PCT)
Prior art keywords
switching
semiconductor element
voltage
circuit
period
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Ceased
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PCT/JP2021/032622
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English (en)
French (fr)
Japanese (ja)
Inventor
光 中川
哲 村上
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to PCT/JP2021/032622 priority Critical patent/WO2023032190A1/ja
Priority to JP2023544967A priority patent/JP7562007B2/ja
Publication of WO2023032190A1 publication Critical patent/WO2023032190A1/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • This application relates to a power converter.
  • An interleave converter which is a power conversion device that alternately drives multi-phase converters with a set phase difference, for example, a phase difference of 180° for two phases, is compared to a single-phase configuration power conversion device. Since it can reduce the effective value of current, ripple current, etc., it is often used for the purpose of miniaturizing power converters. However, for example, in a two-phase interleaved converter, if the current is biased in one phase converter due to differences in wiring impedance between phases, individual differences in reactors, etc., the loss increases only in this one phase converter, resulting in a large amount of heat generation. Become.
  • a power converter as a device is disclosed.
  • the conventional switching power supply device has a positive electrode side first terminal and a negative electrode side second terminal for inputting a DC voltage, a positive electrode side third terminal and a negative electrode side terminal for outputting a DC voltage, and a current A plurality of arms connected in parallel between the third terminal and the fourth terminal, and a plurality of inductors respectively connected between the first terminal and each arm.
  • a current detection circuit that detects a combined current obtained by combining the inductor currents that respectively flow through the plurality of inductors and the plurality of switch elements to the plurality of inductors; a controller for generating a plurality of switch signals to turn on/off the elements.
  • the current detector is connected between the low-potential-side switch elements of the plurality of arms and the second and fourth terminals.
  • the control unit samples the detection results of the current detection circuits at predetermined timings of the respective switch periods of the plurality of switch elements, and performs current balance control of the plurality of inductor currents based on these sampling results. This makes it possible to balance currents between the arms in an interleaved configuration (see, for example, Patent Document 1).
  • the switch element on the low potential side of each arm is connected between the second terminal and the fourth terminal connected to the reference potential (GND) on the negative electrode side.
  • a current detector detects the inductor current of each arm.
  • passive elements such as a reactor can be reduced in inductance value by increasing the driving frequency of the semiconductor switch, so that the device can be made compact.
  • the switching loss increases due to an increase in the number of times of switching due to an increase in the driving frequency of the semiconductor switch.
  • Increasing the on/off speed of the semiconductor switch is effective in reducing switching loss, but sharp on/off increases the surge voltage applied to the semiconductor switch.
  • a surge voltage is generated when the magnetic energy accumulated in the parasitic inductance of the main current path or the reverse recovery current due to diode reverse recovery flows as a resonance current through the parasitic capacitance of the semiconductor switch and wiring.
  • a resonant current also flows through the current detector connected between the low-potential-side switch element of each arm and the reference potential.
  • the current flowing through the current detector when a surge voltage occurs is a superimposition of the main current to be measured and the resonance current. Therefore, the current detector cannot detect an accurate current value until the resonance current is attenuated.
  • a switching power supply with an interleaved configuration it is difficult to control the semiconductor switches so as to prevent current imbalance in each phase. become.
  • the present application discloses a technique for solving the above-described problems, and provides a power conversion device that reduces surge voltage generated in switching elements due to switching and speeds up convergence of voltage oscillation due to resonance current. intended to provide
  • the power conversion device disclosed in the present application is a switching circuit having a semiconductor element for controlling conduction or interruption of current; a snubber circuit and a first energy storage element connected in parallel with the switching circuit; a current detector that detects a current flowing through the semiconductor element; A control unit that controls the switching circuit,
  • the switching circuit is a first semiconductor element as the semiconductor element having a first end connected to the positive terminal of the first energy storage element; and the semiconductor element having a second end connected to the negative terminal of the first energy storage element.
  • the snubber circuit is a series circuit in which a resistor and a second energy storage element are connected in series; a diode whose cathode side is connected to the connection point between the resistor and the second energy storage element in the series circuit and whose anode side is connected to the first end of the first semiconductor element or the second semiconductor element; configured with the current detector is provided on at least one side of a first end side or a second end side of the second semiconductor element to detect a current flowing through the first semiconductor element or the second semiconductor element;
  • the control unit The switching interval of the semiconductor element in the switching circuit, From the switching point of the first semiconductor element or the second semiconductor element, The sum of the voltage applied to the second energy storage element and the voltage applied to the diode is the first semiconductor element connected to the anode side of the diode of the first semiconductor element or the second semiconductor element due to the surge voltage accompanying the switching. Adjusting to
  • the power conversion device disclosed in the present application it is possible to speed up the convergence of the voltage oscillation due to the resonance current while reducing the surge voltage generated in the semiconductor due to switching.
  • FIG. 1 is a block diagram showing a schematic configuration of a power converter according to Embodiment 1;
  • FIG. 2 is a block diagram showing a schematic configuration of a control circuit of the power converter according to Embodiment 1;
  • FIG. 10 is a block diagram showing a schematic configuration of a power conversion device according to Embodiment 3;
  • FIG. 1 is a block diagram showing a schematic configuration of a power converter 100 according to Embodiment 1.
  • the power conversion device 100 according to the first embodiment constitutes a step-up/step-down chopper circuit which is a type of DC/DC converter, and between a DC voltage source 1 and a smoothing capacitor 4 as a first energy storage element, to step up/down the DC voltage.
  • the power conversion device 100 includes a step-up/step-down converter 15 as a power converter, a snubber circuit 20, a smoothing capacitor 4 as a first energy storage element, and a control circuit 50 as a control section.
  • a DC voltage source 1 is composed of a battery or the like mounted on a vehicle, and supplies DC power.
  • a capacitor may be connected in parallel with the DC voltage source 1 .
  • the buck-boost converter 15 includes a reactor 2, a switching circuit 10, and a current detection resistor 3 as a current detector.
  • the switching circuit 10, which constitutes the buck-boost converter 15, comprises a plurality of semiconductor elements for controlling conduction or interruption of current.
  • the switching circuit 10 of the present embodiment is configured by serially connecting a second end of a switching element 11 as a first semiconductor element and a first end of a switching element 12 as a second semiconductor element.
  • Reactor 2 has a first end connected to a high-voltage terminal of DC voltage source 1 and a second end connected to a connection point between switching element 11 and switching element 12 in switching circuit 10 .
  • the current detection resistor 3 is composed of a shunt resistor or the like, is connected in series to the switching circuit 10, and is arranged so as to detect the current flowing through any of the switching elements included in the switching circuit 10.
  • the current detection resistor 3 is provided between the second end of the switching element 12 of the switching circuit 10 and the reference potential (GND) on the low voltage side of the DC voltage source 1, and the switching element 12 is detected.
  • the current detection resistor 3 In detecting this current, the current detection resistor 3 generates a voltage signal across its both ends based on the flowing current, and inputs the generated voltage signal to the control circuit 50 via wiring connected to both ends thereof.
  • Smoothing capacitor 4 is connected in parallel to switching circuit 10 and current detection resistor 3 which are connected in series.
  • a route from the first end of the switching element 11 of the switching circuit 10 to the positive terminal of the smoothing capacitor 4 is a portion to which a boosted DC voltage is applied.
  • Wiring B is the path from the reference potential (GND) on the low voltage side of the DC voltage source 1 to the negative terminal of the smoothing capacitor 4 .
  • the second end of the switching element 12 of the switching circuit 10 is connected to the negative terminal of the smoothing capacitor 4 via the current detection resistor 3 and this wiring B.
  • the snubber circuit 20 suppresses a surge voltage generated in the switching circuit 10, and is provided between the wiring A and the wiring B in parallel connection with the switching circuit 10 and the smoothing capacitor 4.
  • the snubber circuit 20 includes a series circuit in which a snubber capacitor 22 as a second energy storage element and a regenerative resistor 21 as a resistor are connected in series, and clamp diodes 23 and 24 .
  • the clamp diode 23 has its anode side connected to the drain, which is the first terminal of the switching element 11 , and its cathode side connected to the connection point between the snubber capacitor 22 and the regenerative resistor 21 .
  • the clamp diode 24 has an anode side connected to the drain, which is the first terminal of the switching element 12 , and a cathode side connected to a connection point between the snubber capacitor 22 and the regenerative resistor 21 .
  • connection point between the snubber capacitor 22 and the wiring B is between the current detection resistor 3 and the negative terminal of the smoothing capacitor 4 .
  • a connection point between the regeneration resistor 21 and the wiring A is between the first terminal of the switching element 11 of the switching circuit 10 and the positive terminal of the smoothing capacitor 4 .
  • the snubber capacitor 22 is charged to the same applied voltage as the smoothing capacitor 4 through the regenerative resistor 21 .
  • the control circuit 50 outputs a drive control signal for controlling the ON/OFF of the switching element in the switching circuit 10, and measures the current flowing through the switching element 12 based on the voltage signal input from the current detection resistor 3.
  • the detected current value is used, for example, to generate a drive control signal for controlling ON/OFF of the switching elements 11 and 12 included in the switching circuit 10 .
  • the switching elements 11 and 12 constituting the switching circuit 10 are mainly explained as MOS-FETs (Metal-Oxide-Semiconductor Field-Effect Transistors).
  • MOS-FETs Metal-Oxide-Semiconductor Field-Effect Transistors
  • the switching elements 11 and 12 may be switches of any configuration as long as they can control conduction or interruption of current, and for example, IGBTs (Insulated-Gate Bipolar Transistors) may be used.
  • IGBTs Insulated-Gate Bipolar Transistors
  • the switching element 11 and the switching element 12 are provided with antiparallel diodes 11D and 12D connected in antiparallel to each other. A diode may be used.
  • the configuration of the switching circuit 10 is such that magnetic energy is transferred to the reactor 2 by the current supplied from the DC voltage source 1 by turning on and off switching elements provided therein. is accumulated, and the DC voltage is boosted by the magnetic energy accumulated in the reactor 2 to increase the applied voltage of the smoothing capacitor 4 .
  • the switching element 11 may be composed only of a diode as a semiconductor element for controlling conduction or interruption of current.
  • the configuration of the switching circuit 10 is such that magnetic energy is supplied to the reactor 2 by the current supplied from the smoothing capacitor 4 by turning on and off switching elements provided therein. Any configuration may be used as long as the magnetic energy stored in the reactor 2 can be used to step down the DC voltage and store the energy in the DC voltage source 1 .
  • the switching element 12 may be composed only of a diode as a semiconductor element for controlling conduction or interruption of current.
  • the switching elements 11 and 12 of the switching circuit 10 are connected to the control circuit 50 at their respective gates and sources, and can be turned on and off based on the drive control signal output from the control circuit 50 .
  • the switching circuit 10 may be configured by connecting a plurality of switching elements in parallel or in series.
  • the clamp diodes 23 and 24 that constitute the snubber circuit 20 are diodes such as Schottky barrier diodes and fast recovery diodes that theoretically do not cause reverse recovery or that reverse recovery occurs at high speed. Diode. This can reduce noise due to reverse recovery of the clamp diode.
  • the forward voltage of the clamp diode 24 is set higher than the forward voltage of the anti-parallel diode 11D of the switching element 11 . This allows the current supplied from the reactor 2 to flow mainly to the switching element 11 when the power converter 100 is used as a boost chopper circuit. As a result, the heat generation of the clamp diode 24 is reduced, so that a diode in a small package can be used.
  • the forward voltage of the clamp diode 24 is lower than the forward voltage of the anti-parallel diode 11D, when the current supplied from the reactor 2 flows through the anti-parallel diode 11D, it is synchronized with the turn-on of the anti-parallel diode 11D. Then, by performing synchronous rectification to turn on the switching element 11 , the current supplied from the reactor 2 can be made to flow mainly to the switching element 11 . Since heat generation of the clamp diode 24 is thereby reduced, the clamp diode 24 can be configured in a small package.
  • the regenerative resistor 21 has a resistance value greater than the ON resistance of the switching element 11 .
  • the switching element 11 is turned on to perform synchronous rectification, the current supplied from the reactor 2 flows through the switching element 11 instead of the regenerative resistor 21 regardless of the forward voltage of the clamp diode 24. .
  • the power loss of the regenerative resistor 21 can be reduced, and the regenerative resistor 21 can be constructed in a small package.
  • the snubber capacitor 22 is desirably configured with a capacitor having a capacitance larger than the output capacitance of the switching elements 11 and 12, for example, the capacitance is 10 times or more that of the switching elements.
  • the current detection resistor 3 is connected between the switching element 12 and the reference potential (GND), but the current detection resistor 3 is included in the switching circuit 10 as described above. It suffices if the current flowing through any one of the switching elements can be detected, and it may be connected between the switching element 11 and the switching element 12 .
  • the current detection resistor 3 is connected between the switching element 12 and the reference potential as in this embodiment, the voltage signal composed of the voltage across the current detection resistor 3 is generated based on the reference potential, so insulation is required. It can be input to the control circuit 50 as unnecessary. As a result, the device can be made compact.
  • the current detection resistor 3 has been described as using a shunt resistor, it may be replaced by a current sensor such as a current transformer or a Hall element, and a voltage signal based on the flowing current can be input to the control circuit 50. If so, it can be of any configuration.
  • the control circuit 50 controls ON/OFF of the switching elements 11 and 12 of the switching circuit 10 mainly based on the voltage of the DC voltage source 1 detected by a voltage sensor (not shown) and the voltage applied to the smoothing capacitor 4. do.
  • the control circuit 50 boosts the DC power supplied from the DC voltage source 1, and the voltage applied to the smoothing capacitor 4 reaches a preset target value.
  • the on-duty ratio D of the switching element 12 is controlled so as to approach .
  • the relationship between the input voltage Vin1 of the boost chopper, which is the output voltage of the DC voltage source 1, the output voltage Vout1 of the boost chopper preset as the target value of the smoothing capacitor 4, and the on-duty ratio D1 is generally expressed by the following equation (1). is indicated by
  • the control circuit 50 steps down the DC power supplied from the smoothing capacitor 4 and connects it in parallel to the DC voltage source 1 or the DC voltage source 1 .
  • the on-duty ratio D of the switching element 11 is controlled so that energy is stored in a capacitor (not shown) as a DC voltage of a target value.
  • the relationship between the input voltage Vin2 of the step-down chopper which is the applied voltage of the smoothing capacitor 4, the output voltage Vout2 of the step-down chopper preset as the target value of the voltage of the DC voltage source 1, and the on-duty ratio D2 is generally given by the following equation ( 2).
  • the control circuit 50 uses the current detection resistor 3 to control the switching frequency fsw, the on-duty ratio D, etc. of the switching elements 11 and 12 based on the current value detected at a preset timing. .
  • the control circuit 50 controls the current flowing through the current detection resistor 3 for each phase.
  • the current values detected in the respective phases are controlled so as to approach each other. For example, by decreasing the on-duty ratio D of the switching element of the switching circuit 10 of the phase through which a large amount of current flows, or by increasing the switching frequency fsw, the current flowing through that phase can be reduced.
  • control circuit 50 controls the switching elements 11 and 12 constituting the switching circuit 10 to turn off when the current value detected by the current detection resistor 3 exceeds a preset threshold value. As a result, the control circuit 50 can prevent abnormal heat generation of the switching element due to overcurrent, thereby contributing to miniaturization of the cooler.
  • FIG. 2 is a block diagram showing a schematic configuration of the control circuit 50 of the power converter 100 according to Embodiment 1.
  • the control circuit 50 includes an arithmetic processing unit 52 that generates signals such as a microcomputer and an FPGA (field-programmable gate array), a storage device 51 that stores data and exchanges data with the arithmetic processing unit 52, a current It includes an input circuit 53 for receiving the voltage across the detection resistor 3, output signals from various sensors, signals from other devices, and an output circuit 54 for outputting signals output from the arithmetic processing unit to connected devices.
  • arithmetic processing unit 52 that generates signals such as a microcomputer and an FPGA (field-programmable gate array)
  • a storage device 51 that stores data and exchanges data with the arithmetic processing unit 52
  • a current It includes an input circuit 53 for receiving the voltage across the detection resistor 3, output signals from various sensors, signals from other devices, and an output circuit 54 for outputting signals output from the arithmetic processing unit to connected devices
  • the arithmetic processing unit 52 may be a CPU (Central Processing Unit), an ASIC (Application Specific Integrated Circuit), an IC (Integrated Circuit), various logic circuits such as a DSP (Digital Signal Processor), and various signal processing circuits. Further, the arithmetic processing units 52 may be of the same type or a plurality of combinations of different types, and the processing may be shared and executed by a plurality of processing units.
  • CPU Central Processing Unit
  • ASIC Application Specific Integrated Circuit
  • IC Integrated Circuit
  • various logic circuits such as a DSP (Digital Signal Processor), and various signal processing circuits.
  • DSP Digital Signal Processor
  • the storage device 51 includes a RAM (random access memory) configured to allow data to be read and written from the arithmetic processing unit 52, a ROM (read only memory) configured to allow data to be read from the arithmetic processing unit 52, and the like.
  • the input circuit 53 includes an operational amplifier for amplifying the signal, a buffer, a photocoupler for isolating the signal, an isolator, and the like.
  • the output circuit 54 may include an operational amplifier for amplifying signals, a buffer, a drive circuit for driving switching elements, an isolator for isolating signals, and the like. Note that the control circuit 50 may control the switching circuit 10 based on a signal input from the outside.
  • FIG. 3 is an example of a timing chart showing a schematic operation sequence when power converter 100 according to Embodiment 1 operates as a boost chopper, and the horizontal axis indicates time.
  • the drive control signals "a" and "b" for the switching elements 11 and 12 are H to indicate ON and L to indicate OFF.
  • the current flowing through the switching element 11 is positive when flowing from the source side to the drain side
  • the current flowing through the switching element 12 is positive when flowing from the drain side to the source side.
  • the current flowing from the anode to the cathode is assumed to be positive.
  • the control circuit 50 controls the switching elements 11 and 12 to be turned off, and the magnetic energy accumulated in the reactor 2 passes through the antiparallel diode 11D of the switching element 11 to the smoothing capacitor 4. supplied.
  • the switching element 11 is applied with the forward voltage of the antiparallel diode 11D
  • the switching element 12 is applied with a voltage of about the sum of the applied voltage of the smoothing capacitor 4 and the forward voltage of the antiparallel diode 11D. .
  • the control circuit 50 raises the drive control signal b for the switching element 12 to an H state, thereby turning on the switching element 12 .
  • current begins to flow through the switching element 12 and the current detection resistor 3, the current flowing through the antiparallel diode 11D decreases, and the voltage applied to the switching element 11 increases.
  • a high-frequency resonance current flows through the parasitic capacitance of the switching element 11 due to reverse recovery due to the turn-off of the antiparallel diode 11D, and a surge voltage is generated between the drain and source.
  • the resonant current flowing into the current detection resistor 3 generates an oscillating voltage across the current detection resistor 3 .
  • the voltage applied to the drain of the switching element 11 becomes greater than the sum of the voltage applied to the snubber capacitor 22 and the forward voltage of the clamp diode 23, current begins to flow through the clamp diode 23, and a high-frequency resonance current is generated.
  • the unipolar component is bypassed to snubber capacitor 22 .
  • the surge voltage applied to switching element 11 is clamped and its maximum value is reduced compared to the case without snubber circuit 20 .
  • the resonance current that flows into the current detection resistor 3 through the parasitic capacitance of the switching element 12 is partially bypassed by the clamp diode 23 and reduced, so that the resistance component reduces the time it takes to attenuate. Therefore, the convergence of the oscillating voltage of the current detection resistor 3 caused by the resonance current is accelerated, and the time until the voltage across the current detection resistor 3 is stabilized and an accurate current value can be detected is shortened.
  • the surge energy is accumulated in the snubber capacitor 22 via the clamp diode 23, and the voltage rise of the snubber capacitor 22 ends at timing t3.
  • the surge energy accumulated in the snubber capacitor 22 is output to the smoothing capacitor 4 through the regenerative resistor 21 .
  • the voltage applied to the snubber capacitor 22 reaches the level of the smoothing capacitor 4 to the same extent as the applied voltage of At this time, the energy of the surge is stored in the smoothing capacitor 4 through the regenerative resistor 21 and is effectively utilized by a load (not shown) connected to the smoothing capacitor 4 .
  • the surge generation period Tsur from the generation of a surge to the generation of the next surge is set to
  • the surge energy accumulated in the snubber capacitor 22 is regenerated through the regenerative resistor 21, and by securing a period until the applied voltage becomes small, the surge voltage reduction effect by the snubber circuit 20 and the resonance current
  • the effect of shortening the voltage oscillation time can be obtained.
  • the surge generation period Tsur from when a surge occurs in the switching circuit 10 to when the next surge occurs is defined as follows: after any switching element of the switching circuit 10 switches, then any switching element switches; It is approximately equal to the switching interval Tsw until switching. It should be noted that switching refers to either on or off operation of a switching element.
  • a surge voltage generated in the switching element 11 due to switching is also generated in the switching element 12 in the same manner, and its energy is accumulated in the snubber capacitor 22 through the clamp diode 24, although the details will be described later.
  • the control circuit 50 of the present embodiment adjusts the surge generation period Tsur in the switching circuit 10 to which the snubber circuit 20 is connected, that is, the switching interval Tsw of the switching elements 11 and 12 to the switching period of the switching element 11 or the switching element 12. From this time point, the total voltage of the voltage applied to the snubber capacitor 22 and the voltage applied to the clamp diode 23 (24) becomes smaller than the voltage applied to the drain of the switching element 11 (12) due to the surge voltage accompanying switching. Adjust so as to secure the first period or longer.
  • the total voltage of the voltage applied to the snubber capacitor 22 and the voltage applied to the clamp diode 23 (24) is the voltage applied to the drain of the switching element 11 (12) due to the surge voltage accompanying switching of the switching elements 11 and 12.
  • the state in which the current is smaller than the current is a state in which a surge suppression effect can be obtained in the snubber circuit 20, and is hereinafter referred to as a "surge suppression state" and is used as appropriate.
  • the switching interval Tsw so as to ensure a first period or longer from the switching point of the switching element 11 or switching element 12 to the point of reaching the surge suppression state, the surge voltage is reduced by the snubber circuit 20.
  • the effect of shortening the convergence time of the oscillating voltage can be reliably obtained.
  • the period Tb from timing t2 to timing t3 passes from the electrostatic capacitance Csn of the snubber capacitor 22 and the drain of the switching element 11 to the drain of the switching element 11 through the clamp diode 23, the snubber capacitor 22, and the smoothing capacitor 4.
  • loop inductance L which is the sum of the inductances in the loop circuit path leading up to this, the following equation (3) is given.
  • the period from timing t3 to timing t4 can be derived based on the time constant Ta determined by the product of the capacitance Csn of the snubber capacitor 22 and the resistance value Rsn of the regenerative resistor 21, as described above.
  • the voltage applied to the snubber capacitor 22 decreases to the same level as the voltage applied to the smoothing capacitor 4, as described above, and the snubber circuit 20 achieves the surge suppression effect. be done. However, even if the voltage applied to the snubber capacitor 22 does not decrease to the same extent as the voltage applied to the smoothing capacitor 4, the total voltage of the voltage applied to the snubber capacitor 22 and the voltage applied to the clamp diode 23 (24) will be a surge. If it is in a "surge suppression state" in which the voltage is lower than the voltage applied to the drain of the switching element 11 (12), the snubber circuit 10 can obtain the surge suppression effect.
  • the control circuit 50 sets the voltage rise period Tb of the snubber capacitor 22 due to the surge voltage caused by the switching of the switching elements 11 and 12 as the first period.
  • the switching interval Tsw of the switching elements 11 and 12 is adjusted to ensure a period equal to or longer than the voltage rise period Tb of the snubber capacitor 22 . Therefore, switching of the switching elements 11 and 12 is not performed while the voltage of the snubber capacitor 22 is increasing, and switching is performed when the surge suppression state is reached after the voltage increase period Tb has elapsed. Therefore, a surge suppression effect can be obtained.
  • control circuit 50 sets the voltage rise period Tb of the snubber capacitor 22 as the first period.
  • control circuit 50 may set the first period as follows.
  • the control circuit 50 sets the voltage rise period Tb of the snubber capacitor 22 and the time period of the snubber capacitor 22 derived from the electrostatic capacitance Csn of the snubber capacitor 22 and the resistance value Rsn of the regenerative resistor 21 as the first period.
  • a period Tba is set by adding a constant Ta.
  • the switching interval Tsw of the switching elements 11 and 12 is adjusted so as to ensure a period equal to or longer than the period Tba. Therefore, the surge generation cycle becomes longer than the period from when the voltage applied to snubber capacitor 22 begins to increase due to surge energy until the surge energy accumulated in snubber capacitor 22 is regenerated through regenerative resistor 21 . , the surge reduction effect by the snubber circuit 20 can be reliably obtained.
  • control circuit 50 may set the first period as follows. That is, the control circuit 50 defines the first period as the initial period Ti from the timing t1 at which the drive signal for turning on or off the switching elements 11 and 12 is output to the timing t2 at which the voltage rise period Tb starts. (t1-t2) is set to a period Tbai added to the period Tba obtained by adding the voltage rise period Tb and the time constant Ta.
  • this initial period Ti (t1-t2) varies, for example, between several hundred ns and several us, and thus may have a value that affects the switching interval Tsw. Therefore, the switching interval Tsw of the switching elements 11 and 12 is adjusted to be equal to or longer than the period Tbai including the initial period Ti (t1-t2). be done.
  • control circuit 50 may set the first period as follows. That is, the control circuit 50 may set the time constant Ta as the first period. Except for the case where the loop inductance L in the loop circuit described above is very large, the time constant Ta is several times the period Tb, so the period Tba and the time constant Ta may be considered to be substantially equal. Therefore, except for the case where the loop inductance L is very large, adjusting the switching interval Tsw to ensure a period equal to or longer than the time constant Ta ensures that the switching interval Tsw is equal to or longer than the voltage rise period Tb. Therefore, the surge reduction effect of the snubber circuit 20 can be obtained.
  • control circuit 50 may adjust so that the half period of the switching interval of the switching elements 11 and 12 in the switching circuit 10 is equal to or longer than the first period. As a result, the switching is performed at the time when the stable state in which the surge suppression state is reliably obtained is achieved, so that the surge suppression effect can be obtained more reliably.
  • timing t ⁇ b>5 the control circuit 50 samples the voltage across the current detection resistor 3 and detects the current flowing through the switching element 12 .
  • the drive control signal for each of the switching elements 11 and 12 is generated by a carrier wave synchronized with the switching frequency, controllability can be improved by sampling at peaks or troughs of the carrier wave, that is, at the central phase of the on period or off period of the drive control signal. good. Therefore, this timing t5 is the central phase of the ON period of the switching element 12 .
  • the timing t5 at which the control circuit 50 of the power converter 100 of the present embodiment samples the current value is the timing after the first period has passed from the timing t0 at which the switching elements 11 and 12 are switched.
  • the control circuit 50 samples the current at the peak or trough timing of the carrier wave, that is, at half the ON period or OFF period of the drive control signal for the switching elements 11 and 12 included in the switching circuit 10. I do. Therefore, the period Ts from the timing t0 at which the switching elements 11 and 12 are switched to the timing t5 at which the control circuit 50 samples the current value can be expressed by the following equation (4) using the switching frequency fsw and the duty ratio D. can be done.
  • the control circuit 50 makes the period Ts from switching of the switching elements 11 and 12 to sampling of the current value longer than the first period from switching of the switching elements 11 and 12 to the surge suppression state.
  • the switching frequency fsw and the duty ratio D of the switching elements 11 and 12 are set as follows.
  • control circuit 50 sets the period Tba obtained by adding the voltage rise period Tb of the snubber capacitor 22 and the time constant Ta of the snubber capacitor 22 as the first period until the surge suppression state is reached, the energy of the surge accompanying switching is reduced to After being absorbed by snubber capacitor 22 by clamp diode 23, control circuit 50 will sample the current value. As a result, the current can be accurately detected while the detection error caused by the resonance current is reduced.
  • the timing t5 is later than the timing t4, but the relationship between these timings changes depending on the setting of the sampling timing by the control circuit 50 and the time constant Ta. Therefore, the current value at timing t5 may be sampled before timing t4, for example. That is, if the timing t5 at which the control circuit 50 samples the current value is the timing after the first period has elapsed from the timing t0 at which the switching elements 11 and 12 are switched, the surge suppression effect of the snubber circuit 20 can be obtained. Sampling is performed in the resulting surge suppression state, allowing accurate current detection.
  • the control circuit 50 causes the drive control signal b for the switching element 12 to fall to the L state, thereby turning the switching element 12 off.
  • the driving frequency of the switching element set in the control circuit 50 the output voltage of the DC voltage source 1 detected by a voltage sensor (not shown), and smoothed It is determined by the step-up ratio determined from the voltage applied to the capacitor 4 .
  • the control circuit 50 turning off the switching element 12
  • the current flowing through the switching element 12 decreases, the voltage applied to the switching element 12 increases, and current begins to flow through the antiparallel diode 11D of the switching element 11 to the smoothing capacitor 4.
  • the magnetic energy accumulated in the parasitic inductance of the wiring flows through the parasitic capacitance of the switching element 12 as a resonance current, and a surge voltage is generated in the switching element 12 .
  • the voltage applied to the switching element 12 becomes greater than the sum of the voltage applied to the snubber capacitor 22 and the forward voltage of the clamp diode 24, current begins to flow through the clamp diode 24, and the unipolar component of the high-frequency current Bypassed to snubber capacitor 22 .
  • the surge voltage applied to switching element 12 is clamped and its maximum value is reduced compared to the case without snubber circuit 20 .
  • the resonance current that flows into the current detection resistor 3 through the parasitic capacitance of the switching element 12 is partially bypassed by the clamp diode 24 and reduced, so that the resistance component reduces the time it takes to attenuate. Therefore, the convergence time of the oscillating voltage of the current detection resistor 3 caused by the resonance current is shortened, and the time until the voltage across the current detection resistor 3 is stabilized and an accurate current value can be detected is shortened.
  • period Tb from timing t7 to timing t8 is equal to the period from timing t2 to timing t3 described above, but the voltage applied to snubber capacitor 22 depends on the amount of energy that causes the surge voltage. , may differ between timing t3 and timing t8.
  • the voltage applied to the snubber capacitor 22 becomes equal to that of the smoothing capacitor. 4 to the same extent as the applied voltage.
  • the control circuit 50 raises the drive control signal a for the switching element 11 to the H state, and performs synchronous rectification to turn on the switching element 11 in synchronization with the turning on of the antiparallel diode 11D.
  • the period from timing t6 to timing t10 is a dead time Td1 provided for the purpose of preventing a period in which the switching elements 11 and 12 are turned on at the same time due to signal delay or the like, and is set to about 100 ns, for example. be done.
  • the control circuit 50 lowers the drive control signal a for the switching element 11 to the L state, turns off the switching element 11, and ends the synchronous rectification. As a result, the current flows through the antiparallel diode 11D of the switching element 11.
  • the power conversion device 100 that operates as a boost chopper circuit operates as a boost chopper circuit.
  • An input DC voltage can be stepped up. Therefore, the control circuit 50 need not perform synchronous rectification by turning on the switching element 11 . Therefore, as described above, instead of the switching element 11, only a diode as a semiconductor element for controlling conduction or interruption of current may be used.
  • Power conversion device 100 of the present embodiment that operates as a boost chopper, when it is confirmed by a voltage sensor (not shown) that the applied voltage of smoothing capacitor 4 has not reached a target value, power is increased in accordance with the control drive signal from control circuit 50. Continuing the conversion operation. At this time, at timing t1R after the dead time Td2 has elapsed from timing t11, the power converter 100 performs the same operation as at timing t1, and repeats the operation from timing t1 to timing t10.
  • the period from timing t11 to timing t1R is a dead time Td2 provided for the purpose of preventing a period in which the switching elements 11 and 12 are turned on at the same time due to signal delay or the like.
  • the dead time Td1 is 100 ns. set to an extent.
  • the control circuit 50 When a voltage sensor (not shown) detects that the voltage applied to the smoothing capacitor 4 has reached an arbitrarily set target value, the control circuit 50 generates a drive control signal for the switching elements 11 and 12 of the switching circuit 10. may be fixed at L and held in the off state. As a result, loss due to unnecessary switching of the switching elements 11 and 12 of the switching circuit 10 can be reduced, and the amount of heat generated can be reduced, which contributes to miniaturization of the cooler.
  • the power converter 100 can also operate in the current discontinuous mode.
  • the discontinuous current mode after the switching element 11 is turned on at timing t10, the current flowing through the switching element 11 is commutated, flows from the drain to the source, and flows from the reactor 2 to the DC voltage source 1.
  • a surge voltage is generated between the drain and source of the switching element 11 when the switching element 11 is turned off. Since the energy of the surge voltage generated at this time is bypassed to the snubber capacitor 22 through the clamp diode 23, the power conversion device 100 is provided with the snubber circuit 20 so that even in the current discontinuous mode of the reactor 2, the surge voltage can be reduced, and the convergence time of the oscillating voltage across the current detection resistor 3 due to the resonance current when a surge occurs can be shortened.
  • the operation of power conversion device 100 as a boost chopper that boosts the DC power output from DC voltage source 1 and outputs it to smoothing capacitor 4 has been described in detail.
  • the surge voltage applied to the switching elements 11 and 32 of the switching circuit 10 by the snubber circuit 20 of the power conversion device 100 is reduced, and the resonance voltage generated in the current detection resistor 3 connected in series with the switching elements converges.
  • the effect of shortening the time can be obtained with any circuit that turns on or off any switching element in the switching circuit 10 .
  • the snubber circuit 20 can exhibit the same effect. .
  • FIG. 4 is a block diagram showing a schematic configuration of a snubber circuit 20A having a configuration different from that of the snubber circuit 20, which is included in the power converter 100 according to the first embodiment.
  • FIG. 5 is a block diagram showing a schematic configuration of a snubber circuit 20B having a configuration different from that of the snubber circuit 20 provided in the power converter 100 according to the first embodiment.
  • the snubber circuit 20A shown in FIG. 4 has a configuration in which a resistor 25 is connected in series with the clamp diode 23 and a resistor 26 is connected in series with the clamp diode 24.
  • FIG. 4 The current that flows into the snubber capacitor 22 through the clamp diodes 23 and 24 when a surge occurs is determined by the impedance of the path through which the current flows. .
  • the heat generation of the clamp diodes 23 and 24 increases, and it may be necessary to use diodes in large packages or to increase the size of heat sinks for heat dissipation.
  • the resistors 25 and 26 in series with the clamp diodes 23 and 24 of the snubber circuit 20A, respectively, the peak value of the inrush current flowing into the snubber capacitor 22 through the clamp diodes 23 and 24 can be suppressed. can. As a result, the heat generation of the clamp diodes 23 and 24 can be reduced, so that it is possible to use small package diodes for the clamp diodes 23 and 24 or reduce the size of the heat sink for heat dissipation.
  • a series body in which a resistor 25 and a capacitor 27 are connected in series is connected in parallel to a clamp diode 23, and a series body in which a resistor 26 and a capacitor 28 are connected in series is clamped. It is configured to be connected in parallel with the diode 24 .
  • the clamp diode is composed of a fast recovery diode or the like, the current in the clamp diode drops at timing t3 shown in FIG. Diode recovery that stops at Abrupt generation and termination of reverse current, such as diode recovery, induces a voltage in the inductance of the current path, which may cause voltage oscillation and cause conduction noise.
  • the reverse current generated by the diode recovery can be absorbed by the capacitor 27, and the conduction noise can be suppressed. contributes to the reduction of
  • the configuration of the snubber circuit 20B can attenuate the reverse current by the resistor 25 connected in series with the capacitor 27, the voltage oscillation caused by the diode recovery can be quickly converged.
  • the snubber circuit 20B is configured on the assumption that the clamp diodes 23 and 24 are diodes that cause a recovery phenomenon.
  • conduction noise can be reduced by configuring the clamp diode with an element such as a Schottky barrier diode that theoretically does not generate recovery.
  • the snubber circuit 20 has two clamp diodes 23 and 24, and the clamp diodes 23 and 24 are connected to the drain of the switching element 11 and the drain of the switching element 12, respectively.
  • the configuration is not limited to this, and a configuration in which the snubber circuit includes only one clamp diode and only one of the switching element 11 and the switching element 12 is connected to the clamp diode may be employed. In this case, although the effect of suppressing surge voltage in both switching element 11 and switching element 12 cannot be obtained, the effect of suppressing surge voltage in one of the switching elements to which the clamp diode is connected can be obtained.
  • control circuit 50 controls the switching element by, for example, a voltage detector. 11 or the drain voltage of the switching element 12 may be measured.
  • the power conversion device of the present embodiment configured as described above is a switching circuit having a semiconductor element for controlling conduction or interruption of current; a snubber circuit and a first energy storage element connected in parallel with the switching circuit; a current detector that detects a current flowing through the semiconductor element; A control unit that controls the switching circuit,
  • the switching circuit is a first semiconductor element as the semiconductor element having a first end connected to the positive terminal of the first energy storage element; and the semiconductor element having a second end connected to the negative terminal of the first energy storage element.
  • the snubber circuit is a series circuit in which a resistor and a second energy storage element are connected in series; a diode whose cathode side is connected to the connection point between the resistor and the second energy storage element in the series circuit and whose anode side is connected to the first end of the first semiconductor element or the second semiconductor element; configured with the current detector is provided on at least one side of a first end side or a second end side of the second semiconductor element to detect a current flowing through the first semiconductor element or the second semiconductor element;
  • the control unit The switching interval of the semiconductor element in the switching circuit, From the switching point of the first semiconductor element or the second semiconductor element, The sum of the voltage applied to the second energy storage element and the voltage applied to the diode is the first semiconductor element connected to the anode side of the diode of the first semiconductor element or the second semiconductor element due to the surge voltage accompanying the switching. Adjusting to
  • the switching circuit is connected in parallel with the snubber circuit, and the snubber circuit is connected in parallel with the smoothing capacitor as the first energy storage element.
  • This snubber circuit is configured by serially connecting a resistor and a snubber capacitor as a second energy storage element, the cathode side is connected to the connection point between the resistor and the snubber capacitor, and the anode side is connected to the first semiconductor element or the second semiconductor element of the switching circuit. It has a diode connected to the first end of the semiconductor element.
  • the current detector is provided on at least one of the first end side and the second end side of the second semiconductor element, and detects the current flowing through the first semiconductor element or the second semiconductor element.
  • the first semiconductor element or the first semiconductor element by the resonance current caused by the switching of the switching circuit.
  • a portion of the energy of the surge voltage in the two semiconductor devices can be bypassed to the snubber capacitor by the clamp diode. Therefore, the surge voltage applied to the switching element is clamped and the maximum value is reduced.
  • the resonance current that flows into the current detection resistor through the parasitic capacitance of the switching element can be partially bypassed by the clamp diode and snubber capacitor and reduced, thereby shortening the time until it decays. Therefore, the convergence time of the oscillating voltage in the current detector caused by the resonance current can be shortened, and the time required to detect an accurate current value from the voltage across the current detection resistor can be shortened.
  • control unit of the present embodiment adjusts the switching interval of the semiconductor element in the switching circuit from the switching time of the first semiconductor element or the second semiconductor element to the voltage applied to the second energy storage element and the voltage applied to the diode. Adjustment is made to ensure a first period or more until a surge suppression state in which the sum becomes smaller than the voltage applied to the first terminal of the first semiconductor element or the second semiconductor element due to the surge voltage accompanying switching. As a result, the surge voltage is generated in a state in which the snubber circuit has a large effect of reducing the surge voltage and shortening the resonance current oscillation time, so that the surge voltage reduction effect and the effect of shortening the voltage oscillation time due to the resonance current can be reliably obtained.
  • the control unit as the first period, of the semiconductor element derived based on an inductance in a loop circuit including the diode, the second energy storage element, and the first energy storage element, and the capacitance of the second energy storage element; setting a voltage rise period Tb of the second energy storage element due to a surge voltage accompanying switching; It is.
  • the control unit sets the voltage rise period Tb of the snubber capacitor as the first period, thereby securing a period equal to or longer than the voltage rise period Tb as the switching interval.
  • switching is not performed while the voltage of the snubber capacitor is increasing, and switching is performed when the surge suppression state occurs after the voltage increase period Tb has elapsed, resulting in a high surge voltage reduction. effect and the effect of shortening the convergence time of the oscillating voltage by the resonance current can be obtained.
  • the control unit as the first period, the voltage rise period Tb; setting a period Tba obtained by adding a time constant Ta of the second energy storage element, which is derived from the capacitance of the second energy storage element and the resistance value of the resistor; It is.
  • the control unit sets the period Tba obtained by adding the voltage rise period Tb of the snubber capacitor and the time constant Ta of the second energy storage element as the first period, so that the switching interval is longer than this period Tba. Secure the period. Therefore, the surge generation period becomes longer than the period from when the voltage applied to the snubber capacitor starts to increase due to the surge energy until the surge energy accumulated in the snubber capacitor is regenerated through the regenerative resistor, and the snubber circuit The high surge voltage reduction effect due to the resonance current and the shortening effect of the convergence time of the oscillating voltage due to the resonance current are increased.
  • the control unit as the first period, an initial period Ti from the output time of the drive signal for switching the semiconductor element to the start time of the voltage rise period Tb of the semiconductor element, a period Tba obtained by adding the voltage rise period Tb and the time constant Ta; set the period Tbai by adding It is.
  • control unit sets the period Tbai obtained by adding the initial period Ti and the period Tba as the first period, thereby securing a switching interval equal to or longer than this period Tbai.
  • the control unit adjusts the switching circuit so that a half period of the switching interval of the semiconductor element in the switching circuit is longer than or equal to the first period. It is.
  • the switching is performed when the surge suppression state is reliably obtained and the stable state is reached, so that the effect of reducing the surge voltage by the snubber circuit and the effect of shortening the convergence time of the oscillating voltage by the resonance current can be ensured. .
  • the control unit After the first period has passed since the switching of the semiconductor element in the switching circuit, current detection is performed by the current detector; It is.
  • the current detector is provided on the second end side of the second semiconductor element to detect a current flowing through the second semiconductor element; It is.
  • the voltage signal obtained by the current detector is based on the reference potential, so it can be input to the control unit without insulation, contributing to the miniaturization of the power converter.
  • the power conversion device of the present embodiment configured as described above, comprising a plurality of said diodes, Anodes of the plurality of diodes are respectively connected to the first end of the first semiconductor element and the second end of the second semiconductor element, It is.
  • the surge voltage generated in the first semiconductor element and the second semiconductor element can be reduced, respectively, so that the operation of the power converter can be stabilized.
  • a reactor having a first end connected to a DC power supply,
  • the first semiconductor element and the second semiconductor element are switching elements that control conduction or interruption of current based on a drive signal from the control unit, and anti-parallel switching elements are connected to the first semiconductor element and the second semiconductor element, respectively.
  • Diodes are connected anti-parallel, a second end of the reactor is connected to a connection point between the first semiconductor element and the second semiconductor element;
  • the control unit controlling the first semiconductor element and the second semiconductor element to boost the voltage from the DC power supply to a set voltage; Synchronous rectification to turn on the first semiconductor element in synchronization with turning on of the anti-parallel diode of the first semiconductor element, It is.
  • the power conversion device when configured as a boost chopper circuit, synchronous rectification is performed to turn on the first semiconductor element in synchronization with the turn-on of the antiparallel diode of the first semiconductor element, thereby supplying power from the reactor.
  • the applied current can be made to flow mainly to the first semiconductor element regardless of the forward voltage of the clamp diode. As a result, heat generation of the clamp diode can be reduced, and the clamp diode can be configured in a small package.
  • the forward voltage of the diode is set higher than the forward voltage of the anti-parallel diode of the first semiconductor element, It is.
  • the power converter when configured as a boost chopper circuit, the current supplied from the reactor can be made to flow mainly to the first semiconductor element. As a result, heat generation of the clamp diode can be reduced, and the clamp diode can be configured in a small package.
  • the resistor is configured to have a resistance value greater than the ON resistance of the semiconductor element of the switching circuit, It is.
  • the power conversion device when configured as a boost chopper circuit and synchronous rectification of the first semiconductor element is performed, the current supplied from the reactor is supplied to the first It can be made to flow to a semiconductor device. As a result, the power loss of the regenerative resistor can be reduced, and the regenerative resistor can be configured in a small package.
  • the capacitance of the capacitor being configured to be greater than the capacitance between the first and second ends of the semiconductor element; It is.
  • the larger the capacitance of the snubber capacitor the less likely it is that the voltage applied to the snubber capacitor will increase, thereby improving the effect of reducing the surge voltage.
  • the larger the electrostatic capacitance of the snubber capacitor is than the drain-source capacitance of the first semiconductor element, the easier it is for a resonant current to flow into the snubber capacitor, resulting in a further surge. Voltage is reduced. As a result, the time required for the voltage across the current detection resistor to stabilize can be shortened.
  • the diode in the snubber circuit includes: A series body of series-connected resistors and capacitors is connected in parallel, or, resistors are connected in series, It is.
  • the series body of the series-connected resistor and capacitor is connected in parallel to the diode, so that the reverse current generated by the diode recovery can be absorbed by the capacitor, which contributes to the reduction of conduction noise.
  • the reverse current can be attenuated by the resistor connected in series with the capacitor, the voltage oscillation caused by the diode recovery can be quickly converged.
  • the resistor in series with the diode it is possible to suppress the peak value of the inrush current that flows into the snubber capacitor through the clamp diode. As a result, the heat generation of the clamp diode can be reduced, which contributes to the miniaturization of the device.
  • FIG. 6 is a block diagram showing a schematic configuration of a power conversion device 200 according to Embodiment 2. As shown in FIG. Parts similar to those in the first embodiment are denoted by the same reference numerals, and descriptions thereof are omitted.
  • the power conversion device 200 includes switching circuits for a plurality of phases, and has switching circuits 210a and 210b for two phases in the present embodiment.
  • the power conversion device 200 is configured by connecting in parallel a first buck-boost converter 15a having a switching circuit 210a and a second buck-boost converter 15b having a switching circuit 210b. Then, the control circuit 50 outputs drive control signals to the switching elements of the first buck-boost converter 15a and the second buck-boost converter 15b to set the outputs of the two buck-boost converters 15a and 15b to the set values.
  • An interleave converter is configured by performing interleave control to alternately drive with a phase difference (for example, a phase difference of 180°).
  • first buck-boost converter 15a and second buck-boost converter 15b each have the same configuration as buck-boost converter 15 according to the first embodiment. That is, the switching circuits 210a and 210b in this embodiment correspond to the switching circuit 10 in the first embodiment. Switching elements 11a, 12a, 11b, and 12b in the present embodiment correspond to switching elements 11 and 12 in the first embodiment. Antiparallel diodes 11Da, 12Da, 11Db, and 12Db in the present embodiment correspond to antiparallel diodes 11D and 12D in the first embodiment. Reactors 2a and 2b in the present embodiment correspond to reactor 2 in the first embodiment. Current detection resistors 3a and 3b in the present embodiment correspond to current detection resistor 3 in the first embodiment.
  • a first end of the reactor 2a of the first buck-boost converter 15a and a first end of the reactor 2b of the second buck-boost converter 15b are connected to a high-voltage terminal of the DC voltage source 1, respectively.
  • the current detection resistors 3a, 3b are provided between the second ends of the switching elements 12a, 12b of the switching circuits 210a, 210b and the reference potential (GND) on the low voltage side of the DC voltage source 1.
  • the smoothing capacitor 4 is connected in parallel to the first buck-boost converter 15a and the second buck-boost converter 15b.
  • the first terminal of the switching element 11a of the first buck-boost converter 15a and the first terminal of the switching element 11b of the second buck-boost converter 15b are connected to the positive terminal of the smoothing capacitor 4, respectively.
  • the snubber circuit 220 is connected in parallel with the switching circuits 210 a and 210 b and the smoothing capacitor 4 between the wiring A and the wiring B.
  • the snubber circuit 220 in the present embodiment has a single configuration including a set of snubber capacitors 22 and regenerative resistors 21 .
  • the number N (one) of snubber circuits 220 is less than the number S (two) of buck-boost converters 15a and 15b.
  • This single snubber circuit 220 comprises four clamp diodes 23a, 24a, 23b, 24b.
  • the clamp diode 23 a has its anode side connected to the drain, which is the first terminal of the switching element 11 a, and its cathode side connected to the connection point between the snubber capacitor 22 and the regenerative resistor 21 .
  • the clamp diode 24 a has its anode side connected to the drain, which is the first terminal of the switching element 12 a , and its cathode side connected to the connection point between the snubber capacitor 22 and the regenerative resistor 21 .
  • the clamp diode 23 b has its anode side connected to the drain, which is the first terminal of the switching element 11 b , and its cathode side connected to the connection point between the snubber capacitor 22 and the regenerative resistor 21 .
  • the clamp diode 24 b has its anode side connected to the drain, which is the first terminal of the switching element 12 b , and its cathode side connected to the connection point between the snubber capacitor 22 and the regenerative resistor 21 .
  • the clamp diodes 23a, 24a , 23 b , 24 b and part of the high frequency current is bypassed to the snubber capacitor 22 . That is, in the power converter 200 of the present embodiment, the energy of the surge voltage generated in each of the switching circuits 210a and 210b is absorbed by one snubber capacitor 22.
  • the switching circuits 210a and 210b perform interleave control to alternately drive with a set phase difference. Therefore, the surge voltages generated in each of the switching circuits 210a and 210b occur at different timings. Therefore, even if the snubber circuit 220 included in the power conversion device 200 is configured as one unit including a set of the snubber capacitor 22 and the regenerative resistor 21 and the surge is absorbed by one snubber capacitor 22, two A sufficient effect of reducing the surge voltage and an effect of shortening the convergence time of the oscillating voltage of the current detection resistors 3a, 3b can be obtained for each of the switching circuits 210a, 210b of the step-up/down converters 15b, 15b. Also, compared to a configuration in which one snubber circuit 220 is provided for each of the buck-boost converters 15a and 15b, the configuration can be made smaller.
  • the time required to detect an accurate current value from the voltage across the current detection resistors 3a and 3b is shortened compared to when the snubber circuit 220 is not provided. If the current values flowing through the current detection resistors 3a and 3b of each phase are different, the control circuit 50 can quickly detect this and quickly control the switching elements so that the current values detected in each phase approach each other. can. In this way, the operation of the power conversion device 200 can be stabilized, and there is no need to apply a switching element or the like with a large current capacity in other phases in order to match the phase in which a large amount of current flows. can contribute.
  • the present invention is not limited to this. If the number of combinations of snubber capacitors 22 and regenerative resistors 21, that is, the number N of snubber circuits 220 is smaller than the number S of switching circuits 210a and 210b, one snubber circuit is provided for one switching circuit. It can be configured to be small compared to the configuration provided with.
  • the snubber circuit 220 of the power conversion device 200 is connected to the switching elements 11a, 12a, 11b, and 12b of the switching circuits 210a and 210b of the plurality of buck-boost converters 15a and 15b, respectively, and the snubber capacitor 22 is connected to each surge current.
  • the voltage applied to snubber capacitor 22 increases after each switching element is turned on or off. If the voltage applied to the snubber capacitor 22 increases, the voltage required to turn on the clamp diodes 23a, 24a, 23b, and 24b also increases, making it difficult for the clamp diodes 23a, 24a, 23b, and 24b to turn on when a surge occurs. As a result, the effect of reducing the surge voltage by the snubber circuit 220 and accelerating the convergence of the resonance voltage of the current detection resistor is reduced.
  • the control circuit 50 of the power conversion device 200 of the present embodiment can
  • the switching period Tsw from the switching of any one of the switching elements 11a, 12a, 11b, 12b to the next switching of any of the switching elements 11a, 12a, 11b, 12b is equal to the snubber capacitor 22 and the voltage applied to the clamp diodes 23a, 24a, 23b, and 24b becomes smaller than the voltage applied to the drains of the switching elements 11a, 12a, 11b, and 12b due to the surge voltage associated with switching. Adjust so as to secure the first period or longer.
  • the snubber circuit 220 can be used in a state in which the effect of reducing the surge voltage and the effect of shortening the resonance current oscillation time are large.
  • the control circuit 50 sets the voltage rise period Tb of the snubber capacitor 22 due to the surge voltage associated with switching as the first period.
  • Tsw a period common to the switching circuits 210a and 210b of each phase is used.
  • the voltage rise period of snubber capacitor 22 is indicated using loop inductance L, which is the sum of the inductances in the loop circuit path through which the resonant current flows.
  • the loop inductance L is different for each phase.
  • the control circuit 50 derives the voltage rise period Tb of the snubber capacitor 22 for each phase. That is, the loop inductance La in the loop circuit including the diode 23a (24a), the snubber capacitor 22, and the smoothing capacitor 4, which is the path of the resonance current flowing due to the surge voltage associated with the switching of the switching elements 11a and 12a of the switching circuit 210a, is is used to derive the voltage rise period Tb1.
  • control circuit 50 compares the lengths of the derived voltage rise period Tb1 and voltage rise period Tb2, and sets the longest voltage rise period Tb (Tb1 or Tb2) as the first period.
  • the switching interval Tsw commonly used in the switching circuits 210a and 210b of each phase is adjusted to ensure a period longer than the longest voltage rise period Tb. Therefore, switching is not performed in the switching circuits 210a and 210b connected to the same snubber circuit 20 while the voltage of the snubber capacitor 22 is rising. In this manner, switching is performed when the surge suppression state is reached after the voltage rise period Tb has elapsed, so that a sufficient surge suppression effect can be obtained.
  • the power conversion device of the present embodiment configured as described above is
  • the switching circuits for a plurality of phases are connected in parallel,
  • the control unit performs interleave control to drive the output of the switching circuit of each phase with a set phase difference,
  • the control unit as the first period, a voltage rise period Tb of the second energy storage element connected to the switching circuit,
  • An inductance in a loop circuit including the diode, the second energy storage element, and the first energy storage element serving as a path for a resonance current flowing due to a surge voltage associated with switching of the semiconductor elements of the switching circuit of each phase. is derived for each phase using and the length of the derived voltage rise period Tb is compared, and the voltage rise period Tb of the longest period is set. It is.
  • the power conversion device of the present embodiment configured as described above is The number N of the snubber circuits is less than the number S of the switching circuits, It is.
  • the configuration can be made smaller.
  • FIG. 7 is a block diagram showing a schematic configuration of a power converter 300 according to Embodiment 3. As shown in FIG. The same reference numerals are assigned to the same parts as in the first and second embodiments, and the description thereof is omitted.
  • the power conversion device 300 includes two switching circuits 310a and 310b connected in parallel to convert a DC voltage from a DC voltage source 307 as a first energy storage element into an AC voltage.
  • the switching circuit 310a is configured by connecting the switching element 11a and the switching element 11b in series.
  • the switching circuit 310b is configured by connecting the switching element 11b and the switching element 12b in series.
  • the power conversion device 300 is a full bridge inverter configured by connecting a connection point between the switching elements 11 a and 12 a and a connection point between the switching elements 11 b and 12 b via a load 316 .
  • the load 316 may be of any kind, for example an inductive load such as a motor.
  • the power conversion device 300 applies an AC voltage to the load 316 by alternately turning on and off the combination of the switching elements 11a and 12b and the switching elements 12a and 11b.
  • Current detection resistors 3a and 3b are connected to switching circuits 310a and 310b, respectively. connected respectively.
  • snubber circuit 320a is provided for switching circuit 310a
  • snubber circuit 320b is provided for switching circuit 310b.
  • the clamp diodes 23a and 24a of the snubber circuit 320a have anode sides connected to drain sides of the switching elements 11a and 12a, respectively, and cathode sides connected to a connection point between the snubber capacitor 22a and the regenerative resistor 21a.
  • the clamp diodes 23b and 24b of the snubber circuit 320b have anode sides connected to drain sides of the switching elements 11b and 12, respectively, and cathode sides connected to a connection point between the snubber capacitor 22b and the regenerative resistor 21b.
  • the power converter 300 includes snubber circuits 320a and 320b in the switching circuits 310c and 310b, respectively.
  • switching elements arranged diagonally generally turn on and off at the same time. do.
  • the device can be made compact with a small number of parts. energy flows into one snubber capacitor at the same time, the voltage applied to the snubber capacitor greatly increases, making it difficult to reduce the surge voltage and accelerate the convergence of the oscillating voltage of the current detection resistor.
  • the power conversion device 300 has a configuration in which snubber circuits 320a and 320b having snubber capacitors 22a and 22b and regenerative resistors 21a and 21b are connected to the switching circuits 310a and 310b, respectively.
  • This enables reduction and early convergence of the oscillating voltage of the current detection resistors 3a and 3b.
  • the case where the diagonally arranged switching elements are turned on and off at the same time has been described as an example, but it is not necessarily the case that they are turned on and off simultaneously. A similar effect can be obtained with a configuration in which switching is performed substantially simultaneously.
  • the power converter 300 has shown a full-bridge inverter as an example, it may be configured by, for example, a half-bridge inverter, a multi-phase inverter, a single-switch converter, or the like.
  • a similar effect can be obtained with a configuration in which the anode side is connected and the cathode side of the clamp diode is connected to the middle point, which is the connection point between the snubber capacitor and the regenerative resistor.
  • the power conversion device of the present embodiment configured as described above is A full-bridge inverter circuit is configured by connecting the two switching circuits in parallel, The control unit simultaneously turns on and off the semiconductor elements at diagonal positions in the switching circuits connected in parallel to convert the DC voltage from the first energy storage element into an AC voltage, The snubber circuit is provided for each switching circuit, It is.
  • a snubber circuit is provided for each switching circuit.
  • the energy of the surge applied to the two switching elements arranged diagonally and turned on and off substantially at the same time flows into the snubber capacitors of different snubber circuits.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
PCT/JP2021/032622 2021-09-06 2021-09-06 電力変換装置 Ceased WO2023032190A1 (ja)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61280769A (ja) * 1985-06-05 1986-12-11 Toshiba Corp ノイズ吸収回路
JPS63120582U (https=) * 1987-01-30 1988-08-04
JPH0993912A (ja) * 1995-09-20 1997-04-04 Sharp Corp 半導体集積回路
JP2008035609A (ja) * 2006-07-28 2008-02-14 Sharp Corp スイッチング電源回路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61280769A (ja) * 1985-06-05 1986-12-11 Toshiba Corp ノイズ吸収回路
JPS63120582U (https=) * 1987-01-30 1988-08-04
JPH0993912A (ja) * 1995-09-20 1997-04-04 Sharp Corp 半導体集積回路
JP2008035609A (ja) * 2006-07-28 2008-02-14 Sharp Corp スイッチング電源回路

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JPWO2023032190A1 (https=) 2023-03-09

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