WO2022236813A1 - 显示面板、显示背板及其制作方法 - Google Patents

显示面板、显示背板及其制作方法 Download PDF

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Publication number
WO2022236813A1
WO2022236813A1 PCT/CN2021/093849 CN2021093849W WO2022236813A1 WO 2022236813 A1 WO2022236813 A1 WO 2022236813A1 CN 2021093849 W CN2021093849 W CN 2021093849W WO 2022236813 A1 WO2022236813 A1 WO 2022236813A1
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WO
WIPO (PCT)
Prior art keywords
layer
base substrate
binding
wire
top surface
Prior art date
Application number
PCT/CN2021/093849
Other languages
English (en)
French (fr)
Inventor
付杰
龚立伟
张逵
潘飞
张国建
Original Assignee
重庆康佳光电技术研究院有限公司
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Publication date
Application filed by 重庆康佳光电技术研究院有限公司 filed Critical 重庆康佳光电技术研究院有限公司
Priority to PCT/CN2021/093849 priority Critical patent/WO2022236813A1/zh
Priority to US17/859,024 priority patent/US20220367776A1/en
Publication of WO2022236813A1 publication Critical patent/WO2022236813A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present application relates to the display field, in particular to a display panel, a display backplane and a manufacturing method thereof.
  • Micro LED Due to its advantages of high brightness, wide color gamut and high contrast, Micro LED is sought after by various manufacturers. It is called the next generation display device, and its popularity has continued to rise in recent years; however, there are still many problems to be overcome in the actual production process. , such as Micro LEDs are subject to huge transfer yield and efficiency issues, and the main application scenarios are on small-size display panels; for large-size displays such as 4K/8K and more than 100 inches, it is usually necessary to splice multiple display panels to form a large The larger the size, the more display panels need to be spliced.
  • the Micro Both the LED and the driving circuit are arranged on the top surface of the display backplane, and a metal line connection area for electrically connecting the driving circuit to the outside needs to be reserved at the edge of the top surface, resulting in a wider border of a single display panel.
  • the gap between the splicing parts of the display panels is at least twice the width of the frame of a single display panel, which will affect the visual effect and viewing experience to a large extent.
  • the purpose of the present application is to provide a display panel, a display backplane and a manufacturing method thereof, aiming at solving the problem of how to reduce the frame width of the display panel.
  • a display backplane comprising:
  • a base substrate the base substrate has an opposite top surface and a bottom surface, and the top surface is provided with a driving circuit for driving a micro light-emitting chip, and the driving circuit includes a chip bonding area circuit, which is connected to the chip bonding area At least two mutually insulated first wire layers for circuit connection, one end of the first wire layer extends to the side of the base substrate and is flush with the side; the bottom surface is provided with the first wire layer Layers correspond to at least two second wire layers insulated from each other;
  • the at least two binding layers are insulated from each other; one end of the first wire layer extending to the side is attached to the inner surface of the binding layer, and the upper end of the binding layer is higher than the top surface, Combined with the packaging layer; the inner surface of the binding layer is the surface of the binding layer close to the base substrate, and the upper end of the binding layer is the end of the binding layer close to the top surface .
  • a driving circuit for driving the micro light-emitting chips is arranged on the top surface of the base substrate, and one end of the first wire layer of the driving circuit extends to the side surface of the base substrate and is flush with the side surface.
  • a second wire layer corresponding to the first wire layer is provided on the opposite bottom surface, and then a binding layer is formed on the side to electrically connect the corresponding first wire layer and the second wire layer, thereby realizing the driving circuit on the top surface It is electrically connected to the second wire layer on the bottom surface, and can be electrically connected to the outside through the second wire layer.
  • the upper end of the binding layer arranged on the side of the base substrate is higher than the top surface of the base substrate, and is combined with the encapsulation layer formed on the top surface, so that the bonding strength between the binding layer and the above side can be improved, Avoid the situation that the bonding layer falls off or loosens from the side, resulting in poor conduction, and improves the yield and reliability of the display backplane.
  • the present application also provides a method for manufacturing a display backplane, including:
  • the driving circuit includes a chip bonding area circuit, and at least two mutually insulated first wire layers connected to the chip bonding area circuit, the first wire layer one end of which extends to the side of the base substrate and is flush with the side; and at least two mutually insulated second wire layers corresponding to the first wire layer are formed on the bottom surface of the base substrate, so that The top surface and the bottom surface are two opposite surfaces of the base substrate;
  • the binding layers are insulated from each other, and one end of the first wire layer extending to the side is attached to the inner surface of the binding layer, and the upper end of the binding layer is higher than the top surface, and is connected to the package Layer bonding; the inner surface of the binding layer is the surface of the binding layer close to the base substrate, and the upper end of the binding layer is the end of the binding layer close to the top surface.
  • the display backplane produced by the above-mentioned manufacturing method of the display backplane has a narrow frame, and the prepared binding layer is not only attached to the side of the base substrate, but its upper end is higher than the top surface of the base substrate and can be connected with the
  • the combination of the encapsulation layer can improve the firmness of the bonding layer, prevent the bonding layer from falling off or loosening from the side and cause poor conductivity, improve the yield rate of display backplane production, and reduce costs.
  • the present application also provides a display panel, which includes the above-mentioned display backplane.
  • the above-mentioned display panel passes through the above-mentioned display backplane with a narrow frame, so the display panel also has a narrow frame, which can improve the visual effect and viewing experience; and the binding layer is not only attached to the side of the substrate, but its upper end is higher than the substrate.
  • the top surface of the bottom substrate is combined with the encapsulation layer, which can ensure the firmness of the bonding layer, prevent the bonding layer from falling off or loosening from the side and cause poor conduction, and improve the yield and reliability of the display panel.
  • a driving circuit for driving micro-light-emitting chips is arranged on the top surface of the base substrate, and one end of the first wire layer of the driving circuit extends to the side surface of the base substrate and flush with the side, and on the bottom surface opposite to the top surface, a second wire layer corresponding to the first wire layer is provided, and then a binding layer is formed on the side to electrically connect the corresponding first wire layer and the second wire layer , so as to realize the electrical connection between the driving circuit on the top surface and the second wire layer on the bottom surface, so it is no longer necessary to reserve a metal circuit connection area on the top surface of the base substrate, which can reduce the frame width of the display backplane; in addition, The upper end of the binding layer arranged on the side of the base substrate is higher than the top surface of the base substrate, and is combined with the encapsulation layer formed on the top surface, so that the bonding strength of the binding layer and the above side can be improved.
  • Figure 1-1 is a three-dimensional schematic diagram of a substrate substrate provided in an embodiment of the present application.
  • 1-2 is a cross-sectional view of a substrate substrate provided in an embodiment of the present application.
  • Figure 2-1 is a first cross-sectional view of the display backplane provided by the embodiment of the present application.
  • Figure 2-2 is the second cross-sectional view of the display backplane provided by the embodiment of the present application.
  • Figure 2-3 is the third cross-sectional view of the display backplane provided by the embodiment of the present application.
  • Figures 2-4 are the fourth cross-sectional view of the display backplane provided by the embodiment of the present application.
  • Figure 2-5 is the fifth cross-sectional view of the display backplane provided by the embodiment of the present application.
  • Figure 3-1 is the sixth cross-sectional view of the display backplane provided by the embodiment of the present application.
  • Figure 3-2 is a sectional view VII of the display backplane provided by the embodiment of the present application.
  • Figure 3-3 is a cross-sectional view eight of the display backplane provided by the embodiment of the present application.
  • FIG. 4 is a perspective view II of the substrate substrate provided in the embodiment of the present application.
  • Figure 5-1 is a cross-sectional view of the display backplane provided by the embodiment of the present application ninth;
  • Figure 5-2 is a cross-sectional view ten of the display backplane provided by the embodiment of the present application.
  • Figure 5-3 is a cross-sectional view eleven of the display backplane provided by the embodiment of the present application.
  • Figure 6-1 is a sectional view twelve of the display backplane provided by the embodiment of the present application.
  • Figure 6-2 is a cross-sectional view of the display backplane provided by the embodiment of the present application thirteen;
  • FIG. 7 is a cross-sectional view fourteen of the display backplane provided by the embodiment of the present application.
  • Fig. 8-1 is a schematic flow chart of a method for manufacturing a display backplane provided by another embodiment of the present application.
  • Fig. 8-2 is a first top view of a display backplane provided by another embodiment of the present application.
  • Fig. 8-3 is a second top view of the display backplane provided by another embodiment of the present application.
  • Fig. 8-4 is a third top view of the display backplane provided by another embodiment of the present application.
  • Figure 8-5 is a schematic diagram of the binding layer production process provided by another embodiment of the present application.
  • Figure 8-6 is a schematic structural view provided with a peelable adhesive layer provided by another embodiment of the present application.
  • Figures 8-7 are schematic structural views of the peelable adhesive layer provided in another embodiment of the present application after removal
  • FIGS. 8-8 are structural schematic diagrams of a protective layer formed on a display backplane provided by another embodiment of the present application.
  • Figures 8-9 are another schematic structural view provided with a peelable adhesive layer provided in another embodiment of the present application.
  • Figures 8-10 are schematic structural views of another peelable adhesive layer provided in another embodiment of the present application after removal
  • FIGS. 8-11 are another schematic structural diagram showing that a binding layer is formed on the backplane provided by another embodiment of the present application.
  • FIG. 9-1 is a schematic flowchart of a method for manufacturing a display backplane provided by another embodiment of the present application
  • Fig. 9-2 is a schematic diagram of a bonded chip provided by another embodiment of the present application
  • Fig. 10-1 is a schematic flowchart of a method for manufacturing a display backplane provided by another embodiment of the present application.
  • Fig. 10-2 is a first top view of a display backplane provided by another embodiment of the present application.
  • Fig. 10-3 is the second top view of the display backplane provided by another embodiment of the present application.
  • Fig. 10-4 is a third top view of a display backplane provided by another embodiment of the present application.
  • Fig. 10-5 is a fourth top view of a display backplane provided by another embodiment of the present application.
  • Fig. 10-6 is a schematic diagram of cutting a display backplane provided by another embodiment of the present application.
  • 10-7 is a cross-sectional view of a display backplane provided with a first wire layer formed in another embodiment of the present application;
  • 10-8 is a perspective view of a display backplane provided with a first wire layer formed in another embodiment of the present application.
  • Fig. 10-9 is a first perspective view of a protective layer formed on a display backplane provided by another embodiment of the present application.
  • 10-10 are the second perspective view of the protective layer formed on the display backplane provided by another embodiment of the present application.
  • the LED chip and the driving circuit are arranged on the top surface of the display backplane, and a metal line connection area is reserved at the edge of the top surface to electrically connect the driving circuit to the outside. This results in a wider bezel on the display panel.
  • the gap between the splicing of the display panels is at least twice the frame width of a single display panel, which will greatly affect the visual effect and viewing. experience.
  • This embodiment provides a display backplane.
  • a second wire layer for external connection is provided on the bottom surface of the substrate, and a conductive bonding layer is provided on the side of the substrate to connect the top surface of the substrate to
  • the drive circuit is electrically connected to the second wire layer on the bottom surface, and then the drive circuit is electrically connected to the outside through the second wire layer. There is no need to reserve a metal circuit connection area on the top surface of the substrate substrate that is electrically connected to the outside, and the substrate can be reduced.
  • the frame width of the base substrate; and the upper end of the binding layer provided on the side of the base substrate is also combined with the encapsulation layer formed on the top surface of the base substrate, which can improve the firmness of the binding layer and prevent the binding layer from Falling off or loosening can lead to poor conduction.
  • the display backplane provided in this embodiment includes a base substrate 1 shown in Fig. 1-1 and Fig. 1-2. is the front side), and the bottom side (also known as the back side) opposite the top side.
  • the shape of the base substrate 1 in this embodiment can be flexibly set according to requirements, for example, it can be set as but not limited to regular shapes such as rectangle, sector, circle, rhombus, regular hexagon, etc., or it can be set according to needs It is an irregular shape, and will not be repeated here.
  • the material of the base substrate 1 in this embodiment can also be set according to application requirements, for example, it can include but not limited to glass substrate, PCB ( Printed Circuit Board, printed circuit board) substrate, silicon substrate.
  • the top surface of the base substrate 1 is provided with a driving circuit for driving the micro light emitting chip. At least one of the LED chips.
  • the miniature light-emitting chip can also be replaced with chips of other sizes according to requirements, which will not be repeated here.
  • the driving circuit in this embodiment includes a chip bonding area circuit, and at least two mutually insulated first wire layers electrically connected to the chip bonding area circuit, and one end of the first wire layer extends to the base substrate 1 side and flush with said side.
  • the chip bonding area circuit may include but not limited to bonding areas 10 corresponding to the positive pins and negative pins of each micro light-emitting chip.
  • the bonding area specifically includes a corresponding positive electrode bonding area and a negative electrode bonding area
  • the first wire layer 11 may include but is not limited to at least two mutually insulated wire layers that are electrically connected to the positive electrode bonding area and the negative electrode bonding area respectively. .
  • the driving circuit may also be configured to include a bonding area corresponding to electrical connections with other devices and a corresponding first wire layer according to requirements.
  • the end of the first wire layer 11 extending to the side of the base substrate 1 may be the end of the first wire layer away from the driving circuit. And the end is flush with the side surface of the base substrate 1 , that is, the end face of the end is on the same plane as the side surface of the base substrate 1 .
  • each first wire layer 11 in this embodiment may extend to the same side of the base substrate 1 , or may extend to different sides of the base substrate 1 .
  • the base substrate 1 shown in FIG. 1-1 is taken as an example for description below.
  • the base substrate 1 includes four sides A1 to A4, and the first wire layer 11 on it can all extend to one of the sides, for example, all can extend to A1; they can also extend to two opposite sides, for example, respectively Extend to A1 and A2, or A3 and A4; or extend to two adjacent sides, for example, extend to A1 and A3, or A2 and A4, etc.; of course, it can also extend to three of them according to requirements Side or four sides, no more details here.
  • At least two mutually insulated second wire layers corresponding to the first wire layer are provided on the bottom surface of the base substrate 1 .
  • the corresponding relationship between the first wire layer and the second wire layer can be flexibly set. For example, it can be set as one-to-one correspondence, or it can be set as one-to-many or many-to-one according to requirements, and details will not be described here.
  • the second wire layer in this embodiment may not extend to the side of the base substrate 1, but may also extend to the side of the base substrate 1. In this case, it may specifically extend to the side where the first corresponding first wire layer is located. And it can be flush with the side, for example, as shown in the second wiring layer 12 in FIGS. 1-2 , of course, it can also not be flush.
  • the second wire layer can be used as a wire layer for external connection, so that after the first wire layer is electrically connected, the driving circuit is electrically connected to the outside. Therefore, there is no need to reserve a metal circuit connection area on the top surface of the base substrate 1 , which can reduce the frame width of the display backplane, and even achieve a frameless effect in terms of visual effect.
  • the width of the splicing gap between adjacent display backplanes after splicing can be basically maintained with the distance between adjacent light-emitting chips in the display area of each display backplane. Consistent, the visual effect can basically achieve a seamless effect.
  • the display backplane also includes at least two bonding layers attached to the side of the base substrate 1 to electrically connect the corresponding first wire layer and the second wire layer; wherein the at least two bonding layers Insulated from each other; one end of the first wire layer extending to the side is attached to the inner surface of the binding layer, and the upper end of the binding layer is higher than the top surface, and is combined with the encapsulation layer (not shown) on the top surface;
  • the inner surface of the binding layer is the surface of the binding layer close to the base substrate, that is, the side attached to the base substrate, and the upper end of the binding layer is the end of the binding layer close to the top surface.
  • the structure in which the binding layer electrically connects the corresponding first wire layer and the second wire layer is described in an intelligible manner below with reference to the examples shown in FIGS. 2-1 to 2-4 .
  • first wire layer 11 extending to the side of the base substrate 1 is flush with the side, and the bonding layer 13 attached to the side of the base substrate 1 will
  • the first wire layer 11 is electrically connected to its corresponding second wire layer 12, wherein, one end of the first wire layer 11 extending to the side is connected to the inner surface of the bonding layer 13 (that is, the bonding layer 13 and the substrate in the figure
  • the side surface of the substrate 1) is bonded, and the upper end 131 of the binding layer 13 is higher than the top surface of the base substrate 1, and is combined with the encapsulation layer (not shown in the figure) provided on the top surface;
  • the binding layer 13 does not extend to the top surface of the base substrate 1 , and thus does not occupy the area of the top surface of the base substrate 1 , which can further reduce the frame width of the manufactured display backplane.
  • the upper end 131 of the binding layer 13 is set higher than the top surface of the base substrate 1 and combined with the encapsulation layer on the top surface. And it should be understood that, the combination manner between the upper end 131 and the encapsulation layer can be flexibly set, which will be illustrated later.
  • the first wire layer 11 in order to increase the bonding area between the end of the first wire layer 11 extending to the side of the base substrate 1 and the inner surface of the binding layer 13, the first wire layer can be set to be multi-layered. structure, thereby increasing the end surface area of the end of the first wire layer 11 extending to the side, that is, the bonding area with the inner surface of the binding layer 13 .
  • the first guide layer 11 in this embodiment may be, but not limited to, a multi-layer metal layer, or a mixed layer material composed of a metal layer or other conductive materials (such as a conductive adhesive layer).
  • the first wire layer 11 includes a metal layer composed of at least two metal sub-layers stacked together.
  • the materials of each metal sub-layer can be the same or different, or partly the same and partly different.
  • the material of the metal sublayer is selected from but not limited to at least one of Al, Mo, Au, Ni, Ag, and Cu.
  • the second wire layer 12 may be a single-layer conductive structure, or may be configured as a multi-layer conductive structure, which will not be repeated here.
  • connection mode between the binding layer 13 and the second wire layer 12 can be flexibly set.
  • several examples are used for illustration below:
  • Example 1 As shown in Figures 2-4, one end of the second wire layer 12 also extends to the side (the side is the side where the corresponding first wire layer extends) and is flush with the side, and the second wire layer 12 extends One end to the side is attached to the inner surface of the binding layer 13; and the lower end 132 of the binding layer 13 (the lower end 132 is the end of the binding layer away from the top surface of the base substrate 1) can be connected to the second wire layer 12 is flush (that is, the end surface of the lower end 132 is on the same surface as the lower surface of the second wiring layer 12 (the lower surface is the surface away from the bottom surface of the substrate 1 )), and may not be flush with the second wiring layer 12,
  • the details can be flexibly set according to requirements.
  • Example 2 As shown in FIG. 2-2, the lower end 132 of the binding layer 13 extends to the bottom surface, and is superimposed on the corresponding second wire layer 12, and the electrical connection is realized in this way of superimposing up and down (that is, overlapping). , can improve the contact area between the two and the reliability of the connection.
  • the second wire layer 12 may not extend to the side of the base substrate 1 , and the second wire layer 12 extends to the side of the base substrate 1 in the example shown in FIG. 2-2 .
  • the second wire layer 12 may not extend to the side of the base substrate 1, for example, as shown in FIG. It can be attached to the inner surface of the binding layer 13 at the same time, thereby further increasing the contact area between the two.
  • the end of the second wire layer extending to the side of the base substrate can also be in contact with the inner surface of the binding layer at the same time.
  • Example 3 See Figure 2-3, the difference between this example and the connection structure shown in Figure 2-2 in Example 2 is that the lower end 132 of the binding layer 13 extends to the bottom surface, and the corresponding second wire layer 12 Face-to-face contact on one end.
  • connection structure between the bonding layer and the second wire layer is not limited to the structures shown in the above examples, and can be flexibly replaced with other structures, which will not be repeated here.
  • At least one side of the base substrate (for example, the side to which the first wiring layer extends) and The area where the bottom surfaces intersect is set as a chamfered area or a rounded area, and the lower end of the binding layer extends to the bottom surface along the chamfered area or the rounded area, so as to avoid the occurrence of disconnection as much as possible and further improve the reliability of the electrical connection .
  • the specific size of the above chamfered area or rounded area can be flexibly set.
  • the area where the side and the bottom of the base substrate 1 intersect is set as a chamfered area 100, and the lower end 132 of the binding layer 13 faces toward the base substrate along the chamfered area 100. 1's bottom surface extends.
  • the chamfered area 100 in this example can also be replaced by the rounded area 101 shown in FIG. 3-3 , or other transitional areas that can avoid the occurrence of line breaks, which will not be repeated here.
  • the binding layer in order to further enhance the bonding strength between the binding layer and the side surface of the base substrate, it may be provided on the side surface of the base substrate that at least a part of the area where the binding layer is attached is rough surface, thereby enhancing the bonding strength between the two.
  • the entire area of the attachment layer can be set as a rough surface, or only a part of it can be set as a rough surface, or the entire area of the side of the base substrate can be directly set as a rough surface, and the rough surface can be made by Grooves and/or protrusions are provided on the side surface, which can also be formed by grinding the side surface, and details will not be repeated here.
  • the roughness of the rough surface in this embodiment can be flexibly set, for example, the roughness Sa can be set to be greater than or equal to 0.1 ⁇ m and less than or equal to 0.5 ⁇ m.
  • a groove penetrating through the top and bottom surfaces of the base substrate can be provided corresponding to the installation area of the binding layer, and the binding layer can be directly provided In this groove, this can not only increase the bonding area between the bonding layer and the base substrate, but also improve the bonding strength between the two; and the bonding layer can be arranged in the groove to reduce bonding as much as possible.
  • the size of the fixed layer protruding from the side of the base substrate can further reduce the frame width of the display backplane.
  • the shape and size of the groove in this example can be flexibly set according to the application requirements.
  • the cross-sectional shape of the groove can be but not limited to regular shapes such as rectangles, arcs, triangles, or irregular shapes. .
  • an arc-shaped groove is taken as an example for description below.
  • a plurality of grooves A11 are provided on its side A1, the grooves A11 are arc-shaped grooves, and the first wire layer 11 on the top surface of the base substrate 1 extends to the side
  • the end surface of one end of A1 is flush with the inner surface of the groove A11, so that a binding layer can be disposed in the groove A11.
  • the outer surface of the binding layer (the surface of the binding layer away from the base substrate) and the area on the side A1 that is not provided with the groove A11 are located on the same surface, that is, the same surface as the side surface A1.
  • A1 is arranged flush, thereby reducing the width of the frame of the produced display backplane as much as possible.
  • the outer surface of the binding layer can also be set to protrude from the side A1, or the outer surface of the binding layer is located in the groove A11.
  • the way of combining the upper end of the binding layer with the encapsulation layer formed on the top surface of the base substrate may be that at least a part of the upper end of the binding layer is embedded in the encapsulation layer, or it may be that the upper end of the binding layer is embedded in the encapsulation layer.
  • the inner surface is bonded to the side of the encapsulation layer.
  • the distance between the upper end and the bottom surface of the binding layer can be set to be smaller than the upper surface and the bottom surface of the encapsulation layer
  • the distance between them that is, the upper surface of the encapsulation layer, is higher than the upper end of the binding layer, so that part of the light can be emitted through the side of the encapsulation layer, which basically achieves the effect of no frame visually;
  • the upper surface of the encapsulation layer is the encapsulation layer. layer away from the top face.
  • the display backplane may further include a protective layer covering the binding layer, so as to protect the binding layer.
  • the protective layer in this embodiment may be, but not limited to, an insulating layer, or may be, but not limited to, a conductive layer with certain conductivity.
  • one binding layer can correspond to one protective layer, or one protective layer can directly cover multiple binding layers (at this time, the adjacent binding layers are also covered by the protective layer).
  • the protective layer in this embodiment can be a light-transmitting layer, and can also be set as a non-light-transmitting layer according to requirements.
  • the setting of the protective layer can prevent residual damage caused by collision between binding layers between adjacent display backplanes when a plurality of display backplanes are spliced to form a large-size display screen.
  • the protective layer in order to improve the visual effect of the joint, can be set as a black protective layer, such as but not limited to a black ink layer or a first black glue layer.
  • the thickness of the black ink layer or the first black glue layer can be flexibly set according to requirements, for example, it can be set to be greater than or equal to 3 ⁇ m and less than or equal to 10 ⁇ m.
  • the optical density (Optical Density, OD) value of the protective layer can also be flexibly set, for example, can be set to be greater than or equal to 2 but not limited to.
  • the display backplane further includes a protective layer 14 covering the binding layer 13 .
  • the upper end of the protective layer 14 is higher than the upper end 131 of the binding layer 13 .
  • the display backplane further includes a protective layer 14 covering the binding layer 13.
  • the upper end of the protective layer 14 is flush with the upper end 131 of the binding layer 13. .
  • the protective layer in this embodiment may fully cover the outer surface of the binding layer 13, or may only partially cover the outer surface of the binding layer 13, as shown in Fig. 5-3 for example.
  • the details can be flexibly set according to requirements.
  • the above-mentioned display backplane does not need to reserve a metal line area for electrically connecting the driving circuit with the outside on the front side of the base substrate, but turns this area to be arranged on the back side of the base substrate, so that
  • the base substrate has a narrow frame, the width of which can reach half of the distance between the corresponding light-emitting chips, or even smaller, and can achieve a visual effect without a frame in terms of visual effect, and when spliced into a large display,
  • the visual effect of seamless splicing can be basically achieved; in addition, the binding layer is not only attached to the side of the substrate, but its upper end is higher than the top surface of the substrate, which can be combined with the packaging layer, which can improve the firmness of the bonding layer. It can prevent the binding layer from falling off or loosening from the side and cause poor conduction, improve the yield rate of display backplane production, and reduce costs.
  • the display backplane further includes an encapsulation layer, several micro light-emitting chips fixed on the top surface of the base substrate and electrically connected to the chip bonding area circuit, and the encapsulation layer is arranged on the substrate The top surface of the substrate is combined with the upper end of the binding layer, and the micro light-emitting chip is covered.
  • at least one light-emitting surface of at least one micro-light-emitting chip can also be exposed on the packaging layer.
  • the miniature light-emitting chips in this embodiment may include but not limited to Mini LED chips and Micro At least one of the LED chips.
  • the micro light-emitting chip can be transferred to the top surface of the base substrate by various chip transfer methods, and bonded to the corresponding bonding area in the driving circuit.
  • the structure of the encapsulation layer can be flexibly set, which will be described below with several structural examples.
  • the encapsulation layer includes a second black glue layer covering the top surface, and a transparent glue layer or a translucent glue layer arranged on the second black glue layer; at least one light-emitting surface of the micro light-emitting chip is exposed on the second black glue layer. glue layer.
  • a micro light emitting chip 2 is bonded on the top surface of the base substrate 1.
  • the micro light emitting chip may include but not limited to a blue light emitting chip, or include but not limited to a blue light emitting chip. Color light-emitting chip, red light-emitting chip and green light-emitting chip.
  • a second black glue layer 31 is provided on the top surface of the base substrate 1 , the light-emitting surface of the front surface of the micro light-emitting chip is exposed to the second black glue layer 31 , and a translucent glue layer 31 is arranged on the second black glue layer 31 .
  • the thickness of the second black glue layer 31 may be but not limited to 50 ⁇ m to 60 ⁇ m, and the thickness of the translucent glue layer 31 may be but not limited to 150 ⁇ m to 200 ⁇ m; in another application example.
  • the translucent adhesive layer 31 or the transparent adhesive layer can be replaced by a light-transmitting substrate. In the example shown in FIG.
  • the upper end of the binding layer 13 is embedded in the encapsulation layer, specifically the upper end of the binding layer is embedded in the translucent adhesive layer 31, and is lower than the upper end of the translucent adhesive layer 31. noodle.
  • the upper end of the protective layer in this example is also embedded in the translucent adhesive layer 31 , of course it may not be embedded in the translucent adhesive layer 31 .
  • the encapsulation layer includes a gray glue layer covering the top surface and covering several micro light-emitting chips; the gray glue layer has light transmittance, and the light transmittance of the gray glue layer is lower than that of the translucent glue layer Rate.
  • micro light-emitting chips 2 are bonded on the top surface of the base substrate 1 , and a gray glue layer 33 is arranged on the top surface of the base substrate 1 .
  • the thickness can be set flexibly.
  • the inner surface of the upper end of the binding layer 13 is attached to the inner surface of the encapsulation layer, specifically, the inner surface of the gray adhesive layer 33 .
  • the upper end of the binding layer 13 and the upper end of the protective layer 14 can be arranged flush, also can be lower than the upper end of the protective layer 14; the upper end of the protective layer 14 can be arranged flush with the upper surface of the gray adhesive layer 33, also can be lower than the gray Adhesive layer33.
  • the encapsulation layer may also include a color filter layer (also called a luminescence conversion layer) that converts the color of the light emitted by the micro light emitting chip, and the color filter layer may be directly arranged on the micro light emitting chip 2 can also be arranged on the second black adhesive layer 31 in the above example, or on the translucent adhesive layer 32 , or on the gray adhesive layer 33 .
  • a color filter layer also called a luminescence conversion layer
  • Example 4 In this embodiment, on the basis of the above examples, a peelable adhesive layer at the bottom layer may also be included, and the peelable adhesive layer does not cover the circuit in the bonding area of the chip.
  • the structure of the encapsulation layer in this embodiment is not limited to the structure of the above example, for example, in some application examples, the encapsulation layer may also include a second black glue layer directly disposed on the top surface of the base substrate 1
  • the OC adhesive layer between 31, of course, other adhesive layers or conversion layers can also be provided according to requirements, and will not be repeated here.
  • the specific materials and manufacturing processes of the above layers can be flexibly set, and will not be repeated here.
  • the distance L1 between the upper end 131 of the binding layer and the bottom surface of the base substrate 1 is smaller than the upper surface of the packaging layer (in this example, the semi-transparent
  • the distance L2 between the upper surface of the adhesive layer 32) and the bottom surface of the base substrate 1, that is, the upper surface of the encapsulation layer is higher than the upper end 131 of the binding layer, so that part of the light can be emitted through the side of the encapsulation layer, visually Basically achieve the effect of borderless.
  • the visual effect of seamless splicing can be basically achieved.
  • This embodiment provides a method for manufacturing a display backplane, which can be used to manufacture the display backplane shown in the above embodiments, as shown in Figure 8-1, which includes but is not limited to:
  • the driving circuit is fabricated on the top surface of the base substrate, and at least two mutually insulated second wire layers are fabricated on the bottom surface of the base substrate.
  • the manufactured drive circuit includes at least two first wire layers insulated from each other, one end of the first wire layer extends to the side of the base substrate and is flush with the side, and the second wire layer made on the bottom surface of the base substrate is connected to the first wire layer. corresponding to the layer.
  • the substrate substrate can be actively driven (PM mode) or passively driven (AM mode).
  • PM mode actively driven
  • AM mode passively driven
  • FIG. 8-2 when forming a metal film on the base substrate 1 to form a circuit, the metal layer extending beyond the display boundary at the edge of the display area AA on the base substrate 1 is reserved. Then the base substrate 1 is cut along the edge of the display area AA, on the top surface and the bottom surface of the base substrate 1, the metal layer extending from the edge of the display area AA is cut to form corresponding first wires respectively layer and the second conductor layer.
  • a layer of insulating layer can be covered on the metal circuit after film formation, exposure, and development to form a circuit pattern.
  • Photoresist that is, a layer of insulating photoresist is formed on the front and back of the base substrate 1
  • the photoresist layer at this time covers all the metal lines, and can cover the surface of the wire layer corresponding to the edge position of the display area AA
  • the photoresist layer is exposed and developed to open windows. See, for example, the photoresist layer 30 shown in FIGS. 8-4 .
  • the thickness of the single-layer metal layer is small, in order to improve the bonding between the end of the first wire layer extending to the side of the base substrate 1 and the inner surface of the bonding layer (also referred to as (overlap) area, which can be increased through but not limited to the yellow light process to sequentially stack multiple metal sub-layers to form the first wire layer with a multi-layer structure, thereby doubling the thickness of the first wire layer and ensuring the first wire The fit area between the ply and the bound ply.
  • the multi-layer structure of the formed first wiring layer can be referred to but not limited to those shown in FIGS. 2-5 , and will not be repeated here.
  • S802 Form an encapsulation layer on the top surface of the base substrate.
  • S803 Form at least two bonding layers electrically connecting the corresponding first wire layer and the second wire layer on the side surfaces of the base substrate and the encapsulation layer.
  • the formed at least two bonding layers are insulated from each other, and one end of the first wire layer extending to the side is attached to the inner surface of the bonding layer, and the upper end of the bonding layer is higher than the top surface of the base substrate, combined with the encapsulation layer on the top surface.
  • the manner of forming the binding layer on the side surfaces of the base substrate and the encapsulation layer can be flexibly set.
  • it may include but not limited to at least one of the following:
  • the area where the side and the bottom of the substrate intersect is chamfered to form a chamfered area or rounded to form a rounded area, so as to avoid the formation of the binding layer, and the lower end of the binding layer will not be broken during the extension process.
  • a groove is formed on the side surface of the substrate where the binding layer needs to be formed, and in some examples, the inner wall of the groove can also be treated as a rough surface.
  • the grooves in this embodiment can also be formed in advance. For example, in the process of making the base substrate, a through hole can be opened in the junction area of the base substrate first, and then cut along the center of the through hole. The grooves are preset at the corresponding positions on the side of the single substrate substrate.
  • S8021 Form a peelable adhesive layer on the top surface of the base substrate, and the side surfaces of the peelable adhesive layer are flush with the side surfaces of the base substrate.
  • S8022 Form a binding layer on the side of the base substrate and the side of the peelable adhesive layer, the distance between the upper end of the binding layer and the bottom surface is less than or equal to the distance between the upper surface and the bottom surface of the peelable adhesive layer, which can be The upper surface of the peelable adhesive layer is the surface away from the top surface of the peelable adhesive layer.
  • a peelable adhesive layer 40 is provided on the top surface of the base substrate 1, and then a binding layer 13 is formed on the side of the base substrate 1 and the side surface of the peelable adhesive layer 40, and the binding
  • the distance L3 between the upper end 131 of the fixed layer 13 and the bottom surface of the base substrate 1 is less than or equal to the distance L4 between the upper surface of the peelable adhesive layer 40 and the bottom surface of the base substrate 1, and the upper surface of the peelable adhesive layer is peelable.
  • the adhesive layer is away from the surface of the top surface of the base substrate 1 .
  • the binding layer can be formed on the side of the base substrate and the side of the peelable adhesive layer by but not limited to printing metal paste (such as silver paste), sputtering metal film, transferring ink and other methods; After the binding layer is formed, it can be cured.
  • Oven curing can be used but not limited to (for example, low-temperature curing silver paste can be cured at 80°C for about 40 minutes, and high-temperature curing silver paste can be cured at 180°C for 30 minutes) or laser Curing (such as instantaneous 260°C laser at a rate of 5mm/sec).
  • the edge area of the peelable adhesive layer is retained.
  • the width of the reserved edge region can be flexibly set, for example, it can be set to 50um to 70um.
  • the peelable adhesive layer may be but not limited to a photoresist layer, and the photoresist to be removed may be removed by but not limited to opening a window in the photoresist.
  • the photoresist layer 30 can also be removed.
  • the bonding of the micro light-emitting chip can be completed on the exposed chip bonding area circuit, and other adhesive layers of the packaging layer can be formed, such as:
  • a second black glue layer is formed on the top surface, and a transparent glue layer or a translucent glue layer is formed on the second black glue layer; or, a gray glue layer covering several micro light-emitting chips is formed on the top surface.
  • S901 Complete the transfer and bonding of the micro light-emitting chip on the top surface of the base substrate.
  • Mini LED chips but not limited to SMT (Surface Mounted Technology, surface mount process) technology can be used
  • Micro LED chips can be used but not limited to ACF (Anisotropic Conductive Film, anisotropic conductive film) material bonding or UBM eutectic bonding of the under-bump metallization layer.
  • ACF isotropic Conductive Film, anisotropic conductive film
  • a layer of 50 ⁇ m to 60 ⁇ m black glue material (ie, The second black glue layer, the black glue material can be a composite material of reactive polyimide and epoxy resin, in which polyimide is used as a curing agent, and carbon and other additive elements are added to increase the blackness).
  • the vinyl layer after encapsulation can cover the peelable adhesive layer, and the upper surface of the vinyl layer does not exceed the upper surface of the micro light-emitting chip (ie, the positive light-emitting surface), that is, the plasma method can be used but not limited to after sealing.
  • the black glue beyond the upper surface of the micro light-emitting chip is removed.
  • the vinyl layer can enhance the brightness of the brightness display area and improve the front reflection. Then seal a layer of translucent adhesive layer on the upper surface of the black adhesive layer by vacuum hot pressing.
  • the thickness of the translucent adhesive layer is 150 ⁇ m-200 ⁇ m. Oxygen composite material.
  • the above-mentioned black glue layer and translucent glue layer can be replaced by a layer of gray glue whose light transmittance is lower than that of the translucent glue layer.
  • S804 Form a protection layer covering the bonding layer on the side surfaces of the base substrate and the encapsulation layer, as shown in FIG. 8-8. It should be understood that this step is optional.
  • a layer of black protective glue that is, the first black glue layer
  • a black ink layer can be covered on the outer surface of the binding layer, which can prevent collisions from damaging the lines and improve the visual effect of the joints.
  • a layer of black protective glue can be covered.
  • the black protective glue can be made of, but not limited to, modified acrylic resin materials plus black pigment fillers. It has high adhesion, and its thickness can be set 3 ⁇ m to 8 ⁇ m for a single site, and the OD (Optical Density) value is greater than 2.
  • the material of the gray glue may, for example, include silicone resin doped with carbon powder, which is not limited herein.
  • the part of the peelable adhesive layer covering the chip bonding area circuit can also be removed first, and then the peelable adhesive layer can be removed on the top surface of the base substrate A binding layer is formed on the side and the side of the peelable adhesive layer.
  • a peelable adhesive layer 40 is first formed on the top surface of the base substrate 1; as shown in FIGS. 8-10, the part of the peelable adhesive layer 40 covering the chip bonding area circuit is removed 1.
  • a peelable adhesive layer 40 of a set width is reserved on the edge of the base substrate 1; referring to FIGS.
  • the display backplane produced by the above method of manufacturing the display backplane no longer needs to reserve a metal circuit connection area on the top surface of the base substrate, but realizes connection with the outside through the second wire layer on the bottom surface of the base substrate. connection, so the prepared display backplane has a narrow frame, and the prepared binding layer is not only attached to the side of the base substrate, but its upper end is also higher than the top surface of the base substrate, which can be combined with the encapsulation layer. The solid performance is better guaranteed.
  • This embodiment further provides a method for manufacturing a display backplane, which mainly includes several processes of substrate manufacturing, chip bonding, forming an encapsulation layer, and manufacturing a binding layer.
  • the manufacturing method of the display backplane includes but is not limited to:
  • S1001 Fabricate a circuit on a base substrate.
  • the process of making the circuit on the base substrate in this step can refer to the process in step S801 in the above embodiment, but after the circuit pattern is formed in the display area AA on the base substrate 1, it is not cut first, and is To avoid a short circuit between adjacent wire layers when bonding layers on the side of the base substrate 1, a layer of insulating photoresist can be covered on the metal line after film formation, exposure, and development to form a line pattern.
  • the photoresist layer covers all the metal lines, and the photoresist layer on the surface of the wire layer corresponding to the edge position of the display area AA can be exposed and developed to open a window.
  • the obtained structure diagram is shown in Figure 10-2.
  • S1002 Complete the bonding of the micro light-emitting chip on the top surface of the base substrate.
  • micro-light-emitting chip in the figure can be a blue light-emitting chip or include a blue light-emitting chip. chip, red light-emitting chip and green light-emitting chip.
  • S1003 Form an encapsulation layer on the top surface of the base substrate, the formed encapsulation layer covers the micro light-emitting chips, and the side surfaces of the encapsulation layer are flush with the side surfaces of the base substrate.
  • the process of forming the encapsulation layer on the top surface of the base substrate may refer to, but not limited to, the process of forming the encapsulation layer in the above examples.
  • the encapsulation layer includes a second black glue layer and a translucent glue layer as an example for description below.
  • a second black glue layer 31 can be formed on the top surface of the base substrate first, as shown in FIG. 10-4 , and then a translucent layer 32 is formed on the second black glue layer 31 , as shown in FIG. 10-5 .
  • the cured hardness of the photoresist layer 30 , the second black layer 31 and the translucent layer 32 can be set to be greater than or equal to 2H to meet the subsequent cutting requirements.
  • the four sides of the base substrate can be cut according to the size of the display area AA.
  • the cutting method can adopt but not limited to laser cutting, knife wheel cutting and other processes. For example, refer to the cutting direction indicated by the arrow in Figure 10-6.
  • the laser can be used to cut from the sealing layer to the bottom, the laser cuts off the packaging layer, and further cuts to the depth of 70 ⁇ m ⁇ 80 ⁇ m of the substrate, and then uses manual slitting or mechanical cutting.
  • the automatic slitting method will remove the area outside the display area AA.
  • cutting down to the bottom surface of the base substrate is also possible.
  • At least two binding layers formed in this step are insulated from each other, and the end of the first wire layer extending to the side is attached to the inner surface of the binding layer, and the upper end of the binding layer is higher than the top surface, and is combined with the encapsulation layer, see Figure 10-7 and Figure 10-8.
  • the number of grinding rods can be 800, 1000, 1500, etc.
  • the surface roughness Sa is greater than or equal to 0.1 ⁇ m and less than or equal to .3 ⁇ m, and the roughness can be improved.
  • the conductive material used to make the binding layer Adhesion thereby improving the bonding strength between the bonding layer and the substrate substrate and packaging layer;
  • the area where the side and the bottom of the substrate intersect is chamfered to form a chamfered area or rounded to form a rounded area, so as to avoid the formation of the binding layer, and the lower end of the binding layer will not be broken during the extension process.
  • the bottom of the base substrate may be chamfered or filleted during the grinding process of the side of the base substrate, and the size of the chamfer or fillet may be less than or equal to 100 ⁇ m;
  • a groove is formed on the side surface of the substrate where the binding layer needs to be formed, and in some examples, the inner wall of the groove can also be treated as a rough surface.
  • the grooves in this embodiment can also be formed in advance. For example, in the process of making the base substrate, a through hole can be opened in the junction area of the base substrate first, and then cut along the center of the through hole. The grooves are preset at the corresponding positions on the side of the single substrate substrate. Of course, in some examples, the groove can also penetrate through the encapsulation layer.
  • S1006 Form a protective layer covering the bonding layer on the side surfaces of the base substrate and the encapsulation layer. It should be understood that this step is optional.
  • a layer of black protective glue that is, the first black glue layer
  • a black ink layer can be covered on the outer surface of the binding layer, which can prevent collisions from damaging the lines and improve the visual effect of the joints.
  • a layer of black protective glue can be covered.
  • the black protective glue can be made of, but not limited to, modified acrylic resin materials plus black pigment fillers. It has high adhesion, and its thickness can be set It is 5 ⁇ m to 7 ⁇ m in a single site, and the OD (optical density) value is greater than or equal to 2.
  • the display backplane includes a plurality of protective layers 14 corresponding to a plurality of binding layers 13 one-to-one, and each protective layer 14 is covered on the corresponding binding layer 13 .
  • the protection layer 14 in this example can be an insulating protection side, and can also be set as a conductive protection layer according to requirements.
  • the display backplane includes a protective layer 14 disposed on the side of the base substrate, and the protective layer 14 directly covers the plurality of binding layers 13 .
  • the protective layer 14 in this example is an insulating protective layer.
  • This embodiment also provides a display panel, including the above-mentioned display backplane.
  • a display screen is also provided, which includes the display panel and a frame, and the display panel is fixed on the frame.
  • the display screen has a narrow border, and the substrate can achieve a borderless effect in terms of visual effects, so the display effect and viewing experience are better, and it can be applied to but not limited to various smart mobile terminals, vehicle terminals, PCs, displays, electronic advertising boards Wait.
  • This embodiment also provides a spliced display screen, including that the spliced display screen can be formed by splicing at least two display screens as shown above.
  • the width of the splicing gap can be basically consistent with the distance between adjacent light-emitting chips in the display area of each display screen, and a seamless effect can be achieved in terms of visual effect.

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Abstract

一种显示面板、显示背板及其制作方法，将衬底基板（1）顶面用于与外部电连接的金属线路连接区作为第二导线层（12）转移到底面设置，并通过衬底基板（1）侧面的绑定层（13），将衬底基板（1）顶面上的驱动电路与底面的第二导线层（12）电连接。

Description

显示面板、显示背板及其制作方法 技术领域
本申请涉及显示领域，尤其涉及一种显示面板、显示背板及其制作方法。
 背景技术
Micro LED 由于其亮度高、色域覆盖广和对比对高等优势受到各家厂商的追捧，被称为次世代显示装置，近年来热度持续上升；但在实际的生产过程中还有诸多问题需要克服，如Micro LED受制于巨量转移良率及效率问题，主要应用场景在小尺寸的显示面板上；对于如4K/8K等100寸以上的大尺寸显示屏，则通常需要采用将多个显示面板拼接形成大尺寸显示屏的方式实现，尺寸越大，需要拼接的显示面板越多。而单个显示面板的显示背板上，Micro LED和驱动电路都是设置在显示背板的顶面上的，在该顶面的边缘位置还需预留将驱动电路与外部电连接的金属线路连接区，导致单个显示面板的边框较宽。而在将多个显示面板拼接后，显示面板之间的拼接处所呈现出的缝隙至少是单个显示面板的边框宽度的两倍，在很大程度上会影响视觉效果和观看体验。
因此，如何降低显示面板的边框宽度是亟需解决的问题。
 技术问题
鉴于上述现有技术的不足，本申请的目的在于提供一种显示面板、显示背板及其制作方法，旨在解决如何降低显示面板的边框宽度的问题。
 技术解决方案
一种显示背板，包括：
衬底基板，所述衬底基板具有相对的顶面和底面，所述顶面设有用于驱动微型发光芯片的驱动电路，所述驱动电路包括芯片键合区电路，与所述芯片键合区电路连接的至少两个相互绝缘的第一导线层，所述第一导线层的一端延伸至所述衬底基板的侧面并与所述侧面齐平；所述底面设有与所述第一导线层对应的至少两个相互绝缘的第二导线层；
设于所述顶面上的封装层；
至少两个贴附于所述侧面上，分别将对应的所述第一导线层和所述第二导线层导电连接的绑定层；
所述至少两个绑定层相互绝缘；所述第一导线层延伸至所述侧面的一端与所述绑定层的内表面贴合，所述绑定层的上端高出所述顶面，与所述封装层结合；所述绑定层的内表面为所述绑定层靠近所述衬底基板的面，所述绑定层的上端为所述绑定层靠近所述顶面的一端。
上述显示背板中，在衬底基板的顶面设置驱动微型发光芯片的驱动电路，且该驱动电路的第一导线层的一端延伸至衬底基板的侧面并与该侧面齐平，在与顶面相对的底面设置与第一导线层对应的第二导线层，然后通过在该侧面形成将对应的第一导线层和第二导线层电连接的绑定层，从而实现将顶面的驱动电路与底面的第二导线层电连接，并可通过第二导线层与外部实现电连接，因此在衬底基板的顶面则不再需要预留设置金属线路连接区，可降低显示背板的边框宽度；另外，设置在衬底基板侧面的绑定层的上端高出衬底基板的顶面，并与该顶面上形成的封装层结合，从而可以提升绑定层与以上侧面的结合强度，避免绑定层从侧面脱落或松动而导致导电不良的情况发生，提升显示背板的良品率和可靠性。
基于同样的发明构思，本申请还提供一种显示背板的制作方法，包括：
在衬底基板的顶面制作驱动电路，所述驱动电路包括芯片键合区电路，以及与所述芯片键合区电路连接的至少两个相互绝缘的第一导线层，所述第一导线层的一端延伸至所述衬底基板的侧面并与所述侧面齐平；并在所述衬底基板的底面制作与所述第一导线层对应的至少两个相互绝缘的第二导线层，所述顶面和底面为所述衬底基板相对的两个面；
在所述顶面上形成封装层，所述封装层的侧面与所述衬底基板的所述侧面齐平；
在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层，形成的所述至少两个绑定层相互绝缘，且所述第一导线层延伸至所述侧面的一端与所述绑定层的内表面贴合，所述绑定层的上端高出所述顶面，与所述封装层结合；所述绑定层的内表面为所述绑定层靠近所述衬底基板的面，所述绑定层的上端为所述绑定层靠近所述顶面的一端。
上述显示背板的制作方法所制得的显示背板具有较窄的边框，且制得的绑定层不但贴附在衬底基板的侧面，其上端还高出衬底基板的顶面可与封装层结合，可提升绑定层贴附的牢固性，避免绑定层从侧面脱落或松动而导致导电不良的情况发生，提升显示背板制作的良品率，降低成本。
基于同样的发明构思，本申请还提供一种显示面板，其中，包括如上所述的显示背板。
上述显示面板通过在上述具有窄边框的显示背板，因此显示面板也具有窄边框，可提升视觉效果和观看体验；且绑定层不但贴附在衬底基板的侧面，其上端还高出衬底基板的顶面与封装层结合，可以保证绑定层贴附的牢固性，避免绑定层从侧面脱落或松动而导致导电不良的情况发生，提升显示面板的良品率和可靠性。
 有益效果
本申请提供的显示面板、显示背板及其制作方法，在衬底基板的顶面设置驱动微型发光芯片的驱动电路，且该驱动电路的第一导线层的一端延伸至衬底基板的侧面并与该侧面齐平，在与顶面相对的底面设置与第一导线层对应的第二导线层，然后通过在该侧面形成将对应的第一导线层和第二导线层电连接的绑定层，从而实现将顶面的驱动电路与底面的第二导线层电连接，因此在衬底基板的顶面则不再需要预留设置金属线路连接区，可降低显示背板的边框宽度；另外，设置在衬底基板侧面的绑定层的上端高出衬底基板的顶面，并与该顶面上形成的封装层结合，从而可以提升绑定层与以上侧面的结合强度。
 附图说明
图1-1为本申请实施例提供的衬底基板的立体示意图一；
图1-2为本申请实施例提供的衬底基板的剖视图；
图2-1为本申请实施例提供的显示背板的剖视图一；
图2-2为本申请实施例提供的显示背板的剖视图二；
图2-3为本申请实施例提供的显示背板的剖视图三；
图2-4为本申请实施例提供的显示背板的剖视图四；
图2-5为本申请实施例提供的显示背板的剖视图五；
图3-1为本申请实施例提供的显示背板的剖视图六；
图3-2为本申请实施例提供的显示背板的剖视图七；
图3-3为本申请实施例提供的显示背板的剖视图八；
图4为本申请实施例提供的衬底基板的立体示意图二；
图5-1为本申请实施例提供的显示背板的剖视图九；
图5-2为本申请实施例提供的显示背板的剖视图十；
图5-3为本申请实施例提供的显示背板的剖视图十一；
图6-1为本申请实施例提供的显示背板的剖视图十二；
图6-2为本申请实施例提供的显示背板的剖视图十三；
图7为本申请实施例提供的显示背板的剖视图十四；
图8-1为本申请又一实施例提供的显示背板的制作方法流程示意图；
图8-2为本申请又一实施例提供的显示背板的俯视图一；
图8-3为本申请又一实施例提供的显示背板的俯视图二；
图8-4为本申请又一实施例提供的显示背板的俯视图三；
图8-5为本申请又一实施例提供的绑定层制作流程示意图；
图8-6为本申请又一实施例提供的设有可剥离胶层的结构示意图；
图8-7为本申请又一实施例提供的可剥离胶层去除后的结构示意图；
图8-8为本申请又一实施例提供的显示背板上形成有保护层的结构示意图；
图8-9为本申请又一实施例提供的另一设有可剥离胶层的结构示意图；
图8-10为本申请又一实施例提供的另一可剥离胶层去除后的结构示意图；
图8-11为本申请又一实施例提供的另一显示背板上形成有绑定层的结构示意图；
[根据细则91更正 01.06.2021]　
图9-1为本申请又一实施例提供的显示背板的制作方法流程示意图；
图9-2为本申请又一实施例提供的芯片键合后的示意图；
图10-1为本申请另一实施例提供的显示背板的制作方法流程示意图；
图10-2为本申请另一实施例提供的显示背板的俯视图一；
图10-3为本申请另一实施例提供的显示背板的俯视图二；
图10-4为本申请另一实施例提供的显示背板的俯视图三；
图10-5为本申请另一实施例提供的显示背板的俯视图四；
图10-6为本申请另一实施例提供的显示背板的切割示意图；
图10-7为本申请另一实施例提供的显示背板形成有第一导线层的剖视图；
图10-8为本申请另一实施例提供的显示背板形成有第一导线层的立体图；
图10-9为本申请另一实施例提供的显示背板形成有保护层的立体图一；
图10-10为本申请另一实施例提供的显示背板形成有保护层的立体图二；
附图标记说明：
1-衬底基板，10-键合区，11-第一导线层，12-第二导线层，13-绑定层，131-绑定层的上端，132-绑定层的下端，100-倒角区域，101-圆角区域，14-保护层，2-微型发光芯片，30-光刻胶层，31-第二黑胶层，32-半透明胶层，33-灰色胶层，40-可剥离胶层。
 本发明的实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳实施方式。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施方式。相反地，提供这些实施方式的目的是使对本申请的公开内容理解的更加透彻全面。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施方式的目的，不是旨在于限制本申请。
相关技术中，在显示面板上，LED芯片和驱动电路都是设置在显示背板的顶面上，且在该顶面的边缘位置预留有将驱动电路与外部电连接的金属线路连接区，导致显示面板的边框较宽。而在将多个显示面板拼接形成大尺寸的显示屏时，显示面板之间的拼接处所呈现出的缝隙至少是单个显示面板的边框宽度的两倍，在很大程度上会影响视觉效果和观看体验。
基于此，本申请希望提供一种能够解决上述技术问题的方案，其详细内容将在后续实施例中得以阐述。
本实施例提供了一种显示背板，通过在衬底基板底面设置对外连接的第二导线层，并通过衬底基板侧面设置的具有导电性能的绑定层，将衬底基板顶面上的驱动电路与底面的第二导线层电连接，进而通过第二导线层将驱动电路与外部电连接，不需要在衬底基板的顶面预留与外部电连接的金属线路连接区，可缩小衬底基板的边框宽度；且衬底基板侧面上设置的绑定层的上端还与衬底基板顶面上形成的封装层结合，可提升绑定层贴附的牢固性，避免绑定层从侧面脱落或松动而导致导电不良的情况发生。
为了便于理解，本实施例下面对显示背板结合附图进行示例说明。
    本实施例提供的显示背板包括参见图1-1和图1-2所示的一种衬底基板1，该衬底基板1具有顶面（图中的标记B所示，也可称之为正面），以及与该顶面相对的底面（也可称之为背面）。应当理解的是，本实施例中的衬底基板1的形状可根据需求灵活设置，例如可设置为但不限于矩形、扇形、圆形、菱形、正六边形等规则形状，也可根据需求设置为非规则形状，在此不再赘述。另外，本实施例中衬底基板1的材质也可根据应用需求设置，例如可包括但不限于玻璃基板、PCB（ Printed Circuit Board，印制电路板）基板、硅基板。
本实施例中，衬底基板1的顶面设有用于驱动微型发光芯片的驱动电路，本实施例中的微型发光芯片是指um级的发光芯片，例如可包括但不限于Mini LED芯片、Micro LED芯片中的至少一种。当然，该微型发光芯片也可根据需求替换为其他尺寸的芯片，在此不再赘述。
本实施例中的驱动电路包括芯片键合区电路，以及与该芯片键合区电路电连接的至少两个相互绝缘的第一导线层，该第一导线层的一端延伸至衬底基板1的侧面并与所述侧面齐平。本实施例的一种示例中，参见图1-2所示，芯片键合区电路可包括但不限于用于各微型发光芯片的正极引脚和负极引脚分别对应的键合区10，该键合区具体包括对应的正极键合区和负极键合区，第一导线层11可包括但不限于分别与正极键合区和负极键合区对应电连接的至少两个相互绝缘的导线层。当然，应当理解的是，驱动电路根据需求还可设置包括与其他器件对应电连接的键合区以及对应的第一导线层。且应当理解的是，在本实施例中，第一导线层11延伸至衬底基板1的侧面的一端，可为第一导线层远离驱动电路的一端。且该端与衬底基板1的侧面齐平，也即该端的端面与衬底基板1的侧面位于同一个面上。
应当理解的是，本实施例中的各第一导线层11可以延伸至衬底基板1的同一侧面，也可延伸至衬底基板1的不同侧面。为了便于理解，下面以图1-1所示的衬底基板1为示例进行说明。该衬底基板1包括四个侧面A1至A4，其上的第一导线层11可以都延伸至其中的一个侧面，例如可都延伸至A1；也可分别延伸至相对的两个侧面，例如分别延伸至A1和A2，或A3和A4；或可分别延伸至相邻的两个侧面，例如分别延伸至A1和A3，或A2和A4等；当然，根据需求还可分别延伸至其中的三个侧面或四个侧面，在此不再赘述。
本实施例中，衬底基板1的底面设有与第一导线层对应的至少两个相互绝缘的第二导线层。应当理解的是，本实施例中第一导线层和第二导线层之间的对应关系可以灵活设置。例如可以设置为一一对应，也可根据需求设置为一对多或多对一等，在此不再赘述。
本实施例中的第二导线层可以不延伸至衬底基板1的侧面，也可延伸至衬底基板1的侧面，此时可具体延伸至第对应的第一导线层所在的那一侧面，并可与该侧面齐平，例如参见图1-2中的第二导线层12所示，当然也可不齐平。该第二导线层可作为对外连接的导线层，从而在于第一导线层电连接后，将驱动电路与外部实现电连接。因此在衬底基板1的顶面则不再需要预留设置金属线路连接区，可降低显示背板的边框宽度，甚至在视觉效果上可到无边框的效果。在将显示背板拼接构成大的显示屏时，相邻显示背板之间拼接后呈现出的拼接缝隙的宽度，可与各显示背板的显示区域内相邻发光芯片之间的间距基本保持一致，在视觉效果上也基本可达到无缝的效果。
本实施例中显示背板还包括至少两个贴附于衬底基板1的侧面上，将对应的第一导线层和第二导线层导电连接的绑定层；其中该至少两个绑定层相互绝缘；第一导线层延伸至侧面的一端与绑定层的内表面贴合，绑定层的上端高出顶面，与设于顶面上的封装层（图中未示出）结合；本实施例中绑定层的内表面为绑定层靠近衬底基板的面，也即与衬底基板相贴合的一面，绑定层的上端为绑定层靠近顶面的一端。
应当理解的是，在本实施例的一些应用示例中，当某两个绑定层的电极极性相同时，二者之间也可不绝缘隔离；同样，对于第一导线层和第二导线层也可类似设置，这些等同替换的设置方式在此不再赘述。
为了便于理解，下面结合图2-1至图2-4所示的示例，对绑定层将对应的第一导线层和第二导线层电连接的结构进行便于理解性的说明。
参见图2-1至图2-4所示，第一导线层11延伸至衬底基板1的侧面的一端与该侧面齐平，贴附在衬底基板1该侧面上的绑定层13将第一导线层11和其对应的第二导线层12电连接，其中，第一导线层11延伸至该侧面的一端与绑定层13的内表面（也即图中绑定层13与衬底基板1的该侧面贴合的面）贴合，绑定层13的上端131高出衬底基板1的顶面，与设于该顶面上的封装层（图中未示出）结合；本实施例中绑定层13不会延伸到衬底基板1的顶面上 ，因此也不会占用衬底基板1顶面的区域，可进一步缩小制得的显示背板的边框宽度。而为了保证绑定层13贴附的牢固性，设置了绑定层13的上端131高出衬底基板1的顶面，并与该顶面上的封装层结合。且应当理解的是，该上端131与封装层之间的结合方式可以灵活设置，将在后续对其进行示例说明。
在本实施例的一种示例中，为了提升第一导线层11延伸至衬底基板1侧面的一端与绑定层13的内表面之间的贴合面积，可设置第一导线层为多层结构，从而提升第一导线层11延伸至该侧面的一端的端面面积，也即与绑定层13的内表面之间的贴合面积。本实施例中的第一导向层11可为但不限于多层金属层，也可为金属层或其他导电材料（例如导电胶层）组成的混合层材料。例如一种示例参见图2-5所示，第一导线层11包括由至少两个金属子层叠加构成的金属层。各金属子层的材料可相同，也可不同，或部分相同，部分不同。在一种应用示例中，金属子层的材料选用但不限于AL、Mo、Au、Ni、Ag、Cu中的至少一种。
当然，在一些应用示例中，第二导线层12可为单层导电结构，也可设置为与多层导电结构，在此不再赘述。
本实施例中绑定层13与第二导线层12的连接方式可以灵活设置，为了便于理解，下面结合几种示例进行说明：
示例一：参见图2-4所示，第二导线层12的一端也延伸至侧面（该侧面为对应的第一导线层所延伸的侧面）并与该侧面齐平，第二导线层12延伸至该侧面的一端，与绑定层13的内表面贴合；且绑定层13的下端132（该下端132为绑定层远离衬底基板1的顶面的一端）可与第二导线层12齐平（即下端132的端面与第二导线层12的下表面（该下表面为远离基板衬底1的底面的面）位于同一面上），也可不与第二导线层12齐平，具体可根据需求灵活设置。
示例二：参见图2-2所示，绑定层13的下端132延伸至底面上，并叠加于对应的第二导线层12上，采用这种上下叠加（也即overlap）的方式实现电连接，可提升二者之间的接触面积以及连接的可靠性。在本示例中，第二导线层12可以不延伸至衬底基板1的侧面，图2-2所示的示例中第二导线层12就为延伸至衬底基板1的侧面。当然，在另一些应用示例中，第二导线层12也可以不延伸至衬底基板1的侧面，例如参见图2-1所示，此时第二导线层12延伸至该侧面的一端，还可同时与绑定层13的内表面贴合，从而进一步增加二者之间的接触面积。也即在本实施例中，绑定层的下端可与第二导线层上下叠加的同时，第二导线层延伸至衬底基板侧面的一端还可同时与绑定层的内表面贴合接触。
示例三：参见图2-3所示，该示例与示例二中图2-2所示的连接结构的区别在于，绑定层13的下端132延伸至底面上，与对应的第二导线层12一端的端面贴合接触。
当然，绑定层与第二导线层之间的连接结构并不限于上述示例所示的几种结构，还可灵活的替换为其他结构，在此不再赘述。
在本示例的一种示例中，为了避免绑定层延伸至衬底基板的底面时出现断线的问题，可将衬底基板的至少一个侧面（例如第一导线层所延伸到的侧面）和底面相交的区域设置为倒角区域或圆角区域，绑定层的下端沿该倒角区域或圆角区域向底面延伸，从而尽可能避免出现断线的情况发生，进一步提升电连接的可靠性。本实施例中以上倒角区域或圆角区域的具体尺寸则可灵活设置。
例如参见图3-1和图3-2所示，衬底基板1的侧面与底面相交的区域设置为倒角区域100，绑定层13的下端132则沿该倒角区域100向衬底基板1的底面延伸。当然，本示例中的倒角区域100也可替换为图3-3所示的圆角区域101，或其他可避免断线情况发生的过度区域，在此不再赘述。
在本实施例的一种示例中，为了进一步提升绑定层与衬底基板的侧面之间贴附的强度，可设置衬底基板的侧面上，贴附绑定层的区域中的至少一部分为粗糙面，从而提升二者之间的贴合强度。例如，可以设置贴附层的整个区域都为粗糙面，也可仅设置其中的一部分为粗糙面，或可直接设置衬底基板的该侧面的整个区域都为粗糙面，该粗糙面可以通过在侧面上设置凹槽和/或凸起形成，也可通过对该侧面进行研磨形成，在此不再赘述。本实施例中粗糙面的粗糙度可以灵活设置，例如可该粗糙度Sa 可设置为但不限于大于等于0.1μm，小于等于0.5μm。
在本实施例的一种示例中，可在衬底基板需要设置绑定层的侧面上，对应绑定层的设置区域设置贯穿衬底基板顶面和底面的凹槽，绑定层可直接设置于该凹槽内，这样既能提升绑定层与衬底基板之间的贴合面积，提升二者之间的贴合强度；又能将绑定层设置于凹槽内，尽可能减少绑定层凸出于衬底基板的侧面的尺寸，从而可进一步缩小显示背板的边框宽度。应当理解的是，本示例中凹槽的形状和尺寸可根据应用需求灵活设置，例如该凹槽的横截面形状可为但不限于矩形、弧形、三角形等规则形状，也可为不规则形状。为了便于理解，下面以弧形凹槽为示例进行说明。
参见图4所示的衬底基板1，在其侧面A1上设有多个凹槽A11，凹槽A11为弧形凹槽，衬底基板1顶面上的第一导线层11延伸至该侧面A1的一端的端面与凹槽A11的内表面齐平，从而可在凹槽A11内设置绑定层。在本实施例的一种示例中，可设置绑定层的外表面(为绑定层远离衬底基板的面)与侧面A1上未设置凹槽A11的区域位于同一面上，也即与侧面A1齐平设置，从而尽可能减小制得的显示背板的边框的宽度。当然，在一些应用示例中，也可设置绑定层的外表面凸出于侧面A1，或绑定层的外表面位于凹槽A11内。
在本实施例中，绑定层的上端与衬底基板的顶面上形成的封装层的结合方式，可以是绑定层的上端的至少一部分嵌入到封装层内，也可以是绑定层的内表面与封装层的侧面贴合。其中，为了提升显示效果，在视觉上进一步减小显示背板的边框，达到视觉上基本无边框的效果，可设置绑定层的上端与底面之间的距离，小于封装层的上表面与底面之间的距离，也即封装层的上表面，高于绑定层的上端，使得部分光线可通过封装层的侧面射出，在视觉上基本达到无边框的效果；其中封装层的上表面为封装层远离顶面的面。
在本实施的一种示例中，显示背板还可包括将绑定层覆盖的保护层，从而实现对绑定层的保护。本实施例中的保护层可以为但不限于绝缘层，也可为但不限于具有一定导电性的导电层。保护层为绝缘层时，可以一个绑定层对应一个保护层，也可通过一个保护层直接覆盖多个绑定层（此时相邻绑定层之间也被保护层覆盖）。本实施例中的保护层可为透光层，也可根据需求设置为非透光层。该保护层的设置，在将多个显示背板拼接形成大尺寸的显示屏时，可防止相邻显示背板之间的绑定层之间产生碰撞而残生损伤。在一种示例中，为了改善拼接处的视觉效果，可设置保护层为黑色保护层，例如可为但不限于黑色油墨层或第一黑胶层。其中黑色油墨层或第一黑胶层的厚度可根据需求灵活设置，例如可设置为大于等于3μm，小于等于10μm。保护层的光密度（Optical Density，OD）值可也灵活设置，例如可设置为但不限于大于等于2。
例如，一种示例参见图5-1所示，显示背板还包括将绑定层13覆盖的保护层14，本示例中，保护层14的上端高于绑定层13的上端131。
又例如，一种示例参见图5-2所示，显示背板还包括将绑定层13覆盖的保护层14，本示例中，保护层14的上端与绑定层13的上端131的齐平。
应当理解的是，本实施例中的保护层可将绑定层13的外表面全覆盖，也可仅将绑定层13的外表面部分覆盖，例如参见图5-3所示。具体可根据需求灵活设置。
本实施例提供的上述显示背板，在衬底基板的正面不需要保留用于将驱动电路与外部电连接的金属线区域，而是将该区域转为设置到衬底基板的背面，因此使得衬底基板具有较窄的边框，该边框的宽度可以达到相应发光芯片之间的间距的一半，甚至更小，在视觉效果上可达到无边框的视觉效果，且在拼接成大显示屏时，可基本达到无缝拼接的视觉效果；另外绑定层不但贴附在衬底基板的侧面，其上端还高出衬底基板的顶面可与封装层结合，可提升绑定层贴附的牢固性，避免绑定层从侧面脱落或松动而导致导电不良的情况发生，提升显示背板制作的良品率，降低成本。
本实施例的一种示例中，显示背板还包括封装层、若干微型发光芯片若干微型发光芯片固设于衬底基板的顶面上与芯片键合区电路电连接，封装层设于衬底基板的顶面上并与绑定层的上端结合，并将微型发光芯片覆盖。当然在一些应用场景中，至少一颗微型发光芯片的至少一个发光面也可外露于封装层。
本实施例中的微型发光芯片可以包括但不限于Mini LED芯片和Micro LED芯片中的至少一种。微型发光芯片可通过各种芯片转移方法转移至衬底基板的顶面上，与驱动电路中对应的键合区键合。
本实施例中，封装层结构可以灵活设置，下面以几种结构示例进行说明。
示例一：封装层包括覆盖在顶面上的第二黑胶层，以及设于第二黑胶层上的透明胶层或半透明胶层；微型发光芯片的至少一个出光面裸露于第二黑胶层。例如参见图6-1所示的显示背板，在衬底基板1的顶面上键合有微型发光芯片2，该微型发光芯片可包括但不限于蓝色发光芯片，或包括但不限于蓝色发光芯片、红色发光芯片和绿色发光芯片。在衬底基板1的顶面设有第二黑胶层31，微型发光芯片的正面的出光面裸露于第二黑胶层31，在第二黑胶层31上设有半透明胶层31。一种应用示例中，第二黑胶层31的厚度可为但不限于50μm至60μm，半透明胶层31的厚度可为但不限于150μm至200μm；在另一应用示例中。在一些应用示例中，该半透明胶层31或透明胶层可通过具有透光性的基板替代。在图6-1所示的示例中，绑定层13的上端嵌入到封装层内，具体的绑定层的上端嵌入到半透明胶层31内，且低于半透明胶层31的上顶面。本示例中的保护层的上端也嵌入到半透明胶层31内，当然其也可不嵌入到半透明胶层31内。
示例二： 封装层包括覆盖在顶面上，将若干微型发光芯片包覆的灰色胶层；该灰色胶层具有透光性，该灰色胶层的透光率低于半透明胶层的透光率。例如参见图6-2所示的显示背板，在衬底基板1的顶面上键合有微型发光芯片2，在衬底基板1的顶面设有灰色胶层33，灰色胶层33的厚度可灵活设置。在图6-2所示的示例中，绑定层13的上端的内表表与封装层的内侧面贴合，具体与灰色胶层33的内侧面贴合。绑定层13的上端与保护层14的上端可齐平设置，也可低于保护层14的上端；保护层14的上端与灰色胶层33的上表面可齐平设置，也可低于灰色胶层33。
示例三：在本示例中，封装层中还可包括对微型发光芯片发出的光进行色彩转换的彩膜层（也可称之为发光转换层），该彩膜层可直接设置于微型发光芯片2的正出光面上，也可设置于上述示例中的第二黑色胶层31之上，或半透明胶层32之上，或灰色胶层33之上。
示例四：在本实施例中，在上述各示例基础上，还可包括位于最底层的可剥离胶层，该可剥离胶层不覆盖芯片键合区电路。
当然，应当理解的是，本实施例中封装层的结构并不限于上述示例的结构，例如在一些应用示例中封装层还可包括直接设于衬底基板1的顶面与第二黑胶层31之间的OC胶层，当然还可根据需求设置其他的胶层或转换层等，在此不再赘述。且本实施例中以上各层的具体材质以及制作工艺可灵活设置，在此不再赘述。
在本实施例的一种示例中，参见图7所示，绑定层的上端131与衬底基板1底面之间的距离L1，小于封装层的上表面（本示例中即图7中半透明胶层32的上表面）与衬底基板1底面之间的距离L2，也即封装层的上表面，高于绑定层的上端131，使得部分光线可通过封装层的侧面射出，在视觉上基本达到无边框的效果。且在拼接成大显示屏时，可基本达到无缝拼接的视觉效果。
又一可选实施例：
本实施例提供了一种显示背板的制作方法，其可用于制作上述实施例中所示的显示背板，参见图8-1所示，其包括但不限于：
S801：在衬底基板上制作电路。
在本步骤中，包括在衬底基板的顶面上制作驱动电路，以及在衬底基板的底面上制作至少两个相互绝缘的第二导线层。制作的驱动电路包括至少两个相互绝缘的第一导线层，第一导线层的一端延伸至衬底基板的侧面并与侧面齐平，衬底基板的底面制作的第二导线层与第一导线层对应。
应当理解的是，本实施例中对在衬底基板上制作电路的方式不做限制。为了便于理解，下面以衬底基板为玻璃基板为示例，在衬底基板上制作电路的过程为示例进行说明。
在本示例中，衬底基板可以采用主动式驱动（PM mode）或者被动式驱动（AM mode）。在制作过程中，参见图8-2所示，在衬底基板1上金属成膜形成电路时，保留衬底基板1上显示区域AA边缘处金属层延伸超出显示边界。然后沿着显示区域AA的边缘对衬底基板1进行切割，在衬底基板1的顶面和底面上，延伸出显示区域AA边缘处的金属层在被切割后，分别形成对应的第一导线层和第二导线层。例如参见图8-3所示，切割后在衬底基板1的顶面上形成的第一导线层11。
在本实施例中，为避免在衬底基板1的侧面制作时绑定层时，相邻导线层之间短路，可在金属线路成膜、曝光、显影形成线路图案后在上面覆盖一层绝缘光刻胶（即在衬底基板1的正面和背面都形成一层绝缘光刻胶），此时的光刻胶层覆盖全部金属线路，并可将显示区域AA边缘位置对应的导线层的表面的光刻胶层经过曝光显影进行开窗。例如参见图8-4所示的光刻胶层30。
在一些应用示例中，因为单层的金属层的厚度较小，为了提升第一导线层延伸至衬底基板1的侧面一端与绑定层的内表面之间的贴合（也可称之为搭接）面积，可提通过但不限于黄光制程在依次叠加多层金属子层以形成具有多层结构的第一导线层，从而成倍的提升第一导线层的厚度，保证第一导线层与绑定层之间的贴合面积。形成的第一导线层的多层结构可参见但不限于图2-5所示，在此不再赘述。
S802：在衬底基板的顶面上形成封装层。
S803：在衬底基板和封装层的侧面上形成至少两个将对应的第一导线层和第二导线层导电连接的绑定层。
在本示例中，形成的至少两个绑定层相互绝缘，且第一导线层延伸至侧面的一端与绑定层的内表面贴合，绑定层的上端高出衬底基板的顶面，与设于该顶面上的封装层结合。
应当理解的是，本实施例中在衬底基板和封装层的侧面上形成绑定层的方式可灵活设置。且在一些示例中，在衬底基板和封装层的侧面上形成至少两个将对应的第一导线层和第二导线层导电连接的绑定层之前，可包括但不限于以下至少之一：
对衬底基板的侧面和底面相交的区域进行倒角处理形成倒角区域或进行圆角处理形成圆角区域，从而避免在形成绑定层，绑定层的下端在延伸过程中出现断线的情况；
至少对衬底基板的侧面上需要形成绑定层的区域进行研磨形成粗糙面；
在衬底基板的侧面上需要形成绑定层的区域开设凹槽，且在一些示例中，该凹槽的内壁也可处理为粗糙面。当然，本实施例中的凹槽也可预先形成，例如在制作衬底基板的过程中，可先在衬底基板的交接区开设通孔，然后沿着通孔的中心切割，切割后得到的单块衬底基板的侧面上对应的位置就预设好了凹槽。
为了便于理解，下面以几种形成绑定层的示例进行说明。参见图8-5所示，包括但不限于：
S8021：在衬底基板的顶面上形成可剥离胶层，可剥离胶层的侧面与衬底基板的侧面齐平。
S8022：在衬底基板的侧面和可剥离胶层的侧面上形成绑定层，绑定层的上端与底面之间的距离，小于等于可剥离胶层的上表面与底面之间的距离，可剥离胶层的上表面为可剥离胶层远离顶面的面。
例如参见图8-6所示，在衬底基板1的顶面上设有可剥离胶层40，然后在衬底基板1的侧面和可剥离胶层40的侧面上形成绑定层13，绑定层13的上端131与衬底基板1底面之间的距离L3，小于等于可剥离胶层40的上表面与衬底基板1底面之间的距离L4，可剥离胶层的上表面为可剥离胶层远离衬底基板1的顶面的面。
在一种示例中，可通过但不限于印刷金属浆（例如银浆），溅镀金属膜，转印油墨等方法，在衬底基板的侧面和可剥离胶层的侧面上形成绑定层；绑定层形成后可进行固化处理，根据材料不同，可以采用但不限于Oven固化（如低温固化银浆可以是80℃，约40分钟，高温固化银浆可以是180℃，30分钟）或者激光固化（如瞬时260℃的激光按照5mm/sec的速率进行）。
S8023：将可剥离胶层覆盖芯片键合区电路的部分去除。
去除后至少保留可剥离胶层的边缘区域，例如参见图8-7所示，将可剥离胶层40去除后，保留的边缘区域（该边缘区域至少包括设有绑定层的一侧的边缘区域）与绑定层13的上端结合，保留的边缘区域的宽度可灵活设设置，例如可设置为50um至70um。在本实施例的一种示例中，该可剥离胶层可采用但不限于光刻胶层，可通过但不限于光刻胶开窗的方式对需要除去的光刻胶进行去除。当然，在本步骤中，还可将光刻胶层30去除。
在此步骤之后，可在露出的芯片键合区电路上完成微型发光芯片的键合，以及继续形成封装层的其他胶层，例如：
在顶面上形成第二黑胶层，以及在第二黑胶层形成透明胶层或半透明胶层；或，在顶面上形成将若干微型发光芯片包覆的灰色胶层。
[根据细则91更正 01.06.2021]　
为了便于理解，下面结合图9-1进行说明，其包括但不限于：
S901：在衬底基板的顶面上完成微型发光芯片的转移和键合。
例如，对于Mini LED芯片，可采用但不限于SMT（Surface Mounted Technology，表面贴装工艺）工艺，对于Micro LED芯片，可采用但不限于ACF（Anisotropic Conductive Film，异方性导电胶膜）材料键合或者凸点下金属化层UBM共晶方式进行键合。例如参见图9-2所示，在衬底基板1的顶面完成了微型发光芯片2的键合。
S902：在衬底基板的顶面上形成封装层的其他胶层。
例如，S901中完成微型发光芯片的键合后，可利用但不限于真空热压工艺在衬底基板1的顶面上，微型发光芯片纵横间隙中封装一层50μm至60μm的黑胶材料（即第二黑胶层，黑胶材料可以是可反应型聚酰亚胺与环氧树脂的复合材料，其中聚酰亚胺作为固化剂，同时添加碳等添加元素增加黑度）。本示例中封装完成后的黑胶层可覆盖可剥离胶层，黑胶层的上表面不超出微型发光芯片的上表面（即正出光面），即封胶后可采用但不限于采用plasma方式对超出微型发光芯片的上表面部分的黑胶进行去除。该黑胶层可起到提升亮度显示区域亮度及改善正面反光的作用。之后再在该黑胶层的上表面采用真空热压方式封装一层半透明胶层，半透明胶层的厚度为150μm-200μm，材料也可采用但不限于聚酰亚胺作为固化剂的环氧树脂复合材料。
当然，一些示例中，上述黑胶层和半透明胶层可替换为光透过率低于半透明胶层的层灰色胶。
S804：在衬底基板和封装层的侧面上形成将绑定层覆盖的保护层，参见图8-8所示。应当理解的是该步骤为可选步骤。
例如，可以在绑定层的外表面覆盖一层黑色保护胶（即第一黑胶层）或黑色油墨层，可以起到防止碰撞损伤线路以及改善拼缝处视觉效果的作用。例如，一种应用场景中，可覆盖一层黑色保护胶，该黑色保护胶可以采用但不限于改性的丙烯酸类树脂类材料加黑色颜料填充剂等，具有高粘附力，其厚度可设置为单部位3μm至8μm，OD（Optical Density）值大于2。灰色胶的材质可例如包括掺有碳粉的硅氧树脂，具体在此不限。
在本实施例的另一示例中，在衬底基板的顶面上形成可剥离胶层后，也可先将可剥离胶层覆盖芯片键合区电路的部分去除后，再在衬底基板的侧面和可剥离胶层的侧面上形成绑定层。
例如，参见图8-9所示，先在衬底基板1的顶面上形成可剥离胶层40；参见图8-10所示，将可剥离胶层40覆盖芯片键合区电路的部分去除，在衬底基板1的边缘保留设定宽度的可剥离胶层40；参见图8-11所示，再在衬底基板1的侧面和可剥离胶层的侧面上形成绑定层13。
上述显示背板的制作方法所制得的显示背板，不再需要在衬底基板的顶面则预留设置金属线路连接区，而是通过衬底基板底面的第二导线层实现与外部的连接，因此制得的显示背板具有窄边框，且制得的绑定层不但贴附在衬底基板的侧面，其上端还高出衬底基板的顶面可与封装层结合，其贴附的牢固性能得到更好的保证。
另一可选实施例：
本实施例又提供了一种显示背板的制作方法，其主要包括基板制作、芯片键合、形成封装层、绑定层的制作几个过程。例如参见图10-1所示，该显示背板的制作方法包括但不限于：
S1001：在衬底基板上制作电路。
在本步骤中在衬底基板上制作电路的过程可参见上述实施例中S801步骤中的过程，但在衬底基板1上显示区域AA内形成好线路图案后，先不对其进行切割，且为避免在衬底基板1的侧面制作时绑定层时，相邻导线层之间短路，可在金属线路成膜、曝光、显影形成线路图案后在上面覆盖一层绝缘光刻胶，此时的光刻胶层覆盖全部金属线路，并可将显示区域AA边缘位置对应的导线层的表面的光刻胶层经过曝光显影进行开窗，得到的结构图参见图10-2所示。
S1002：在衬底基板的顶面上完成微型发光芯片的键合。
本实施例中对微型发光芯片的转移和键合过程不再赘述，键合后的一种示例参见图10-3所示，图中的微型发光芯片可以为蓝光发光芯片，也可包括蓝光发光芯片、红光发光芯片和绿光发光芯片。
S1003：在衬底基板的顶面上形成封装层，所形成的封装层覆盖微型发光芯片，且封装层的侧面与衬底基板的所述侧面齐平。
本实施例中，在衬底基板的顶面上形成封装层的过程可参考但不限于上述示例中的封装层的形成过程。下面以封装层包括第二黑胶层和半透明胶层为示例进行说明。
可先在衬底基板的顶面上形成第二黑胶层31，参见图10-4所示，然后再在第二黑胶层31之上形成半透明层32，参见图10-5所示。其中光刻胶层30、第二黑胶层31和半透明层32固化后的硬度可设置为大于等于2H，以满足后续切割需求。
S1004：对衬底基板沿着显示区域AA进行切割，去除显示区域AA之前的其他部分。应当理解的是，本实施例中的该步骤为可选步骤，当衬底基板的顶面整面都为显示区域时，则可不执行该步骤。
在本实施例中，可在形成封装层后，按照显示区域AA的大小对衬底基板进行四边切割，切割方式可采用但不限于激光切割、刀轮切割等工艺。例如参见图10-6中箭头所示的切割方向，可采用激光方式从封胶层往下切割，激光切断封装层，进一步的切割至衬底基板的70μm~80μm深度，之后采用手动裂片或机械自动裂片的方式将显示区域AA以外的区域去除。当然，在一些实例中，也可切割至衬底基板的底面。
S1005：在衬底基板的侧面上和封装层的侧面上，形成至少两个将对应的第一导线层和第二导线层导电连接的绑定层。
本步骤中形成的至少两个绑定层相互绝缘，且第一导线层延伸至侧面的一端与绑定层的内表面贴合，绑定层的上端高出顶面，与封装层结合，参见图10-7和图10-8所示。
应当理解的是，本实施例中在执行了S1004之后，执行S1005之前，可选择性的执行但不限于以下至少之一：
至少对衬底基板的侧面上需要形成绑定层的区域进行研磨形成粗糙面；例如，可采用但不限于金刚砂研磨棒对切割后的衬底基板的侧面（可选地，还可根据需求同时对封装层的侧面）进行研磨，研磨棒目数可以是800，1000，1500等，研磨之后的表面粗糙度Sa 大于等于0.1μm，小于等于.3μm，粗糙度可提升制作绑定层所用导电材料的附着性，进而提升绑定层与衬底基板和封装层之间的结合强度；
对衬底基板的侧面和底面相交的区域进行倒角处理形成倒角区域或进行圆角处理形成圆角区域，从而避免在形成绑定层，绑定层的下端在延伸过程中出现断线的情况；在一种示例中，可在对衬底基板的侧面进行研磨过程中，对衬底基板的底部进行倒角或圆角，倒角或圆角的尺寸可小于等于100μm；
在衬底基板的侧面上需要形成绑定层的区域开设凹槽，且在一些示例中，该凹槽的内壁也可处理为粗糙面。当然，本实施例中的凹槽也可预先形成，例如在制作衬底基板的过程中，可先在衬底基板的交接区开设通孔，然后沿着通孔的中心切割，切割后得到的单块衬底基板的侧面上对应的位置就预设好了凹槽。当然，在一些示例中，凹槽还可贯穿封装层。
S1006： 在衬底基板的侧面上和封装层的侧面上，形成将绑定层覆盖的保护层。应当理解的是该步骤为可选步骤。
例如，可以在绑定层的外表面覆盖一层黑色保护胶（即第一黑胶层）或黑色油墨层，可以起到防止碰撞损伤线路以及改善拼缝处视觉效果的作用。例如，一种应用场景中，可覆盖一层黑色保护胶，该黑色保护胶可以采用但不限于改性的丙烯酸类树脂类材料加黑色颜料填充剂等，具有高粘附力，其厚度可设置为单部位5μm至7μm，OD（optical density）值大于等于2。
例如，一种示例中参见图10-9所示，显示背板包括与多个绑定层13一一对应的多个保护层14，各保护层14覆盖在各自对应的绑定层13之上。本示例中的保护层14可为绝缘保护侧，也可根据需求设置为导电保护层。
又例如，另一种示例参见图10-10所示，显示背板包括在衬底基板的侧面设置的一层保护层14，该保护层14直接将多个绑定层13覆盖。本示例中的保护层14为绝缘保护层。
又一可选实施例：
本实施例还提供了一种显示面板，包括如上所示的显示背板。还提供了一种显示屏，其包括该显示面板和框架，显示面板固定在框架上。该显示屏具有窄边框，在视觉效果上基板可达到无边框的效果，因此显示效果和观看体验更好，可应用于但不限于各种智能移动终端，车载终端、PC、显示器、电子广告板等。
本实施例还提供了一种拼接显示屏，包括该拼接显示屏可通过至少两个如上所示的显示屏拼接而成，由于显示屏的边框及窄，相邻显示屏之间拼接后呈现出的拼接缝隙的宽度，可与各显示屏的显示区域内相邻发光芯片之间的间距基本保持一致，在视觉效果上可达成无缝的效果。
应当理解的是，本申请的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本申请所附权利要求的保护范围。

Claims (20)

  1. 一种显示背板，包括：
    衬底基板，所述衬底基板具有相对的顶面和底面，所述顶面设有用于驱动微型发光芯片的驱动电路，所述驱动电路包括芯片键合区电路，与所述芯片键合区电路连接的至少两个相互绝缘的第一导线层，所述第一导线层的一端延伸至所述衬底基板的侧面并与所述侧面齐平；所述底面设有与所述第一导线层对应的至少两个相互绝缘的第二导线层；
    设于所述顶面上的封装层；
    至少两个贴附于所述侧面上，分别将对应的所述第一导线层和所述第二导线层导电连接的绑定层；
    所述至少两个绑定层相互绝缘；所述第一导线层延伸至所述侧面的一端与所述绑定层的内表面贴合，所述绑定层的上端高出所述顶面，与设于所述顶面上的封装层结合；所述绑定层的内表面为所述绑定层靠近所述衬底基板的面，所述绑定层的上端为所述绑定层靠近所述顶面的一端。
  2. 如权利要求1所述的显示背板，其中，所述绑定层的下端延伸至所述底面上，并叠加于对应的所述第二导线层上，所述绑定层的下端为所述绑定层远离所述顶面的一端；
    和/或，
    所述第二导线层的一端延伸至所述侧面并与所述侧面齐平，所述第二导线层延伸至所述侧面的一端，与所述绑定层的内表面贴合。
  3. 如权利要求2所述的显示背板，其中，所述衬底基板的所述侧面和所述底面相交的区域为倒角区域或圆角区域，所述绑定层的下端沿所述倒角区域或圆角区域向所述底面延伸。
  4. 如权利要求1-3任一项所述的显示背板，其中，所述侧面上贴附有所述绑定层的区域设有凹槽，所述绑定层位于所述凹槽内；
    和/或；
    所述侧面上贴附有所述绑定层的区域的至少一部分为粗糙面。
  5. 如权利要求4所述的显示背板，其中，所述绑定层位于所述凹槽内，所述绑定层的外表面与所述侧面上未设置所述凹槽的区域位于同一面上，所述绑定层的外表面为所述绑定层远离所述衬底基板的面。
  6. 如权利要求4所述的显示背板，其中，所述绑定层位于所述凹槽内，所述绑定层的上端至少部分嵌入所述封装层内。
  7. 如权利要求1所述的显示背板，其中，所述绑定层的内表面与所述封装层的侧面贴合。
  8. 如权利要求1所述的显示背板，其中，绑定层的上端与所述底面之间的距离，小于所述封装层的上表面与所述底面之间的距离，所述封装层的上表面为所述封装层远离所述顶面的面。
  9. 如权利要求1所述的显示背板，其中，所述第一导线层包括由至少两个金属子层叠加构成的金属层。
  10. 如权利要求1所述的显示背板，其中，所述显示背板还包括将所述绑定层覆盖的保护层。
  11. 如权利要求10所述的显示背板，其中，所述保护层为黑色油墨层或第一黑胶层。
  12. 如权利要求1所述的显示背板，其中，所述显示背板还包括若干微型发光芯片，所述若干微型发光芯片固设于所述顶面上与所述芯片键合区电路连接。
  13. 一种显示背板的制作方法，包括：
    在衬底基板的顶面制作驱动电路，所述驱动电路包括芯片键合区电路，以及与所述芯片键合区电路连接的至少两个相互绝缘的第一导线层，所述第一导线层的一端延伸至所述衬底基板的侧面并与所述侧面齐平；并在所述衬底基板的底面制作与所述第一导线层对应的至少两个相互绝缘的第二导线层，所述顶面和底面为所述衬底基板相对的两个面；
    在所述顶面上形成封装层，所述封装层的侧面与所述衬底基板的所述侧面齐平；
    在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层，形成的所述至少两个绑定层相互绝缘，且所述第一导线层延伸至所述侧面的一端与所述绑定层的内表面贴合，所述绑定层的上端高出所述顶面，与所述封装层结合；所述绑定层的内表面为所述绑定层靠近所述衬底基板的面，所述绑定层的上端为所述绑定层靠近所述顶面的一端。
  14. 如权利要求13所述的显示背板的制作方法，其中，所述在所述顶面上形成封装层之前，还包括：
    在所述芯片键合区电路上完成微型发光芯片的键合。
  15. 如权利要求14所述的显示背板的制作方法，其中，所述在所述顶面上形成封装层包括：
    在所述顶面上形成第二黑胶层，以及在所述第二黑胶层形成透明胶层或半透明胶层；所述微型发光芯片的至少一个出光面裸露于所述第二黑胶层；
    或，
    在所述顶面上形成将所述若干微型发光芯片包覆的灰色胶层。
  16. 如权利要求13所述的显示背板的制作方法，其中，所述在所述顶面上形成封装层包括：
    在所述顶面上形成可剥离胶层，所述可剥离胶层的侧面与所述衬底基板的所述侧面齐平；
    所述在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层包括：
    在所述衬底基板的所述侧面和所述可剥离胶层的所述侧面上形成绑定层后，将所述可剥离胶层覆盖所述芯片键合区电路的部分去除；
    或，
    将所述可剥离胶层覆盖所述芯片键合区电路的部分去除后，在所述衬底基板的所述侧面和所述可剥离胶层的所述侧面上形成绑定层；
    所述绑定层的上端与所述底面之间的距离，小于等于所述可剥离胶层的上表面与所述底面之间的距离，所述可剥离胶层的上表面为所述可剥离胶层远离所述顶面的面。
  17. 如权利要求16所述的显示背板的制作方法，其中，所述在所述衬底基板的所述侧面和所述可剥离胶层的所述侧面上形成绑定层后，还包括：
    在所述芯片键合区电路上完成微型发光芯片的键合；
    在所述顶面上形成第二黑胶层，以及在所述第二黑胶层形成透明胶层或半透明胶层；所述微型发光芯片的至少一个出光面裸露于所述第二黑胶层；
    或，
    在所述顶面上形成将所述若干微型发光芯片包覆的灰色胶层。
  18. 如权利要求13所述的显示背板的制作方法，其中，所述在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层之前，还包括：
    对所述衬底基板的所述侧面和所述底面相交的区域进行倒角处理形成倒角区域或进行圆角处理形成圆角区域；
    所述在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层包括：
    将所述绑定层的下端沿所述倒角区域或圆角区域向所述底面延伸，所述绑定层的下端为所述绑定层远离所述顶面的一端；
    和/或，
    所述在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层之前，还包括：
    至少对所述衬底基板的所述侧面上需要形成所述绑定层的区域进行研磨形成粗糙面。
  19. 如权利要求13所述的显示背板的制作方法，其中，所述在所述衬底基板和所述封装层的所述侧面上形成至少两个将对应的所述第一导线层和所述第二导线层导电连接的绑定层之后，还包括：
    在所述衬底基板的所述侧面上和所述封装层的所述侧面上，形成将所述绑定层覆盖的保护层。
  20. 一种显示面板，包括如权利要求1所述的显示背板。
     
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