WO2024082482A1 - 拼接显示面板和显示终端 - Google Patents

拼接显示面板和显示终端 Download PDF

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Publication number
WO2024082482A1
WO2024082482A1 PCT/CN2023/074335 CN2023074335W WO2024082482A1 WO 2024082482 A1 WO2024082482 A1 WO 2024082482A1 CN 2023074335 W CN2023074335 W CN 2023074335W WO 2024082482 A1 WO2024082482 A1 WO 2024082482A1
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WO
WIPO (PCT)
Prior art keywords
layer
package
package body
light
emitting diode
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Application number
PCT/CN2023/074335
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English (en)
French (fr)
Inventor
杨超群
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Publication of WO2024082482A1 publication Critical patent/WO2024082482A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations

Definitions

  • the present application relates to the field of display technology, and in particular to a spliced display panel and a display terminal.
  • Micro light emitting diode is a new generation of display technology. Compared with the existing organic light emitting diode display (Organic Light Emitting Display, OLED) technology, it has the advantages of small size, higher brightness, better luminous efficiency, and lower power. Micro LED technology designs LED structures into thin films, miniaturization, and arrays, and its size is only about 1 micron to 10 microns. However, it is precisely because of the small size of Micro LED chips that optical binning of Micro LED chips is very difficult.
  • the present application provides a spliced display panel and a display terminal to alleviate the technical problem of optical binning difficulty in existing Micro LED chips.
  • the present application provides a spliced display panel, which includes a backplane and at least one first package, at least one second package, and at least one third package bonded to the backplane, wherein the first package, the second package, and the third package display blue light, red light, and green light, respectively; the first package, the second package, and the third package each include:
  • a driving circuit and a light-emitting diode chip are integrated on the substrate and electrically connected;
  • a first packaging layer covering the driving circuit and the light emitting diode chip
  • the second package body also includes a red quantum dot film layer arranged on a side of the first package layer away from the light-emitting diode chip of the second package body and a second package layer arranged on a side of the red quantum dot film layer away from the first package layer, and the red quantum dot film layer is positioned opposite to the light-emitting diode chip of the second package body.
  • the light-emitting diode chip of the second package body emits blue light
  • the second package body further includes a first blue light absorption layer arranged between the red quantum dot film layer and the second package layer.
  • the light emitting diode of the third package body emits green light.
  • the light emitting diode chip of the third package body emits blue light
  • the third package body further includes:
  • a green quantum dot film layer is arranged on a side of the first packaging layer away from the light emitting diode chip of the third packaging body;
  • a third encapsulation layer is arranged on a side of the green quantum dot film layer away from the first encapsulation layer;
  • the green quantum dot film layer is located opposite to the light emitting diode chip of the third package body.
  • the third packaging body further includes:
  • the second blue light absorbing layer is arranged between the green quantum dot film layer and the third encapsulation layer.
  • the light emitting diode chip emits ultraviolet light
  • the second encapsulation body comprises: a red quantum dot film layer disposed on the first encapsulation layer; and a second encapsulation layer disposed on the red quantum dot film layer;
  • the third encapsulation body comprises: a green quantum dot film layer disposed on the first encapsulation layer; and a third encapsulation layer disposed on the green quantum dot film layer;
  • the first encapsulation body includes: a blue quantum dot film layer disposed on the first encapsulation layer; and a fourth encapsulation layer disposed on the blue quantum dot film layer.
  • the first packaging body, the second packaging body and the third packaging body further include an ultraviolet light absorbing layer respectively;
  • the ultraviolet light absorption layer of the second package body is arranged between the red quantum dot film layer and the second packaging layer; the ultraviolet light absorption layer of the third package body is arranged between the green quantum dot film layer and the third packaging layer; the ultraviolet light absorption layer of the first package body is arranged between the blue quantum dot film layer and the fourth packaging layer.
  • the first package body, the second package body and the third package body all further include a composite film layer, the composite film layer is respectively located on a side of the first package layer of the first package body, the second package body and the third package body away from the substrate, and the composite film layer is the top film layer of the corresponding first package body, the second package body and the third package body;
  • the composite film layer includes a first protective layer and a first flat layer.
  • the refractive index of the first protective layer is lower than that of the first flat layer.
  • the first flat layer is arranged on a side of the first protective layer away from the substrate.
  • the first protective layer has a first opening, the first opening is directly opposite to the light-emitting diode chip, and the first flat layer is at least partially located in the first opening;
  • the side wall of the first opening is inclined relative to the bottom wall of the first opening, and the slope angle of the side wall of the first opening ranges from 30° to 45°.
  • the first package body, the second package body and the third package body all further include a second protective layer, the second protective layer includes a second opening, the second opening is opposite to the first opening, the second protective layer covers the driving circuit, and the light-emitting diode chip is accommodated in the second opening.
  • the orthographic projection of the second opening on the substrate falls within the orthographic projection of the first opening on the substrate.
  • the side wall of the second opening is inclined relative to the bottom wall of the second opening, and the slope angle of the side wall of the second opening ranges from 30° to 45°.
  • the first packaging body, the second packaging body and the third packaging body all further include:
  • a second flat layer is located on a side of the first package layer of the first package body, the second package body and the third package body away from the substrate, and the second flat layer is a top film layer of the corresponding first package body, the second package body and the third package body;
  • a lens is located on a side of the second flat layer facing the first packaging layer, and the lens is opposite to the light emitting diode chip;
  • the lens has an arc surface, and the center of the arc surface is located on a side of the second flat layer facing the substrate;
  • the refractive index of the second flat layer is lower than the refractive index of the lens.
  • the edge of the red quantum dot film layer is flush with the edges of the first encapsulation layer, the second encapsulation layer and the substrate.
  • An embodiment of the present application further provides a display terminal, which includes a main body and a spliced display panel according to one of the aforementioned embodiments, wherein the spliced display panel is fixed on the main body.
  • the spliced display panel includes a backplane and at least one first package, at least one second package and at least one third package bonded to the backplane, the first package, the second package and the third package respectively display blue light, red light and green light;
  • the first package, the second package and the third package each include a substrate, a driving circuit and a light-emitting diode chip integrated on and electrically connected to the substrate, and a first packaging layer covering the driving circuit and the light-emitting diode chip.
  • the present application arranges the light-emitting diode chip and its corresponding driving circuit into a separate package, the size of which is much larger than the size of a single light-emitting diode chip, thereby reducing the difficulty of optical binning of the light-emitting diode chip, thereby solving the problem of optical binning difficulty existing in existing Micro LED chips.
  • FIG. 1 is a schematic diagram of a top view of the structure of a spliced display panel provided in an embodiment of the present application.
  • FIG. 2 is a schematic cross-sectional structure diagram of a spliced display panel provided in an embodiment of the present application.
  • FIG. 3 is another schematic cross-sectional structure diagram of a spliced display panel provided in an embodiment of the present application.
  • FIG. 4 is a schematic diagram of another cross-sectional structure of a spliced display panel provided in an embodiment of the present application.
  • FIG. 5 is a schematic cross-sectional structure diagram of a second package body provided in an embodiment of the present application.
  • FIG. 6 is another schematic cross-sectional structure diagram of the second package body provided in an embodiment of the present application.
  • FIG. 7 is a schematic diagram of the detailed structure of the second protective layer in FIG. 6 .
  • FIG. 8 is a schematic diagram of another cross-sectional structure of a second package body provided in an embodiment of the present application.
  • FIG. 9 is a schematic diagram of another cross-sectional structure of the second package body provided in an embodiment of the present application.
  • FIG. 10 is a schematic flow chart of a method for preparing a spliced display panel provided in an embodiment of the present application.
  • FIG. 11 is a schematic diagram of a top view of the structure of a light-emitting substrate obtained in the method for preparing a spliced display panel in an embodiment of the present application.
  • FIG. 12 is a schematic diagram of the film layer structure of the second sub-substrate obtained in the method for preparing a spliced display panel in an embodiment of the present application.
  • FIG. 13 is a schematic diagram of laminating the second sub-substrate and the light-emitting substrate in the method for preparing a spliced display panel in an embodiment of the present application.
  • FIG. 14 is a schematic diagram of forming a second packaging substrate after removing the transfer substrate in FIG. 13 .
  • FIG. 15 is a schematic diagram of preparing a first protection layer on the second packaging substrate of FIG. 14 .
  • FIG. 16 is a schematic diagram of a second package body formed after the second package substrate in FIG. 15 is cut.
  • Figure 1 is a schematic diagram of a top view of a spliced display panel provided in an embodiment of the present application
  • Figure 2 is a schematic diagram of a cross-sectional structure of a spliced display panel provided in an embodiment of the present application.
  • the spliced display panel 100 includes a backplane 10 and at least one first package 20, at least one second package 30, and at least one third package 40 bonded to the backplane 10, wherein the first package 20, the second package 30, and the third package 40 display blue light, red light, and green light, respectively, to achieve color display of the spliced display panel 100.
  • the backplane 10 exemplarily shows a plurality of the first encapsulation bodies 20, a plurality of the second encapsulation bodies 30, and a plurality of the third encapsulation bodies 40, which are spliced together to form the spliced display panel 100.
  • Each encapsulation body (the encapsulation body includes the first encapsulation body 20, the second encapsulation body 30, and the third encapsulation body 40) is a sub-pixel, for example, the first encapsulation body 20 is a blue sub-pixel B, the second encapsulation body 30 is a red sub-pixel R, and the third encapsulation body 40 is a green sub-pixel G.
  • the first package 20, the second package 30 and the third package 40 all include a substrate, a driving circuit and a light-emitting diode chip integrated on and electrically connected to the substrate, and a first packaging layer covering the driving circuit and the light-emitting diode chip.
  • the light-emitting diode chip includes a Micro LED chip, a Mini LED chip, and the like.
  • a plurality of packages spliced together can also be used as a backlight.
  • the size of the package is much larger than the size of the light-emitting diode chip, so that the optical binning difficulty of the light-emitting diode chip can be reduced, thereby solving the problem of optical binning difficulty of the existing Micro LED chip.
  • the LED chips of the first package 20 and the second package 30 both emit blue light
  • the LED chip of the third package 40 emits green light.
  • the second package 30 also needs to be provided with a corresponding quantum dot film.
  • the first package 20 includes a first substrate 21 and a first driving circuit 22 and a first light emitting diode chip 23 disposed on the first substrate 21, and the first driving circuit 22 and the first light emitting diode chip 23 are electrically connected.
  • the first package 20 also includes a first sealing layer 24 covering the first driving circuit 22 and the first light emitting diode chip 23, and a first packaging layer 25 covering the first sealing layer 24.
  • the first light emitting diode chip 23 of the first package 20 emits blue light, so that the first package 20 can display blue light.
  • the second package body 30 includes a second substrate 31 and a second driving circuit 32 and a second light emitting diode chip 33 disposed on the second substrate 31, and the second driving circuit 32 and the second light emitting diode chip 33 are electrically connected.
  • the second package body 30 further includes a second sealing layer 34 covering the second driving circuit 32 and the second light emitting diode chip 33, and a first packaging layer 35 covering the second sealing layer 34.
  • the second LED chip 33 of the second package body 30 emits blue light.
  • the second package body 30 also includes a red quantum dot film layer 36 arranged on the side of the first packaging layer 35 away from the second LED chip 33 and a second packaging layer 38 arranged on the side of the red quantum dot film layer 36 away from the first packaging layer 35.
  • the red quantum dot film layer 36 is located opposite to the second LED chip 33 of the second package body 30.
  • the edge of the red quantum dot film layer 36 is flush with the edges of the first packaging layer 35, the second packaging layer 38 and the second substrate 31, so that full film coating can be used when preparing the red quantum dot film layer 36 of the second packaging body 30, thereby eliminating the need for bonding and alignment when bonding the red quantum dot film layer 36 and the second light-emitting diode chip 33.
  • the second package body 30 also includes a first blue light absorption layer 37 arranged between the red quantum dot film layer 36 and the second packaging layer 38 to absorb the blue light that is not converted by the red quantum dot film layer 36.
  • the third package body 40 includes a third substrate 41 and a third driving circuit 42 and a third light-emitting diode chip 43 disposed on the third substrate 41, and the third driving circuit 42 and the third light-emitting diode chip 43 are electrically connected.
  • the third package body 40 also includes a third sealing layer 44 covering the third driving circuit 42 and the third light-emitting diode chip 43, and a first packaging layer 45 covering the third sealing layer 44.
  • the third light-emitting diode chip 43 of the third package body 40 emits green light, so that the third package body 40 can display green light.
  • the light-emitting diode chip and its corresponding driving circuit are packaged into an independent package to reduce the difficulty of optical binning of the light-emitting diode chip.
  • the light-emitting diode chip and its corresponding driving circuit are bonded to the backplane 10 as a whole, backlight or direct display can be achieved.
  • the originally complex driving backplane design becomes simple because the driving circuit is completely transferred to the package, and when facing the needs of products of different sizes, only a simple modification of the backplane design is required to achieve it, without changing the Mask design, thereby greatly reducing costs and greatly improving the backplane yield.
  • the second package 30 uses the second light-emitting diode chip 33 that emits blue light in combination with the red quantum dot film layer 36 to display red light, it can avoid the use of red light-emitting diode chips and improve the light extraction efficiency of red light.
  • FIG. 3 is another cross-sectional structural schematic diagram of the spliced display panel provided in the embodiment of the present application.
  • the light-emitting diode chip of the third package body 40 emits blue light, and in order to realize that the third package body 40 displays green light, the third package body 40 further includes a green quantum dot film layer 46 disposed on the first packaging layer 45 and a third packaging layer 48 disposed on the green quantum dot film layer 46.
  • the green quantum dot film layer 46 is opposite to the third light-emitting diode chip 43 of the third package body 40.
  • the third packaging body 40 also includes a second blue light absorption layer 47 arranged between the green quantum dot film layer 46 and the third packaging layer 48 to absorb the blue light that is not converted by the green quantum dot film layer 46.
  • the LED chips of the first package 20, the second package 30 and the third package 40 all emit blue light, that is, the first package 20, the second package 30 and the third package 40 use the same color LED chips, which can reduce the difficulty of designing the driving circuit. Because when different colors of LED chips are used as packages, the packages need to be matched with different driving circuit designs, which makes the driving circuit design of the packages complicated. For other descriptions, please refer to the above embodiments, which will not be repeated here.
  • FIG. 4 is another cross-sectional structural schematic diagram of the spliced display panel provided in the embodiment of the present application.
  • the light-emitting diode chips of the first package body 20, the second package body 30 and the third package body 40 all emit ultraviolet light, that is, the first light-emitting diode chip 23, the second light-emitting diode chip 33 and the third light-emitting diode chip 43 all emit ultraviolet light.
  • the first package body 20, the second package body 30 and the third package body 40 all need to be matched with quantum dot film layers of corresponding colors.
  • the second encapsulation body 30 includes a red quantum dot film layer 36 disposed on the first encapsulation layer 35 and a second encapsulation layer 38 disposed on the red quantum dot film layer 36.
  • the third encapsulation body 40 includes a green quantum dot film layer 46 disposed on the first encapsulation layer 45 and a third encapsulation layer 48 disposed on the green quantum dot film layer 46.
  • the first encapsulation body 20 includes a blue quantum dot film layer 26 disposed on the first encapsulation layer 25 and a fourth encapsulation layer 28 disposed on the blue quantum dot film layer 26.
  • each package also includes an ultraviolet light absorption layer.
  • the ultraviolet light absorption layer 39 of the second package 30 is arranged between the red quantum dot film layer 36 and the second packaging layer 38;
  • the ultraviolet light absorption layer 49 of the third package 40 is arranged between the green quantum dot film layer 46 and the third packaging layer 48;
  • the ultraviolet light absorption layer 27 of the first package 20 is arranged between the blue quantum dot film layer 26 and the fourth packaging layer 28. Please refer to the above embodiments for other descriptions, which will not be repeated here.
  • Figure 5 is a schematic diagram of a cross-sectional structure of the second package body provided in the embodiment of the present application.
  • the first package body 20, the second package body 30 and the third package body 40 all further include a composite film layer, which is located on the side of the first package layer of the first package body 20, the second package body 30 and the third package body 40 away from the substrate, and the composite film layer is the top film layer of the corresponding first package body 20, the second package body 30 and the third package body 40.
  • the embodiment of the present application takes the second package body 30 in the spliced display panel 101 as an example to illustrate the structure and function of the composite film layer:
  • the composite film layer includes a first protective layer 51 and a first flat layer 52.
  • the first flat layer 52 is disposed on a side of the first protective layer 51 away from the second substrate 31.
  • the refractive index of the first protective layer 51 is lower than that of the first flat layer 52.
  • the material of the first protective layer 51 includes a gray photoresist, etc.
  • the first protective layer 51 has a first opening 511, the first opening 511 faces the second light-emitting diode chip 33, and the first flat layer 52 is at least partially located in the first opening 511.
  • the first protective layer 51 can block the wide-angle light emission of the second LED chip 33, thereby preventing color crossover between adjacent packages.
  • the first opening 511 on the first protective layer 51 is directly opposite to the second LED chip 33, thereby preventing the first protective layer 51 from blocking the light emission of the second LED chip 33.
  • the size of the first opening 511 is 1 micron to 10 microns larger than the size of the second LED chip 33, thereby ensuring that the first protective layer 51 avoids color crossover between adjacent packages.
  • the refractive index of the first protective layer 51 is smaller than the refractive index of the first flat layer 52, the wide-angle light emitted from the red quantum dot film layer 36 can be moved toward the middle after passing through the first protective layer 51 and the first flat layer 52 to converge the light output angle, improve the front viewing angle brightness, and thereby increase the light output effect of the second package body 30.
  • the side wall 5111 of the first opening 511 is inclined relative to the bottom wall 5112 of the first opening 511, and the slope angle a of the side wall 5111 of the first opening 511 is in the range of 30° to 45°, so as to better converge the light emitting angle of the light with a large viewing angle, thereby further increasing the light emitting effect of the second package body 30.
  • the side wall 5111 of the first opening 511 refers to the surface of the first protective layer 51 forming the first opening 511
  • the bottom wall 5112 of the first opening 511 refers to the surface of the film layer exposed by the first opening 511.
  • the bottom wall 5112 of the first opening 511 refers to the surface of the second packaging layer 38 exposed by the first opening 511.
  • composite film structure on the first package body 20 and the composite film structure on the third package body 40 can refer to the description of the composite film structure on the second package body 30, which will not be repeated here.
  • the composite film structure on the second package body 30 can refer to the description of the composite film structure on the second package body 30, which will not be repeated here.
  • the spliced display panel 101 please refer to the above embodiment, which will not be repeated here.
  • Figure 6 is another cross-sectional structural diagram of the second encapsulation body provided in the embodiment of the present application
  • Figure 7 is a detailed structural diagram of the second protective layer in Figure 6.
  • the first encapsulation body 20, the second encapsulation body 30 and the third encapsulation body 40 all further include a second protective layer.
  • This embodiment also takes the second encapsulation body 30 in the spliced display panel 101 as an example to illustrate the structure and function of the second protective layer.
  • the second protective layer 53 covers the second driving circuit 32 to protect the second driving circuit 32 and also reduce the surface reflectivity of the second driving circuit 32.
  • the material of the second protective layer 53 includes gray photoresist and the like.
  • the second protective layer 53 includes a second opening 531, which is opposite to the first opening 511, and the second LED chip 33 is accommodated in the second opening 531.
  • the orthographic projection of the second opening 531 on the second substrate 31 falls within the orthographic projection of the first opening 511 on the second substrate 31, so that the size W2 of the first opening 511 is larger than the size W1 of the second opening 531, so as to prevent the first opening 511 from affecting the light emission of the second LED chip 33.
  • the second sealing layer 34 covers the second protective layer 53 and the second LED chip 33 and fills the second opening 531.
  • the refractive index of the second protective layer 53 is smaller than the refractive index of the second sealing layer 34.
  • the refractive index of the second sealing layer 34 is greater than 1.6. In this way, the wide-angle light emitted from the second LED chip 33 can move toward the middle after passing through the second protective layer 53 and the second sealing layer 34, so as to converge the light output angle, improve the brightness at the positive viewing angle, and thereby increase the light output effect of the second package body 30.
  • the side wall 5311 of the second opening 531 is inclined relative to the bottom wall 5312 of the second opening 531, and the slope angle b of the side wall 5311 of the second opening 531 is in the range of 30° to 45°, so as to better converge the light emitting angle of the light with a large viewing angle, thereby further increasing the light emitting effect of the second package body 30.
  • the side wall 5311 of the second opening 531 refers to the surface of the second protective layer 53 forming the second opening 531
  • the bottom wall 5312 of the second opening 531 refers to the surface of the film layer exposed by the second opening 531.
  • the bottom wall 5312 of the second opening 531 refers to the surface of the second substrate 31 exposed by the second opening 531.
  • the second protective layer structure on the first package body 20 and the second protective layer structure on the third package body 40 can refer to the description of the second protective layer 53 structure on the second package body 30, which will not be repeated here.
  • the spliced display panel 101 please refer to the above embodiment, which will not be repeated here.
  • Figure 8 is another schematic diagram of the cross-sectional structure of the second package body provided in the embodiment of the present application.
  • the first package body 20, the second package body 30 and the third package body 40 also include a lens and a second flat layer.
  • the second flat layer is located on the side of the first package layer of the first package body 20, the second package body 30 and the third package body 40 away from the substrate, and the second flat layer is the top film layer of the corresponding first package body, the second package body and the third package body.
  • the lens is located on the side of the second flat layer facing the first package layer, the second flat layer covers the lens, and the lens is opposite to the position of the light-emitting diode chip.
  • This embodiment also takes the second package body 30 in the spliced display panel 101 as an example to illustrate the structure and function of the lens and the second flat layer:
  • the lens 61 is disposed on the second packaging layer 38 of the second packaging body 30 , the lens 61 is opposite to the second LED chip 33 , and the size of the lens 61 is 1 to 10 microns larger than the size of the second LED chip 33 , so that the outgoing light of the LED chip can reach the lens 61 .
  • the lens 61 has an arc surface, and the center of the arc surface is located on the side of the second flat layer 62 facing the second substrate 31. In this way, along the emitting direction of the light, the lens 61 is a convex lens 61, so that the wide-angle light emitted from the red quantum dot film layer 36 can move toward the middle after passing through the lens 61, so as to converge the light emission angle, improve the brightness of the positive viewing angle, and thereby increase the light emission effect of the second package 30.
  • the second flat layer 62 covers the lens 61 and the second packaging layer 38 of the second packaging body 30, and the refractive index of the second flat layer 62 is lower than the refractive index of the lens 61, for example, the refractive index of the second flat layer 62 is less than 1.5.
  • the material of the second flat layer 62 includes gray photoresist and the like.
  • the structure and function of the lens and the second flat layer on the first package body 20 and the structure and function of the lens and the second flat layer on the third package body 40 can refer to the description of the structure and function of the lens 61 and the second flat layer 62 on the second package body 30, which will not be repeated here.
  • the spliced display panel 101 please refer to the above embodiment, which will not be repeated here.
  • the lens 61 of the second package body 30 can also cooperate with the second protective layer 53 of the second package body 30 to further increase the light emitting effect of the second package body 30.
  • Figure 9 is another cross-sectional structural schematic diagram of the second package body provided in the embodiment of the present application.
  • the lens 61 is arranged opposite to the second opening 531 of the second protective layer 53, and the size W3 of the lens 61 is larger than the size W1 of the second opening 531, so that most of the light emitted by the second light emitting diode chip 33 can pass through the lens 61.
  • the present application also provides a method for preparing a spliced display panel.
  • Figure 10 is a schematic diagram of the process of the spliced display panel preparation method provided in the present application embodiment.
  • Figure 11 is a schematic diagram of the top view structure of the light-emitting substrate prepared in the spliced display panel preparation method in the present application embodiment.
  • Figure 12 is a schematic diagram of the film layer structure of the second sub-substrate prepared in the spliced display panel preparation method in the present application embodiment.
  • Figure 13 is a schematic diagram of the second sub-substrate and the light-emitting substrate being bonded in the spliced display panel preparation method in the present application embodiment.
  • Figure 14 is a schematic diagram of forming a second packaging substrate after removing the transfer substrate in Figure 13.
  • Figure 15 is a schematic diagram of preparing a first protective layer on the second packaging substrate in Figure 14.
  • Figure 16 is a schematic diagram of a second packaging body formed after the second packaging substrate in Figure 15 is cut.
  • the method for preparing a spliced display panel includes the following steps:
  • S301 preparing a driving circuit 2 on a substrate 1, and preparing a light-emitting diode chip 3 on the substrate 1, and electrically connecting the light-emitting diode chip 3 with the corresponding driving circuit 2 to form a light-emitting substrate 200;
  • a driving circuit 2 is prepared on a substrate 1, and the driving circuits 2 are arranged in an array on the substrate 1, and there is a gap between adjacent driving circuits 2, so that each driving circuit 2 is an independent driving unit.
  • the light-emitting diode chip 3 is also arranged on the substrate 1, and is electrically connected to the corresponding driving circuit 2, and each light-emitting diode chip 3 corresponds to a driving unit, that is, each light-emitting diode chip 3 corresponds to a separate driving circuit 2, so that the driving circuit 2 can drive the corresponding light-emitting diode chip 3 to emit light independently.
  • S302 preparing a first sub-substrate, a second sub-substrate and a third sub-substrate respectively, wherein the first sub-substrate, the second sub-substrate and the third sub-substrate all include a sacrificial layer prepared on a transfer substrate and a first encapsulation layer prepared on a side of the sacrificial layer away from the transfer substrate, wherein the second sub-substrate further includes a second encapsulation layer and a red quantum dot film layer prepared between the sacrificial layer and the first encapsulation layer, and the red quantum dot film layer is located on a side of the second encapsulation layer away from the sacrificial layer;
  • this embodiment takes the preparation of the second sub-substrate as an example.
  • the preparation method of the second sub-substrate includes the following steps:
  • a transparent protective material is coated on the entire surface of the sacrificial layer 71 to form a second encapsulation layer 38;
  • the red quantum dot material is coated on the entire surface of the second encapsulation layer 38 to form a whole layer of red quantum dot film layer 36;
  • a transparent protective material is coated on the entire surface of the red quantum dot film layer 36 to form a first encapsulation layer 35 of the entire layer.
  • the preparation method of the first sub-substrate and the third sub-substrate can refer to the preparation method of the second sub-substrate 300, except that when the first sub-substrate and the third sub-substrate do not need a quantum dot film layer, the first encapsulation layer can be directly prepared on the sacrificial layer.
  • the order of preparing the first sub-substrate, the second sub-substrate and the third sub-substrate is not limited.
  • a first blue light absorption layer 37 may be prepared on the second sub-substrate 300 , and the first blue light absorption layer 37 is located between the second encapsulation layer 38 and the red quantum dot film layer 36 .
  • S303 respectively attaching the first sub-substrate, the second sub-substrate and the third sub-substrate to the corresponding light-emitting substrate, and removing the transfer substrate to form a first packaging substrate, a second packaging substrate and a third packaging substrate;
  • this embodiment takes the second sub-substrate and the light-emitting substrate as an example to form a second package substrate, and a sealing layer 4 is coated on the light-emitting substrate 200, and the sealing layer 4 covers the driving circuit 2 and the light-emitting diode chip 3.
  • the first packaging layer 35 on the second package substrate 400 faces the sealing layer 4, and the second package substrate 400 is bonded to the light-emitting substrate 200, as shown in FIG. 13. Since all the film layers on the second package substrate 400 are coated with a full film, the film layers formed on the second package substrate 400 are all full-surface film layers, so there is no need to bond and align the second package substrate 400 and the light-emitting substrate 200 when bonding.
  • UV light or heat treatment is used to reduce the viscosity of the sacrificial layer 71 according to the characteristics of the material used for the sacrificial layer 71, so as to peel off the transfer substrate 70, thereby forming a second packaging substrate 400 with a thinner thickness, as shown in Figure 14.
  • a first protective layer 51 may be prepared on the second packaging substrate 400, and the first protective layer 51 is coated on the side of the second packaging layer 38 away from the red quantum dot film layer 36.
  • the first protective layer 51 is provided with a first opening 511 at a position corresponding to the light emitting diode chip 3, and each of the first openings 511 corresponds to one of the light emitting diode chips 3.
  • FIG. 15 is only for illustrating the arrangement of the first openings 511 on the first protective layer 51, and the corresponding relationship between the first openings 511 and the light emitting diode chip 3.
  • Each of the light emitting diode chips 3 is a sub-pixel.
  • FIG. 15 only illustrates the corresponding relationship between the light emitting diode chip 3 and the first opening 511 using the red sub-pixel R.
  • a first flat layer 52 may be coated on the first protective layer 51, and the first flat layer 52 covers the first protective layer 51 and fills the first opening 511, as shown in Fig. 5.
  • the refractive index of the first flat layer 52 is greater than the refractive index of the first protective layer 51, so that the wide viewing angle light of the light emitting diode chip 3 converges to the middle, converges the angle of the wide viewing angle light, and thus improves the brightness of the light emitted from the front view angle.
  • this embodiment also takes cutting the second packaging substrate 400 to form the second packaging body 30 as an example.
  • the second packaging substrate 400 is cut to form a single second packaging body 30 as shown in FIG. 16 , and the second packaging body 30 displays red light.
  • FIG. 16 does not depict the first planar layer 52 on the first protective layer 51.
  • the second base 31 of the second package body 30 in Figure 5 corresponds to the base 1 in the second package substrate 400 in Figure 14
  • the second driving circuit 32 of the second package body 30 in Figure 5 corresponds to the driving circuit 2 in the second package substrate 400 in Figure 14
  • the second light-emitting diode chip 33 of the second package body 30 in Figure 5 corresponds to the light-emitting diode chip 3 in the second package substrate 400 in Figure 14
  • the second sealing layer 34 of the second package body 30 in Figure 5 corresponds to the sealing layer 4 in the second package substrate 400 in Figure 14.
  • the formation methods of the first package body 20 and the third package body 40 can refer to the formation method of the second package body 30, which will not be repeated here.
  • the first package body 20 displays blue light
  • the third package body 40 displays green light.
  • S305 Bonding at least one of the first packaging bodies 20 , at least one of the second packaging bodies 30 , and at least one of the third packaging bodies 40 to the backplane 10 to form a spliced display panel 100 .
  • bonding technology is used to bond at least one of the first package bodies 20, at least one of the second package bodies 30, and at least one of the third package bodies 40 to the back panel 10, so that the first package bodies 20, the second package bodies 30, and the third package bodies 40 are arranged in an array and spliced with each other to form a spliced display panel 100 as shown in Figure 1.
  • the embodiment of the present application further provides a display terminal, which includes a body and a spliced display panel of one of the above embodiments, wherein the spliced display panel is fixed on the body.
  • the display terminal includes electronic devices such as mobile phones, tablets, and televisions.
  • the present application provides a spliced display panel and a display terminal, wherein the spliced display panel includes a backplane and at least one first package, at least one second package and at least one third package bonded to the backplane, wherein the first package, the second package and the third package respectively display blue light, red light and green light; the first package, the second package and the third package each include a substrate, a driving circuit and a light-emitting diode chip integrated on and electrically connected to the substrate, and a first packaging layer covering the driving circuit and the light-emitting diode chip.
  • the present application arranges the light-emitting diode chip and its corresponding driving circuit into a separate package, the size of which is much larger than the size of a single light-emitting diode chip, thereby reducing the difficulty of optical binning of the light-emitting diode chip, thereby solving the problem of optical binning difficulty of existing Micro LED chips.

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Abstract

本申请提供一种拼接显示面板和显示终端，该拼接显示面板包括背板及键合在背板上至少一第一封装体、至少一第二封装体及至少一第三封装体，本申请通过把发光二极管芯片以及其对应的驱动电路设置成单独的封装体，该单独的封装体的尺寸远大于单个发光二极管芯片的尺寸，如此能够降低发光二极管芯片的光学分Bin难度。

Description

拼接显示面板和显示终端 技术领域
本申请涉及显示技术领域，尤其涉及一种拼接显示面板和显示终端。
 背景技术
微型发光二极管（micro light emitting diode，Micro LED）是新一代的显示技术，相较于现有的有机发光二极管显示（Organic Light emitting Display，OLED）技术，具有体积小、亮度更高、发光效率更好、且功率更低等优点。Micro LED技术将LED结构设计进行薄膜化、微小化、阵列化，其尺寸仅在1微米至10微米等级左右。然而正是由于Micro LED芯片的尺寸很小，使得Micro LED芯片的光学分Bin显得很困难。
 技术问题
本申请提供一种拼接显示面板和显示终端，以缓解现有Micro LED芯片存在的光学分Bin困难的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请实施例提供一种拼接显示面板，其包括背板及键合在所述背板上至少一第一封装体、至少一第二封装体及至少一第三封装体，所述第一封装体、所述第二封装体和所述第三封装体分别显示蓝光、红光和绿光；所述第一封装体、所述第二封装体及所述第三封装体均包括：
基底；
驱动电路及发光二极管芯片；所述驱动电路与所述发光二极管芯片集成在所述基底上且电连接；
第一封装层，覆盖所述驱动电路及所述发光二极管芯片；
其中，所述第二封装体还包括设置在所述第一封装层远离所述第二封装体的发光二极管芯片的一侧的红色量子点膜层以及设置在所述红色量子点膜层远离所述第一封装层的一侧的第二封装层，所述红色量子点膜层与所述第二封装体的所述发光二极管芯片位置相对。
在本申请实施例提供的拼接显示面板中，所述第二封装体的发光二极管芯片发蓝光，所述第二封装体还包括设置在所述红色量子点膜层和所述第二封装层之间的第一蓝光吸收层。
在本申请实施例提供的拼接显示面板中，所述第三封装体的发光二极管发绿光。
在本申请实施例提供的拼接显示面板中，所述第三封装体的发光二极管芯片发蓝光；
所述第三封装体还包括：
绿色量子点膜层，设置在所述第一封装层远离所述第三封装体的发光二极管芯片的一侧；
第三封装层，设置在所述绿色量子点膜层远离所述第一封装层的一侧；
所述绿色量子点膜层与所述第三封装体的所述发光二极管芯片位置相对。
在本申请实施例提供的拼接显示面板中，所述第三封装体还包括：
第二蓝光吸收层，设置在所述绿色量子点膜层和所述第三封装层之间。
在本申请实施例提供的拼接显示面板中，所述发光二极管芯片发紫外光；
所述第二封装体包括：设置在所述第一封装层上的红色量子点膜层；及设置在所述红色量子点膜层上的第二封装层；
所述第三封装体包括：设置在所述第一封装层上的绿色量子点膜层；及设置在所述绿色量子点膜层上的第三封装层；
所述第一封装体包括：设置在所述第一封装层上的蓝色量子点膜层；及设置在所述蓝色量子点膜层上的第四封装层。
在本申请实施例提供的拼接显示面板中，所述第一封装体、所述第二封装体及所述第三封装体还分别包括紫外光吸收层；
其中，所述第二封装体的紫外光吸收层设置在所述红色量子点膜层和所述第二封装层之间；所述第三封装体的紫外光吸收层设置在所述绿色量子点膜层和所述第三封装层之间；所述第一封装体的紫外光吸收层设置在所述蓝色量子点膜层和所述第四封装层之间。
在本申请实施例提供的拼接显示面板中，所述第一封装体、所述第二封装体及所述第三封装体均还包括复合膜层，所述复合膜层分别位于所述第一封装体、所述第二封装体及所述第三封装体的第一封装层远离所述基底的一侧，且所述复合膜层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层；
所述复合膜层包括第一保护层和第一平坦层，所述第一保护层的折射率低于所述第一平坦层的折射率，所述第一平坦层设置在所述第一保护层的远离所述基底的一侧。
在本申请实施例提供的拼接显示面板中，所述第一保护层具有一第一开口，所述第一开口正对所述发光二极管芯片，所述第一平坦层至少部分位于第一开口内；
所述第一开口的侧壁相对于所述第一开口的底壁倾斜，所述第一开口的侧壁的坡角范围为30°至45°。
在本申请实施例提供的拼接显示面板中，所述第一封装体、所述第二封装体及所述第三封装体均还包括第二保护层，所述第二保护层包括第二开口，所述第二开口与所述第一开口位置相对，所述第二保护层覆盖所述驱动电路，所述发光二极管芯片收容在所述第二开口内。
在本申请实施例提供的拼接显示面板中，所述第二开口在所述基底上的正投影落在所述第一开口在所述基底上的正投影内。
在本申请实施例提供的拼接显示面板中，所述第二开口的侧壁相对于所述第二开口的底壁倾斜，所述第二开口的侧壁的坡角范围为30°至45°。
在本申请实施例提供的拼接显示面板中，所述第一封装体、所述第二封装体及所述第三封装体均还包括：
第二平坦层，位于第一封装体、所述第二封装体及所述第三封装体的第一封装层远离所述基底的一侧，且所述第二平坦层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层；
透镜，位于所述第二平坦层面向所述第一封装层的一侧，所述透镜与所述发光二极管芯片位置相对；
其中，所述透镜具有一圆弧面，所述圆弧面的圆心位于所述第二平坦层面向所述基底的一侧；
所述第二平坦层的折射率低于所述透镜的折射率。
在本申请实施例提供的拼接显示面板中，所述红色量子点膜层的边缘与所述第一封装层、所述第二封装层及所述基底的边缘平齐。
本申请实施例还提供一种显示终端，其包括本体及前述实施例其中之一的拼接显示面板，所述拼接显示面板固定在所述本体上。
 有益效果
本申请提供的拼接显示面板和显示终端中，拼接显示面板包括背板及键合在所述背板上至少一第一封装体、至少一第二封装体及至少一第三封装体，所述第一封装体、所述第二封装体和所述第三封装体分别显示蓝光、红光和绿光；所述第一封装体、所述第二封装体及所述第三封装体均包括基底、集成在所述基底上且电连接的驱动电路及发光二极管芯片以及覆盖所述驱动电路及所述发光二极管芯片的第一封装层，本申请通过把发光二极管芯片以及其对应的驱动电路设置成单独的封装体，该单独的封装体的尺寸远大于单个发光二极管芯片的尺寸，如此能够降低发光二极管芯片的光学分Bin难度，从而解决了现有Micro LED芯片存在的光学分Bin困难的问题。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的拼接显示面板的一种俯视结构示意图。
图2为本申请实施例提供的拼接显示面板的一种剖面结构示意图。
图3为本申请实施例提供的拼接显示面板的另一种剖面结构示意图。
图4为本申请实施例提供的拼接显示面板的又一种剖面结构示意图。
图5为本申请实施例提供的第二封装体的一种剖面结构示意图。
图6为本申请实施例提供的第二封装体的另一种剖面结构示意图。
图7为图6中第二保护层的细节结构示意图。
图8为本申请实施例提供的第二封装体的又一种剖面结构示意图。
图9为本申请实施例提供的第二封装体的再一种剖面结构示意图。
图10为本申请实施例提供的拼接显示面板制备方法的流程示意图。
图11为本申请实施例中拼接显示面板制备方法中制得的发光基板的俯视结构示意图。
图12为本申请实施例中拼接显示面板制备方法中制得的第二子基板的膜层结构示意图。
图13为本申请实施例中拼接显示面板制备方法中第二子基板与发光基板贴合的示意图。
图14为图13中去除转移基板后形成第二封装基板的示意图。
图15为在图14的第二封装基板上制备第一保护层的示意图。
图16为图15中的第二封装基板被切割后形成的第二封装体的示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。在附图中，为了清晰理解和便于描述，夸大了一些层和区域的厚度。即附图中示出的每个组件的尺寸和厚度是任意示出的，但是本申请不限于此。
请参照图1至图2，图1为本申请实施例提供的拼接显示面板的一种俯视结构示意图，图2为本申请实施例提供的拼接显示面板的一种剖面结构示意图。所述拼接显示面板100包括背板10及键合在所述背板10上至少一第一封装体20、至少一第二封装体30及至少一第三封装体40，所述第一封装体20、所述第二封装体30和所述第三封装体40分别显示蓝光、红光和绿光，以实现所述拼接显示面板100的彩色显示。
参照图1，所述背板10上示例性地示出多个所述第一封装体20、多个所述第二封装体30和多个所述第三封装体40，多个所述第一封装体20、多个所述第二封装体30和多个所述第三封装体40相互拼接形成所述拼接显示面板100。其中每个封装体（封装体包括所述第一封装体20、所述第二封装体30及所述第三封装体40）即为一个子像素，比如所述第一封装体20为蓝色子像素B，所述第二封装体30为红色子像素R，所述第三封装体40为绿色子像素G。
具体地，参照图2，所述第一封装体20、所述第二封装体30及所述第三封装体40均包括基底以及集成在所述基底上且电连接的驱动电路及发光二极管芯片以及覆盖所述驱动电路及所述发光二极管芯片的第一封装层。所述发光二极管芯片包括Micro LED芯片、Mini LED芯片等。通过把所述发光二极管芯片与对应的所述驱动电路封装在一块作为一个单独的封装体，每个封装体可作为一个独立单元进行工作，多个封装体拼接在一块形成所述拼接显示面板100，即可实现所述拼接显示面板100的显示。当然地，多个封装体拼接在一块还可作为背光使用。封装体的尺寸远大于所述发光二极管芯片的尺寸，如此能够降低发光二极管芯片的光学分Bin难度，从而解决现有Micro LED芯片存在的光学分Bin困难的问题。
下面将通过具体实施例详细阐述封装体的具体结构：
继续参照图2，所述第一封装体20和所述第二封装体30的发光二极管芯片均发蓝光，所述第三封装体40的发光二极管芯片发绿光，则为了实现所述第二封装体30显示红光，所述第二封装体30还需设置对应的量子点膜。
具体地，所述第一封装体20包括第一基底21以及设置在所述第一基底21上的第一驱动电路22和第一发光二极管芯片23，所述第一驱动电路22和第一发光二极管芯片23电连接。为了保护所述第一驱动电路22和所述第一发光二极管芯片23，所述第一封装体20还包括包覆所述第一驱动电路22和所述第一发光二极管芯片23的第一封胶层24，以及覆于所述第一封胶层24上的第一封装层25。所述第一封装体20的所述第一发光二极管芯片23发蓝光，使得所述第一封装体20能够显示蓝光。
所述第二封装体30括第二基底31以及设置在所述第二基底31上的第二驱动电路32和第二发光二极管芯片33，所述第二驱动电路32和第二发光二极管芯片33电连接。为了保护所述第二驱动电路32和所述第二发光二极管芯片33，所述第二封装体30还包括包覆所述第二驱动电路32和所述第二发光二极管芯片33的第二封胶层34，以及覆于所述第二封胶层34上的第一封装层35。
所述第二封装体30的所述第二发光二极管芯片33发蓝光，则为了使所述第二封装体30显示红光，所述第二封装体30还包括设置在所述第一封装层35远离所述第二发光二极管芯片33的一侧的红色量子点膜层36以及设置在所述红色量子点膜层36远离所述第一封装层35的一侧的第二封装层38，所述红色量子点膜层36与所述第二封装体30的所述第二发光二极管芯片33位置相对。
可选地，所述红色量子点膜层36的边缘与所述第一封装层35、所述第二封装层38及所述第二基底31的边缘平齐，以使得在制备所述第二封装体30的所述红色量子点膜层36时能够采用全膜涂布，从而在所述红色量子点膜层36与所述第二发光二极管芯片33贴合时无需进行贴合对位。
进一步地，为了提升所述第二封装体30的所述红色量子点膜层36的色纯度，提升显示效果，所述第二封装体30还包括设置在所述红色量子点膜层36和所述第二封装层38之间的第一蓝光吸收层37，以吸收未被所述红色量子点膜层36转换的蓝光。
相应地，所述第三封装体40包括第三基底41以及设置在所述第三基底41上的第三驱动电路42和第三发光二极管芯片43，所述第三驱动电路42和第三发光二极管芯片43电连接。为了保护所述第三驱动电路42和所述第三发光二极管芯片43，所述第三封装体40还包括包覆所述第三驱动电路42和所述第三发光二极管芯片43的第三封胶层44，以及覆于所述第三封胶层44上的第一封装层45。所述第三封装体40的所述第三发光二极管芯片43发绿光，使得所述第三封装体40能够显示绿光。
在本实施例中，通过把发光二极管芯片以及其对应的驱动电路封装成独立的封装体，以降低发光二极管芯片的光学分Bin难度。同时当把发光二极管芯片以及其对应的驱动电路作为一个整体键合到所述背板10上时即可实现背光或者直接显示。如此原本复杂的驱动背板设计因为驱动电路全部转移到封装体上而变得简单，而且在面对不同尺寸的产品需求时，只需要对背板设计进行简单的修改即可实现，无需改变Mask设计，从而可大幅度降低成本，并极大提升背板良率。另外，由于所述第二封装体30采用发蓝光的所述第二发光二极管芯片33搭配所述红色量子点膜层36以实现显示红光，如此能够避免使用发红光的发光二极管芯片，提升红光的出光效率。
在一种实施例中，请参照图1至图3，图3为本申请实施例提供的拼接显示面板的另一种剖面结构示意图。与上述实施例不同的是，在本实施例的拼接显示面板101中，所述第三封装体40的发光二极管芯片发蓝光，而为了实现所述第三封装体40显示绿光，所述第三封装体40还包括设置在所述第一封装层45上的绿色量子点膜层46以及设置在所述绿色量子点膜层46上的第三封装层48。所述绿色量子点膜层46与所述第三封装体40的所述第三发光二极管芯片43位置相对。
进一步地，为了提升所述第三封装体40的所述绿色量子点膜层46的色纯度，提升显示效果，所述第三封装体40还包括设置在所述绿色量子点膜层46和所述第三封装层48之间的第二蓝光吸收层47，以吸收未被所述绿色量子点膜层46转换的蓝光。
在本实施例中，所述第一封装体20、所述第二封装体30及所述第三封装体40的发光二极管芯片均发蓝光，即所述第一封装体20、所述第二封装体30及所述第三封装体40采用相同颜色的发光二极管芯片，如此能够降低驱动电路的设计难度。因为当用不同颜色的发光二极管芯片做封装体时，封装体需要搭配不同的驱动电路设计，使得封装体的驱动电路设计就会复杂化。其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，请参照图1至图4，图4为本申请实施例提供的拼接显示面板的又一种剖面结构示意图。与上述实施例不同的是，在本实施例的拼接显示面板102中，所述第一封装体20、所述第二封装体30及所述第三封装体40的发光二极管芯片均发紫外光，即所述第一发光二极管芯片23、所述第二发光二极管芯片33以及所述第三发光二极管芯片43均发紫外光。如此所述第一封装体20、所述第二封装体30及所述第三封装体40为了实现分别显示蓝光、红光和绿光，均需要搭配相应颜色的量子点膜层。
具体而言，所述第二封装体30包括设置在所述第一封装层35上的红色量子点膜层36及设置在所述红色量子点膜层36上的第二封装层38。所述第三封装体40包括设置在所述第一封装层45上的绿色量子点膜层46及设置在所述绿色量子点膜层46上的第三封装层48。所述第一封装体20包括设置在所述第一封装层25上的蓝色量子点膜层26及设置在所述蓝色量子点膜层26上的第四封装层28。
同样地，为了提升各封装体内量子点膜层的色纯度，提升显示效果，各封装体均还包括紫外光吸收层。具体而言，所述第二封装体30的紫外光吸收层39设置在所述红色量子点膜层36和所述第二封装层38之间；所述第三封装体40的紫外光吸收层49设置在所述绿色量子点膜层46和所述第三封装层48之间；所述第一封装体20的紫外光吸收层27设置在所述蓝色量子点膜层26和所述第四封装层28之间。其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，请参照图1至图5，图5为本申请实施例提供的第二封装体的一种剖面结构示意图。与上述实施例不同的是，所述第一封装体20、所述第二封装体30及所述第三封装体40均还包括复合膜层，所述复合膜层分别位于所述第一封装体20、所述第二封装体30及所述第三封装体40的第一封装层远离所述基底的一侧，且所述复合膜层为对应的所述第一封装体20、所述第二封装体30及所述第三封装体40的顶层膜层。本申请实施例以所述拼接显示面板101中的所述第二封装体30为例说明所述复合膜层的结构和作用：
参照图5，所述复合膜层包括第一保护层51和第一平坦层52，所述第一平坦层52设置在所述第一保护层51的远离所述第二基底31的一侧，所述第一保护层51的折射率低于所述第一平坦层52的折射率，所述第一保护层51的材料包括灰色光阻等。所述第一保护层51具有一第一开口511，所述第一开口511正对所述第二发光二极管芯片33，所述第一平坦层52至少部分位于第一开口511内。
如此通过设置具有所述第一开口511的所述第一保护层51，所述第一保护层51能够遮挡所述第二发光二极管芯片33的大视角出光，避免相邻的封装体之间出现串色。同时所述第一保护层51上的所述第一开口511正对所述第二发光二极管芯片33，以避免所述第一保护层51遮挡所述第二发光二极管芯片33的出光。同时所述第一开口511的尺寸比所述第二发光二极管芯片33的尺寸大1微米至10微米，以保证所述第一保护层51避免相邻封装体串色的需求。
另外，由于所述第一保护层51的折射率小于所述第一平坦层52的折射率，可使得从所述红色量子点膜层36出射的大视角光线经过所述第一保护层51以及所述第一平坦层52后，向中间靠拢，以收敛出光角度，提高正视角亮度，进而增加所述第二封装体30的出光效果。
可选地，所述第一开口511的侧壁5111相对于所述第一开口511的底壁5112倾斜，所述第一开口511的侧壁5111的坡角a范围为30°至45°，以更好地收敛大视角光线的出光角度，从而进一步增加所述第二封装体30的出光效果。其中所述第一开口511的侧壁5111是指所述第一保护层51形成所述第一开口511的表面，所述第一开口511的底壁5112是指所述第一开口511裸露出的膜层表面，如图5所示，所述第一开口511的底壁5112即是指所述第一开口511裸露出的所述第二封装层38的表面。
需要说明的是，所述第一封装体20上的复合膜层结构以及所述第三封装体40上的复合膜层结构可参照所述第二封装体30上复合膜层结构的描述，在此不再赘述。而关于所述拼接显示面板101的其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，请参照图1至图7，图6为本申请实施例提供的第二封装体的另一种剖面结构示意图，图7为图6中第二保护层的细节结构示意图。与上述实施例不同的是，所述第一封装体20、所述第二封装体30及所述第三封装体40均还包括第二保护层，本实施例同样以所述拼接显示面板101中的所述第二封装体30为例说明所述第二保护层的结构和作用。
参照图6，所述第二保护层53覆盖所述第二驱动电路32，以保护所述第二驱动电路32，同时还能降低所述第二驱动电路32的表面反射率。可选地，所述第二保护层53的材料包括灰色光阻等。
所述第二保护层53包括第二开口531，所述第二开口531与所述第一开口511位置相对，所述第二发光二极管芯片33收容在所述第二开口531内。同时所述第二开口531在所述第二基底31上的正投影落在所述第一开口511在所述第二基底31上的正投影内，使所述第一开口511的尺寸W2大于所述第二开口531的尺寸W1，以避免所述第一开口511影响所述第二发光二极管芯片33的出光。
进一步地，所述第二封胶层34覆盖所述第二保护层53以及所述第二发光二极管芯片33并填充所述第二开口531，所述第二保护层53的折射率小于所述第二封胶层34的折射率，比如所述第二封胶层34的折射率大于1.6，如此可使得从所述第二发光二极管芯片33发出的大视角光线经过所述第二保护层53以及所述第二封胶层34后，向中间靠拢，以收敛出光角度，提高正视角亮度，进而增加所述第二封装体30的出光效果。
可选地，所述第二开口531的侧壁5311相对于所述第二开口531的底壁5312倾斜，所述第二开口531的侧壁5311的坡角b范围为30°至45°，以更好地收敛大视角光线的出光角度，从而进一步增加所述第二封装体30的出光效果。其中所述第二开口531的侧壁5311是指所述第二保护层53形成所述第二开口531的表面，所述第二开口531的底壁5312是指所述第二开口531裸露出的膜层表面，如图7所示，所述第二开口531的底壁5312即是指所述第二开口531裸露出的所述第二基底31的表面。
同样地，所述第一封装体20上的第二保护层结构以及所述第三封装体40上的第二保护层结构均可参照所述第二封装体30上第二保护层53结构的描述，在此不再赘述。而关于所述拼接显示面板101的其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，请参照图1至图8，图8为本申请实施例提供的第二封装体的又一种剖面结构示意图。与上述实施例不同的是，所述第一封装体20、所述第二封装体30及所述第三封装体40均还包括透镜和第二平坦层。所述第二平坦层位于第一封装体20、所述第二封装体30及所述第三封装体40的第一封装层远离所述基底的一侧，且所述第二平坦层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层。所述透镜位于所述第二平坦层面向所述第一封装层的一侧，所述第二平坦层覆盖所述透镜，所述透镜与所述发光二极管芯片位置相对。本实施例同样以所述拼接显示面板101中的所述第二封装体30为例说明所述透镜和第二平坦层的结构和作用：
参照图8，所述透镜61设置在所述第二封装体30的所述第二封装层38上，所述透镜61与所述第二发光二极管芯片33的位置相对，且所述透镜61的尺寸比所述第二发光二极管芯片33的尺寸大1微米至10微米，以使所述发光二极管芯片的出射光线均能达到所述透镜61。
所述透镜61具有一圆弧面，所述圆弧面的圆心位于所述第二平坦层62面向所述第二基底31的一侧，如此在沿光线的出射方向上，所述透镜61为凸透镜61，从而能够使得从所述红色量子点膜层36出射的大视角光线经过所述透镜61后，向中间靠拢，以收敛出光角度，提高正视角亮度，进而增加所述第二封装体30的出光效果。
进一步地，所述第二平坦层62覆于所述透镜61以及所述第二封装体30的所述第二封装层38上，所述第二平坦层62的折射率低于所述透镜61的折射率，比如所述第二平坦层62的折射率小于1.5。可选地，所述第二平坦层62的材料包括灰色光阻等。
同样地，所述第一封装体20上的透镜和第二平坦层的结构和作用以及所述第三封装体40上的透镜和第二平坦层的结构和作用可参照所述第二封装体30上透镜61和第二平坦层62的结构和作用的描述，在此不再赘述。而关于所述拼接显示面板101的其他说明请参照上述实施例，在此不再赘述。
在另一种实施例中，所述第二封装体30的所述透镜61还可与所述第二封装体30的所述第二保护层53配合，以进一步增加所述第二封装体30的出光效果。具体请参照图1至图9，图9为本申请实施例提供的第二封装体的再一种剖面结构示意图。所述透镜61正对所述第二保护层53的第二开口531设置，且所述透镜61的尺寸W3大于所述第二开口531的尺寸W1，以使所述第二发光二极管芯片33发出的光线大部分都能经过所述透镜61。
在一种实施例中，本申请实施例还提供一种拼接显示面板制备方法，请参照图图1至图16，图10为本申请实施例提供的拼接显示面板制备方法的流程示意图，图11为本申请实施例中拼接显示面板制备方法中制得的发光基板的俯视结构示意图，图12为本申请实施例中拼接显示面板制备方法中制得的第二子基板的膜层结构示意图，图13为本申请实施例中拼接显示面板制备方法中第二子基板与发光基板贴合的示意图，图14为图13中去除转移基板后形成第二封装基板的示意图，图15为在图14的第二封装基板上制备第一保护层的示意图，图16为图15中的第二封装基板被切割后形成的第二封装体的示意图。所述拼接显示面板制备方法包括以下步骤：
S301：在基底1上制备驱动电路2，并在基底1上制备发光二极管芯片3，使所述发光二极管芯片3与对应的驱动电路2电连接，以形成发光基板200；
具体地，参照图11，在基底1上制备驱动电路2，所述驱动电路2阵列排布在所述基底1上，且相邻的所述驱动电路2之间具有间隔，使得每个所述驱动电路2为一个独立的驱动单元。所述发光二极管芯片3也设置在所述基底1上，且与对应的所述驱动电路2电连接，每个所述发光二极管芯片3对应一个驱动单元，也即每个所述发光二极管芯片3对应一个单独的所述驱动电路2，使得所述驱动电路2能够驱动对应的所述发光二极管芯片3单独发光。
S302：分别制备第一子基板、第二子基板以及第三子基板，所述第一子基板、所述第二子基板以及所述第三子基板均包括制备在转移基板上的牺牲层以及制备在所述牺牲层远离所述转移基板一侧的第一封装层，其中所述第二子基板还包括制备在所述牺牲层与所述第一封装层之间的第二封装层和红色量子点膜层，所述红色量子点膜层位于所述第二封装层远离所述牺牲层的一侧；
具体地，本实施例以制备所述第二子基板为例说明，参照图12，所述第二子基板的制备方法包括以下步骤：
在转移基板70上涂布热解黏或者UV解黏材料并固化，以形成牺牲层71；
在所述牺牲层71上整面涂布透明保护材料以形成整层的第二封装层38；
在所述第二封装层38上整面涂布红色量子点材料以形成整层的红色量子点膜层36；
在所述红色量子点膜层36上整面涂布透明保护材料以形成整层的第一封装层35。
需要说明的是，所述第一子基板和所述第三子基板的制备方法可参照所述第二子基板300的制备方法，不同之处在于，当所述第一子基板和所述第三子基板不需要量子点膜层时，直接在所述牺牲层上制备第一封装层即可。而且所述第一子基板、所述第二子基板以及所述第三子基板制备的先后顺序不做限定。
另外，为了提高所述第二子基板300上所述红色量子点膜层36的光纯度，所述第二子基板300上还可制备第一蓝光吸收层37，所述第一蓝光吸收层37位于所述第二封装层38和所述红色量子点膜层36之间。
S303：分别把所述第一子基板、所述第二子基板以及所述第三子基板贴合在对应的所述发光基板上，并去除所述转移基板，以形成第一封装基板、第二封装基板和第三封装基板；
具体地，参照图13和图14，同样地，本实施例以所述第二子基板与所述发光基板贴合形成第二封装基板为例说明，在所述发光基板200上涂布封胶层4，所述封胶层4覆盖所述驱动电路2和所述发光二极管芯片3。使所述第二封装基板400上的所述第一封装层35面向所述封胶层4，将所述第二封装基板400与所述发光基板200贴合，如图13所示。由于所述第二封装基板400上的各膜层均为采用全膜涂布，使得所述第二封装基板400上形成的均是整面的膜层，如此在使所述第二封装基板400与所述发光基板200贴合时无需贴合对位。
进一步地，所述第二封装基板400与所述发光基板200贴合后，根据所述牺牲层71使用的材料的特性，采用UV光照或者热处理使所述牺牲层71的粘性下降，以剥离掉所述转移基板70，进而形成厚度较薄的第二封装基板400，如图14所示。
进一步地，结合参照图5和图15，为了限制所述发光二极管芯片3的出光范围，还可在所述第二封装基板400上制备第一保护层51，所述第一保护层51涂布在所述第二封装层38远离所述红色量子点膜层36的一侧。所述第一保护层51在对应所述发光二极管芯片3的位置设置有第一开口511，且每个所述第一开口511对应一个所述发光二极管芯片3。需要说明的是，图15仅为示意所述第一保护层51上所述第一开口511的排布，以及所述第一开口511与所述发光二极管芯片3的对应关系，每个所述发光二极管芯片3即为一个子像素，图15仅以红色子像素R示意所述发光二极管芯片3与所述第一开口511的对应关系。
进一步地，为了提高所述第二封装基板400上每个所述发光二极管芯片3的正视角出光亮度，还可在所述第一保护层51上涂布第一平坦层52，所述第一平坦层52覆盖所述第一保护层51并填充所述第一开口511，如图5所示。所述第一平坦层52的折射率大于所述第一保护层51的折射率，以使所述发光二极管芯片3的大视角光线向中间汇聚，收敛大视角光线的角度，进而提高正视角出光亮度。
S304：分别对所述第一封装基板、所述第二封装基板400以及所述第三封装基板进行切割，以形成第一封装体20、第二封装体30和第三封装体40；
具体地，本实施例同样以切割所述第二封装基板400以形成所述第二封装体30为例说明，结合参照图15和图16，对所述第二封装基板400进行切割，以形成如图16所示的单个的第二封装体30，所述第二封装体30显示红光。为了清楚示出每个所述第二封装体30上所述第一保护层51的结构，图16未绘示所述第一保护层51上的所述第一平坦层52。
需要说明的是，图15所示的单个的所述第二封装体30的剖面结构如图5所示，在图5中为了区分所述第二封装体30与所述第一封装体20以及所述第三封装体40的膜层结构，对各膜层的命名做了区分，比如图5中所述第二封装体30的第二基底31即对应图14中第二封装基板400中的基底1，图5中所述第二封装体30的第二驱动电路32即对应图14中第二封装基板400中的驱动电路2，图5中所述第二封装体30的第二发光二极管芯片33即对应图14中第二封装基板400中的发光二极管芯片3，图5中所述第二封装体30的第二封胶层34即对应图14中第二封装基板400中的封胶层4。
另外，所述第一封装体20和所述第三封装体40的形成方法可参照所述第二封装体30的形成方法，在此不再赘述。其中所述第一封装体20显示蓝光，所述第三封装体40显示绿光。
S305：把至少一个所述第一封装体20、至少一个所述第二封装体30以及至少一个所述第三封装体40键合在背板10上以形成拼接显示面板100。
具体地，采用键合技术把至少一个所述第一封装体20、至少一个所述第二封装体30以及至少一个所述第三封装体40键合在所述背板10上，使所述第一封装体20、所述第二封装体30以及所述第三封装体40阵列排布并相互拼接，形成如图1所示的拼接显示面板100。
基于同一发明构思，本申请实施例还提供一种显示终端，所述显示终端包括本体及前述实施例其中之一的拼接显示面板，所述拼接显示面板固定在所述本体上。所述显示终端包括手机、平板、电视等电子设备。
根据上述实施例可知：
本申请提供一种拼接显示面板和显示终端中，拼接显示面板包括背板及键合在所述背板上至少一第一封装体、至少一第二封装体及至少一第三封装体，所述第一封装体、所述第二封装体和所述第三封装体分别显示蓝光、红光和绿光；所述第一封装体、所述第二封装体及所述第三封装体均包括基底、集成在所述基底上且电连接的驱动电路及发光二极管芯片以及覆盖所述驱动电路及所述发光二极管芯片的第一封装层，本申请通过把发光二极管芯片以及其对应的驱动电路设置成单独的封装体，该单独的封装体的尺寸远大于单个发光二极管芯片的尺寸，如此能够降低发光二极管芯片的光学分Bin难度，从而解决了现有Micro LED芯片存在的光学分Bin困难的问题。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种拼接显示面板，其包括背板及键合在所述背板上至少一第一封装体、至少一第二封装体及至少一第三封装体，所述第一封装体、所述第二封装体和所述第三封装体分别显示蓝光、红光和绿光；所述第一封装体、所述第二封装体及所述第三封装体均包括：
    基底；
    驱动电路及发光二极管芯片；所述驱动电路与所述发光二极管芯片集成在所述基底上且电连接；及
    第一封装层，覆盖所述驱动电路及所述发光二极管芯片；
    其中，所述第二封装体还包括设置在所述第一封装层远离所述第二封装体的发光二极管芯片的一侧的红色量子点膜层以及设置在所述红色量子点膜层远离所述第一封装层的一侧的第二封装层，所述红色量子点膜层与所述第二封装体的所述发光二极管芯片位置相对。
  2. 根据权利要求1所述的拼接显示面板，其中，所述第二封装体的发光二极管芯片发蓝光，所述第二封装体还包括设置在所述红色量子点膜层和所述第二封装层之间的第一蓝光吸收层。
  3. 根据权利要求2所述的拼接显示面板，其中，所述第三封装体的发光二极管发绿光。
  4. 根据权利要求2所述的拼接显示面板，其中，所述第三封装体的发光二极管芯片发蓝光；
    所述第三封装体还包括：
    绿色量子点膜层，设置在所述第一封装层远离所述第三封装体的发光二极管芯片的一侧；及
    第三封装层，设置在所述绿色量子点膜层远离所述第一封装层的一侧；
    所述绿色量子点膜层与所述第三封装体的所述发光二极管芯片位置相对。
  5. 根据权利要求4所述的拼接显示面板，其中，所述第三封装体还包括：
    第二蓝光吸收层，设置在所述绿色量子点膜层和所述第三封装层之间。
  6. 根据权利要求1所述的拼接显示面板，其中，所述发光二极管芯片发紫外光；
    所述第二封装体包括：设置在所述第一封装层上的红色量子点膜层；及设置在所述红色量子点膜层上的第二封装层；
    所述第三封装体包括：设置在所述第一封装层上的绿色量子点膜层；及设置在所述绿色量子点膜层上的第三封装层；
    所述第一封装体包括：设置在所述第一封装层上的蓝色量子点膜层；及设置在所述蓝色量子点膜层上的第四封装层。
  7. 根据权利要求6所述的拼接显示面板，其中，所述第一封装体、所述第二封装体及所述第三封装体还分别包括紫外光吸收层；
    其中，所述第二封装体的紫外光吸收层设置在所述红色量子点膜层和所述第二封装层之间；所述第三封装体的紫外光吸收层设置在所述绿色量子点膜层和所述第三封装层之间；所述第一封装体的紫外光吸收层设置在所述蓝色量子点膜层和所述第四封装层之间。
  8. 根据权利要求1所述的拼接显示面板，其中，所述第一封装体、所述第二封装体及所述第三封装体均还包括复合膜层，所述复合膜层分别位于所述第一封装体、所述第二封装体及所述第三封装体的第一封装层远离所述基底的一侧，且所述复合膜层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层；
    所述复合膜层包括第一保护层和第一平坦层，所述第一保护层的折射率低于所述第一平坦层的折射率，所述第一平坦层设置在所述第一保护层的远离所述基底的一侧。
  9. 根据权利要求8所述的拼接显示面板，其中，所述第一保护层具有一第一开口，所述第一开口正对所述发光二极管芯片，所述第一平坦层至少部分位于第一开口内；
    所述第一开口的侧壁相对于所述第一开口的底壁倾斜，所述第一开口的侧壁的坡角范围为30°至45°。
  10. 根据权利要求9所述的拼接显示面板，其中，所述第一封装体、所述第二封装体及所述第三封装体均还包括第二保护层，所述第二保护层包括第二开口，所述第二开口与所述第一开口位置相对，所述第二保护层覆盖所述驱动电路，所述发光二极管芯片收容在所述第二开口内。
  11. 根据权利要求10所述的拼接显示面板，其中，所述第二开口在所述基底上的正投影落在所述第一开口在所述基底上的正投影内。
  12. 根据权利要求10所述的拼接显示面板，其中，所述第二开口的侧壁相对于所述第二开口的底壁倾斜，所述第二开口的侧壁的坡角范围为30°至45°。
  13. 根据权利要求1所述的拼接显示面板，其中，所述第一封装体、所述第二封装体及所述第三封装体均还包括：
    第二平坦层，位于第一封装体、所述第二封装体及所述第三封装体的第一封装层远离所述基底的一侧，且所述第二平坦层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层；及
    透镜，位于所述第二平坦层面向所述第一封装层的一侧，所述透镜与所述发光二极管芯片位置相对；
    其中，所述透镜具有一圆弧面，所述圆弧面的圆心位于所述第二平坦层面向所述基底的一侧；
    所述第二平坦层的折射率低于所述透镜的折射率。
  14. 根据权利要求1所述的拼接显示面板，其中，所述红色量子点膜层的边缘与所述第一封装层、所述第二封装层及所述基底的边缘平齐。
  15. 一种显示终端，其包括本体及拼接显示面板，所述拼接显示面板固定在所述本体上，所述拼接显示面板包括背板及键合在所述背板上至少一第一封装体、至少一第二封装体及至少一第三封装体，所述第一封装体、所述第二封装体和所述第三封装体分别显示蓝光、红光和绿光；所述第一封装体、所述第二封装体及所述第三封装体均包括：
    基底；
    驱动电路及发光二极管芯片；所述驱动电路与所述发光二极管芯片集成在所述基底上且电连接；及
    第一封装层，覆盖所述驱动电路及所述发光二极管芯片；
    其中，所述第二封装体还包括设置在所述第一封装层远离所述第二封装体的发光二极管芯片的一侧的红色量子点膜层以及设置在所述红色量子点膜层远离所述第一封装层的一侧的第二封装层，所述红色量子点膜层与所述第二封装体的所述发光二极管芯片位置相对。
  16. 根据权利要求15所述的显示终端，其中，所述第二封装体的发光二极管芯片发蓝光，所述第二封装体还包括设置在所述红色量子点膜层和所述第二封装层之间的第一蓝光吸收层。
  17. 根据权利要求16所述的显示终端，其中，所述第三封装体的发光二极管芯片发蓝光；
    所述第三封装体还包括：
    绿色量子点膜层，设置在所述第一封装层远离所述第三封装体的发光二极管芯片的一侧；及
    第三封装层，设置在所述绿色量子点膜层远离所述第一封装层的一侧；
    所述绿色量子点膜层与所述第三封装体的所述发光二极管芯片位置相对。
  18. 根据权利要求15所述的显示终端，其中，所述第一封装体、所述第二封装体及所述第三封装体均还包括复合膜层，所述复合膜层分别位于所述第一封装体、所述第二封装体及所述第三封装体的第一封装层远离所述基底的一侧，且所述复合膜层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层；
    所述复合膜层包括第一保护层和第一平坦层，所述第一保护层的折射率低于所述第一平坦层的折射率，所述第一平坦层设置在所述第一保护层的远离所述基底的一侧。
  19. 根据权利要求18所述的显示终端，其中，所述第一保护层具有一第一开口，所述第一开口正对所述发光二极管芯片，所述第一平坦层至少部分位于第一开口内；
    所述第一开口的侧壁相对于所述第一开口的底壁倾斜，所述第一开口的侧壁的坡角范围为30°至45°。
  20. 根据权利要求15所述的显示终端，其中，所述第一封装体、所述第二封装体及所述第三封装体均还包括：
    第二平坦层，位于第一封装体、所述第二封装体及所述第三封装体的第一封装层远离所述基底的一侧，且所述第二平坦层为对应的所述第一封装体、所述第二封装体及所述第三封装体的顶层膜层；及
    透镜，位于所述第二平坦层面向所述第一封装层的一侧，所述透镜与所述发光二极管芯片位置相对；
    其中，所述透镜具有一圆弧面，所述圆弧面的圆心位于所述第二平坦层面向所述基底的一侧；
    所述第二平坦层的折射率低于所述透镜的折射率。
PCT/CN2023/074335 2022-10-21 2023-02-03 拼接显示面板和显示终端 WO2024082482A1 (zh)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020166814A1 (ko) * 2019-02-11 2020-08-20 (주)실리콘인사이드 능동화소 ic를 포함하는 led 픽셀 패키지 및 그 제조방법
US20210028156A1 (en) * 2019-07-25 2021-01-28 Samsung Electronics Co., Ltd. Display module having led packages and manufacturing method thereof
CN112736072A (zh) * 2019-10-28 2021-04-30 光宝光电(常州)有限公司 发光模组及其制造方法
CN113380849A (zh) * 2021-05-13 2021-09-10 惠州视维新技术有限公司 一种显示面板的制作方法及显示面板
US20220246089A1 (en) * 2021-02-04 2022-08-04 Samsung Electronics Co., Ltd. Display apparatus and method of manufacturing the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020166814A1 (ko) * 2019-02-11 2020-08-20 (주)실리콘인사이드 능동화소 ic를 포함하는 led 픽셀 패키지 및 그 제조방법
US20210028156A1 (en) * 2019-07-25 2021-01-28 Samsung Electronics Co., Ltd. Display module having led packages and manufacturing method thereof
CN112736072A (zh) * 2019-10-28 2021-04-30 光宝光电(常州)有限公司 发光模组及其制造方法
US20220246089A1 (en) * 2021-02-04 2022-08-04 Samsung Electronics Co., Ltd. Display apparatus and method of manufacturing the same
CN113380849A (zh) * 2021-05-13 2021-09-10 惠州视维新技术有限公司 一种显示面板的制作方法及显示面板

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