WO2022099519A1 - LED结构及其GaN基衬底、GaN基衬底的制作方法 - Google Patents

LED结构及其GaN基衬底、GaN基衬底的制作方法 Download PDF

Info

Publication number
WO2022099519A1
WO2022099519A1 PCT/CN2020/128186 CN2020128186W WO2022099519A1 WO 2022099519 A1 WO2022099519 A1 WO 2022099519A1 CN 2020128186 W CN2020128186 W CN 2020128186W WO 2022099519 A1 WO2022099519 A1 WO 2022099519A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
semiconductor layer
gan
nucleation
metal
Prior art date
Application number
PCT/CN2020/128186
Other languages
English (en)
French (fr)
Inventor
刘慰华
程凯
Original Assignee
苏州晶湛半导体有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 苏州晶湛半导体有限公司 filed Critical 苏州晶湛半导体有限公司
Priority to CN202080106629.8A priority Critical patent/CN116438665A/zh
Priority to US18/026,093 priority patent/US20230335678A1/en
Priority to PCT/CN2020/128186 priority patent/WO2022099519A1/zh
Priority to TW110141631A priority patent/TWI793848B/zh
Publication of WO2022099519A1 publication Critical patent/WO2022099519A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Definitions

  • the present application relates to the technical field of semiconductors, and in particular, to an LED structure, a GaN-based substrate thereof, and a manufacturing method of the GaN-based substrate.
  • Group III nitrides are the third generation of new semiconductor materials after the first and second generation semiconductor materials such as Si and GaAs.
  • GaN has many advantages as a wide bandgap semiconductor material, such as high saturation drift speed, high breakdown voltage, It has excellent carrier transport properties and can form AlGaN, InGaN ternary alloys and AlInGaN quaternary alloys, etc., and is easy to fabricate GaN-based PN junctions.
  • GaN-based materials and semiconductor devices have been extensively and deeply researched in recent years, and MOCVD (Metal-organic Chemical Vapor Deposition, metal organic chemical vapor deposition) technology to grow GaN-based materials is becoming more and more mature;
  • MOCVD Metal-organic Chemical Vapor Deposition, metal organic chemical vapor deposition
  • the purpose of the present invention is to provide an LED structure, its GaN-based substrate, and a manufacturing method of the GaN-based substrate, so as to improve the light extraction efficiency of the LED structure.
  • a first aspect of the present invention provides a GaN-based substrate, comprising:
  • a patterned substrate including a plurality of concave parts and a plurality of convex parts
  • the second semiconductor layer located on the metal Ga layer and the convex portion exposed by the metal Ga layer, the material of the second semiconductor layer is a GaN-based material.
  • first nucleation layer between the recessed portion and the metal Ga layer, and between the protruding portion and the second semiconductor layer, and the material of the first nucleation layer is AlGaN or AlN.
  • the material of the third nucleation layer is AlGaN or AlN.
  • the patterned substrate is a patterned sapphire substrate.
  • a second aspect of the present invention provides an LED structure, comprising:
  • An LED light-emitting structure on the GaN-based substrate includes a semiconductor layer of a first conductivity type, a semiconductor layer of a second conductivity type, and a semiconductor layer of the first conductivity type and the first conductivity type semiconductor layer.
  • the first conductivity type is opposite to the second conductivity type.
  • a third aspect of the present invention provides a method for manufacturing a GaN-based substrate, comprising:
  • a patterned substrate is provided, the patterned substrate includes a plurality of concave parts and a plurality of convex parts; a first semiconductor layer is epitaxially grown on the concave parts, and the material of the first semiconductor layer is GaN;
  • a second semiconductor layer is epitaxially grown on the first semiconductor layer and the convex portion exposed by the first semiconductor layer, the material of the second semiconductor layer is a GaN-based material, and the material of the second semiconductor layer is GaN-based.
  • the material is different from the material of the first semiconductor layer; the second semiconductor layer has a gap, and the gap penetrates the second semiconductor layer in the thickness direction;
  • the material of the second semiconductor layer is AlGaN or AlN.
  • a first nucleation layer is grown on the patterned substrate, the first nucleation layer is conformally located on the patterned substrate, and the The material of the first nucleation layer is AlGaN or AlN; the first semiconductor layer and the second semiconductor layer are epitaxially grown on the first nucleation layer.
  • a second nucleation layer is grown on the patterned substrate at a low temperature, and the second nucleation layer is conformally located on the patterned substrate, so
  • the material of the second nucleation layer is GaN; the first semiconductor layer is epitaxially grown on the second nucleation layer of the recess, and the second semiconductor layer is first epitaxially grown upward on the first semiconductor layer layer, laterally healed on the exposed convex portion of the first semiconductor layer, and then epitaxially grown on the entire surface.
  • the patterned substrate is a patterned sapphire substrate.
  • a fourth aspect of the present invention provides a method for manufacturing a GaN-based substrate, comprising:
  • a patterned substrate is provided, the patterned substrate includes a plurality of concave parts and a plurality of convex parts; a first semiconductor layer is epitaxially grown on the concave parts, and the material of the first semiconductor layer is GaN;
  • Epitaxial growth is performed on the exposed convex portion of the metal Ga layer to form a second semiconductor layer covering the entire surface of the metal Ga layer, and the material of the second semiconductor layer is a GaN-based material.
  • the material of the second semiconductor layer is AlGaN or AlN.
  • a first nucleation layer is grown on the patterned substrate, the first nucleation layer is conformally located on the patterned substrate, and the The material of the first nucleation layer is AlGaN or AlN; the first semiconductor layer and the second semiconductor layer are epitaxially grown on the first nucleation layer.
  • a second nucleation layer is grown on the patterned substrate at a low temperature, and the second nucleation layer is conformally located on the patterned substrate, so The material of the second nucleation layer is GaN; the first semiconductor layer is epitaxially grown on the second nucleation layer of the depression;
  • a third nucleation layer is grown on the convex portion exposed by the metal Ga layer, and the material of the third nucleation layer is AlGaN or AlN;
  • the second semiconductor layer is epitaxially grown on the third nucleation layer.
  • the patterned substrate is a patterned sapphire substrate.
  • a GaN-based substrate is formed by processing the first semiconductor layer between the patterned substrate and the second semiconductor layer of the GaN-based material to change it into a metal Ga layer.
  • the LED light-emitting structure is formed on a GaN-based substrate, the light emitted by the LED light-emitting structure can be emitted from the upper surface or side surface of the LED light-emitting structure after being reflected by the metal Ga layer, which reduces light absorption and improves the LED light-emitting structure. Light extraction efficiency.
  • the hydrogen gas reacts with the first semiconductor layer of GaN through the gap of the second semiconductor layer to form a metal Ga layer.
  • hydrogen gas is introduced to make it react with the first GaN semiconductor layer to form a metal Ga layer, and then the convex part of the patterned substrate is formed.
  • a second semiconductor layer of GaN-based material covering the entire surface of the metal Ga layer is epitaxially grown.
  • FIG. 1 is a flowchart of a method for manufacturing a GaN-based substrate according to a first embodiment of the present invention
  • FIG. 2 to 4 are schematic diagrams of intermediate structures corresponding to the process in FIG. 1;
  • FIG. 5 is a schematic cross-sectional structure diagram of the GaN-based substrate according to the first embodiment of the present invention.
  • FIG. 6 and FIG. 7 are schematic diagrams of intermediate structures corresponding to the manufacturing method of the GaN-based substrate according to the second embodiment of the present invention.
  • FIG. 8 is a schematic cross-sectional structure diagram of a GaN-based substrate according to a second embodiment of the present invention.
  • FIG. 9 is a flowchart of a method for manufacturing a GaN-based substrate according to a third embodiment of the present invention.
  • Figure 10 is a schematic diagram of the intermediate structure corresponding to the process in Figure 9;
  • FIG. 11 is a schematic cross-sectional structure diagram of a GaN-based substrate according to a third embodiment of the present invention.
  • FIG. 12 is a schematic diagram of an intermediate structure corresponding to a method for fabricating a GaN-based substrate according to a fourth embodiment of the present invention.
  • FIG. 13 is a schematic cross-sectional structure diagram of a GaN-based substrate according to a fourth embodiment of the present invention.
  • FIG. 14 is a schematic cross-sectional structural diagram of an LED structure according to a fifth embodiment of the present invention.
  • the first semiconductor layer 12 The second semiconductor layer 13
  • the second nucleation layer 14 The third nucleation layer 15
  • FIG. 1 is a flowchart of a method for fabricating a GaN-based substrate according to a first embodiment of the present invention.
  • 2 to 4 are schematic diagrams of intermediate structures corresponding to the process in FIG. 1 .
  • FIG. 5 is a schematic cross-sectional structure diagram of the GaN-based substrate according to the first embodiment of the present invention.
  • a patterned substrate 10 is provided.
  • the patterned substrate 10 includes a plurality of concave portions 10 a and a plurality of convex portions 10 b ; epitaxial growth is performed on the concave portions 10 a .
  • the material of the first semiconductor layer 12 is GaN.
  • the material of the patterned substrate 10 may be sapphire, silicon carbide, silicon, silicon-on-insulator (SOI), lithium niobate, or diamond.
  • a first nucleation layer 11 is grown on the patterned substrate 10 , and the first nucleation layer 11 is conformally located on the patterned substrate 10 superior.
  • the material of the first nucleation layer 11 is AlGaN or AlN.
  • the first nucleation layer 11 can be a) a low temperature nucleation layer, or b) a low temperature nucleation layer is formed first, and then a high temperature nucleation layer is formed on the low temperature nucleation layer.
  • the solution b) can reduce the defect density and material stress of the semiconductor layer subsequently epitaxially grown on the first nucleation layer 11 and improve the quality.
  • the epitaxial growth process of the first semiconductor layer 12 may include: atomic layer deposition (ALD, Atomic layer deposition), or chemical vapor deposition (CVD, Chemical Vapor Deposition), or molecular beam epitaxy (MBE, Molecular Beam Epitaxy) , or Plasma Enhanced Chemical Vapor Deposition (PECVD, Plasma Enhanced Chemical Vapor Deposition), or Low Pressure Chemical Vapor Deposition (LPCVD, Low Pressure Chemical Vapor Deposition), or Metal-Organic Chemical Vapor Deposition (MOCVD, Metal-Organic Chemical Vapor Deposition), or a combination thereof.
  • ALD atomic layer deposition
  • CVD Chemical Vapor Deposition
  • MBE molecular beam epitaxy
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • LPCVD Low Pressure Chemical Vapor Deposition
  • MOCVD Metal-Organic Chemical Vapor Deposition
  • the metal source when using the MOCVD method to epitaxially grow the first semiconductor layer 12, can be trimethylgallium (TMGa), the N source can be NH 3 , the carrier gas can be H 2 , and the temperature can be greater than 300° C., preferably greater than 700° C. .
  • TMGa trimethylgallium
  • the N source when using the MOCVD method to epitaxially grow the first semiconductor layer 12, can be trimethylgallium (TMGa), the N source can be NH 3 , the carrier gas can be H 2 , and the temperature can be greater than 300° C., preferably greater than 700° C. .
  • a second semiconductor layer 13 is epitaxially grown on the first semiconductor layer 12 and the raised portion 10 b exposed by the first semiconductor layer 12 , and the material of the second semiconductor layer 13 is epitaxially grown.
  • the second semiconductor layer 13 is a GaN-based material, and the material of the second semiconductor layer 13 is different from that of the first semiconductor layer 12 ;
  • the material of the second semiconductor layer 13 may be at least one of AlN, InN, AlGaN, InGaN, AlInN and AlInGaN.
  • the epitaxial growth process of the second semiconductor layer 13 may refer to the epitaxial growth process of the first semiconductor layer 11 .
  • the metal source can be trimethylgallium (TMGa) and trimethylaluminum (TMAl)
  • the N source can be NH 3
  • the carrier gas can be H 2
  • the temperature can be greater than 300°C, preferably greater than 700°C.
  • the material of the second semiconductor layer 13 is different from that of the first semiconductor layer 11 , there are problems such as lattice mismatch between the two, resulting in a gap 131 in the second semiconductor layer 13 .
  • step S3 in FIG. 1 , FIG. 4 and FIG. 5 when the temperature is higher than 300° C., hydrogen gas is introduced, and the hydrogen gas reacts with the first semiconductor layer 12 through the gap 131 to form the metal Ga layer 12 ′.
  • the temperature at which the hydrogen gas reacts with the first semiconductor layer 12 should be lower than the boiling point of metal Ga.
  • the above-mentioned supply of high temperature and supply of H 2 can be realized by stopping the supply of the metal source and the N source for the epitaxial growth of the second semiconductor layer 13 and only supplying the carrier gas.
  • the advantage is that the process is carried out in the same reaction chamber without the need for a transfer chamber, which can avoid pollution introduced during the transfer process, and can also avoid the reheating process, thereby improving the production efficiency.
  • the metal Ga layer 12' has reflective properties. Since H 2 does not react with the second semiconductor layer 13 , the notch 131 is used in this embodiment to realize the formation of a reflective layer between the second semiconductor layer 13 and the patterned substrate 10 .
  • FIG. 5 is a schematic cross-sectional structure diagram of the GaN-based substrate according to the first embodiment of the present invention.
  • the GaN-based substrate 1 of this embodiment includes:
  • the patterned substrate 10 includes a plurality of concave portions 10a and a plurality of raised portions 10b (refer to FIG. 2 );
  • the second semiconductor layer 13 located on the metal Ga layer 12 ′ and the exposed convex portion 10 b of the metal Ga layer 12 ′ is made of GaN-based material.
  • the material of the substrate 10 may be sapphire, silicon carbide, silicon, silicon-on-insulator (SOI), lithium niobate, or diamond and other materials.
  • the material of the second semiconductor layer 13 may be at least one of AlN, InN, AlGaN, InGaN, AlInN and AlInGaN.
  • first nucleation layer 11 between the concave portion 10a and the metal Ga layer 12 ′, and between the convex portion 10b and the second semiconductor layer 13 , and the material of the first nucleation layer 11 is AlGaN or AlN.
  • FIG. 6 and FIG. 7 are schematic diagrams of intermediate structures corresponding to the manufacturing method of the GaN-based substrate according to the second embodiment of the present invention.
  • 8 is a schematic cross-sectional structure diagram of a GaN-based substrate according to a second embodiment of the present invention.
  • the fabrication method of the GaN-based substrate 2 of the second embodiment is substantially the same as the fabrication method of the GaN-based substrate 1 of the first embodiment, and the only difference is:
  • step S1 before epitaxially growing the first semiconductor layer 12 , a second nucleation layer 14 is grown on the patterned substrate 10 at a low temperature, and the second nucleation layer 14 is conformally located on the patterned substrate 10 superior.
  • the material of the second nucleation layer 14 is GaN.
  • the second nucleation layer 14 grown at a low temperature will be recrystallized by heating, and the second nucleation layer 14 on the convex arc surface, especially the convex part
  • the second nucleation layer 14 on the top surface of 10b will slide down to the upper surface of the depression 10a.
  • the second semiconductor layer 13 is first epitaxially grown upward on the first semiconductor layer 12; then laterally healed on the exposed convex portion 10b of the first semiconductor layer 12; Face-up epitaxial growth.
  • FIG. 9 is a flowchart of a method for fabricating a GaN-based substrate according to a third embodiment of the present invention.
  • FIG. 10 is a schematic diagram of an intermediate structure corresponding to the process in FIG. 9 .
  • 11 is a schematic cross-sectional structure diagram of a GaN-based substrate according to a third embodiment of the present invention.
  • the fabrication method of the GaN-based substrate 3 of the third embodiment is substantially the same as the fabrication method of the GaN-based substrate 1 of the first embodiment, and the only difference is:
  • step S2 ′ referring to FIG. 10 , when the temperature is higher than 300° C., hydrogen gas is introduced, and the hydrogen gas reacts with the first semiconductor layer 12 to form a metal Ga layer 12 ′:
  • step S3 ′ epitaxial growth is performed on the exposed protrusions 10 b of the metal Ga layer 12 ′ to form a second semiconductor layer 13 covering the entire surface of the metal Ga layer 12 ′.
  • the material of the semiconductor layer 13 is a GaN-based material.
  • reaction conditions of step S2' may refer to the reaction conditions of step S3 of the foregoing embodiment.
  • step S3' since the first nucleation layer 11 is grown on the patterned substrate 10 before the epitaxial growth of the first semiconductor layer 12, the second semiconductor layer 13 is first epitaxially grown upward on the first nucleation layer 11; Later, it is healed laterally on the metal Ga layer 12'; after that, the entire surface is epitaxially grown upward.
  • the GaN-based substrate 3 of the third embodiment is substantially the same as the GaN-based substrate 1 of the first embodiment.
  • FIG. 12 is a schematic diagram of an intermediate structure corresponding to the manufacturing method of the GaN-based substrate according to the fourth embodiment of the present invention.
  • 13 is a schematic cross-sectional structure diagram of a GaN-based substrate according to a fourth embodiment of the present invention.
  • the fabrication method of the GaN-based substrate 4 of the fourth embodiment is substantially the same as the fabrication method of the GaN-based substrate 3 of the third embodiment, and the only difference is:
  • step S1 ′ before epitaxially growing the first semiconductor layer 12 , a second nucleation layer 14 is grown on the patterned substrate 10 at a low temperature, and the second nucleation layer 14 is conformally located on the patterned substrate 10 .
  • the material of the second nucleation layer 14 is GaN.
  • the second nucleation layer 14 grown at a low temperature will be recrystallized by heating, and the second nucleation layer 14 on the convex arc surface, especially the second nucleation layer 14 on the top surface of the convex portion 10b.
  • the second nucleation layer 14 will slide down to the upper surface of the recessed portion 10a.
  • step S3 ′ the third nucleation layer 15 is grown on the exposed convex portion 10b of the metal Ga layer 12 ′, and the material of the third nucleation layer 15 is AlGaN or AlN;
  • the three nucleation layers 15 are epitaxially grown upwards; they are then laterally healed on the metal Ga layer 12 ′; and then the whole surface is epitaxially grown upwards.
  • the third nucleation layer 15 can be grown on the entire surface of the metal Ga layer 12 ′ and the exposed convex portion 10 b of the metal Ga layer 12 ′. Since the metal Ga layer 12 ′ is liquid at high temperature, the second semiconductor layer 13 First, upward epitaxial growth is performed on the third nucleation layer 15 on the convex portion 10b.
  • FIG. 14 is a schematic cross-sectional structural diagram of an LED structure according to a fifth embodiment of the present invention.
  • the LED structure includes:
  • GaN-based substrates 1, 2, 3, and 4 of any of the above-mentioned embodiments are provided.
  • the LED light-emitting structure 5 on the GaN-based substrates 1, 2, 3, and 4 includes a semiconductor layer 51 of a first conductivity type, a semiconductor layer 52 of a second conductivity type, and a semiconductor layer of the first conductivity type In the light-emitting layer 53 between the layer 51 and the semiconductor layer 52 of the second conductivity type, the first conductivity type is opposite to the second conductivity type.
  • the materials of the semiconductor layer 51 of the first conductivity type, the light emitting layer 53 and the semiconductor layer 52 of the second conductivity type can all be III-V group compounds, such as GaN-based materials.
  • the light emitting layer 53 may include at least one of a single quantum well structure, a multiple quantum well (MQW) structure, a quantum wire structure, and a quantum dot structure.
  • the light emitting layer may include a well layer and a barrier layer.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

一种LED结构及其GaN基衬底、GaN基衬底的制作方法，GaN基衬底包括：图形化衬底（10），包括多个凹陷部（10a）与多个凸起部（10b）；位于凹陷部（10a）的金属Ga层（12'）；以及位于金属Ga层（12'）与金属Ga层（12'）暴露出的凸起部（10b）上的第二半导体层（13），第二半导体层（13）的材料为GaN基材料。LED发光结构形成在GaN基衬底上时，LED发光结构发出的光线经金属Ga层反射后，可从LED发光结构的上表面或侧表面出光，减少了光吸收，从而提高了LED发光结构的出光效率。

Description

LED结构及其GaN基衬底、GaN基衬底的制作方法 技术领域
本申请涉及半导体技术领域，尤其涉及一种LED结构及其GaN基衬底、GaN基衬底的制作方法。
背景技术
III族氮化物是继Si、GaAs等第一、第二代半导体材料之后的第三代新型半导体材料，其中GaN作为宽禁带半导体材料有许多优点，诸如饱和漂移速度高、击穿电压大、载流子输运性能优异以及能够形成AlGaN、InGaN三元合金和AlInGaN四元合金等，容易制作GaN基的PN结。鉴于此，近几年来GaN基材料和半导体器件得到了广泛和深入的研究，MOCVD(Metal-organic Chemical Vapor Deposition，金属有机物化学气相沉积)技术生长GaN基材料日趋成熟；在半导体器件研究方面，GaN基LED、LDs等光电子器件以及GaN基HEMT等微电子器件方面的研究都取得了显著的成绩和长足的发展。
随着GaN基材料在发光器件上的应用逐步深入，行业内对终端产品的出光效率的需求进一步提高。
发明内容
本发明的发明目的是提供一种LED结构及其GaN基衬底、GaN基衬底的制作方法，提高LED结构的出光效率。
为实现上述目的，本发明的第一方面提供一种GaN基衬底，包括：
图形化衬底，包括多个凹陷部与多个凸起部；
位于所述凹陷部的金属Ga层；以及
位于所述金属Ga层与所述金属Ga层暴露出的所述凸起部上的第二半导体层，所述第二半导体层的材料为GaN基材料。
可选地，所述凹陷部与所述金属Ga层之间，以及所述凸起部与所述第二半导体层之间都具有第一成核层，所述第一成核层的材料为AlGaN或AlN。
可选地，所述凸起部与所述第二半导体层之间具有第三成核层，所述第三成核层的材料为AlGaN或AlN。
可选地，所述图形化衬底为图形化的蓝宝石衬底。
本发明的第二方面提供一种LED结构，包括：
上述一项所述的GaN基衬底；
位于所述GaN基衬底上的LED发光结构，所述LED发光结构包括第一导电类型的半导体层、第二导电类型的半导体层，以及位于所述第一导电类型的半导体层与所述第二导电类型的半导体层之间的发光层，所述第一导电类型与所述第二导电类型相反。
本发明的第三方面提供一种GaN基衬底的制作方法，包括：
提供图形化衬底，所述图形化衬底包括多个凹陷部与多个凸起部；在所述凹陷部外延生长第一半导体层，所述第一半导体层的材料为GaN；
在所述第一半导体层以及所述第一半导体层暴露出的所述凸起部上外延生长第二半导体层，所述第二半导体层的材料为GaN基材料，所述第二半导体层的材料与所述第一半导体层的材料不同；所述第二半导体层内具有缺口，所述缺口在厚度方向上贯穿所述第二半导体层；
在温度大于300℃下，通入氢气，所述氢气经所述缺口与所述第一半导体层发生反应，生成金属Ga层。
可选地，所述第二半导体层的材料为AlGaN或AlN。
可选地，所述外延生长第一半导体层前，在所述图形化衬底上生长第一成核层，所述第一成核层保形地位于所述图形化衬底上，所述第一成核层的材料为AlGaN或AlN；所述第一半导体层与所述第二半导体层外延生长在所述第一成核层上。
可选地，所述外延生长第一半导体层前，在所述图形化衬底上低温生长第二成核层，所述第二成核层保形地位于所述图形化衬底上，所述第二成核层的材料为GaN；所述第一半导体层外延生长在所述凹陷部的所述第二成核层上，所述第二半导体层先向上外延生长在所述第一半导体层上，后横向愈合在所述第一半导体层暴露出的所述凸起部上，之后再整面向上外延生长。
可选地，所述图形化衬底为图形化的蓝宝石衬底。
本发明的第四方面提供一种GaN基衬底的制作方法，包括：
提供图形化衬底，所述图形化衬底包括多个凹陷部与多个凸起部；在所述凹陷部外延生长第一半导体层，所述第一半导体层的材料为GaN；
在温度大于300℃下，通入氢气，所述氢气与所述第一半导体层发生反应，生成金属Ga层；
在所述金属Ga层暴露出的所述凸起部上进行外延生长，以形成覆盖于所述金属Ga层的整面的第二半导体层，所述第二半导体层的材料为GaN基材料。
可选地，所述第二半导体层的材料为AlGaN或AlN。
可选地，所述外延生长第一半导体层前，在所述图形化衬底上生长第一成核层，所述第一成核层保形地位于所述图形化衬底上，所述第一成核层的材料为AlGaN或AlN；所述第一半导体层与所述第二半导体层外延生长在所述第一成核层上。
可选地，所述外延生长第一半导体层前，在所述图形化衬底上低温生长第二成核层，所述第二成核层保形地位于所述图形化衬底上，所述第二成 核层的材料为GaN；所述第一半导体层外延生长在所述凹陷部的所述第二成核层上；
所述第一半导体层反应生成金属Ga层后，在所述金属Ga层暴露出的所述凸起部上生长第三成核层，所述第三成核层的材料为AlGaN或AlN；所述第二半导体层外延生长在所述第三成核层上。
可选地，所述图形化衬底为图形化的蓝宝石衬底。
与现有技术相比，本发明的有益效果在于：
1)通过对图形化衬底与GaN基材料第二半导体层之间的第一半导体层处理，使其变为金属Ga层，形成GaN基衬底。LED发光结构形成在GaN基衬底上时，LED发光结构发出的光线经金属Ga层反射后，可从LED发光结构的上表面或侧表面出光，减少了光吸收，从而提高了LED发光结构的出光效率。
2)可选方案中，在图形化衬底上依次形成GaN第一半导体层、GaN基材料第二半导体层后，氢气经第二半导体层的缺口与GaN第一半导体层反应生成金属Ga层。或3)可选方案中，在图形化衬底上形成GaN第一半导体层后，通入氢气，使其与GaN第一半导体层反应生成金属Ga层，后在图形化衬底的凸起部外延生长覆盖于金属Ga层的整面的GaN基材料第二半导体层。上述两种方法工艺简单且可靠。
附图说明
图1是本发明第一实施例的GaN基衬底的制作方法的流程图；
图2至图4是图1中的流程对应的中间结构示意图；
图5是本发明第一实施例的GaN基衬底的截面结构示意图；
图6与图7是本发明第二实施例的GaN基衬底的制作方法对应的中间 结构示意图；
图8是本发明第二实施例的GaN基衬底的截面结构示意图；
图9是本发明第三实施例的GaN基衬底的制作方法的流程图；
图10是图9中的流程对应的中间结构示意图；
图11是本发明第三实施例的GaN基衬底的截面结构示意图；
图12是本发明第四实施例的GaN基衬底的制作方法对应的中间结构示意图；
图13是本发明第四实施例的GaN基衬底的截面结构示意图；
图14是本发明第五实施例的LED结构的截面结构示意图。
为方便理解本发明，以下列出本发明中出现的所有附图标记：
图形化衬底10             凹陷部10a
凸起部10b                第一成核层11
第一半导体层12           第二半导体层13
缺口131                  金属Ga层12'
第二成核层14             第三成核层15
GaN基衬底1、2、3、4      发光结构5
第一导电类型的半导体层51  第二导电类型的半导体层52
发光层53
具体实施方式
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细的说明。
图1是本发明第一实施例的GaN基衬底的制作方法的流程图。图2至图4是图1中的流程对应的中间结构示意图。图5是本发明第一实施例的GaN基衬底的截面结构示意图。
首先，参照图1中的步骤S1、图2与图3所示，提供图形化衬底10，图形化衬底10包括多个凹陷部10a与多个凸起部10b；在凹陷部10a外延生长第一半导体层12，第一半导体层12的材料为GaN。
图形化衬底10的材料可以为蓝宝石、碳化硅、硅、绝缘体上硅(SOI)、铌酸锂或金刚石等材料。
本实施例中，参照图2所示，外延生长第一半导体层12前，在图形化衬底10上生长第一成核层11，第一成核层11保形地位于图形化衬底10上。第一成核层11的材料为AlGaN或AlN。
第一成核层11可以为a)低温成核层，也可以b)先形成一层低温成核层，在低温成核层上再形成一层高温成核层。相对于a)方案，b)方案能降低后续外延生长在第一成核层11上的半导体层的缺陷密度和材料应力、提高质量。
第一半导体层12的外延生长工艺可以包括：原子层沉积法(ALD，Atomic layer deposition)、或化学气相沉积法(CVD，Chemical Vapor Deposition)、或分子束外延生长法(MBE，Molecular Beam Epitaxy)、或等离子体增强化学气相沉积法(PECVD，Plasma Enhanced Chemical Vapor Deposition)、或低压化学蒸发沉积法(LPCVD，Low Pressure Chemical Vapor Deposition)，或金属有机化合物化学气相沉积法(MOCVD，Metal-Organic Chemical Vapor Deposition)、或其组合方式。
例如，使用MOCVD法外延生长第一半导体层12时，金属源可以为三甲基镓(TMGa)，N源可以为NH 3，载气可以为H 2，温度可以大于300℃，优选大于700℃。
接着，参照图1中的步骤S2与图4所示，在第一半导体层12以及第一半导体层12暴露出的凸起部10b上外延生长第二半导体层13，第二半导体层13的材料为GaN基材料，第二半导体层13的材料与第一半导体层12的材料不同；第二半导体层13内具有缺口131，缺口131在厚度方向上贯穿第二半导体层13。
第二半导体层13的材料可以为AlN，InN，AlGaN，InGaN，AlInN与AlInGaN中的至少一种。
第二半导体层13的外延生长工艺可参照第一半导体层11的外延生长工艺。例如，使用MOCVD法外延生长第二半导体层13时，金属源可以为三甲基镓(TMGa)与三甲基铝(TMAl)，N源可以为NH 3，载气可以为H 2，温度可以大于300℃，优选大于700℃。
第二半导体层13由于与第一半导体层11的材料不同，因而两者存在晶格失配等问题，导致第二半导体层13内具有缺口131。
之后，参照图1中的步骤S3、图4与图5所示，在温度大于300℃下，通入氢气，氢气经缺口131与第一半导体层12发生反应，生成金属Ga层12'。
高温下，例如温度大于300℃时，氢气与第一半导体层12发生反应的化学方程式为：
3H 2+2GaN＝2Ga(l)+2NH 3↑。
需要说明的是，氢气与第一半导体层12发生反应的温度应低于金属Ga的沸点。
上述提供高温以及通入H 2，可通过停止供入外延生长第二半导体层13的金属源与N源，仅通入载气实现。好处在于：在同一反应腔室内进行，不用转移腔室，可避免转移过程中引入的污染，还可避免再次升温过程，提高制作效率。
金属Ga层12'具有反射性能。由于H 2不与第二半导体层13发生反应， 因而本实施例利用缺口131，实现了在第二半导体层13与图形化衬底10之间制作反射层。
图5是本发明第一实施例的GaN基衬底的截面结构示意图。
参照图5所示，本实施例的GaN基衬底1，包括：
图形化衬底10，包括多个凹陷部10a与多个凸起部10b(参照图2所示)；
位于凹陷部10a的金属Ga层12'；以及
位于金属Ga层12'与金属Ga层12'暴露出的凸起部10b上的第二半导体层13，第二半导体层13的材料为GaN基材料。
衬底10的材料可以为蓝宝石、碳化硅、硅、绝缘体上硅(SOI)、铌酸锂或金刚石等材料。
第二半导体层13的材料可以为AlN，InN，AlGaN，InGaN，AlInN与AlInGaN中的至少一种。
凹陷部10a与金属Ga层12'之间，以及凸起部10b与第二半导体层13之间都具有第一成核层11，第一成核层11的材料为AlGaN或AlN。
图6与图7是本发明第二实施例的GaN基衬底的制作方法对应的中间结构示意图。图8是本发明第二实施例的GaN基衬底的截面结构示意图。
参照图6至图8所示，实施例二的GaN基衬底2的制作方法与实施例一的GaN基衬底1的制作方法大致相同，区别仅在于：
步骤S1中，参照图6所示，外延生长第一半导体层12前，在图形化衬底10上低温生长第二成核层14，第二成核层14保形地位于图形化衬底10上。第二成核层14的材料为GaN。
参照图7所示，外延生长第一半导体层12由于为高温制程，低温生长的第二成核层14会受热再次结晶，凸起弧面上的第二成核层14，尤其是凸起 部10b的顶面的第二成核层14会滑落至凹陷部10a的上表面。如此，步骤S2中，参照图8所示，第二半导体层13先在第一半导体层12上向上外延生长；后横向愈合在第一半导体层12暴露出的凸起部10b上；之后再整面向上外延生长。
图9是本发明第三实施例的GaN基衬底的制作方法的流程图。图10是图9中的流程对应的中间结构示意图。图11是本发明第三实施例的GaN基衬底的截面结构示意图。
参照图9所示，实施例三的GaN基衬底3的制作方法与实施例一的GaN基衬底1的制作方法大致相同，区别仅在于：
步骤S2'中，参照图10所示，在温度大于300℃下，通入氢气，氢气与第一半导体层12发生反应，生成金属Ga层12'：
步骤S3'中，参照图11所示，在金属Ga层12'暴露出的凸起部10b上进行外延生长，以形成覆盖于金属Ga层12'的整面的第二半导体层13，第二半导体层13的材料为GaN基材料。
具体地，步骤S2'的反应条件可以参照前述实施例的步骤S3的反应条件。
步骤S3'中，由于外延生长第一半导体层12前，在图形化衬底10上生长第一成核层11，因而，第二半导体层13先在第一成核层11上向上外延生长；后横向愈合在金属Ga层12'上；之后再整面向上外延生长。
相应地，参照图11所示，实施例三的GaN基衬底3与实施例一的GaN基衬底1大致相同。
图12是本发明第四实施例的GaN基衬底的制作方法对应的中间结构示意图。图13是本发明第四实施例的GaN基衬底的截面结构示意图。
参照图12所示，实施例四的GaN基衬底4的制作方法与实施例三的GaN基衬底3的制作方法大致相同，区别仅在于：
步骤S1'中，外延生长第一半导体层12前，在图形化衬底10上低温生长第二成核层14，第二成核层14保形地位于图形化衬底10上。第二成核层14的材料为GaN。
外延生长第一半导体层12由于为高温制程，低温生长的第二成核层14会受热再次结晶，凸起弧面上的第二成核层14，尤其是凸起部10b的顶面的第二成核层14会滑落至凹陷部10a的上表面。如此，步骤S3'中，在金属Ga层12'暴露出的凸起部10b上生长第三成核层15，第三成核层15的材料为AlGaN或AlN；第二半导体层13先在第三成核层15上向上外延生长；后横向愈合在金属Ga层12'上；之后再整面向上外延生长。
第三成核层15可通过在金属Ga层12'以及金属Ga层12'暴露出的凸起部10b上整面生长，由于金属Ga层12'在高温下为液态，因而第二半导体层13先在凸起部10b上第三成核层15上向上外延生长。
图14是本发明第五实施例的LED结构的截面结构示意图。
参照图14所示，LED结构，包括：
上述任一实施例的GaN基衬底1、2、3、4；
位于GaN基衬底1、2、3、4上的LED发光结构5，LED发光结构5包括第一导电类型的半导体层51、第二导电类型的半导体层52，以及位于第一导电类型的半导体层51与第二导电类型的半导体层52之间的发光层53，第一导电类型与第二导电类型相反。
第一导电类型的半导体层51、发光层53与第二导电类型的半导体层52的材料都可以为Ⅲ-Ⅴ族化合物，例如GaN基材料。
发光层53可以包括单量子阱结构、多量子阱(MQW)结构、量子线结构和量子点结构中的至少一种。发光层可以包括阱层和势垒层。
参照图14所示，LED发光结构5发出的光线经金属Ga层12'反射后，可从LED发光结构5的上表面或侧表面出光，减少了光吸收，从而提高了LED 发光结构5的出光效率。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (15)

  1. 一种GaN基衬底，其特征在于，包括：
    图形化衬底(10)，包括多个凹陷部(10a)与多个凸起部(10b)；
    位于所述凹陷部(10a)的金属Ga层(12')；以及
    位于所述金属Ga层(12')与所述金属Ga层(12')暴露出的所述凸起部(10b)上的第二半导体层(13)，所述第二半导体层(13)的材料为GaN基材料。
  2. 根据权利要求1所述的GaN基衬底，其特征在于，所述凹陷部(10a)与所述金属Ga层(12')之间，以及所述凸起部(10b)与所述第二半导体层(13)之间都具有第一成核层(11)，所述第一成核层(11)的材料为AlGaN或AlN。
  3. 根据权利要求1所述的GaN基衬底，其特征在于，所述凸起部(10b)与所述第二半导体层(13)之间具有第三成核层(15)，所述第三成核层(15)的材料为AlGaN或AlN。
  4. 根据权利要求1所述的GaN基衬底，其特征在于，所述图形化衬底(10)为图形化的蓝宝石衬底。
  5. 一种LED结构，其特征在于，包括：
    权利要求1至4任一项所述的GaN基衬底；
    位于所述GaN基衬底上的LED发光结构(5)，所述LED发光结构包括第一导电类型的半导体层(51)、第二导电类型的半导体层(52)，以及位于所述第一导电类型的半导体层(51)与所述第二导电类型的半导体层(52)之间的发光层(53)，所述第一导电类型与所述第二导电类型相反。
  6. 一种GaN基衬底的制作方法，其特征在于，包括：
    提供图形化衬底(10)，所述图形化衬底(10)包括多个凹陷部(10a)与多个凸起部(10b)；在所述凹陷部(10a)外延生长第一半导体层(12)，所述第一半导体层(12)的材料为GaN；
    在所述第一半导体层(12)以及所述第一半导体层(12)暴露出的所述凸起部(10b)上外延生长第二半导体层(13)，所述第二半导体层(13)的材料为GaN基材料，所述第二半导体层(13)的材料与所述第一半导体层(12)的材料不同；所述第二半导体层(13)内具有缺口(131)，所述缺口(131)在厚度方向上贯穿所述第二半导体层(13)；
    在温度大于300℃下，通入氢气，所述氢气经所述缺口(131)与所述第一半导体层(12)发生反应，生成金属Ga层(12')。
  7. 根据权利要求6所述的GaN基衬底的制作方法，其特征在于，所述第二半导体层(13)的材料为AlGaN或AlN。
  8. 根据权利要求6所述的GaN基衬底的制作方法，其特征在于，所述外延生长第一半导体层(12)前，在所述图形化衬底(10)上生长第一成核层(11)，所述第一成核层(11)保形地位于所述图形化衬底(10)上，所述第一成核层(11)的材料为AlGaN或AlN；所述第一半导体层(12)与所述第二半导体层(13)外延生长在所述第一成核层(11)上。
  9. 根据权利要求6所述的GaN基衬底的制作方法，其特征在于，所述外延生长第一半导体层(12)前，在所述图形化衬底(10)上低温生长第二成核层(14)，所述第二成核层(14)保形地位于所述图形化衬底(10)上，所述第二成核层(14)的材料为GaN；所述第一半导体层(12)外延生长在所述凹陷部(10a)的所述第二成核层(14)上，所述第二半导体层(13)先向上外延生长在所述第一半导体层(12)上，后横向愈合在所述第一半导体层(12)暴露出的所述凸起部(10b)上，之后再整面向上外延生长。
  10. 根据权利要求6所述的GaN基衬底的制作方法，其特征在于，所述图形化衬底(10)为图形化的蓝宝石衬底。
  11. 一种GaN基衬底的制作方法，其特征在于，包括：
    提供图形化衬底(10)，所述图形化衬底(10)包括多个凹陷部(10a)与多个凸起部(10b)；在所述凹陷部(10a)外延生长第一半导体层(12)，所述第一半导体层(12)的材料为GaN；
    在温度大于300℃下，通入氢气，所述氢气与所述第一半导体层(12)发生反应，生成金属Ga层(12')；
    在所述金属Ga层(12')暴露出的所述凸起部(10b)上进行外延生长，以形成覆盖于所述金属Ga层(12')的整面的第二半导体层(13)，所述第二半导体层(13)的材料为GaN基材料。
  12. 根据权利要求11所述的GaN基衬底的制作方法，其特征在于，所述第二半导体层(13)的材料为AlGaN或AlN。
  13. 根据权利要求11所述的GaN基衬底的制作方法，其特征在于，所述外延生长第一半导体层(12)前，在所述图形化衬底(10)上生长第一成核层(11)，所述第一成核层(11)保形地位于所述图形化衬底(10)上，所述第一成核层(11)的材料为AlGaN或AlN；所述第一半导体层(12)与所述第二半导体层(13)外延生长在所述第一成核层(11)上。
  14. 根据权利要求11所述的GaN基衬底的制作方法，其特征在于，所述外延生长第一半导体层(12)前，在所述图形化衬底(10)上低温生长第二成核层(14)，所述第二成核层(14)保形地位于所述图形化衬底(10)上，所述第二成核层(14)的材料为GaN；所述第一半导体层(12)外延生长在所述凹陷部(10a)的所述第二成核层(14)上；
    所述第一半导体层(12)反应生成金属Ga层(12')后，在所述金属Ga层(12')暴露出的所述凸起部(10b)上生长第三成核层(15)，所述第三成核层(15)的材料为AlGaN或AlN；所述第二半导体层(13)外延生长在所述第三成核层(15)上。
  15. 根据权利要求11所述的GaN基衬底的制作方法，其特征在于，所述图形化衬底(10)为图形化的蓝宝石衬底。
PCT/CN2020/128186 2020-11-11 2020-11-11 LED结构及其GaN基衬底、GaN基衬底的制作方法 WO2022099519A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN202080106629.8A CN116438665A (zh) 2020-11-11 2020-11-11 LED结构及其GaN基衬底、GaN基衬底的制作方法
US18/026,093 US20230335678A1 (en) 2020-11-11 2020-11-11 Led structure and gan-based substrate thereof, and method for manufacturing gan-based substrate
PCT/CN2020/128186 WO2022099519A1 (zh) 2020-11-11 2020-11-11 LED结构及其GaN基衬底、GaN基衬底的制作方法
TW110141631A TWI793848B (zh) 2020-11-11 2021-11-09 LED結構及其GaN基襯底、GaN基襯底的製作方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/128186 WO2022099519A1 (zh) 2020-11-11 2020-11-11 LED结构及其GaN基衬底、GaN基衬底的制作方法

Publications (1)

Publication Number Publication Date
WO2022099519A1 true WO2022099519A1 (zh) 2022-05-19

Family

ID=81601924

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/128186 WO2022099519A1 (zh) 2020-11-11 2020-11-11 LED结构及其GaN基衬底、GaN基衬底的制作方法

Country Status (4)

Country Link
US (1) US20230335678A1 (zh)
CN (1) CN116438665A (zh)
TW (1) TWI793848B (zh)
WO (1) WO2022099519A1 (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101410992A (zh) * 2006-03-31 2009-04-15 昭和电工株式会社 GaN系半导体发光元件和灯
US20090114930A1 (en) * 2007-11-04 2009-05-07 National Central University Light-emitting diode and light-emitting diode array light source
CN101504962A (zh) * 2001-03-21 2009-08-12 三菱化学株式会社 半导体发光元件及其制造方法
CN103367113A (zh) * 2012-03-30 2013-10-23 丰田合成株式会社 第iii族氮化物半导体的制造方法和第iii族氮化物半导体

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8377796B2 (en) * 2008-08-11 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. III-V compound semiconductor epitaxy from a non-III-V substrate
JP5475569B2 (ja) * 2010-06-18 2014-04-16 株式会社東芝 窒化物半導体素子
US8963165B2 (en) * 2010-12-29 2015-02-24 Sharp Kabushiki Kaisha Nitride semiconductor structure, nitride semiconductor light emitting element, nitride semiconductor transistor element, method of manufacturing nitride semiconductor structure, and method of manufacturing nitride semiconductor element

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101504962A (zh) * 2001-03-21 2009-08-12 三菱化学株式会社 半导体发光元件及其制造方法
CN101410992A (zh) * 2006-03-31 2009-04-15 昭和电工株式会社 GaN系半导体发光元件和灯
US20090114930A1 (en) * 2007-11-04 2009-05-07 National Central University Light-emitting diode and light-emitting diode array light source
CN103367113A (zh) * 2012-03-30 2013-10-23 丰田合成株式会社 第iii族氮化物半导体的制造方法和第iii族氮化物半导体

Also Published As

Publication number Publication date
US20230335678A1 (en) 2023-10-19
TW202234722A (zh) 2022-09-01
TWI793848B (zh) 2023-02-21
CN116438665A (zh) 2023-07-14

Similar Documents

Publication Publication Date Title
JP4991828B2 (ja) 窒化ガリウム系化合物半導体の作製方法
US20050118752A1 (en) Method of making substrates for nitride semiconductor devices
JP4554803B2 (ja) 低転位バッファーおよびその製造方法ならびに低転位バッファーを備えた素子
WO2014038106A1 (ja) エピタキシャルウェハ及びその製造方法、紫外発光デバイス
JP2007227671A (ja) 発光素子
US20230006092A1 (en) Light-emitting structure, method for producing the light-emitting structure, and light-emitting device
CN115692570A (zh) 一种基于氧化铝氧化硅复合衬底的led芯片及其制造方法
KR100583163B1 (ko) 질화물 반도체 및 그 제조방법
CN111725371B (zh) 一种led外延底层结构及其生长方法
CN106229397B (zh) 一种发光二极管外延片的生长方法
WO2019149095A1 (zh) 一种GaN基LED外延结构及其制备方法
JP3667995B2 (ja) ＧａＮ系量子ドット構造の製造方法およびその用途
KR20070097640A (ko) 반도체 구조물의 제조 방법
CN105679898B (zh) 具有翘曲调节结构层的led外延结构及其生长方法
KR20100104997A (ko) 전위 차단층을 구비하는 질화물 반도체 기판 및 그 제조 방법
WO2022099519A1 (zh) LED结构及其GaN基衬底、GaN基衬底的制作方法
US20140151714A1 (en) Gallium nitride substrate and method for fabricating the same
CN106887487B (zh) 一种半导体发光器件及其制备方法
US20230053953A1 (en) Group iii nitride structures and manufacturing methods thereof
US11201263B2 (en) Surface roughening method for light emitting device and light emitting device
KR20090030652A (ko) 질화물계 발광소자
KR100722818B1 (ko) 발광 다이오드의 제조 방법
CN106206869A (zh) 一种GaN基发光二极管外延片的生长方法
CN107910411B (zh) 发光二极管及其制备方法
KR100834698B1 (ko) 질화 갈륨 박막 형성 방법 및 이 방법에 의해 제조된 질화갈륨 박막 기판

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20961076

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20961076

Country of ref document: EP

Kind code of ref document: A1