WO2022095243A1 - 显示装置及电子设备 - Google Patents

显示装置及电子设备 Download PDF

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Publication number
WO2022095243A1
WO2022095243A1 PCT/CN2020/138027 CN2020138027W WO2022095243A1 WO 2022095243 A1 WO2022095243 A1 WO 2022095243A1 CN 2020138027 W CN2020138027 W CN 2020138027W WO 2022095243 A1 WO2022095243 A1 WO 2022095243A1
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WO
WIPO (PCT)
Prior art keywords
reflection
area
metal
pixel driving
display device
Prior art date
Application number
PCT/CN2020/138027
Other languages
English (en)
French (fr)
Inventor
陈涛
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/274,805 priority Critical patent/US11721280B2/en
Publication of WO2022095243A1 publication Critical patent/WO2022095243A1/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/878—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different

Definitions

  • the present application relates to the field of display technology, and in particular, to a display device and an electronic device.
  • the organic light emitting diode display panel includes a normal display area A, a transition display area B, and a light-transmitting display area C, and the transition display area B is located between the light-transmitting display area C and the normal display area A.
  • a plurality of pixel driving circuits and corresponding metal signal lines are arranged in the transition display area B. Some pixel driving circuits located in the transition display area B are used to drive the display pixels in the light-transmitting display area C, and the transition display area B drives the transparent display area.
  • the pixel driving circuits of the display pixels in the light display area C and the display pixels in the light transmission display area C are electrically connected through transparent wires, so that the pixel driving circuits corresponding to the display pixels in the light transmission display area C and the corresponding metal signal lines It is arranged outside the light-transmitting display area C to ensure the light transmittance of the light-transmitting display area C, so that the light-transmitting display area C has dual functions of imaging and display.
  • a plurality of display pixels arranged in an array and corresponding pixel driving circuits are provided in the normal display area A to realize display.
  • the organic light emitting diode display panel is in the screen-off state, and under the condition that the organic light emitting display panel is illuminated by strong light, an obvious boundary problem occurs between the transition display area and the normal display area.
  • the purpose of the present application is to provide a display panel and an electronic device, so as to solve the problem that the transition display area and the normal display area will be clearly demarcated in the display panel under the condition of no screen and strong light irradiation.
  • the present application provides a display device, the display device has a main display area, a transition display area and a display light transmission area, and the transition display area is located between the main display area and the display light transmission area.
  • the display device includes:
  • a plurality of second display pixels arranged in the transition display area and the display light-transmitting area;
  • first pixel driving circuits arranged in the main display area in an array, and used for driving a plurality of the first display pixels
  • the metal reflection part is disposed in the transition display area, and the metal reflection part is located at least in the gaps between the plurality of second pixel driving circuits.
  • the present application further provides an electronic device, the electronic device includes the above-mentioned display device and a photosensitive unit, and the photosensitive unit is disposed corresponding to the display light-transmitting area of the display device.
  • the present application provides a display device and an electronic device.
  • the reflectivity of the transition display area and the reflection of the main display area are improved.
  • the ratio is close to avoid the obvious demarcation effect between the main display area and the transition display area when the screen is closed and illuminated by strong light.
  • the present application provides a display device and an electronic device.
  • the reflectivity of the transition display area is close to that of the main display area, Avoid obvious demarcation effects between the main display area and the transition display area when the screen is closed and under the illumination of strong light.
  • FIG. 1 is a schematic diagram of a conventional organic light emitting diode display panel
  • FIG. 2 is a schematic plan view of a display device according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of the distribution of first display pixels and second display pixels in the display device shown in FIG. 2;
  • FIG. 4 is a partial enlarged schematic view of the display device shown in FIG. 2;
  • FIG. 5 is an equivalent circuit diagram of the first pixel driving circuit shown in FIG. 4;
  • FIG. 6 is a driving timing diagram corresponding to the first pixel driving circuit
  • FIG. 7 is a schematic plan view of two adjacent first pixel driving circuits
  • FIG. 8 is a partially enlarged schematic view of the main display area, the transition display area and the display light-transmitting area of the display device shown in FIG. 2;
  • FIG. 9 is a schematic diagram of a pixel drive circuit island in FIG. 8.
  • FIG. 10 is a schematic plan view of a second pixel driving circuit in the pixel driving circuit island and a fourth metal layer patterned directly above the second pixel driving circuit;
  • FIG. 11 is a partially enlarged schematic diagram of a metal reflector provided in a transition display area of a display device
  • FIG. 12 is a first schematic cross-sectional view of the display device
  • FIG. 13 is a schematic diagram illustrating the position of the hollowed-out portion in the metal reflection portion corresponding to the position of the low-reflection stack portion in the plurality of first pixel driving circuits;
  • FIG. 14 is a second schematic cross-sectional view of the display device.
  • the present application provides a display device 100.
  • the display device 100 may be a liquid crystal display device or an organic light emitting diode display device.
  • the display device 100 is an organic light emitting diode display device.
  • FIG. 2 is a schematic plan view of a display device according to an embodiment of the present application
  • FIG. 3 is a schematic diagram of the distribution of first display pixels and second display pixels in the display device shown in FIG. 2
  • the display device 100 has a display light-transmitting area 100a, a main display area 100c, and a transition display area 100b.
  • the display device 100 includes a plurality of first display pixels, a plurality of first pixel driving circuits 104 , a plurality of second display pixels, a plurality of pixel driving circuit islands 101 , a plurality of first signal lines 102 , and a plurality of second signal lines 103 . and the metal reflector 105 .
  • the transition display area 100b is disposed between the display light-transmitting area 100a and the main display area 100c. Both the main display area 100c and the transition display area 100b are used for display.
  • the display light-transmitting area 100a has high light-transmitting properties while being used for display.
  • the light transmittance of the display light transmission area 100a is greater than the light transmittance of the main display area 100c and the transition display area 100b.
  • the area of the main display area 100c is larger than that of the transition display area 100b and the area of the display light-transmitting area 100a.
  • the display light-transmitting area 100a has an arc-shaped boundary, and the shape of the display light-transmitting area 100a is an ellipse, a circle, a chamfered square or other shapes.
  • the transition display area 100b is annular.
  • the transition display area 100b is any one of an elliptical ring, a circular ring or a square ring.
  • the display light-transmitting area 100a is circular.
  • the display light-transmitting area 100a is symmetrically disposed about the first symmetry axis A-A and the second symmetry axis B-B, and the first symmetry axis A-A is perpendicular to the second symmetry axis B-B.
  • the transition display area 100b is annular, the boundary of the transition display area 100b close to the display light-transmitting area 100a is circular, and the boundary of the transition display area 100b close to the main display area 100c is stepped.
  • each first display pixel includes a first red sub-pixel 100c1, a first green sub-pixel 100c3 and a first blue sub-pixel 100c2.
  • the first red sub-pixels 100c1, the first green sub-pixels 100c3, and the first blue sub-pixels 100c2 are distributed in a pentile design in the main display area 100c.
  • the shape of the first green sub-pixel 100c3 is an ellipse, and the first red sub-pixel 100c1 and the first blue sub-pixel 100c2 are both octagonal.
  • Each sub-pixel of the first display pixel includes an organic light emitting diode OLED.
  • FIG. 4 which is a partially enlarged schematic view of the display device shown in FIG. 2
  • a plurality of first pixel driving circuits 104 are disposed in the main display area 100 c in an array.
  • One first pixel driving circuit 104 drives one subpixel (one of the first red subpixel 100c1 , the first green subpixel 100c3 and the first blue subpixel 100c2 ) in the main display area 100c to emit light correspondingly.
  • a plurality of first pixel driving circuits 104 are distributed in a stepped shape at the junction between the main display area 100c and the transition display area 100b, so as to adapt to the sub-pixels of the first display pixels of the main display area 100c in the main display area 100c and the transition display area 100c.
  • the junctions between the regions 100b are distributed in a stepped shape.
  • FIG. 5 is an equivalent circuit diagram of the first pixel driving circuit shown in FIG. 4
  • FIG. 6 is a driving timing diagram corresponding to the first pixel driving circuit
  • FIG. 7 is two adjacent first pixels Schematic plan view of the driver circuit.
  • Each first pixel driving circuit includes a driving transistor M1, a switching transistor M2, a compensation transistor M3, an initialization transistor M4, a first light emission control transistor M5, a second light emission control transistor M6, an anode reset transistor M7, and a capacitor C, namely the first pixel
  • the driving circuit 104 is a 7T1C circuit.
  • the driving transistor M1, the switching transistor M2, the compensation transistor M3, the initialization transistor M4, the first light-emitting control transistor M5, the second light-emitting control transistor M6 and the anode reset transistor M7 are all P-type transistors.
  • the display device 100 further includes a plurality of traces electrically connected to the first pixel driving circuit 104 , and the plurality of traces include the i-1th level scan signal line SCAN(i-1), the i-th scan signal line SCAN(i-1) disposed in the main display area 100c Stage scan signal line SCAN(i), data line D(j), data line D(j+1), initialization signal line VI, DC power signal line VDD and i-th stage light emission control signal line EM(i).
  • the i-1st level scan signal line SCAN(i-1) is used to transmit the i-1st level scan signal.
  • the i-th level scan signal line SCAN(i) is used to transmit the i-th level scan signal.
  • the data lines D(j) and D(j+1) are used to transmit data signals.
  • the DC power signal line VDD is used to transmit the DC power signal.
  • the i-th stage lighting control signal line EM(i) is used to transmit the i-th stage lighting control signal.
  • the first pixel driving circuit 104 connected to the data line D(j) in the two adjacent first pixel driving circuits 104 will be described below with reference to FIG. 5 and FIG. 6 .
  • the gate G1 of the driving transistor M1 is connected to the first plate C1 of the capacitor C, the drain D3 of the compensation transistor M3 and the source S4 of the initialization transistor M4, and the source S1 of the driving transistor M1 is connected to the direct current through the first light-emitting control transistor M5.
  • the power signal line VDD is connected, the source S1 of the driving transistor M1 is connected to the data line D(j) through the switching transistor M2, and the drain D1 of the driving transistor M1 is connected to the organic light emitting diode OLED through the second light emission control transistor M6.
  • the switching transistor M2 is turned on, and the driving transistor M1 receives the data signal transmitted by the data line D(j) and provides the driving current for the organic light emitting diode OLED.
  • the gate G2 of the switching transistor M2 is connected to the i-th scanning signal line SCAN(i), the source S2 of the switching transistor M2 is connected to the data line D(j), and the drain D2 of the switching transistor M2 is connected to the source of the driving transistor M1 S1 is connected, and the drain D2 of the switching transistor M2 is also connected to the DC power signal line VDD through the first light-emitting control transistor M5.
  • the switching transistor M2 is turned on or off according to the i-th scan signal transmitted by the i-th scan signal line SCAN(i), and controls whether the data signal transmitted by the data line D(j) is written to the source S1 of the driving transistor M1.
  • the gate G3 of the compensation transistor M3 is connected to the i-th scan signal line SCAN(i), the source S3 of the compensation transistor M3 is connected to the drain D1 of the driving transistor M1, and the source S3 of the compensation transistor M3 is also controlled by the second light emission
  • the transistor M6 is connected to the organic light emitting diode OLED, the drain D3 of the compensation transistor M3 is connected to the gate G1 of the driving transistor M1 , the source S4 of the initialization transistor M4 and the first plate C1 of the capacitor C.
  • the compensation transistor M3 is turned on or off according to the i-th scan signal transmitted by the i-th scan signal line SCAN(i), and is electrically connected to the gate G1 of the driving transistor M1 and the drain D1 of the driving transistor M1 .
  • the gate G4 of the initialization transistor M4 is connected to the scan signal line SCAN(i-1) of the i-1st stage, the drain D4 of the initialization transistor M4 is connected to the drain D7 of the anode reset transistor M7 and the initialization signal line VI, and the initialization transistor M4 is connected.
  • the source S4 is connected to the gate G1 of the driving transistor M1 , the drain D3 of the compensation transistor M3 and the first plate C1 of the capacitor C.
  • the initialization transistor M4 is turned on or off according to the i-1 th scan signal transmitted by the i-1 th scan signal line SCAN(i-1), and controls whether the initialization signal transmitted by the initialization signal line VI is written to the gate of the driving transistor M1 Pole G1.
  • the gate G5 of the first light-emitting control transistor M5 is connected to the i-th light-emitting control signal line EM(i), and the source S5 of the first light-emitting control transistor M5 is connected to the DC power signal line VDD and the second plate C2 of the capacitor C , the drain D5 of the first light emission control transistor M5 is connected to the source S1 of the driving transistor M1 and the drain D2 of the switching transistor M2.
  • the first light-emitting control transistor M5 is turned on or off according to the i-th light-emitting control signal transmitted by the i-th light-emitting control signal line EM(i), and controls whether the DC power signal transmitted by the DC power signal line VDD is written to the driving transistor M1 the source S1.
  • the gate G6 of the second light-emitting control transistor M6 is connected to the i-th light-emitting control signal line EM(i), the source S6 of the second light-emitting control transistor M6 is connected to the drain D1 of the driving transistor M1 and the source S3 of the compensation transistor M3 connected, the drain D6 of the second light emission control transistor M6 is connected to the anode of the organic light emitting diode OLED and the source S7 of the anode reset transistor M7.
  • the second light-emitting control transistor M6 is turned on or off according to the i-th level light-emitting control signal transmitted by the i-th level light-emitting control signal line EM(i) to control whether the driving current flows into the organic light emitting diode OLED.
  • the gate G7 of the anode reset transistor M7 is connected to the i-th scanning signal line SCAN(i), the drain D7 of the anode reset transistor M7 is connected to the drain D4 of the initialization transistor M4 and the initialization signal line VI, and the source of the anode reset transistor M7
  • the pole S7 is connected to the anode of the organic light emitting diode OLED and the drain D6 of the second light emitting control transistor M6.
  • the anode reset transistor M7 is turned on or off according to the i-th scan signal transmitted by the i-th scan signal line SCAN(i), and controls whether the initialization signal transmitted by the initialization signal line VI is written to the anode of the organic light emitting diode OLED.
  • the first plate C1 of the capacitor C is connected to the gate G1 of the driving transistor M1, the source S4 of the initialization transistor M4 and the drain D3 of the compensation transistor M3, and the second plate C2 of the capacitor C is connected to the DC power signal line VDD and the first plate.
  • the source S5 of a light-emitting control transistor M5 is connected.
  • the capacitor C is used to maintain the voltage of the gate of the driving transistor M1 when the driving transistor M1 drives the organic light emitting diode OLED to emit light.
  • the i-1st level scan signal line SCAN (i-1) inputs a low level scan signal of the i-1st level
  • the initialization transistor M4 is turned on
  • the initialization signal line VI transmits the initialization
  • the signal is transmitted to the gate G1 of the driving transistor M1 to realize the initialization of the gate G1 of the driving transistor M1;
  • the i-th level scan signal line SCAN(i) inputs a high-level i-th level scan signal, the switching transistor M2, the compensation transistor M3 and anode reset transistor M7 are both turned off;
  • the i-th level light-emitting control signal line EM(i) inputs a high-level i-th level light-emitting control signal, and both the first light-emitting control transistor M5 and the second light-emitting control transistor M6 are turned off.
  • the i-1st level scan signal line SCAN(i-1) inputs a high level i-1st level scan signal, and the initialization transistor M4 is turned off; the ith level scan signal line SCAN(i) inputs a low level scan signal of the i-th stage, the switching transistor M2, the compensation transistor M3 and the anode reset transistor M7 are all turned on, and the turned-on compensation transistor M3 makes the gate G1 of the drive transistor M1 and the gate of the drive transistor M1
  • the drain D1 is electrically connected, the turned-on switch transistor M2 writes the data signal transmitted by the data line D(j) to the source S1 of the drive transistor M1, and the turned-on anode reset transistor M7 initializes the initialization signal line VI.
  • the signal is output to the anode of the organic light emitting diode OLED to realize the compensation of the threshold voltage of the driving transistor M1, the writing of the data signal and the initialization of the anode of the organic light emitting diode OLED; the i-th light-emitting control signal line EM(i) is input with a high level
  • the i-th light-emitting control signal, the first light-emitting control transistor M5 and the second light-emitting control transistor M6 are both turned off.
  • the i-1st level scan signal line SCAN(i-1) inputs the i-1st level scan signal with a high level, and the initialization transistor M4 is turned off; the i-th level scan signal line SCAN(i) inputs a high level
  • the level i scan signal is flat, the switching transistor M2, the compensation transistor M3 and the anode reset transistor M7 are all turned off;
  • the transistor M5 and the second light-emitting control transistor M6 are both turned on, the driving transistor M1 is turned on and outputs a driving current, and the organic light emitting diode OLED emits light.
  • the display device includes a patterned active layer 1041 , a patterned first metal layer 1042 , a patterned second metal layer 1043 , and a patterned third metal layer 1044 .
  • the patterned second metal layer 1043 is located on the side of the patterned first metal layer 1042 away from the patterned active layer 1041
  • the patterned third metal layer 1044 is located on the patterned second metal layer 1043 away from the pattern One side of the first metal layer 1042 is melted.
  • a first insulating layer is arranged between the patterned active layer 1041 and the patterned first metal layer 1042, a second insulating layer is arranged between the patterned first metal layer 1042 and the patterned second metal layer 1043, and the patterned first metal layer 1043 is provided with a second insulating layer.
  • a third insulating layer is disposed between the second metal layer 1043 and the patterned third metal layer 1044 .
  • Preparation materials of the patterned first metal layer 1042 , the patterned second metal layer 1043 and the patterned third metal layer 1044 include but are not limited to at least one of molybdenum, aluminum, titanium and copper.
  • the patterned first metal layer 1042, the patterned second metal layer 1043 and the patterned third metal layer 1044 can all reflect light.
  • the first insulating layer, the second insulating layer and the third insulating layer are all inorganic insulating layers, and the preparation material of the inorganic insulating layer is selected from at least one of silicon oxide or silicon nitrid
  • the patterned active layer 1041 includes channels and source and drain electrodes of the seven transistors of the first pixel driving circuit 104 .
  • the patterned first metal layer 1042 includes the i-th level scan signal line SCAN(i), the i-1st level scan signal line SCAN(i-1), the i-th level light-emitting control signal line EM(i), and the ith level of the capacitor C.
  • a plate C1 (the gate of the driving transistor M1).
  • the patterned second metal layer 1043 includes the initialization signal line VI, the metal shielding member 10431 and the second plate C2 of the capacitor C. As shown in FIG.
  • the metal shielding member 10431 is electrically connected to the DC power signal line VDD for introducing the DC power signal.
  • the patterned third metal layer 1044 includes a data line D(j), a data line D(j+1), a DC power signal line VDD, a first initialization lead 10441, a second initialization lead 10442, a gate lead 10443 and an anode lead 10444 .
  • the first initialization lead 10441 is connected between the initialization signal line VI and the drain of the initialization transistor M4, the second initialization lead 10442 is connected between the initialization signal line VI and the drain of the anode reset transistor M7, and the gate lead 10443 is connected Between the first plate C1 and the drain of the compensation transistor M3, the anode lead 10444 is connected between the anode of the organic light emitting diode and the drain of the second light-emitting control transistor M6.
  • the plurality of first pixel driving circuits 104 are stacked by a metal layer with high reflectivity, an insulating layer with low reflectivity, and a semiconductor layer with low reflectivity, and the metal in the first pixel driving circuit 104 is densely distributed in some areas. In other areas, the distribution is sparse, resulting in the existence of high reflectivity areas and low reflectivity areas in the first pixel driving circuit 104 .
  • the reflectivity of the low reflectivity area of the first pixel driving circuit 104 is smaller than that of the first pixel driving circuit 104 reflectivity of the area.
  • the plurality of first pixel driving circuits 104 include a plurality of low-reflection stacked portions, and the reflectivity of the plurality of low-reflective stacked portions of the plurality of first pixel driving circuits 104 is smaller than that of the plurality of first pixel driving circuits 104 except the plurality of low-reflective stacked portions reflectivity of the other parts.
  • Each low-reflection stack is formed by stacking a plurality of film layers constituting the first pixel driving circuit 104 .
  • the metal distribution density in the low-reflection stack portion is smaller than the metal distribution density in other parts of the plurality of first pixel driving circuits 104 .
  • Each low-reflection stack includes a blank stack where no metal is provided.
  • Each low-reflection stack may be a blank stack with no metal at all, or may include a small amount of metal.
  • the shape of the orthographic projection of the low-reflection stack on the substrate of the display device is a rectangle, a trapezoid or an irregular pattern.
  • the plurality of first pixel driving circuits 104 include a plurality of first low-reflection stacks 104a, a plurality of second low-reflection stacks 104b and a plurality of third low-reflection stacks distributed in an array Section 104c.
  • the plurality of first low-reflection stacking parts 104a, the plurality of second low-reflection stacking parts 104b, and the plurality of third low-reflection stacking parts 104c all include blank stacking parts, and the blanking stacking parts are located in the areas where the metal film layer is not provided, that is, the blank stacking parts
  • the area of the orthographic projection of the metal in the portion on the substrate of the display device is equal to zero.
  • the first low-reflection stacking portion 104a is a portion of two adjacent first pixel driving circuits 104 corresponding to the first region, and the first region is composed of two adjacent DC power signal lines VDD, i-th level light-emitting control signal lines EM ( i) and the initialization signal line VI adjacent to the i-th light emission control signal line EM(i) are enclosed, and the first low-reflection stack portion 104a includes a portion of the data line D(j+1).
  • the second low-reflection stacking portion 104b is a portion of two adjacent first pixel driving circuits 104 corresponding to the second region, and the second region is composed of two adjacent DC power signal lines VDD, i-1th level scan signal lines SCAN (i -1), the i-th level scan signal line SCAN(i) adjacent to the i-1st level scan signal line SCAN(i-1) and the i-1th level scan signal line SCAN(i-1) and the ith level scan signal line SCAN(i-1)
  • the metal shielding members 10431 between the i-level scanning signal lines SCAN(i) are enclosed.
  • the second low-reflection stack 104b also includes a portion of the data line D(j+1).
  • the third low-reflection stacking portion 104c is a portion of two adjacent first pixel driving circuits 104 corresponding to the third region, and the third region is composed of the i-th level light-emitting control signal line EM(i) and the i-th level light-emitting control signal line EM (i)
  • the adjacent i-th scan signal line SCAN(i), the data line D(j+1), and the patterned active layer 1041 close to the data line D(j+1) are enclosed.
  • the third low-reflection stack 104c does not include metal.
  • the first low-reflection stack part 104a, the second low-reflection stack part 104b and the third low-reflection stack part 104c are all rectangular.
  • a third low-reflection stacking part 104c is disposed between a first low-reflection stacking part 104a and a second low-reflection stacking part 104b.
  • the area of the orthographic projection of the blank stacks in each of the first low-reflection stacks 104a on the substrate of the display device is larger than the area of the orthographic projection of the blank stacks in each of the second low-reflection stacks 104b on the substrate, and each The area of the orthographic projection of the blank stacks in each of the second low-reflection stacks 104b on the substrate is larger than the area of the orthographic projection of the blank stacks in each of the third low-reflection stacks 104c on the substrate.
  • the reflectivity of the main display area 100c is very high except for the blank stacks of the first low-reflection stacks 104a, the blank stacks of the second low-reflection stacks 104b, and the blank stacks of the third low-reflection stacks 104c. In addition to being low, the reflectivity of other regions is higher due to the arrangement of the metal layer.
  • a plurality of second display pixels are uniformly arranged in the display light-transmitting area 100a and the transition display area 100b.
  • Each second display pixel includes a second red sub-pixel 100a1, a second green sub-pixel 100a3, and a second blue sub-pixel 100a2.
  • the second red sub-pixels 100a1, the second green sub-pixels 100a3, and the second blue sub-pixels 100a2 are distributed in a pentile design in the display light-transmitting area 100a and the transition display area 100b.
  • the shapes of the second red sub-pixel 100a1, the second green sub-pixel 100a3 and the second blue sub-pixel 100a2 are all circular.
  • the second red sub-pixel 100a1, the second green sub-pixel 100a3 and the second blue sub-pixel 100a2 all include organic light emitting diodes.
  • the size of the first red sub-pixel 100c1 is larger than that of the second red sub-pixel 100a1, the size of the first green sub-pixel 100c3 is larger than that of the second green sub-pixel 100a3, and the size of the first blue sub-pixel 100c2 is larger than that of the second blue sub-pixel 100c2
  • the size of the sub-pixel 100a2 ensures that the display light-transmitting area 100a has high light transmittance. Since the sizes of a second red sub-pixel 100a1 and a first red sub-pixel 100c1 are different, the driving power of the corresponding driving circuits are also different.
  • the first green sub-pixel 100c3 and the second green sub-pixel 100a3 The driving powers of the driving circuits are also different, and the driving powers of the driving circuits corresponding to the first blue sub-pixel 100c2 and the second blue sub-pixel 100a2 are also different. Therefore, the first pixel driving circuit 104 can only be used to drive the first red sub-pixel 100c1, the first green sub-pixel 100c3 and the first blue sub-pixel 100c2 in the main display area 100c, but cannot be used to drive the transition display area 100b and display The second red sub-pixel 100a1, the second green sub-pixel 100a3 and the second blue sub-pixel 100a2 in the light-transmitting area 100a.
  • the size of the sub-pixels becomes smaller.
  • the plurality of first red sub-pixels 100c1, the plurality of first green sub-pixels 100c3 and the plurality of first blue sub-pixels 100c2 are stepped at the junction of the main display area 100c and the transition display area 100b
  • a plurality of second red sub-pixels 100a1, a plurality of second green sub-pixels 100a3 and a plurality of second blue sub-pixels 100a2 are distributed in a stepped shape at the junction of the main display area 100c and the transition display area 100b.
  • FIG. 8 is a partial enlarged schematic diagram of the main display area, the transition display area and the display light-transmitting area of the display device shown in FIG. 1
  • FIG. 9 is a schematic diagram of the pixel driving circuit island in FIG. 8
  • FIG. 10 is a pixel A schematic plan view of the second pixel driving circuit in the driving circuit island.
  • a plurality of second pixel driving circuits 1011 are disposed in the transition display area 100 b , and a plurality of second pixel driving circuits 1011 form a plurality of pixel driving circuit islands 101 .
  • the plurality of pixel driving circuit islands 101 are distributed around the display light-transmitting area 100a, so that the plurality of pixel driving circuit islands 101 can be adapted to the shape of the display light-transmitting area 100a, thereby reducing the number of second pixel driving circuits 1011 in the plurality of pixel driving circuit islands 101
  • the spacing between the corresponding sub-pixels reduces the impedance of the wires connecting the second pixel driving circuit 1011 and the corresponding sub-pixels, and improves the uniformity of light emission of the second display pixels.
  • the plurality of pixel driving circuit islands 101 include a first group of pixel driving circuit islands 101a and a second group of pixel driving circuit islands 101b.
  • the pixel driving circuit islands 101 in the first group of pixel driving circuit islands 101a are distributed in an arc shape.
  • the pixel driving circuit islands 101 in the two groups of pixel driving circuit islands 101b are distributed in an arc shape, the pixel driving circuit islands 101 in the first group of pixel driving circuit islands 101a and the pixel driving circuit islands 101 in the second group of pixel driving circuit islands 101b
  • the arrangement is symmetrical about the second symmetry axis B-B.
  • the pixel driving circuit islands 101 in the first group of pixel driving circuit islands 101a are arranged symmetrically about the first symmetry axis A-A.
  • the pixel driving circuit islands 101 in the second group of pixel driving circuit islands 101b are arranged symmetrically about the first symmetry axis A-A.
  • Each pixel driving circuit island 101 has a rectangular shape.
  • Each pixel driving circuit island 101 includes a plurality of second pixel driving circuits 1011 arranged in an array, and the second pixel driving circuits 1011 of the plurality of pixel driving circuit islands 101 are used to drive a plurality of second display pixels to emit light, that is, a plurality of pixels
  • the second pixel driving circuit 1011 of the driving circuit island 101 is used to drive the second display pixel of the transition display area 100b to emit light, and also used to drive the second display pixel of the display light-transmitting area 100a to emit light, so as to avoid displaying the light-transmitting area 100a
  • the pixel driving circuit is arranged to avoid the influence of the metal film layer of the second pixel driving circuit 1011 on the light transmittance of the display light-transmitting area 100a, thereby further improving the light transmittance of the display light-transmitting area 100a.
  • each second pixel driving circuit 1011 is the same as that of the first pixel driving circuit shown in FIG. 5 , the difference is that the driving power of the second pixel driving circuit 1011 is the same as that of the first pixel driving circuit 104
  • the difference between the second pixel driving circuit 1011 and the first pixel driving circuit 104 includes the difference in size between the two, and the difference in the size of the internal devices and wiring between the two.
  • FIG. 10 is a schematic plan view of the second pixel driving circuit in the pixel driving circuit island and the patterned fourth metal layer directly above the second pixel driving circuit.
  • the schematic plan view of each of the second pixel driving circuits is basically similar to the schematic plan view of the first pixel driving circuit, and the difference lies in the differences in the layout spacing and the like.
  • the difference between the second pixel driving circuit 1011 and the first pixel driving circuit 104 further includes that the second pixel driving circuit 1011 is connected to the n-1st-level scan signal line Scan(n-1) and the n-th level scan signal line Scan(n) and the n-th stage light emission control signal line EM(n) is connected.
  • the position of the n-1th level scan signal line Scan(n-1) in the second pixel driving circuit 1011 corresponds to the position of the i-1st level scan signal line Scan(i-1) in the first pixel driving circuit 104
  • the position of the n-th level scan signal line Scan(n) in the second pixel driving circuit 1011 corresponds to the position of the i-th level scan signal line Scan(i) in the first pixel driving circuit 104
  • the n-th level light emission control signal line EM The position of (n) in the second pixel driving circuit 1011 corresponds to the position of the i-th stage light emission control signal line EM(i) in the first pixel driving circuit 104 .
  • the display device further includes a patterned fourth metal layer 1045, the patterned fourth metal layer 1045 is located on the side of the patterned third metal layer 1044 away from the patterned second metal layer 1043, and the patterned fourth metal layer A fourth insulating layer is disposed between 1045 and the patterned third metal layer 1044 .
  • the patterned fourth metal layer 1045 includes a metal grid 10451.
  • the metal grid 10451 is used for transmitting DC power signals. Part of the metal grid 10451 is disposed in the main display area 100c.
  • a plurality of second pixel driving circuits 1011 are provided.
  • the metal grid 10451 includes a plurality of vertical metal lines and horizontal metal lines, and the metal grid 10451 is in a grid shape.
  • the metal grid 10451 is electrically connected to the DC power signal line VDD in the patterned third metal layer 1044 to transmit DC power signal, improve the resistance voltage drop of DC power signal during transmission.
  • the preparation material of the patterned fourth metal layer 1045 is at least one of molybdenum, aluminum, titanium and copper.
  • the fourth insulating layer is an organic insulating layer.
  • the second pixel driving circuit 1011 in the pixel driving circuit island 101 is electrically connected with the second display pixel of the display light-transmitting area 100a through a transparent wire, so as to further improve the light transmittance of the display light-transmitting area 100a.
  • the preparation material of the transparent wire is selected from at least one of indium tin oxide or indium zinc oxide.
  • the second pixel driving circuit 1011 in the pixel driving circuit island 101 and the second display pixel in the transition display area 100b may be electrically connected through metal wires.
  • a second pixel driving circuit 1011 is used to drive at least two of the plurality of second red sub-pixels 100a1, the plurality of second green sub-pixels 100a3 and the plurality of second blue sub-pixels 100a2 , to reduce the number of the second pixel driving circuits 1011 and reduce the space occupied by the plurality of pixel driving circuit islands 101 , so that the size of the display light-transmitting area 100a can be increased or the transition display area 100b has more space.
  • the second pixel driving circuit 1011 can be used to drive sub-pixels that emit the same color light and/or emit different color lights among the plurality of second red sub-pixels 100a1, the plurality of second green sub-pixels 100a3 and the plurality of second blue sub-pixels 100a2 subpixels.
  • the sub-pixels driven by the same second pixel driving circuit 1011 are electrically connected through transparent wires.
  • two adjacent second red sub-pixels 100a1 are driven by the same second pixel driving circuit 1011
  • two adjacent second blue sub-pixels 100a2 are driven by the same second pixel driving circuit 1011
  • four adjacent The second green sub-pixels 100a3 are driven by the same second pixel driving circuit 1011 .
  • a plurality of first signal lines 102 extend from the main display area 100c to the transition display area 100b, and a plurality of second signal lines 103 extend from the main display area 100c to the transition display area 100b.
  • a plurality of first signal lines 102 and the plurality of second signal lines 103 are not disposed in the display light-transmitting area 100a.
  • the materials for preparing the plurality of first signal lines 102 and the plurality of second signal lines 103 are all metals, and metals include but are not limited to molybdenum, aluminum, titanium, and copper.
  • the plurality of first signal lines 102 and the plurality of second signal lines 103 are not disposed in the display light-transmitting area 100a, so that the display light-transmitting area 100a has high light transmittance.
  • the first signal line 102 is a data line, such as the above-mentioned data line D(n), etc., and the data line is used for transmitting data signals.
  • the second signal line 103 is selected from at least one of a scan line, a reset line, and a light-emitting control signal line, such as the scan signal line Scan(n) and the initialization signal line VI and the like.
  • the scan lines are used for transmitting scan signals
  • the reset lines are used for transmitting reset signals and/or initialization signals
  • the light-emitting control signal lines are used for transmitting light-emitting control signals.
  • Each of the first signal lines 102 includes a first connection section 1021 , and the first connection sections 1021 of the plurality of first signal lines 102 are connected to the plurality of pixel driving circuit islands 101 , so that data signals are transmitted to the first connection sections 101 of the plurality of pixel driving circuit islands 101 .
  • Two pixel driving circuits 1011, the first connection segments 1021 of the plurality of first signal lines 102 are disposed between the plurality of pixel driving circuit islands 101 and the display light-transmitting area 100a.
  • the first connection segments 1021 of the plurality of first signal lines 102 are disposed in the plurality of pixel driving circuit islands 101 .
  • the lengths of the first connection sections 1021 of the plurality of first signal lines 102 are reduced, so as to avoid the excessive length of the first connection sections 1021 of the plurality of first signal lines 102 resulting in
  • the impedance difference is relatively large, which further leads to the problem of uneven display of the sub-pixels in the main display area 100c.
  • each first signal line 102 is connected to the pixel driving circuit islands 101 in the first group of pixel driving circuit islands 101a and the corresponding pixel driving circuit islands 101 in the second group of pixel driving circuit islands 101b Then, data signals are transmitted between the pixel driving circuit islands 101 in the first group of pixel driving circuit islands 101a and the corresponding pixel driving circuit islands 101 in the second group of pixel driving circuit islands 101b.
  • Each of the first signal lines 102 further includes a first transition section 1022.
  • the first transition sections 1022 of the plurality of first signal lines 102 are disposed between the plurality of pixel driving circuit islands 101 and the main display area 100c, and are connected with the plurality of pixels The drive circuit island 101 is connected.
  • the first transition sections 1022 of the plurality of first signal lines 102 are disposed between the plurality of pixel driving circuit islands 101 and the main display area 100c, and the layout of the first transition sections 1022 of each first signal line 102 needs to occupy
  • the space between the plurality of pixel driving circuit islands 101 and the main display area 100c is used to complete the transition of the first signal line 102 from the main display area 100c to the transition display area 100b.
  • the plurality of pixel driving circuit islands 101 are disposed closer to the center of the display light-transmitting area 100a to ensure that the second pixel driving circuit 1011 in the pixel driving circuit island 101 of the second display pixel corresponding to the center position of the display light-transmitting area 100a The second display pixel at the center position can be driven.
  • At least part of the first transition section 1022 includes a sector section 10221 and a straight section 10222 connected with the sector section 10221.
  • the sector sections 10221 of the plurality of first transition sections 1022 are gathered and distributed in a sector shape, narrowing to form a set of first signals
  • the line 102 is connected to the pixel driving circuit island 101 through the straight line sections 10222 of the plurality of first transition sections 1022 .
  • the second signal lines 103 extending to the transition display area 100b are divided into multiple groups, and each group is connected to the corresponding pixel driving circuit island 101 in series, so that control signals (scanning signal, lighting control signal, initialization signal, reset signal) are transmitted to each other in series connected to the pixel drive circuit island 101 .
  • Each second signal line 103 includes a second connection segment 1031 connecting two adjacent pixel driving circuit islands 101 in the first group of pixel driving circuit islands 101a and the second group of pixel driving circuit islands 101b, and the second connection segment 1031 may be Straight line, polyline or arc.
  • Each second signal line 103 further includes a second transition section 1032, and the second transition sections 1032 of the plurality of second signal lines 103 are disposed between the plurality of pixel driving circuit islands 101 and the main display area 100c, wherein the second transition section 1032 The segment 1032 is obtained by switching the second signal line 103 of the main display area 100c.
  • each pixel driving circuit island 101 is electrically connected to at least two of the plurality of first signal lines 102, and It is electrically connected to at least two of the plurality of second signal lines 103, so that the plurality of first signal lines 102 need to be adjusted when extending to the transition display area 100b and are divided into groups of first signal lines 102, each group of first signal lines 102
  • the line 102 is connected to a pixel driving circuit island 101, and a plurality of second signal lines 103 need to be changed when extending to the transition display area 100b and are divided into multiple groups, each group of second signal lines 103 is connected in series with a plurality of pixel driving circuit islands 101.
  • the display device has a clear demarcation between the transition display area 100b and the main display area 100c under the condition of no screen and strong light irradiation.
  • the reason is that the transition display area 100b and the main display area 100c
  • the metal coverage area per unit area is different, resulting in different reflectivity to light of the transition display area 100b and the main display area 100c.
  • the metal coverage area per unit area of the main display area 100c is larger, and the metal coverage area per unit area of the transition display area 100b is larger.
  • the area is relatively small, and the reason why the metal coverage area per unit area of the transition display area 100b is small is because the metal coverage area at the gaps between the plurality of second pixel driving circuits 1011 is small.
  • the present application is provided with a metal reflection part 105 in the transition display area 100b of the display device, and the metal reflection part 105 is located at least in the gap between the plurality of second pixel driving circuits 1011 , thereby improving the distance between the plurality of second pixel driving circuits 1011 .
  • the reflectivity at the gap between the transition display area 100b and the main display area 100c is close to the metal coverage area per unit area, so that the reflectivity of the transition display area 100b and the main display area 100c are close to avoid the display device in the closed screen and Under the condition of strong light irradiation, a clear boundary appears between the main display area 100c and the transition display area 100b.
  • the metal reflection portion 105 may be a part or a plurality of any one of the above-mentioned patterned first metal layer 1042 , the above-mentioned patterned second metal layer 1043 , the above-mentioned patterned third metal layer 1044 , and the above-mentioned patterned fourth metal layer 1045 combination, the metal reflection part 105 may also be a newly added metal film layer in addition to the above four patterned metal layers.
  • the metal reflection portion 105 transmits a DC voltage signal, and the DC voltage signal is selected from an initialization signal or a power supply signal, so as to prevent the metal reflection portion 105 from being in a floating state.
  • the initialization signal is the signal transmitted by the above-mentioned initialization signal line VI.
  • the power supply signal may be a DC power supply signal VDD or the like.
  • the DC voltage signal is a power supply signal input to the plurality of first pixel driving circuits 104 and/or the plurality of second pixel driving circuits 1011 .
  • FIG. 12 is a schematic cross-sectional view of the first type of display device
  • FIG. 13 is the position of the hollow part in the metal reflection part corresponding to the position of the low-reflection stack part in the plurality of first pixel driving circuits schematic diagram.
  • the display device includes a driving transistor M1, a second light-emitting control transistor M6, a capacitor, a gate lead 10443, a DC power signal line VDD, a first anode lead 10444, a second anode lead 10452, and a metal grid 10451 disposed in the transition display area 100b and the metal reflector 105 .
  • the display device further includes an organic light emitting diode OLED disposed in the display light-transmitting region 100a.
  • the driving transistor M1 includes a driving active layer disposed on the substrate 111, the driving active layer is a part of the above-mentioned patterned active layer 1041, and the driving active layer includes a driving channel M11a, a driving source M11b and a driving drain M11c, The driving source M11b and the driving drain M11c are semiconductors obtained by doping and then conducting.
  • the driving transistor M1 further includes a driving gate M12, which is set corresponding to the driving channel M11a, and is also the lower plate C1 of the capacitor.
  • the driving gate M12 is a part of the patterned first metal layer 1042 described above.
  • a first insulating layer 106 is disposed between the driving gate M12 and the driving active layer.
  • the second light emission control transistor M6 includes a second light emission control active layer and a second light emission control gate.
  • the second light emission control active layer and the driving active layer are arranged in the same layer, and the second light emission control active layer includes a second light emission control active layer.
  • the second control gate and the driving gate M12 are disposed in the same layer and corresponding to the second light-emitting control channel M61a.
  • the capacitor includes an upper electrode plate C2 and a lower electrode plate C1, a second insulating layer 107 is disposed between the upper electrode plate C2 and the lower electrode plate C1, and the upper electrode plate C2 and the lower electrode plate C1 are disposed correspondingly.
  • the upper plate C2 is a part of the above-mentioned patterned second metal layer 1043 .
  • the gate lead 10443 is located just above the upper plate C2, the gate lead 10443 is a part of the above-mentioned patterned third metal layer 1044, a third insulating layer 108 is arranged between the gate lead 10443 and the upper plate C2, and the gate
  • the lead 10443 is electrically connected to the lower plate C1 through vias penetrating the third insulating layer 108 , the upper plate C2 and the second insulating layer 107 , so as to be electrically connected to the gate M12 of the driving transistor M1 .
  • the first anode lead 10444 is disposed on the same layer as the gate lead 10443 and the DC power signal line VDD.
  • the first anode lead 10444 is a part of the patterned third metal layer 1044.
  • the first anode lead 10444 and the second light-emitting control drain M61c of the second light-emitting control transistor M6 pass through the third insulating layer 108 and the second insulating layer 107. And the via holes of the first insulating layer 106 are electrically connected.
  • the second anode lead 10452 is a part of the patterned fourth metal layer 1045 , and the second anode lead 10452 is disposed on the same layer as the metal grid 10451 .
  • a fourth insulating layer 109 is disposed between the second anode lead 10452 and the first anode lead 10444 , and the second anode lead 10452 is electrically connected to the first anode lead 10444 through a via hole on the fourth insulating layer 109 .
  • a plurality of transparent wires 1046 are disposed above the plurality of second pixel driving circuits 1011, and the plurality of transparent wires 1046 are connected between the second anode lead 10452 and the anode 1047 of the organic light emitting diode OLED.
  • the partially transparent wires 1046 are disposed in the transition display area 100b, and the partially transparent wires 1046 extend from the transition display area 100b to the display light-transmitting area 100a, so that the second pixel driving circuit 1011 of the transition display area 100b can drive the sub-sections of the display light-transmitting area 100a. pixel, and improve the light transmittance of the display light-transmitting area 100a.
  • a fifth insulating layer 110 is disposed between the transparent wire 1046 and the patterned fourth metal layer 1045 , and the fifth insulating layer 110 is an organic insulating layer.
  • an organic insulating layer is also provided between the transparent wires 1046 on adjacent film layers.
  • the width of each transparent wire 1046 is greater than or equal to 1 ⁇ m, and the spacing between adjacent transparent wires 1046 in the same layer is greater than or equal to 2 ⁇ m, so as to avoid short circuits between the transparent wires 1046 .
  • the metal reflection part 105 and the metal mesh 10451 are disposed in the same layer, and the metal reflection part 105 is connected with the metal mesh 10451 .
  • the metal reflection part 105 and the metal grid 10451 are obtained through the same patterning process. Since the patterned first metal layer 1042 , the patterned second metal layer 1043 and the patterned third metal layer 1044 are mainly used for laying out the devices or wirings of the driving circuit, the space for setting the metal reflective portion of a specific shape in these layers is limited. However, there is enough space in the patterned fourth metal layer 1045 to arrange the metal reflection part 105 .
  • the preparation material of the metal reflection part 105 may include at least one of molybdenum, aluminum, titanium, and copper.
  • the metal reflection part 105 may be a Ti layer/Al layer/Ti layer, and the metal reflection part 105 may also be a Mo layer.
  • the metal grid 10451 is located above the plurality of power supply DC signal lines VDD. Since the metal grid 10451 is electrically connected to the power supply DC signal line VDD, the metal reflection portion 105 is electrically connected to a plurality of power supply DC signal lines VDD, so that the metal reflection portion 105 transmits DC voltage signals, so as to prevent the metal reflection portion 105 from being disconnected.
  • the incoming signal floats and affects the operation of the circuit, and the metal reflector 105 transmits the DC power signal to further improve the resistance voltage drop during the transmission of the DC power signal.
  • the metal reflective portion 105 includes at least one hollow portion, so that the reflectivity of the hollow portion of the metal reflective portion 105 is low and the reflectivity of other positions of the metal reflective portion 105 is high, and the metal reflective portion 105 of the transition display area 100b and the main display area are
  • the plurality of first pixel driving circuits 104 of 100c all have high reflectivity areas and low reflectivity areas, which is beneficial for the reflectivity of the two to tend to be the same, and improves the demarcation problem that occurs when the display device is illuminated by strong light.
  • the metal reflection portion 105 belongs to the same film layer, the hollow portion may be located in the same film layer.
  • the metal reflection part 105 is located in different film layers, the hollow part may be located in one or more film layers.
  • the metal reflection part 105 includes a plurality of hollow parts, and the positions of the plurality of hollow parts in the metal reflection part 105 correspond to the positions of some low-reflection stacked parts in the plurality of first pixel driving circuits 104 , so that the reflection in the metal reflection part 105 is improved.
  • the rate distribution tends to be the same as the reflectivity distribution in the plurality of first pixel driving circuits 104 .
  • the positions of the plurality of hollowed-out portions in the metal reflection portion 105 correspond to the positions of some of the low-reflection stacked portions in the plurality of first pixel driving circuits 104 , and refer to the positions of the plurality of hollowed-out portions in the metal reflection portion 105 and some of the low-reflective stacked portions.
  • the positions of the plurality of first pixel driving circuits 104 are the same, and the hollow portions and some of the low-reflection stacking portions may be arranged side by side as shown in FIG. 13 , or may be arranged stagg
  • At least one hollowed-out portion and part of the low-reflection stacked portion are arranged side by side, so that the positional distribution of the hollowed-out portion with low reflectivity in the metal reflective portion 105 and the low-reflective stacked portion with low reflectance are distributed in the plurality of first pixel driving circuits 104
  • the positional distribution of the metal reflection portion 105 tends to be the same, and the reflectance distribution of the metal reflection portion 105 and the reflectance distribution of the plurality of first pixel driving circuits 104 tend to be the same, which further improves the demarcation of the display device when the screen is closed and the display device is illuminated by strong light. question.
  • the shape of the orthographic projection of the low-reflection stacking portion on the substrate 111 of the display device is the same as or similar to the shape of the orthographic projection of the hollowed-out portion on the substrate 111 of the display device, so as to further
  • the reflectivity of the metal reflection portion 105 is made to be the same as the reflectivity of the plurality of first pixel driving circuits 104 .
  • the area of the orthographic projection of the hollows on the substrate 111 of the display device is equal to the area of the orthographic projection of the low-reflection stacks on the substrate 111 of the display device, so as to further reflect the metal
  • the reflectivity of the portion 105 tends to be the same as the reflectivity of the plurality of first pixel driving circuits 104 .
  • the shape of the orthographic projection of the at least one hollow portion on the substrate 111 of the display device is selected from at least one of a rectangle, a trapezoid, and an irregular shape.
  • the shape is a regular pattern such as a rectangle and a trapezoid, it is easier to achieve patterning in the process; when the shape is an irregular pattern, it is more conducive to the shape of the orthographic projection of the hollow portion on the substrate 111 of the display device and the low-reflection stacked portion on the substrate.
  • the shape of the orthographic projection on 111 matches.
  • the distance between two adjacent hollow-out parts is equal to the distance between two adjacent low-reflection stacked parts.
  • the at least one hollow portion 105 includes a first hollow portion 1051a, a second hollow portion 1051b and a third hollow portion 1051c.
  • the area of the first hollow portion 1051a is larger than that of the second hollow portion 1051b, and the area of the second hollow portion 1051b is larger than that of the second hollow portion 1051b.
  • larger than the area of the third hollow portion 1051c; the first low-reflection stack portion 104a and the first hollow portion 1051a are arranged side by side
  • the second low-reflection stack portion 104b and the second hollow portion 1051b are arranged side by side
  • the three hollow parts 1051c are arranged side by side.
  • the shapes of the first hollow portion 1051a, the second hollow portion 1051b and the third hollow portion 1051c are all rectangular, which is beneficial to simplify the manufacturing process. It can be understood that the shapes of the first hollow portion 1051a, the second hollow portion 1051b and the third hollow portion 1051c can also be based on the shapes of the first low-reflection stacking portion 104a, the second low-reflection stacking portion 104b and the third low-reflective stacking portion 104c. The shape of the blank stack can be adjusted. It should be noted that some metals in the first low-reflection stack part 104a, the second low-reflection stack part 104b and the third low-reflection stack part 104c in FIG. 13 are not shown. The low reflection stack portion 104b and the third low reflection stack portion 104c are shown in FIG. 7 .
  • the reflectance distribution of the metal reflection part 105 is similar to that of the main display area 100c, which is beneficial to avoid the main display area 105 A clear difference in reflectance distribution occurs between the transition display region 100b.
  • part of the metal reflection part 105 surrounds the plurality of pixel driving circuit islands 101 and is disposed between the plurality of pixel driving circuit islands 101 and the main display area 100 c , and part of the metal reflection part 105 is disposed in the plurality of pixel driving circuit islands 100 c Between the circuit island 101 and the display light-transmitting area 100a, a part of the metal reflective portion 105 is disposed between two adjacent pixel driving circuit islands 101, so that the transition display area 100b except the area where the plurality of pixel driving circuit islands 101 are arranged All the outer regions are provided with metal reflection parts 105 .
  • the boundary of the metal reflection part 105 close to the display light transmission area 100a includes an arc-shaped boundary, and the boundary of the metal reflection part 105 close to the main display area 100c includes a stepped boundary, so as to adapt to the boundary between the transition display area 100b and the display light transmission area 100a: It is circular and the boundary between the transition display area 100b and the main display area 100c is stepped, so that the reflectivity at the boundary matches that of other locations.
  • the proportion of the orthographic projection of the metal in the metal reflection part 105 on the substrate 111 of the display device per unit area and the proportion of the orthographic projection of the metal in the plurality of first pixel driving circuits 104 on the substrate 111 of the display device per unit area The absolute value of the difference between the ratios is greater than or equal to 0% and less than or equal to 6%, so that the reflectivity of the metal reflection part 105 of the transition display area 100b is close to that of the main display area 100c, so as to prevent the display device from being on the dead screen. And there is a clear demarcation effect under strong light irradiation.
  • the absolute value of the difference can be 1%, 2%, and 3%.
  • FIG. 14 is a second schematic cross-sectional view of the display device.
  • the display device shown in FIG. 14 is similar to the display device substrate shown in FIG. 12 , except that the metal reflection part 105 and the anodes 1047 of the plurality of organic light emitting diodes OLED are disposed in the same layer, and the metal reflection part 105 and the plurality of organic light emitting diodes are arranged in the same layer.
  • the anodes 1047 of the OLED are insulated so that the reflectivity of the transition display area 100b and the main display area 100c are close to each other.
  • the metal reflector 105 and the anodes 1047 of the organic light emitting diodes OLED are patterned and fabricated through the same process.
  • the metal reflection part 105 is a stack of an indium tin oxide layer, a silver layer, and an indium tin oxide layer. Compared with the metal reflective portion 105 disposed on the patterned fourth metal layer 1045 and connected to the DC power signal, the metal reflective portion 105 and the anode 1047 are disposed in the same layer and not connected to a fixed voltage will cause the metal reflective portion 105 to be in a floating state. It increases the risk that the metal reflection part 105 affects the normal operation of the circuit.
  • the distance between the metal reflection part 105 and the anodes 1047 of the organic light emitting diodes OLED is greater than or equal to 3 microns to avoid short circuit between the metal reflection part 105 and the anodes 1047 of the organic light emitting diodes OLED.
  • the present application also provides an electronic device, the electronic device includes the above-mentioned display device and a photosensitive unit, and the photosensitive unit is disposed corresponding to the display light-transmitting area 100a of the display device.
  • the photosensitive unit is a camera. Since the display light-transmitting area 100a of the display device has high light transmittance, the photographing effect of the camera can be ensured; and the display light-transmitting area 100a of the display device has second display pixels, and the display light-transmitting area 100a can also be displayed.
  • the metal reflective portion 105 at least in the gaps between the plurality of second pixel driving circuits 1011 in the transition display area 100b, it is possible to prevent the electronic equipment from being between the main display area 100c and the transition display area 100b under the condition of no screen and strong light irradiation. There is a clear demarcation problem.

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Abstract

一种显示装置（100）及电子设备，显示装置（100）通过在过渡显示区（100b）中多个第二像素驱动电路（1011）之间的间隙设置金属反射部（105），以使得过渡显示区（100b）的反射率与主显示区（100c）的反射率接近，避免主显示区（100c）和过渡显示区（100b）在息屏且强光照射下出现明显的分界效果。

Description

显示装置及电子设备 技术领域
本申请涉及显示技术领域，尤其涉及一种显示装置及电子设备。
 背景技术
如图1所示，其为传统有机发光二极管（Active Metrix Organic Light Emitting Diode，AMOLED）显示面板的示意图。有机发光二极管显示面板包括正常显示区A、过渡显示区B以及透光显示区C，过渡显示区B位于透光显示区C和正常显示区A之间。在过渡显示区B设置有多个像素驱动电路以及对应的金属信号线，位于过渡显示区B的部分像素驱动电路用于驱动透光显示区C中的显示像素，且过渡显示区B中驱动透光显示区C中显示像素的像素驱动电路与透光显示区C中的显示像素之间通过透明导线电性连接，使得透光显示区C中显示像素对应的像素驱动电路及对应的金属信号线设置于透光显示区C之外，保证透光显示区C的透光率，使透光显示区C具有摄像以及显示的双重功能。另外，在正常显示区A中设置有多个阵列排布的显示像素以及对应的像素驱动电路，以实现显示。然而，在有机发光二极管显示面板处于息屏状态时，且在强光照射有机发光显示面板的条件下，过渡显示区与正常显示区之间会出现明显的分界问题。
因此，有必要提出一种技术方案以解决过渡显示区和正常显示区在显示面板处于息屏且强光照射的条件下会出现明显分界的问题。
 技术问题
本申请的目的在于提供一种显示面板及电子设备，以解决处于息屏且强光照射的条件下，过渡显示区和正常显示区在显示面板会出现明显分界的问题。
 技术解决方案
为实现上述目的，本申请提供一种显示装置，所述显示装置具有主显示区、过渡显示区以及显示透光区，所述过渡显示区位于所述主显示区和所述显示透光区之间，所述显示装置包括：
多个第一显示像素，设置于所述主显示区；
多个第二显示像素，设置于所述过渡显示区和所述显示透光区；
多个第一像素驱动电路，阵列地设置于所述主显示区，且用于驱动多个所述第一显示像素；
多个第二像素驱动电路，设置于所述过渡显示区，且用于驱动多个所述第二显示像素；以及
金属反射部，设置于所述过渡显示区，且所述金属反射部至少位于多个所述第二像素驱动电路之间的间隙。
本申请还提供一种电子设备，所述电子设备包括上述显示装置及感光单元，所述感光单元对应所述显示装置的所述显示透光区设置。
有益效果：本申请提供一种显示装置及电子设备，通过在过渡显示区中多个第二像素驱动电路之间的间隙设置金属反射部，以使得过渡显示区的反射率与主显示区的反射率接近，避免主显示区和过渡显示区在息屏且强光照射下出现明显的分界效果。
 有益效果
本申请提供一种显示装置及电子设备，通过在过渡显示区中多个第二像素驱动电路之间的间隙设置金属反射部，以使得过渡显示区的反射率与主显示区的反射率接近，避免在息屏且强光照射下主显示区和过渡显示区出现明显的分界效果。
 附图说明
图1为传统有机发光二极管显示面板的示意图；
图2为本申请实施例显示装置的平面示意图；
图3为图2所示显示装置中第一显示像素和第二显示像素的分布示意图；
图4为图2所示显示装置的局部放大示意图；
图5为图4所示第一像素驱动电路的等效电路图；
图6为第一像素驱动电路对应的驱动时序图；
图7为相邻两个第一像素驱动电路的平面示意图；
图8为图2所示显示装置的主显示区、过渡显示区以及显示透光区的局部放大示意图；
图9为图8中像素驱动电路岛的示意图；
图10为像素驱动电路岛中的第二像素驱动电路及第二像素驱动电路正上方图案化第四金属层的平面示意图；
图11为显示装置的过渡显示区设置金属反射部的局部放大示意图；
图12为显示装置的第一种截面示意图；
图13为镂空部在金属反射部中的位置对应部分低反射堆叠部在多个第一像素驱动电路中的位置的示意图；
图14为显示装置的第二种截面示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请提供一种显示装置100，显示装置100可以为液晶显示装置，也可以为有机发光二极管显示装置。具体地，显示装置100为有机发光二极管显示装置。
请参阅图2及图3，图2为本申请实施例显示装置的平面示意图，图3为图2所示显示装置中第一显示像素和第二显示像素的分布示意图。显示装置100具有显示透光区100a、主显示区100c以及过渡显示区100b。显示装置100包括多个第一显示像素、多个第一像素驱动电路104、多个第二显示像素、多个像素驱动电路岛101、多个第一信号线102、多个第二信号线103以及金属反射部105。
过渡显示区100b设置于显示透光区100a和主显示区100c之间。主显示区100c和过渡显示区100b均用于显示。显示透光区100a用于显示的同时，还具有高透光特性。显示透光区100a的透光率大于主显示区100c和过渡显示区100b的透光率。主显示区100c的面积大于过渡显示区100b的面积以及显示透光区100a的面积。
显示透光区100a具有弧形边界，显示透光区100a的形状为椭圆形、圆形、倒角正方形或者其他形状。过渡显示区100b为环形。过渡显示区100b为椭圆环形、圆环形或者正方环形中的任意一种。
具体地，显示透光区100a为圆形。显示透光区100a关于第一对称轴A-A和第二对称轴B-B对称设置，第一对称轴A-A与第二对称轴B-B垂直。过渡显示区100b为环形，过渡显示区100b靠近显示透光区100a的边界为圆形，过渡显示区100b靠近主显示区100c的边界呈台阶形。
如图3所示，多个第一显示像素均匀地设置于主显示区100c，每个第一显示像素包括第一红色子像素100c1、第一绿色子像素100c3以及第一蓝色子像素100c2。第一红色子像素100c1、第一绿色子像素100c3以及第一蓝色子像素100c2在主显示区100c呈Pentile设计分布。第一绿色子像素100c3的形状为椭圆形，第一红色子像素100c1和第一蓝色子像素100c2均呈八边形。第一显示像素的每个子像素包括有机发光二极管OLED。
如图4所示，图4为图2所示显示装置的局部放大示意图，多个第一像素驱动电路104阵列地设置于主显示区100c。一个第一像素驱动电路104对应驱动主显示区100c的一个子像素（第一红色子像素100c1、第一绿色子像素100c3以及第一蓝色子像素100c2中的一个）发光。多个第一像素驱动电路104在主显示区100c和过渡显示区100b之间的交界处呈台阶形分布，以适应主显示区100c的第一显示像素的子像素在主显示区100c和过渡显示区100b之间的交界处呈台阶形分布。
如图5-图6所示，图5为图4所示第一像素驱动电路的等效电路图，图6为第一像素驱动电路对应的驱动时序图，图7为相邻两个第一像素驱动电路的平面示意图。每个第一像素驱动电路包括驱动晶体管M1、开关晶体管M2、补偿晶体管M3、初始化晶体管M4、第一发光控制晶体管M5、第二发光控制晶体管M6、阳极复位晶体管M7以及电容器C，即第一像素驱动电路104为7T1C电路。驱动晶体管M1、开关晶体管M2、补偿晶体管M3、初始化晶体管M4、第一发光控制晶体管M5、第二发光控制晶体管M6以及阳极复位晶体管M7均为P型晶体管。
显示装置100还包括多个与第一像素驱动电路104电性连接的走线，多个走线包括设置于主显示区100c的第i-1级扫描信号线SCAN（i-1）、第i级扫描信号线SCAN（i）、数据线D(j)、数据线D(j+1)、初始化信号线VI、直流电源信号线VDD以及第i级发光控制信号线EM（i）。第i-1级扫描信号线SCAN（i-1）用于传输第i-1级扫描信号。第i级扫描信号线SCAN（i）用于传输第i级扫描信号。数据线D(j)以及D(j+1)数据线用于传输数据信号。直流电源信号线VDD用于传输直流电源信号。第i级发光控制信号线EM（i）用于传输第i级发光控制信号。以下结合图5以及图6对相邻两个第一像素驱动电路104中与数据线D(j)连接的第一像素驱动电路104进行描述。
驱动晶体管M1的栅极G1与电容器C的第一极板C1、补偿晶体管M3的漏极D3以及初始化晶体管M4的源极S4连接，驱动晶体管M1的源极S1通过第一发光控制晶体管M5与直流电源信号线VDD连接，且驱动晶体管M1的源极S1通过开关晶体管M2与数据线D(j)连接，驱动晶体管M1的漏极D1通过第二发光控制晶体管M6与有机发光二极管OLED连接。开关晶体管M2打开，驱动晶体管M1接收数据线D(j)传输的数据信号且为有机发光二极管OLED提供驱动电流。
开关晶体管M2的栅极G2与第i级扫描信号线SCAN（i）连接，开关晶体管M2的源极S2与数据线D（j）连接，开关晶体管M2的漏极D2与驱动晶体管M1的源极S1连接，开关晶体管M2的漏极D2还通过第一发光控制晶体管M5与直流电源信号线VDD连接。开关晶体管M2根据第i级扫描信号线SCAN（i）传输的第i级扫描信号导通或截止，控制数据线D(j)传输的数据信号是否写入至驱动晶体管M1的源极S1。
补偿晶体管M3的栅极G3与第i级扫描信号线SCAN（i）连接，补偿晶体管M3的源极S3与驱动晶体管M1的漏极D1连接，补偿晶体管M3的源极S3还通过第二发光控制晶体管M6与有机发光二极管OLED连接，补偿晶体管M3的漏极D3与驱动晶体管M1的栅极G1、初始化晶体管M4的源极S4以及电容器C的第一极板C1连接。补偿晶体管M3根据第i级扫描信号线SCAN（i）传输的第i级扫描信号导通或截止，电性连接驱动晶体管M1的栅极G1和驱动晶体管M1的漏极D1。
初始化晶体管M4的栅极G4与第i-1级扫描信号线SCAN（i-1）连接，初始化晶体管M4的漏极D4与阳极复位晶体管M7的漏极D7以及初始化信号线VI连接，初始化晶体管M4的源极S4与驱动晶体管M1的栅极G1、补偿晶体管M3的漏极D3以及电容器C的第一极板C1连接。初始化晶体管M4根据第i-1级扫描信号线SCAN（i-1）传输的第i-1级扫描信号导通或截止，控制初始化信号线VI传输的初始化信号是否写入至驱动晶体管M1的栅极G1。
第一发光控制晶体管M5的栅极G5与第i级发光控制信号线EM（i）连接，第一发光控制晶体管M5的源极S5与直流电源信号线VDD以及电容器C的第二极板C2连接，第一发光控制晶体管M5的漏极D5与驱动晶体管M1的源极S1以及开关晶体管M2的漏极D2连接。第一发光控制晶体管M5根据第i级发光控制信号线EM（i）传输的第i级发光控制信号导通或截止，控制直流电源信号线VDD传输的直流电源信号传输是否写入至驱动晶体管M1的源极S1。
第二发光控制晶体管M6的栅极G6与第i级发光控制信号线EM（i）连接，第二发光控制晶体管M6的源极S6与驱动晶体管M1的漏极D1以及补偿晶体管M3的源极S3连接，第二发光控制晶体管M6的漏极D6与有机发光二极管OLED的阳极以及阳极复位晶体管M7的源极S7连接。第二发光控制晶体管M6根据第i级发光控制信号线EM（i）传输的第i级发光控制信号导通或截止，控制驱动电流是否流入到有机发光二极管OLED。
阳极复位晶体管M7的栅极G7与第i级扫描信号线SCAN（i）连接，阳极复位晶体管M7的漏极D7与初始化晶体管M4的漏极D4以及初始化信号线VI连接，阳极复位晶体管M7的源极S7与有机发光二极管OLED的阳极以及第二发光控制晶体管M6的漏极D6连接。阳极复位晶体管M7根据第i级扫描信号线SCAN（i）传输的第i级扫描信号导通或截止，控制初始化信号线VI传输的初始化信号是否写入至有机发光二极管OLED的阳极。
电容器C的第一极板C1与驱动晶体管M1的栅极G1、初始化晶体管M4的源极S4以及补偿晶体管M3的漏极D3连接，电容器C的第二极板C2与直流电源信号线VDD以及第一发光控制晶体管M5的源极S5连接。电容器C用于维持驱动晶体管M1驱动有机发光二极管OLED发光时驱动晶体管M1的栅极的电压。
请结合图6，在初始化阶段t1，第i-1级扫描信号线SCAN（i-1）输入低电平的第i-1级扫描信号，初始化晶体管M4导通，初始化信号线VI传输的初始化信号传输至驱动晶体管M1的栅极G1，实现对驱动晶体管M1的栅极G1的初始化；第i级扫描信号线SCAN（i）输入高电平的第i级扫描信号，开关晶体管M2、补偿晶体管M3以及阳极复位晶体管M7均截止；第i级发光控制信号线EM（i）输入高电平的第i级发光控制信号，第一发光控制晶体管M5和第二发光控制晶体管M6均截止。
在阈值电压补偿及数据电压写入阶段t2，第i-1级扫描信号线SCAN（i-1）输入高电平的第i-1级扫描信号，初始化晶体管M4截止；第i级扫描信号线SCAN（i）输入低电平的第i级扫描信号，开关晶体管M2、补偿晶体管M3以及阳极复位晶体管M7均导通，导通的补偿晶体管M3使驱动晶体管M1的栅极G1和驱动晶体管M1的漏极D1电性连接，导通的开关晶体管M2将数据线D(j)传输的数据信号写入至驱动晶体管M1的源极S1，导通的阳极复位晶体管M7将初始化信号线VI传输的初始化信号输出至有机发光二极管OLED的阳极，实现驱动晶体管M1的阈值电压的补偿、数据信号的写入以及有机发光二极管OLED的阳极的初始化；第i级发光控制信号线EM（i）输入高电平的第i级发光控制信号，第一发光控制晶体管M5和第二发光控制晶体管M6均截止。
在发光阶段t3，第i-1级扫描信号线SCAN（i-1）输入高电平的第i-1级扫描信号，初始化晶体管M4截止；第i级扫描信号线SCAN（i）输入高电平的第i级扫描信号，开关晶体管M2、补偿晶体管M3以及阳极复位晶体管M7均截止；第i级发光控制信号线EM（i）输入低电平的第i级发光控制信号，第一发光控制晶体管M5和第二发光控制晶体管M6均导通，驱动晶体管M1导通且输出驱动电流，有机发光二极管OLED发光。
请结合图7，显示装置包括图案化有源层1041、图案化第一金属层1042、图案化第二金属层1043、图案化第三金属层1044，图案化第一金属层1042位于图案化有源层1041的一侧，图案化第二金属层1043位于图案化第一金属层1042远离图案化有源层1041的一侧，图案化第三金属层1044位于图案化第二金属层1043远离图案化第一金属层1042的一侧。图案化有源层1041和图案化第一金属层1042之间设置有第一绝缘层，图案化第一金属层1042和图案化第二金属层1043之间设置有第二绝缘层，图案化第二金属层1043和图案化第三金属层1044之间设置有第三绝缘层。图案化第一金属层1042、图案化第二金属层1043以及图案化第三金属层1044的制备材料包括但不限于钼、铝、钛以及铜中的至少一种。图案化第一金属层1042、图案化第二金属层1043以及图案化第三金属层1044均能反射光。第一绝缘层、第二绝缘层以及第三绝缘层均为无机绝缘层，无机绝缘层的制备材料选自氧化硅或氮化硅中的至少一种。
图案化有源层1041包括第一像素驱动电路104的7个晶体管的沟道以及源漏电极。图案化第一金属层1042包括第i级扫描信号线SCAN（i）、第i-1级扫描信号线SCAN（i-1）、第i级发光控制信号线EM（i）以及电容器C的第一极板C1(驱动晶体管M1的栅极)。图案化第二金属层1043包括初始化信号线VI、金属屏蔽构件10431以及电容器C的第二极板C2。金属屏蔽构件10431与直流电源信号线VDD电性连接以导入直流电源信号。图案化第三金属层1044包括数据线D(j)、数据线D(j+1)、直流电源信号线VDD、第一初始化引线10441、第二初始化引线10442、栅极引线10443以及阳极引线10444。其中，第一初始化引线10441连接于初始化信号线VI以及初始化晶体管M4的漏极之间，第二初始化引线10442连接于初始化信号线VI以及阳极复位晶体管M7的漏极之间，栅极引线10443连接于第一极板C1以及补偿晶体管M3的漏极之间，阳极引线10444连接于有机发光二极管的阳极以及第二发光控制晶体管M6的漏极之间。
多个第一像素驱动电路104由具有高反射率的金属层、低反射率的绝缘层以及低反射率的半导体层堆叠而成，且第一像素驱动电路104中的金属在一些区域分布密集而在另外一些区域分布稀疏，导致第一像素驱动电路104中存在高反射率区域以及低反射率区域，第一像素驱动电路104的低反射率区域的反射率小于第一像素驱动电路104的高反射率区域的反射率。多个第一像素驱动电路104包括多个低反射堆叠部，多个第一像素驱动电路104的多个低反射堆叠部的反射率小于多个第一像素驱动电路104除多个低反射堆叠部之外的部分的反射率。每个低反射堆叠部由组成第一像素驱动电路104的多个膜层堆叠而成。低反射堆叠部中的金属分布密度小于多个第一像素驱动电路104其他部分的金属分布密度。每个低反射堆叠部包括不设置金属的空白堆叠部。每个低反射堆叠部可以为完全不设置金属的空白堆叠部，也可以包括少量金属。低反射堆叠部在显示装置的基板上的正投影的形状为矩形、梯形或者不规则图形。
具体地，如图7所示，多个第一像素驱动电路104包括呈阵列式分布的多个第一低反射堆叠部104a、多个第二低反射堆叠部104b以及多个第三低反射堆叠部104c。多个第一低反射堆叠部104a、多个第二低反射堆叠部104b以及多个第三低反射堆叠部104c均包括空白堆叠部，空白堆叠部位于不设置金属膜层的区域，即空白堆叠部中的金属在显示装置的基板上的正投影的面积等于0。其中，第一低反射堆叠部104a为相邻两个第一像素驱动电路104对应第一区域的部分，第一区域由相邻两个直流电源信号线VDD、第i级发光控制信号线EM（i）以及与第i级发光控制信号线EM（i）相邻的初始化信号线VI围合而成，第一低反射堆叠部104a包括数据线D（j+1）的部分。第二低反射堆叠部104b为相邻两个第一像素驱动电路104对应第二区域的部分，第二区域由相邻两个直流电源信号线VDD、第i-1级扫描信号线SCAN（i-1）、与第i-1级扫描信号线SCAN（i-1）相邻的第i级扫描信号线SCAN（i）以及位于第i-1级扫描信号线SCAN（i-1）和第i级扫描信号线SCAN（i）之间的金属屏蔽构件10431围合而成。第二低反射堆叠部104b也包括数据线D（j+1）的部分。第三低反射堆叠部104c为相邻两个第一像素驱动电路104对应第三区域的部分，第三区域由第i级发光控制信号线EM（i）、与第i级发光控制信号线EM（i）相邻的第i级扫描信号线SCAN（i）、数据线D(j+1)以及靠近数据线D(j+1)的图案化有源层1041围合而成。第三低反射堆叠部104c不包括金属。第一低反射堆叠部104a、第二低反射堆叠部104b以及第三低反射堆叠部104c均为矩形。相邻两个第一像素驱动电路104中，一个第三低反射堆叠部104c设置在一个第一低反射堆叠部104a以及第二低反射堆叠部104b之间。
每个第一低反射堆叠部104a中的空白堆叠部在显示装置的基板上的正投影的面积大于每个第二低反射堆叠部104b中的空白堆叠部在基板上的正投影的面积，每个第二低反射堆叠部104b中的空白堆叠部在基板上的正投影的面积大于每个第三低反射堆叠部104c中的空白堆叠部在基板上的正投影的面积。主显示区100c除了多个第一低反射堆叠部104a的空白堆叠部、多个第二低反射堆叠部104b的空白堆叠部以及多个第三低反射堆叠部104c的空白堆叠部的反射率很低之外，其他区域的反射率由于布设金属层导致反射率较高。
结合图2以及图3，多个第二显示像素均匀地设置于显示透光区100a和过渡显示区100b。每个第二显示像素包括第二红色子像素100a1、第二绿色子像素100a3以及第二蓝色子像素100a2。第二红色子像素100a1、第二绿色子像素100a3以及第二蓝色子像素100a2在显示透光区100a和过渡显示区100b均呈Pentile设计分布。第二红色子像素100a1、第二绿色子像素100a3以及第二蓝色子像素100a2的形状均为圆形。第二红色子像素100a1、第二绿色子像素100a3以及第二蓝色子像素100a2均包括有机发光二极管。
第一红色子像素100c1的尺寸大于第二红色子像素100a1的尺寸，第一绿色子像素100c3的尺寸大于第二绿色子像素100a3的尺寸，第一蓝色子像素100c2的尺寸大于第二蓝色子像素100a2的尺寸，以保证显示透光区100a具有高透光率。由于一个第二红色子像素100a1与一个第一红色子像素100c1的尺寸不同，两者对应的驱动电路的驱动功率也不同，同理，第一绿色子像素100c3与第二绿色子像素100a3对应的驱动电路的驱动功率也不同，且第一蓝色子像素100c2与第二蓝色子像素100a2对应的驱动电路的驱动功率也不同。故第一像素驱动电路104只能用于驱动主显示区100c的第一红色子像素100c1、第一绿色子像素100c3以及第一蓝色子像素100c2，而不能用于驱动过渡显示区100b和显示透光区100a的第二红色子像素100a1、第二绿色子像素100a3以及第二蓝色子像素100a2。
从主显示区100c到过渡显示区100b，子像素的尺寸变小，为了从主显示区100c到过渡显示区100b显示能均匀地过渡，避免显示时主显示区100c和过渡显示区100b之间的交界处出现明显的分界线，多个第一红色子像素100c1、多个第一绿色子像素100c3以及多个第一蓝色子像素100c2在主显示区100c和过渡显示区100b的交界处呈台阶形分布，且多个第二红色子像素100a1、多个第二绿色子像素100a3以及多个第二蓝色子像素100a2在主显示区100c和过渡显示区100b的交界处呈台阶形分布。
如图8所示，图8为图1所示显示装置的主显示区、过渡显示区以及显示透光区的局部放大示意图，图9为图8中像素驱动电路岛的示意图，图10为像素驱动电路岛中的第二像素驱动电路的平面示意图。
结合图4、图8以及图9可知，多个第二像素驱动电路1011设置于过渡显示区100b，多个第二像素驱动电路1011组成多个像素驱动电路岛101。多个像素驱动电路岛101环绕显示透光区100a分布，以使多个像素驱动电路岛101适应显示透光区100a的形状设置，减少多个像素驱动电路岛101中的第二像素驱动电路1011与对应的子像素之间的间距，从而减小连接第二像素驱动电路1011与对应子像素的导线的阻抗，提高第二显示像素的发光的均一性。
具体地，多个像素驱动电路岛101包括第一组像素驱动电路岛101a和第二组像素驱动电路岛101b，第一组像素驱动电路岛101a中的像素驱动电路岛101呈弧形分布，第二组像素驱动电路岛101b中的像素驱动电路岛101呈弧形分布，第一组像素驱动电路岛101a中的像素驱动电路岛101与第二组像素驱动电路岛101b中的像素驱动电路岛101关于第二对称轴B-B对称设置。第一组像素驱动电路岛101a中的像素驱动电路岛101关于第一对称轴A-A对称设置。第二组像素驱动电路岛101b中的像素驱动电路岛101关于第一对称轴A-A对称设置。
每个像素驱动电路岛101呈矩形。每个像素驱动电路岛101包括多个阵列排布的第二像素驱动电路1011，多个像素驱动电路岛101的第二像素驱动电路1011用于驱动多个第二显示像素发光，即多个像素驱动电路岛101的第二像素驱动电路1011用于驱动过渡显示区100b的第二显示像素发光的同时，还用于驱动显示透光区100a的第二显示像素发光，以避免显示透光区100a设置像素驱动电路，避免第二像素驱动电路1011的金属膜层对显示透光区100a的透光率造成影响，从而进一步地提高显示透光区100a的透光率。
每个第二像素驱动电路1011的等效电路图与图5所示的第一像素驱动电路的等效电路图相同，不同之处在于，第二像素驱动电路1011的驱动功率与第一像素驱动电路104的驱动功率不同，对应地，第二像素驱动电路1011与第一像素驱动电路104之间的差异包括两者的尺寸不同，且两者内部的器件以及走线的大小存在差异。
请参阅图10，其为像素驱动电路岛中的第二像素驱动电路及第二像素驱动电路正上方的图案化第四金属层的平面示意图。每个第二像素驱动电路的平面示意图与第一像素驱动电路的平面示意图基本相似，不同之处在于两者的布设间距等存在差异。第二像素驱动电路1011与第一像素驱动电路104的区别还包括，第二像素驱动电路1011与第n-1级扫描信号线Scan(n-1)、第n级扫描信号线Scan(n)以及第n级发光控制信号线EM（n）连接。第n-1级扫描信号线Scan(n-1)在第二像素驱动电路1011中的位置对应第i-1级扫描信号线Scan(i-1)在第一像素驱动电路104中的位置，第n级扫描信号线Scan(n)在第二像素驱动电路1011中的位置对应第i级扫描信号线Scan(i)在第一像素驱动电路104中的位置，第n级发光控制信号线EM（n）在第二像素驱动电路1011中的位置对应第i级发光控制信号线EM(i)在第一像素驱动电路104中的位置。
结合图10可知，显示装置还包括图案化第四金属层1045，图案化第四金属层1045位于图案化第三金属层1044远离图案化第二金属层1043的一侧，图案化第四金属层1045与图案化第三金属层1044之间设置有第四绝缘层。图案化第四金属层1045包括金属网格10451，金属网格10451用于传输直流电源信号，部分金属网格10451设置于主显示区100c，部分金属网格10451对应多个像素驱动电路岛101的多个第二像素驱动电路1011设置。金属网格10451包括多个纵向金属线和横向金属线，且金属网格10451呈网格状，金属网格10451与图案化第三金属层1044中的直流电源信号线VDD电性连接，以传输直流电源信号，改善直流电源信号在传输过程中的电阻压降。图案化第四金属层1045的制备材料为钼、铝、钛以及铜中的至少一种。第四绝缘层为有机绝缘层。像素驱动电路岛101中的第二像素驱动电路1011与显示透光区100a的第二显示像素通过透明导线电性连接，以进一步地提高显示透光区100a的透光率。透明导线的制备材料选自氧化铟锡或氧化铟锌中的至少一种。像素驱动电路岛101中的第二像素驱动电路1011与过渡显示区100b的第二显示像素可以通过金属导线电性连接。
与主显示区100c中不同，一个第二像素驱动电路1011用于驱动多个第二红色子像素100a1、多个第二绿色子像素100a3以及多个第二蓝色子像素100a2中的至少两个，以减少第二像素驱动电路1011的数目，减少多个像素驱动电路岛101占用的空间，从而使得显示透光区100a的尺寸可以增大或者过渡显示区100b具有更多的空间。第二像素驱动电路1011可以用于驱动多个第二红色子像素100a1、多个第二绿色子像素100a3以及多个第二蓝色子像素100a2中发出色光相同的子像素和/或发出色光不同的子像素。在显示透光区100a，为同一个第二像素驱动电路1011驱动的子像素通过透明导线电性连接。
具体地，相邻两个第二红色子像素100a1为同一个第二像素驱动电路1011驱动，相邻两个第二蓝色子像素100a2为同一个第二像素驱动电路1011驱动，且相邻四个第二绿色子像素100a3为同一个第二像素驱动电路1011驱动。
请参阅图8，多个第一信号线102从主显示区100c延伸至过渡显示区100b，且多个第二信号线103从主显示区100c延伸至过渡显示区100b，多个第一信号线102和多个第二信号线103不设置于显示透光区100a。多个第一信号线102和多个第二信号线103的制备材料均为金属，金属包括但不限于钼、铝、钛以及铜。其中，多个第一信号线102以及多个第二信号线103不设置于显示透光区100a，使得显示透光区100a具有高透光率。
具体地，第一信号线102为数据线，例如上述数据线D（n）等，数据线用于传输数据信号。第二信号线103选自扫描线、复位线以及发光控制信号线中的至少一种，例如上述扫描信号线Scan(n)以及初始化信号线VI等。其中，扫描线用于传输扫描信号，复位线用于传输复位信号和/或初始化信号，发光控制信号线用于传输发光控制信号。
每个第一信号线102包括第一连接段1021，多个第一信号线102的第一连接段1021连接多个像素驱动电路岛101，以使数据信号传输至多个像素驱动电路岛101的第二像素驱动电路1011，多个第一信号线102的第一连接段1021设置于多个像素驱动电路岛101和显示透光区100a之间。相对于多个第一信号线102的第一连接段1021设置于多个像素驱动电路岛101的外围或者相对两侧，多个第一信号线102的第一连接段1021设置于多个像素驱动电路岛101和显示透光区100a之间，使得多个第一信号线102的第一连接段1021的长度减小，避免多个第一信号线102的第一连接段1021的长度过长导致阻抗差异较大，进而导致主显示区100c的子像素存在显示不均的问题。
具体地，每个第一信号线102的第一连接段1021连接于第一组像素驱动电路岛101a中的像素驱动电路岛101和第二组像素驱动电路岛101b中对应的像素驱动电路岛101之间，使得数据信号在第一组像素驱动电路岛101a中的像素驱动电路岛101和第二组像素驱动电路岛101b中对应的像素驱动电路岛101之间传输。
每个第一信号线102还包括第一过渡段1022，多个第一信号线102的第一过渡段1022设置于多个像素驱动电路岛101和主显示区100c之间，且与多个像素驱动电路岛101连接。一方面，多个第一信号线102的第一过渡段1022设置于多个像素驱动电路岛101和主显示区100c之间，每个第一信号线102的第一过渡段1022的布设需要占用多个像素驱动电路岛101和主显示区100c之间的空间，以完成第一信号线102从主显示区100c至过渡显示区100b之间的过渡。另一方面，多个像素驱动电路岛101更加靠近显示透光区100a的中心位置设置，保证对应显示透光区100a中心位置第二显示像素的像素驱动电路岛101中的第二像素驱动电路1011能驱动中心位置处的第二显示像素。
至少部分第一过渡段1022包括扇形区段10221和与扇形区段10221连接的直线区段10222，多个第一过渡段1022的扇形区段10221聚集且呈扇形分布，收窄成一组第一信号线102，且通过多个第一过渡段1022的直线区段10222与像素驱动电路岛101连接。
延伸至过渡显示区100b的第二信号线103分成多组，每组串接对应的像素驱动电路岛101，以使控制信号（扫描信号、发光控制信号、初始化信号、复位信号）传输至相互串接的像素驱动电路岛101。每个第二信号线103包括连接第一组像素驱动电路岛101a和第二组像素驱动电路岛101b中相邻两个像素驱动电路岛101的第二连接段1031，第二连接段1031可以为直线、折线或者弧形。每个第二信号线103还包括第二过渡段1032，多个第二信号线103的第二过渡段1032设置于多个像素驱动电路岛101和主显示区100c之间，其中，第二过渡段1032是主显示区100c的第二信号线103经过换线得到。
在过渡显示区100b，由于多个第二像素驱动电路1011组成多个像素驱动电路岛101，每个像素驱动电路岛101是与多个第一信号线102中的至少两个电性连接，且与多个第二信号线103中的至少两个电性连接，使得多个第一信号线102延伸至过渡显示区100b时需要调整且分为多组第一信号线102，每组第一信号线102与一个像素驱动电路岛101连接，且多个第二信号线103延伸至过渡显示区100b时需要换线且分为多组，每组第二信号线103串接多个像素驱动电路岛101。
基于大量的探索与研究，发明人发现显示装置在息屏且强光照射条件下，过渡显示区100b和主显示区100c之间出现明显的分界，原因是由于过渡显示区100b和主显示区100c的单位面积的金属覆盖面积不同，导致过渡显示区100b和主显示区100c对光的反射率不同，主显示区100c的单位面积的金属覆盖面积较大，过渡显示区100b的单位面积的金属覆盖面积相对较小，且过渡显示区100b的单位面积的金属覆盖面积较小的原因是因为多个第二像素驱动电路1011之间的间隙处金属覆盖面积较小，具体为，过渡显示区100b中多个像素驱动电路岛101之外的区域的反射率较低。基于此，本申请在显示装置的过渡显示区100b设置有金属反射部105，且金属反射部105至少位于多个第二像素驱动电路1011之间的间隙，提高多个第二像素驱动电路1011之间的间隙处的反射率，以使过渡显示区100b和主显示区100c的单位面积金属覆盖面积接近，进而使得过渡显示区100b和主显示区100c的反射率接近，避免显示装置在息屏且强光照射条件下主显示区100c和过渡显示区100b之间出现明显的分界。
金属反射部105可以为上述图案化第一金属层1042、上述图案化第二金属层1043、上述图案化第三金属层1044、上述图案化第四金属层1045中任一者的部分或者多者的组合，金属反射部105也可以为上述四个图案化金属层之外新增加的金属膜层。
金属反射部105传输直流电压信号，直流电压信号选自初始化信号或者电源信号中的一种，以避免金属反射部105处于浮置状态。初始化信号为上述初始化信号线VI传输的信号。电源信号可以为直流电源信号VDD等。
具体地，直流电压信号为输入至多个第一像素驱动电路104和/或多个第二像素驱动电路1011的电源信号。
如图12及图13所示，图12为显示装置的第一种截面示意图，图13为镂空部在金属反射部中的位置对应部分低反射堆叠部在多个第一像素驱动电路中的位置的示意图。显示装置包括设置于过渡显示区100b的驱动晶体管M1、第二发光控制晶体管M6、电容器、栅极引线10443、直流电源信号线VDD、第一阳极引线10444、第二阳极引线10452、金属网格10451以及金属反射部105。显示装置还包括设置于显示透光区100a的有机发光二极管OLED。
驱动晶体管M1包括设置于基板111上的驱动有源层，驱动有源层为上述图案化有源层1041的一部分，驱动有源层包括驱动沟道M11a、驱动源极M11b以及驱动漏极M11c，驱动源极M11b以及驱动漏极M11c是半导体通过掺杂后导体化得到。驱动晶体管M1还包括驱动栅极M12，驱动栅极M12对应驱动沟道M11a设置，驱动栅极M12也是电容器的下极板C1。驱动栅极M12为上述图案化第一金属层1042的一部分。驱动栅极M12和驱动有源层之间设置有第一绝缘层106。
第二发光控制晶体管M6包括第二发光控制有源层以及第二发光控制栅极，第二发光控制有源层与驱动有源层同层设置，第二发光控制有源层包括第二发光控制沟道M61a、第二发光控制源极M61b以及第二发光控制漏极M61c。第二控制栅极与驱动栅极M12同层设置且对应第二发光控制沟道M61a设置。
电容器包括上极板C2以及下极板C1，上极板C2和下极板C1之间设置有第二绝缘层107，且上极板C2与下极板C1对应设置。上极板C2为上述图案化第二金属层1043的一部分。
栅极引线10443位于上极板C2的正上方，栅极引线10443为上述图案化第三金属层1044的一部分，栅极引线10443与上极板C2之间设置有第三绝缘层108，栅极引线10443通过贯穿第三绝缘层108、上极板C2、第二绝缘层107的过孔与下极板C1电性连接，以实现与驱动晶体管M1的栅极M12电性连接。
第一阳极引线10444与栅极引线10443以及直流电源信号线VDD同层设置。第一阳极引线10444为上述图案化第三金属层1044的一部分，第一阳极引线10444与第二发光控制晶体管M6的第二发光控制漏极M61c通过贯穿第三绝缘层108、第二绝缘层107以及第一绝缘层106的过孔电性连接。
第二阳极引线10452为图案化第四金属层1045的一部分，第二阳极引线10452与金属网格10451同层设置。第二阳极引线10452与第一阳极引线10444之间设置有第四绝缘层109，第二阳极引线10452通过第四绝缘层109上的过孔与第一阳极引线10444电性连接。
多个透明导线1046设置于多个第二像素驱动电路1011的上方，多个透明导线1046连接于第二阳极引线10452和有机发光二极管OLED的阳极1047之间。部分透明导线1046设置在过渡显示区100b，且部分透明导线1046从过渡显示区100b延伸至显示透光区100a，以使过渡显示区100b的第二像素驱动电路1011驱动显示透光区100a的子像素，提高显示透光区100a的透光率。透明导线1046与图案化第四金属层1045之间设置有第五绝缘层110，第五绝缘层110为有机绝缘层。透明导线1046位于不同膜层时，相邻膜层上的透明导线1046之间也设置有有机绝缘层。每个透明导线1046的宽度大于或等于1微米，且同一层的相邻透明导线1046之间的间距大于或等于2微米，避免透明导线1046之间短路。
金属反射部105与金属网格10451同层设置，且金属反射部105与金属网格10451连接。金属反射部105与金属网格10451通过同一图案化制程得到。由于图案化第一金属层1042、图案化第二金属层1043以及图案化第三金属层1044主要用于布设驱动电路的器件或者走线，导致这些膜层设置特定形态的金属反射部的空间受限，而图案化第四金属层1045中具有足够的空间布设金属反射部105。利用与金属网格10451同层的金属反射部105作为反射层，相较于利用过渡显示区100b的第一信号线102以及第二信号线103进行反射，可以减少去除部分第四金属层的制程，有利于简化制程，且第一信号线102以及第二信号线103的布设主要考虑信号的传输以及减少阻抗等问题，不是考虑反射。金属反射部105的制备材料可以包括钼、铝、钛、铜中的至少一种。例如，金属反射部105可以为Ti层/Al层/Ti层，金属反射部105也可以为Mo层。
金属网格10451位于多个电源直流信号线VDD的上方。由于金属网格10451与电源直流信号线VDD电性连接，使得金属反射部105与多个电源直流信号线VDD电性连接，从而使得金属反射部105传输直流电压信号，避免金属反射部105不接入电信号而出现浮置进而影响电路工作，且金属反射部105传输直流电源信号进一步地改善直流电源信号传输过程中的电阻压降。
金属反射部105包括至少一个镂空部，以使金属反射部105的镂空部处的反射率较低而金属反射部105其他位置的反射率高，过渡显示区100b的金属反射部105与主显示区100c的多个第一像素驱动电路104均具有高反射率区和低反射率区，有利于两者的反射率趋于相同，改善显示装置在息屏且强光照射下时出现的分界问题。金属反射部105属于同一个膜层时，镂空部可以位于同一个膜层。金属反射部105位于不同的膜层时，镂空部可以位于一个或多个膜层。
金属反射部105包括多个镂空部，多个镂空部在金属反射部105中的位置对应部分低反射堆叠部在多个第一像素驱动电路104中的位置，以使金属反射部105中的反射率分布情况与多个第一像素驱动电路104中的反射率分布情况趋于相同。多个镂空部在金属反射部105中的位置对应部分低反射堆叠部在多个第一像素驱动电路104中的位置是指多个镂空部在金属反射部105中的位置与部分低反射堆叠部在多个第一像素驱动电路104中的位置相同，多个镂空部与部分低反射堆叠部可以如图13所示并排设置，也可以多个镂空部与部分低反射堆叠部错开设置。
至少一个镂空部与部分低反射堆叠部并排设置，以使具有低反射率的镂空部在金属反射部105中的位置分布与具有低反射率的低反射堆叠部在多个第一像素驱动电路104中的位置分布趋于相同，金属反射部105的反射率分布与多个第一像素驱动电路104的反射率分布趋于相同，进一步地改善显示装置在息屏且强光照射下时出现的分界问题。
并排设置的镂空部和低反射堆叠部中，低反射堆叠部在显示装置的基板111上的正投影的形状与镂空部在显示装置的基板111上的正投影的形状相同或相似，以进一步地使金属反射部105的反射率与多个第一像素驱动电路104的反射率趋于相同。
并排设置的镂空部和低反射堆叠部中，镂空部在显示装置的基板111上的正投影的面积等于低反射堆叠部在显示装置的基板111上的正投影的面积，以进一步地使金属反射部105的反射率与多个第一像素驱动电路104的反射率趋于相同。
至少一个镂空部在显示装置的基板111上的正投影的形状选自矩形、梯形以及不规则图形中的至少一种。形状为矩形、梯形等规则图形时，更容易在制程上实现图案化；形状为不规则图形时，更有利于镂空部在显示装置的基板111上的正投影的形状与低反射堆叠部在基板111上的正投影的形状匹配。
并排设置的镂空部和低反射堆叠部中，相邻两个镂空部之间的间距等于相邻两个低反射堆叠部之间的间距。
具体地，至少一个镂空部105包括第一镂空部1051a、第二镂空部1051b以及第三镂空部1051c，第一镂空部1051a的面积大于第二镂空部1051b的面积，第二镂空部1051b的面积大于第三镂空部1051c的面积；第一低反射堆叠部104a与第一镂空部1051a并排设置，第二低反射堆叠部104b与第二镂空部1051b并排设置，第三低反射堆叠部104c与第三镂空部1051c并排设置。第一镂空部1051a、第二镂空部1051b以及第三镂空部1051c的形状均为矩形，有利于简化制程。可以理解的是，第一镂空部1051a、第二镂空部1051b以及第三镂空部1051c的形状也可以根据第一低反射堆叠部104a、第二低反射堆叠部104b以及第三低反射堆叠部104c中空白堆叠部的形状进行调节。需要说明的是，图13中第一低反射堆叠部104a、第二低反射堆叠部104b以及第三低反射堆叠部104c中的部分金属未示意出，实际第一低反射堆叠部104a、第二低反射堆叠部104b以及第三低反射堆叠部104c如图7所示。
通过在过渡显示区100b除多个像素驱动电路岛101之外的区域设置金属反射部105，金属反射部105的反射率分布与主显示区100c的反射率分布相近，有利于避免主显示区105和过渡显示区100b之间出现明显的反射率分布差异。
结合图4以及图11可知，部分金属反射部105环绕多个像素驱动电路岛101且设置于多个像素驱动电路岛101和主显示区100c之间，部分金属反射部105设置于多个像素驱动电路岛101与显示透光区100a之间，部分金属反射部105设置于相邻两个像素驱动电路岛101之间，使得过渡显示区100b除设置有多个像素驱动电路岛101的区域的之外所有区域均设置有金属反射部105。
金属反射部105靠近显示透光区100a的边界包括弧形边界，金属反射部105靠近主显示区100c的边界包括台阶形边界，以适应过渡显示区100b与显示透光区100a之间的边界为圆形且过渡显示区100b与主显示区100c之间的边界为台阶形，使得交界处的反射率与其他位置的反射率相匹配。
金属反射部105中的金属在显示装置的基板111上的正投影在单位面积的占比与多个第一像素驱动电路104中的金属在显示装置的基板111上的正投影在单位面积的占比之间的差值绝对值大于或等于0%且小于或等于6%，以使得过渡显示区100b的金属反射部105的反射率与主显示区100c的反射率接近，避免显示装置在息屏且强光照射状态下出现明显的分界效果。差值绝对值可以为1%、2%以及3%等。
请参阅图14，其为显示装置的第二种截面示意图。图14所示显示装置与图12所示显示装置基板相似，不同之处在于，金属反射部105与多个有机发光二极管OLED的阳极1047同层设置，且金属反射部105与多个有机发光二极管OLED的阳极1047之间绝缘，以使得过渡显示区100b和主显示区100c的反射率接近。金属反射部105与多个有机发光二极管OLED的阳极1047通过同一制程图案化制备得到。金属反射部105为氧化铟锡层、银层以及氧化铟锡层的叠层。相较于金属反射部105设置于图案化第四金属层1045且接入直流电源信号，金属反射部105与阳极1047同层设置且不接入固定电压会导致金属反射部105处于浮置状态，增加金属反射部105影响电路正常工作的风险。
金属反射部105与多个有机发光二极管OLED的阳极1047之间的间距大于或等于3微米，以避免金属反射部105与多个有机发光二极管OLED的阳极1047之间出现短路。
本申请还提供一种电子设备，电子设备包括上述显示装置及感光单元，感光单元对应显示装置的显示透光区100a设置。感光单元为摄像头。由于显示装置的显示透光区100a具有高透光率，可以保证摄像头的拍照效果；且显示装置的显示透光区100a具有第二显示像素，显示透光区100a也可以进行显示。另外，通过至少在过渡显示区100b的多个第二像素驱动电路1011之间的间隙设置金属反射部105，避免电子设备在息屏且强光照射条件下主显示区100c和过渡显示区100b之间出现明显的分界问题。
以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (16)

  1. 一种显示装置，其中，所述显示装置具有主显示区、过渡显示区以及显示透光区，所述过渡显示区位于所述主显示区和所述显示透光区之间，所述显示装置包括：
    多个第一显示像素，设置于所述主显示区；
    多个第二显示像素，设置于所述过渡显示区和所述显示透光区；
    多个第一像素驱动电路，阵列地设置于所述主显示区，且用于驱动多个所述第一显示像素；
    多个第二像素驱动电路，设置于所述过渡显示区，且用于驱动多个所述第二显示像素；以及
    金属反射部，设置于所述过渡显示区，且所述金属反射部至少位于多个所述第二像素驱动电路之间的间隙。
  2. 根据权利要求1所述的显示装置，其中，所述金属反射部包括至少一个镂空部，多个所述第一像素驱动电路包括多个低反射堆叠部，至少一个所述镂空部与部分所述低反射堆叠部并排设置。
  3. 根据权利要求1所述的显示装置，其中，所述金属反射部包括多个镂空部，多个所述第一像素驱动电路包括多个低反射堆叠部，多个所述镂空部在所述金属反射部中的位置对应部分所述低反射堆叠部在多个所述第一像素驱动电路中的位置。
  4. 根据权利要求2所述的显示装置，其中，并排设置的所述镂空部和所述低反射堆叠部中，所述低反射堆叠部在所述显示装置的基板上的正投影的形状与所述镂空部在所述显示装置的所述基板上的正投影的形状相同或相似。
  5. 根据权利要求2所述的显示装置，其中，并排设置的所述镂空部和所述低反射堆叠部中，所述镂空部在所述显示装置的基板上的正投影的面积等于所述低反射堆叠部在所述显示装置的所述基板上的正投影的面积。
  6. 根据权利要求2所述的显示装置，其中，至少一个所述镂空部在所述显示装置的基板上的正投影的形状选自矩形、梯形以及不规则图形中的至少一种。
  7. 根据权利要求2所述的显示装置，其中，至少一个所述镂空部包括间隔设置的多个第一镂空部、多个第二镂空部以及多个第三镂空部，每个所述第一镂空部的面积大于每个所述第二镂空部的面积，每个所述第二镂空部的面积大于每个所述第三镂空部的面积；
    多个所述第一像素驱动电路的多个所述低反射堆叠部包括多个第一低反射堆叠部、多个第二低反射堆叠部以及多个第三低反射堆叠部，每个所述第一低反射堆叠部中的空白堆叠部在所述显示装置的基板上的正投影的面积大于每个所述第二低反射堆叠部中的所述空白堆叠部在所述基板上的正投影的面积，每个所述第二低反射堆叠部中的所述空白堆叠部在所述基板上的正投影的面积大于每个所述第三低反射堆叠部中的所述空白堆叠部在所述基板上的正投影的面积；
    其中，所述第一镂空部与所述第一低反射堆叠部并排设置，所述第二镂空部与第二低反射堆叠部并排设置，所述第三镂空部与所述第三低反射堆叠部并排设置，所述空白堆叠部中的金属在所述基板上的正投影的面积等于0。
  8. 根据权利要求1所述的显示装置，其中，多个所述第二像素驱动电路组成多个像素驱动电路岛，多个所述像素驱动电路岛环绕所述显示透光区设置，部分所述金属反射部环绕多个所述像素驱动电路岛且设置于多个所述像素驱动电路岛和所述主显示区之间，部分所述金属反射部设置于多个所述像素驱动电路岛与所述显示透光区之间，部分所述金属反射部设置于相邻两个所述像素驱动电路岛之间。
  9. 根据权利要求1所述的显示装置，其中，所述金属反射部靠近所述显示透光区的边界包括弧形边界，所述金属反射部靠近所述主显示区的边界包括台阶形边界。
  10. 根据权利要求1所述的显示装置，其中，所述金属反射部传输直流电压信号，所述直流电压信号选自初始化信号或者电源信号中的一种。
  11. 根据权利要求10所述的显示装置，其中，所述直流电压信号为输入至多个所述第一像素驱动电路和/或多个所述第二像素驱动电路的电源信号。
  12. 根据权利要求1所述的显示装置，其中，所述显示装置还包括金属网格，所述金属网格与所述金属反射部同层设置且连接，部分所述金属网格对应多个所述第二像素驱动电路设置，部分所述金属网格设置于所述主显示区，所述金属网格用于传输直流电源信号。
  13. 根据权利要求1所述的显示装置，其中，所述金属反射部中的金属在所述显示装置的基板上的正投影在单位面积的占比为A1，多个所述第一像素驱动电路中的金属在所述显示装置的所述基板上的正投影在单位面积的占比为A2，所述A1与所述A2之间的差值绝对值大于或等于0%且小于或等于6%。
  14. 根据权利要求1所述的显示装置，其中，多个所述第一显示像素和多个所述第二显示像素均包括多个有机发光二极管，所述金属反射部与多个所述有机发光二极管的阳极同层设置，且所述金属反射部与多个所述有机发光二极管的所述阳极之间绝缘，所述金属反射部与多个所述有机发光二极管的所述阳极之间的间距大于或等于3微米。
  15. 根据权利要求1所述的显示装置，其中，所述金属反射部的制备材料包括钼、铝、钛以及铜中的至少一种。
  16. 一种电子设备，其中，所述电子设备包括如权利要求1所述显示装置及感光单元，所述感光单元对应所述显示装置的所述显示透光区设置。
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