WO2021253511A1 - 显示基板母板及其制备方法、显示基板 - Google Patents

显示基板母板及其制备方法、显示基板 Download PDF

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Publication number
WO2021253511A1
WO2021253511A1 PCT/CN2020/099948 CN2020099948W WO2021253511A1 WO 2021253511 A1 WO2021253511 A1 WO 2021253511A1 CN 2020099948 W CN2020099948 W CN 2020099948W WO 2021253511 A1 WO2021253511 A1 WO 2021253511A1
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WIPO (PCT)
Prior art keywords
display substrate
sub
pixel
pixels
effective area
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Application number
PCT/CN2020/099948
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English (en)
French (fr)
Inventor
韩志斌
张晓东
肖翔
高阔
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/961,862 priority Critical patent/US20210399062A1/en
Publication of WO2021253511A1 publication Critical patent/WO2021253511A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/12Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing

Definitions

  • This application relates to the field of display technology, and in particular to a display substrate mother board, a preparation method thereof, and a display substrate.
  • OLED displays have gradually become high-end displays that replace liquid crystals due to their ultra-high contrast, wide color gamut, fast response, and active light-emitting advantages.
  • MMG mixed arrangement
  • the line-bank printing method of luminous ink will be restricted. It is necessary to rotate the OLED panel of one product after printing. The OLED panel of another product is printed at 90° on the glass substrate. This has led to an increase in equipment costs and an increase in production time, which is unfavorable for mass production.
  • the present application provides a display substrate mother board, a preparation method thereof, and a display substrate, which can solve the problem of increasing equipment costs and increasing production time when OLED products of different sizes (ie, display substrates) on the display substrate mother board are mixed and arranged problem.
  • the present application provides a display substrate mother board, which includes a first display substrate and a second display substrate;
  • At least two of the first display substrates are arranged at intervals along a first direction;
  • At least two of the second display substrates are arranged at intervals along a first direction, and the first display substrate is located on at least one side of the second display substrate in the second direction.
  • the two directions are perpendicular to each other;
  • the long axis of the first display substrate is parallel to the second direction, and the long axis of the second display substrate is parallel to the first direction;
  • the long axis of the sub-pixel on the first display substrate is parallel to the short axis of the first display substrate
  • the long axis of the sub-pixel on the second display substrate is parallel to the short axis of the second display substrate.
  • the sub-pixels of the same color on the first display substrate and the sub-pixels of the same color on the second display substrate are arranged at intervals along the first direction.
  • the first sub-pixels, the second sub-pixels, and the third sub-pixels on the first display substrate are sequentially arranged along the second direction, and the The first sub-pixels, the second sub-pixels, and the third sub-pixels are sequentially arranged along the second direction.
  • the pixel opening area of the sub-pixels on the first display substrate is equal to the pixel opening area of the sub-pixels on the second display substrate.
  • the pixel opening width of the sub-pixels on the first display substrate in the first direction is equal to that of the sub-pixels on the second display substrate in the second direction. Pixel opening width.
  • the size of the first display substrate and the second display substrate are different.
  • the second display substrate includes scan lines extending in the first direction and data lines extending in the second direction, and the second display substrate is located in the first direction.
  • One row of sub-pixels in one direction is connected to the two scan lines, and two columns of sub-pixels in the second direction are connected to one of the data lines.
  • the present application also provides a method for preparing a display substrate motherboard, the motherboard substrate includes a first effective area and a second effective area;
  • the method includes the following steps:
  • Step S1 preparing a pixel definition layer on the mother board substrate, and patterning the pixel definition layer to form sub-pixel holes corresponding to the first effective area and the second effective area;
  • Step S2 using nozzles arranged in the row/column direction to linearly locate the sub-pixel holes in the first effective area and the sub-pixel holes in the second effective area on the mother substrate in the first direction.
  • Step S3 preparing a cathode layer on the luminescent material
  • Step S4 preparing a thin film encapsulation layer on the cathode layer to form a first display substrate corresponding to the first effective area and a second display substrate corresponding to the second effective area.
  • the pixel opening area of the sub-pixel hole corresponding to the first effective area is formed and the pixel opening area corresponding to the second effective area is
  • the pixel opening areas of the sub-pixel holes are equal, and the pixel opening width of the sub-pixel holes of the first effective area in the first direction is equal to the width of the sub-pixel holes of the second effective area in the second direction. Pixel opening width.
  • the nozzle simultaneously prepares the luminescent material of the same color in the first effective area and the second effective area along the first direction, so as to be in the first direction.
  • the luminescent materials of the same color are formed in the upward sub-pixel holes.
  • the size of the first effective area is different from that of the second effective area.
  • the long axis of the sub-pixel hole formed in the first effective area is the same as that of the The short axis of the first effective area is parallel, and the long axis of the sub-pixel hole formed in the second effective area is parallel to the short axis of the second effective area.
  • the present application also provides a display substrate, including:
  • An array driving layer disposed on the substrate, including scan lines extending in a first direction and data lines extending in a second direction, the first direction being perpendicular to the second direction;
  • the light-emitting device layer is arranged on the array driving layer;
  • a thin-film encapsulation layer arranged on the light-emitting device layer
  • the display substrate includes sub-pixels distributed in an array, and the colors of the sub-pixels in the first direction are the same;
  • a row of sub-pixels in the first direction of the display substrate is connected to two scan lines, and two columns of sub-pixels in the second direction are connected to one data line.
  • the number of the data lines of the display substrate is less than the number of the scan lines.
  • a one-dimensional array of chip-on-chip films are bound on the non-display area corresponding to the display substrate, and a data line is correspondingly connected to the chip-on-chip film.
  • the light-emitting device layer includes an anode and an anode repair bridge provided in the same layer as the anode, and the anode is electrically connected to the pixel drive circuit in the array drive layer through a contact hole.
  • the anode repair bridge is formed by the extension of the anode, and the anode repair bridges corresponding to two adjacent sub-pixels of the same color are arranged oppositely and staggered.
  • the anode repair bridge and the anode are provided in the same layer and insulated, and an anode repair bridge is located between the anodes corresponding to two adjacent sub-pixels of the same color.
  • two sub-pixels of the same color are arranged in an area enclosed by two adjacent data lines and two adjacent scan lines.
  • the beneficial effects of the present application are: the display substrate mother board and the preparation method thereof, and the display substrate provided by the present application are provided by arranging the long axis of the sub-pixels on the first display substrate in parallel with the short axis of the first display substrate, and the second display substrate
  • the long axis of the sub-pixels on the second display substrate is arranged in parallel with the short axis of the second display substrate, so that the display substrates arranged in different sizes on the display substrate motherboard can achieve the purpose of printing luminescent ink in a linear manner at the same time, thereby reducing equipment costs And production time is conducive to mass production of products.
  • FIG. 1 is a schematic diagram of the structure of a display substrate mother board provided by an embodiment of the application
  • FIG. 2 is a flow chart of a method for preparing a display substrate motherboard provided by an embodiment of the application
  • FIG. 3 is a schematic diagram of a pixel definition layer on a motherboard substrate provided by an embodiment of the application after patterning;
  • FIG. 4 is a schematic diagram of preparing a luminescent material on a mother board substrate provided by an embodiment of the application;
  • FIG. 5 is a schematic diagram of nozzles arranged along a row/column direction according to an embodiment of the application
  • FIG. 6 is a schematic diagram of a film structure of a display substrate provided by an embodiment of the application.
  • FIG. 7 is a schematic structural diagram of a display substrate provided by an embodiment of the application.
  • FIG. 8 is a schematic diagram of an anode of a display substrate provided by an embodiment of the application.
  • FIG. 9 is a schematic diagram of an anode of another display substrate provided by an embodiment of the application.
  • FIG. 10 is a flowchart of a defect repair method for a display substrate provided by an embodiment of the application.
  • FIG. 11 is a schematic diagram of a pixel repair circuit of a display substrate provided by this application.
  • the pixels of the display substrate are usually arranged in a uniform manner. Because the long axis (or long side) direction of the sub-pixels is parallel to the short axis (or short side) direction of the display substrate, the pixel arrangement directions of the two display substrates of different sizes are perpendicular to each other. Therefore, the line-bank printing method for printing luminescent inks/materials will be restricted. After printing a display substrate of one size, the display substrate mother board is rotated 90° and then another size display substrate is printed. This leads to an increase in equipment costs and an increase in production time, which is unfavorable for mass production.
  • a line-bank printing method of display substrate pixel arrangement design is provided.
  • display substrates of different sizes can be directly printed without rotating the display substrate mother board. Therefore, it is suitable for mass production without increasing equipment and time costs.
  • FIG. 1 is a schematic structural diagram of a display substrate motherboard provided by an embodiment of this application.
  • the display substrate mother board 1 includes a first display substrate 11 and a second display substrate 12; at least two of the first display substrates 11 are arranged at intervals along the first direction X; at least two of the second display substrates 12 are arranged along the first
  • the direction X is arranged at intervals, and the first display substrate 11 is located on at least one side of the second display substrate 12 in the second direction Y.
  • the first direction X and the second direction Y are perpendicular to each other.
  • the size of the first display substrate 11 and the second display substrate 12 are different.
  • the size of the first display substrate 11 is 65'’ 8K as an example
  • the size of the second display substrate 12 is 55’’ 4K as an example, but of course it is not limited thereto.
  • first display substrate 11 and the second display substrate 12 may be arranged in multiple rows in the second direction Y. In this embodiment, only the first display substrate 11 is located on the second display substrate. 12 The side in the second direction Y is taken as an example for description.
  • the arrangement of the first display substrate 11 and the second display substrate 12 on the display substrate mother board 1 is: the long axis a1 of the first display substrate 11 and the second direction Y Parallel, the long axis a2 of the second display substrate 12 is parallel to the first direction X. That is, two display substrates of different sizes are arranged perpendicular to each other.
  • the long axis c1 of the sub-pixel 111 on the first display substrate 11 is parallel to the short axis b1 of the first display substrate 11, and the long axis c2 of the sub-pixel 121 on the second display substrate 12 is parallel to the The minor axis b2 of the second display substrate 12 is parallel, and the sub-pixels of the same color on the first display substrate 11 and the sub-pixels of the same color on the second display substrate 12 are arranged at intervals along the first direction X. cloth.
  • first sub-pixel 1111, the second sub-pixel 1112, and the third sub-pixel 1113 on the first display substrate 11 are sequentially arranged along the second direction Y, and the first sub-pixel 1111 on the second display substrate 12
  • the sub-pixels 1211, the second sub-pixels 1212, and the third sub-pixels 1213 are sequentially arranged along the second direction Y.
  • the pixel opening area of the sub-pixel 111 on the first display substrate 11 is equal to the pixel opening area of the sub-pixel 121 on the second display substrate 12.
  • the pixel opening width of the sub-pixel 111 on the first display substrate 11 in the first direction X is equal to the pixel opening width of the sub-pixel 121 on the second display substrate 12 in the second direction Y Opening width.
  • this embodiment does not specifically limit the film layer and component structure of the first display substrate 11, and may be a traditional OLED panel structure.
  • the second display substrate 12 includes scan lines extending in the first direction X and data lines extending in the second direction Y, and one row of the second display substrate 12 in the first direction X
  • the sub-pixels 121 are connected to the two scanning lines, and the two columns of sub-pixels 121 in the second direction Y are connected to one of the data lines.
  • the structure design of the second display substrate 12 will not be elaborated here, and for details, please refer to the description of the structure of the display substrate below.
  • the display substrate mother board of this application is designed in the above-mentioned way, which can realize the simultaneous line-bank printing of display substrates of different sizes under the mixed arrangement of display substrates of different sizes, and can directly print without rotating the display substrate mother board. Display substrates of different sizes. Therefore, it is suitable for mass production without increasing equipment and time costs.
  • the present application also provides a method for preparing the above-mentioned display substrate mother board.
  • a mother board substrate 100 is provided.
  • the mother board substrate 100 includes a first effective area 1001 and a second effective area 1002;
  • the motherboard substrate 100 may be an array drive substrate, that is, the motherboard substrate 100 is provided with an array drive circuit and an array drive circuit corresponding to the first effective area 1001 and the second effective area 1002.
  • the anode of the electrical connection is provided.
  • the method includes the following steps:
  • Step S1 as shown in FIG. 3, a pixel definition layer 1003 is prepared on the mother substrate 100, and the pixel definition layer 1003 is patterned to form a corresponding first effective area 1001 and a corresponding The sub-pixel hole 1004 of the second effective area 1002.
  • the pixel opening area corresponding to the sub-pixel hole 1004 in the first effective area 1001 and the pixel opening area corresponding to the second effective area 1002 are formed.
  • the pixel opening areas of the sub-pixel holes 1004 are equal, and the pixel opening width of the sub-pixel holes 1004 in the first effective area 1001 in the first direction X is equal to that of the sub-pixel holes 1004 in the second effective area 1002 The width of the pixel opening in the second direction Y.
  • the sizes of the first effective area 1001 and the second effective area 1002 are different. It can be understood that the first effective area 1001 and the second effective area 1002 respectively correspond to different sizes. Display substrate.
  • the long axis (i.e., the long side) of the sub-pixel hole 1004 formed in the first effective area 1001 is parallel to the short axis (i.e., the short side) of the first effective area 1001
  • the second The long axis of the sub-pixel hole 1004 formed in the second effective area 1002 is parallel to the short axis of the second effective area 1002.
  • Step S2 as shown in FIG. 4, using nozzles arranged in the row/column direction on the mother substrate 100 along the first direction X in a linear manner in the sub-pixel holes in the first effective area 1001 and A luminescent material is prepared in the sub-pixel holes in the second effective area 1002 to form a first luminescent material 1005, a second luminescent material 1006, and a third luminescent material 1007 arranged sequentially in the second direction Y, wherein The first direction X and the second direction Y are perpendicular to each other.
  • FIG. 5 it is a schematic diagram of nozzles arranged along the row/column direction provided by the embodiment of this application.
  • FIG. 5 only one row of nozzles on an inkjet printing device is taken as an example.
  • One nozzle 200 corresponds to one sub-pixel hole 1004. It can be understood that multiple groups of nozzles 200 may be provided on the inkjet printing device.
  • the nozzle simultaneously prepares luminescent materials of the same color in the first effective area 1001 and the second effective area 1002 along the first direction X, so that the luminescent material in the first direction X
  • the sub-pixel holes 1004 are formed with luminescent materials of the same color.
  • the display substrate mother board is designed in the above-mentioned way, which can realize the line-bank printing of display substrates of different sizes at the same time when the display substrates of different sizes are arranged in a mixed arrangement, and can directly print different display substrates without rotating the display substrate mother board.
  • the size of the display substrate is designed in the above-mentioned way, which can realize the line-bank printing of display substrates of different sizes at the same time when the display substrates of different sizes are arranged in a mixed arrangement, and can directly print different display substrates without rotating the display substrate mother board.
  • Step S3 preparing a cathode layer on the luminescent material.
  • Step S4 preparing a thin film encapsulation layer on the cathode layer to form a first display substrate corresponding to the first effective area and a second display substrate corresponding to the second effective area.
  • the above method can be used to produce display substrate mother boards with different sizes.
  • the display substrate mother board is provided with cutting lanes.
  • the cutting lanes are respectively arranged around the first effective area and the second effective area.
  • the display substrate mother board is cut along the cutting path to obtain a plurality of first display substrates and a plurality of second display substrates.
  • Another object of the present application is to provide a display substrate that provides optimized space for components such as capacitors and thin film transistors, and at the same time facilitates high pixel density design to achieve high resolution of the substrate.
  • FIG. 6 is a display substrate formed by cutting the above-mentioned display substrate mother board.
  • the array driving layer 22 is disposed on the substrate 21; the light emitting device layer 23 is disposed on the array driving layer 22; the thin film packaging layer 24 is disposed on the light emitting device layer 23.
  • the substrate 21 may be a glass substrate or a flexible substrate.
  • the array driving layer 22 includes an inorganic stacked layer and a pixel driving circuit disposed in the inorganic stacked layer;
  • the light-emitting device layer 23 includes an organic stacked layer and a light-emitting device disposed in the organic stacked layer,
  • the light-emitting device includes a stacked anode, a light-emitting layer, and a cathode layer.
  • the display substrate 2 is the second display substrate 12 formed after the above-mentioned display substrate mother board is cut.
  • the display substrate 2 includes a display area 2001 and a non-display area 2002.
  • the display area 2001 includes scan lines G (ie G1, G2%) extending along the first direction X and data lines D (ie D1, D2...) extending along the second direction Y.
  • the first direction X is perpendicular to the second direction Y.
  • the display substrate 2 further includes sub-pixels 121 arranged in an array, and the colors of the sub-pixels 121 in the first direction X are the same.
  • the sub-pixel 121 includes a first sub-pixel 1211, a second sub-pixel 1212, and a third sub-pixel 1213, and the first sub-pixel 1211, the second sub-pixel 1212 and the third sub-pixel 1213 are The second direction Y is arranged in sequence.
  • the first sub-pixel 1211, the second sub-pixel 1212, and the third sub-pixel 1213 form a pixel unit.
  • the display substrate of the present application can realize the mixed arrangement design of the display substrate mother board and the compatible design of the line bank printing method.
  • the display substrate of the present application can maintain the conventional design in the backplane design (COF is below
  • the horizontal line bank printing scheme is compatible with the MMG horizontal and vertical typesetting scheme.
  • Line bank printing can improve the film thickness uniformity of the inkjet printing (IJP) process and improve the display quality.
  • IJP inkjet printing
  • the use of MMG typesetting can increase the utilization rate of the glass substrate/mother substrate and increase the economic benefits of mass production.
  • one row of sub-pixels 121 in the first direction X of the display substrate is connected to two scan lines G, and two columns of sub-pixels 121 in the second direction Y are connected to one of the Data line D.
  • two sub-pixels of the same color are arranged in an area enclosed by two adjacent data lines and two adjacent scan lines.
  • the non-display area 2002 on both sides of the display substrate 2 is provided with a GOA circuit (gate drive circuit) 221, the scan line G is electrically connected to the GOA circuit 221, and the GOA circuit 221 is used for The scan line G provides a gate drive signal.
  • the non-display area 2002 corresponding to the lower frame of the display substrate 2 is bound with a chip on film (source driver) 222 arranged in a one-dimensional array, and a data line D is correspondingly connected to the chip on film 222 .
  • the pixel design of the display substrate is HDTG (Half Data Two Gate): Each pixel contains one RGB sub-pixel, each row of sub-pixels corresponds to two scan lines, and each column of sub-pixels corresponds to one data line.
  • the driving method of the display substrate is as follows: each time two gate driving signals are turned on, for example, when driving the first row of sub-pixels, G1 and G2 are turned on at the same time. At this time, the first row of sub-pixels will pass through all the data lines D1, D2.
  • ...Dn write signal (such as red sub-pixel); when driving the second row of sub-pixels, G3 and G4 are turned on at the same time, at this time, the second row of sub-pixels will write signals through all data lines D1, D2...Dn (such as green Sub-pixel); and so on.
  • the display substrate can also reduce the space occupied by wiring in the backplane, optimize the space design of capacitors and thin film transistors, and facilitate the design of high pixel density.
  • each pixel has 1 scan line and 3 data lines on average, for a total of 4 traces.
  • the number of traces for a single sub-pixel in this application is 2 scan lines, and 1.5 data lines for three sub-pixels, for a total of 3.5 traces. Freeing up the design space for 0.5 traces, calculating with a line width of 10um and a sub-pixel space of 8um, a single sub-pixel releases 4.8% of the design space. These spaces can be used to optimize the design of capacitors and thin film transistors, and are more suitable for Pixel design with high pixel density.
  • the number of the data lines D of the display substrate is less than the number of the scan lines G. Since the number of the data lines D is halved compared to the original, the number of the flip chip films 222 is also halved, so the cost is greatly reduced.
  • the number of scan lines G has increased, but the mass production solution uses GOA circuit design, which will not increase the cost of materials. Therefore, the display substrate can halve the number of flip-chip films 222, which greatly reduces In order to reduce the cost, it has a very good mass production benefit.
  • FIG. 8 it is a schematic diagram of an anode of a display substrate provided by an embodiment of this application.
  • the light emitting device layer 23 of the display substrate includes an anode 231 and an anode repair bridge 232 provided in the same layer as the anode 231, and the anode 231 is electrically connected to the pixel drive circuit in the array drive layer 22 through contact holes .
  • the anode repair bridge 232 is formed by the extension of the anode 231, and the anode repair bridges 232 corresponding to two adjacent sub-pixels with the same color are arranged oppositely and staggered.
  • FIG. 9 it is a schematic diagram of an anode of another display substrate provided by an embodiment of this application.
  • the anode repair bridge 232 and the anode 231 are provided in the same layer and insulated from each other, and an anode repair bridge 232 is located between the anodes 231 corresponding to two adjacent sub-pixels of the same color. between.
  • anode repair bridge 232 and the anode 231 are formed of the same material through the same photomask process.
  • the display substrate provided by this application can also realize pixel repair, specifically: when the adjacent same color sub-pixels are cut off due to short lines or short circuits during the manufacturing process, they will become floating OLED devices.
  • the display substrate provided by this application can pass through The laser welding method electrically connects the defective sub-pixel (that is, the floating OLED device) with the adjacent sub-pixels of the same color, so that the defective sub-pixels emit light.
  • the present application also provides the defect repair method of the above display substrate, wherein the anode in the light emitting device layer of the display substrate is electrically connected to the pixel driving circuit in the array driving layer, and the pixel driving circuit is used to drive The light-emitting layer in the light-emitting device layer emits light.
  • the method includes the following steps:
  • step S1 a laser is used to cut off the part where the pixel drive circuit and the anode are connected at the connection site of the pixel drive circuit and the anode corresponding to the defective sub-pixel.
  • the cutting site may be at any position of the portion where the pixel driving circuit is connected to the anode, for example, the cutting site is at a position where the anode is connected to the driving thin film transistor in the pixel driving circuit.
  • step S2 the anode corresponding to the defective sub-pixel and the anode corresponding to the adjacent sub-pixel of the same color are welded through an anode repair bridge.
  • step S2 when the anode repair bridges 232 corresponding to two adjacent sub-pixels of the same color are opposed to each other and arranged in a staggered manner, in the step S2, laser is used to treat the defective sub-pixels.
  • the anode repair bridge on the corresponding anode is lasered, so that the anode repair bridge corresponding to the defective sub-pixel is welded to the anode corresponding to the adjacent sub-pixel of the same color.
  • the repair site is shown as Q in FIG. 8 .
  • step S2 laser is used to laser the anode repair bridge on the anode corresponding to the defective sub-pixel, so that the anode repair bridge on the anode corresponding to the defective sub-pixel is the same as the neighboring anode repair bridge
  • the anode repair bridge welding on the anode corresponding to the sub-pixel of the color is welded.
  • an anode repair bridge 232 is located between the anodes 231 corresponding to two adjacent sub-pixels of the same color.
  • laser is used to laser the anode repair bridge between the defective sub-pixel and the adjacent sub-pixel of the same color, so that the anode repair bridge and the defective sub-pixel are respectively
  • the corresponding anode and the anode corresponding to the adjacent sub-pixels of the same color are welded, and the repair site is shown as P in FIG. 9.
  • FIG. 11 is a schematic diagram of the pixel repair circuit of the display substrate provided by this application.
  • M is a pixel circuit of a normal sub-pixel
  • N is a pixel circuit of a defective sub-pixel
  • M and N are pixel circuits of two sub-pixels of the same color.
  • the pixel circuit N is connected to the F'position in the pixel circuit M via the anode repair bridge at the F site (the repair route is shown by the dashed line in Figure 11).
  • the signal for driving the sub-pixels in the pixel circuit M to emit light is simultaneously It is transmitted to the anode of the light-emitting diode OLED in the pixel circuit N, so that the defective sub-pixel emits light normally.
  • the display substrate of the present application can repair defective pixels, the life span of the product is increased, and the number of defective products is reduced, thereby saving costs.

Abstract

本申请提供一种显示基板母板及其制备方法、显示基板,该显示基板母板包括第一显示基板和第二显示基板;第二显示基板的长轴与第一方向平行,第一显示基板的长轴与第二方向平行,第一方向与第二方向垂直。第一显示基板上的子像素的长轴与第一显示基板的短轴平行,第二显示基板上的子像素的长轴与第二显示基板的短轴平行。

Description

显示基板母板及其制备方法、显示基板 技术领域
本申请涉及显示技术领域,尤其涉及一种显示基板母板及其制备方法、显示基板。
背景技术
有机发光二极管(OLED)显示器由于其超高对比度,广色域,快速响应,主动发光等优势而逐步成为取代液晶的高端显示器。随着OLED显示器以及OLED电视尺寸的不断增大,其相应量产的玻璃基板尺寸也不断增大。为最大化玻璃利用率,需要在同一块玻璃基板上制备不同尺寸的OLED产品,即混合排列(MMG)。而这种混排方式,当两款不同尺寸的OLED面板排列方向不一致时(垂直),发光墨水线形(Line-Bank)打印方式就会受到限制,需要打印完一款产品的OLED面板后,旋转玻璃基板90°再打印另一款产品的OLED面板。这导致了设备成本的增加和生产时间的增加,对量产不利。
因此,现有技术存在缺陷,急需解决。
技术问题
本申请提供一种显示基板母板及其制备方法、显示基板,能够解决显示基板母板上的不同尺寸的OLED产品(即显示基板)混合排列时,会导致设备成本增加和生产时间增加的技术问题。
技术解决方案
为解决上述问题,本申请提供的技术方案如下:
本申请提供一种显示基板母板,包括第一显示基板和第二显示基板;
至少两个所述第一显示基板沿第一方向间隔排布;
至少两个所述第二显示基板沿第一方向间隔排布,且所述第一显示基板位于所述第二显示基板在第二方向上的至少一侧,所述第一方向与所述第二方向相互垂直;
所述第一显示基板的长轴与所述第二方向平行,所述第二显示基板的长轴与所述第一方向平行;
其中,所述第一显示基板上的子像素的长轴与所述第一显示基板的短轴平行,所述第二显示基板上的子像素的长轴与所述第二显示基板的短轴平行,并且所述第一显示基板上相同颜色的子像素以及所述第二显示基板上相同颜色的子像素均沿所述第一方向间隔排布。
在本申请的显示基板母板中,所述第一显示基板上的第一子像素、第二子像素以及第三子像素沿所述第二方向依次排布,所述第二显示基板上的第一子像素、第二子像素以及第三子像素沿所述第二方向依次排布。
在本申请的显示基板母板中,所述第一显示基板上的子像素的像素开口面积与所述第二显示基板上的子像素的像素开口面积相等。
在本申请的显示基板母板中,所述第一显示基板上的子像素在所述第一方向上的像素开口宽度等于所述第二显示基板上的子像素在所述第二方向上的像素开口宽度。
在本申请的显示基板母板中,所述第一显示基板与所述第二显示基板的尺寸不同。
在本申请的显示基板母板中,所述第二显示基板上包括沿所述第一方向延伸的扫描线和沿所述第二方向延伸的数据线,所述第二显示基板在所述第一方向上的一行子像素连接至两条所述扫描线,在所述第二方向上的两列子像素连接至一条所述数据线。
本申请还提供一种显示基板母板的制备方法,母板衬底包括第一有效区域和第二有效区域;
所述方法包括以下步骤:
步骤S1,在所述母板衬底上制备有像素定义层,并对所述像素定义层进行图案化,以形成对应所述第一有效区域和对应所述第二有效区域的子像素孔;
步骤S2,采用沿行/列的方向设置的喷嘴在所述母板衬底上沿第一方向以线形方式在所述第一有效区域的子像素孔以及所述第二有效区域的子像素孔中制备发光材料,以形成在第二方向依次排布的第一发光材料、第二发光材料以及第三发光材料,其中,所述第一方向与所述第二方向相互垂直;
步骤S3,在所述发光材料上制备阴极层;
步骤S4,在所述阴极层上制备薄膜封装层,以形成对应所述第一有效区域的第一显示基板以及对应所述第二有效区域的第二显示基板。
本申请的制备方法,在所述步骤S1中,对所述像素定义层进行图案化后,形成的对应所述第一有效区域的子像素孔的像素开口面积与对应所述第二有效区域的子像素孔的像素开口面积相等,且所述第一有效区域的子像素孔在所述第一方向上的像素开口宽度等于所述第二有效区域的子像素孔在所述第二方向上的像素开口宽度。
本申请的制备方法,在所述步骤S2中,所述喷嘴沿第一方向同时在所述第一有效区域和所述第二有效区域中制备相同颜色的发光材料,以在所述第一方向上的所述子像素孔中形成颜色相同的发光材料的。
在本申请的制备方法中,所述第一有效区域和所述第二有效区域的尺寸不同,在所述步骤S1中,所述第一有效区域内形成的子像素孔的长轴与所述第一有效区域的短轴平行,所述第二有效区域内形成的子像素孔的长轴与所述第二有效区域的短轴平行。
本申请还提供一种显示基板,包括:
衬底;
阵列驱动层,设置于所述衬底上,包括沿第一方向延伸的扫描线和沿第二方向延伸的数据线,所述第一方向与所述第二方向垂直;
发光器件层,设置于所述阵列驱动层上;
薄膜封装层,设置于所述发光器件层上;
所述显示基板包括阵列分布的子像素,在所述第一方向上的所述子像素的颜色相同;
其中,所述显示基板在所述第一方向上的一行子像素连接至两条所述扫描线,在所述第二方向上的两列子像素连接至一条所述数据线。
在本申请的显示基板中,所述显示基板的所述数据线的数量小于所述扫描线的数量。
在本申请的显示基板中,所述显示基板对应非显示区上绑定有一维阵列排布的覆晶薄膜,一所述数据线对应连接至一所述覆晶薄膜。
在本申请的显示基板中,所述发光器件层包括阳极以及与所述阳极同层设置的阳极修复桥,所述阳极通过接触孔与所述阵列驱动层中的像素驱动电路电连接。
在本申请的显示基板中,所述阳极修复桥由所述阳极延伸形成的,相邻两个颜色相同的子像素所对应的所述阳极修复桥相对且交错设置。
在本申请的显示基板中,所述阳极修复桥与所述阳极同层且绝缘设置,一所述阳极修复桥位于相邻两个颜色相同的子像素所对应的所述阳极之间。
在本申请的显示基板中,相邻两条所述数据线和相邻两条所述扫描线围成的区域内设置有两个相同颜色的子像素。
有益效果
本申请的有益效果为:本申请提供的显示基板母板及其制备方法、显示基板,通过将第一显示基板上的子像素的长轴与第一显示基板的短轴平行设置,以及将第二显示基板上的子像素的长轴与第二显示基板的短轴平行设置,从而达到显示基板母板上不同尺寸排列的显示基板可以实现以线形方式同时打印发光墨水的目的,进而降低设备成本和生产时间,有利于产品的量产。
附图说明
下面结合附图,通过对本申请的具体实施方式详细描述,将使本申请的技术方案及其它有益效果显而易见。
图1为本申请实施例提供的显示基板母板的结构示意图;
图2为本申请实施例提供的显示基板母板的制备方法流程图;
图3为本申请实施例提供的母板衬底上的像素定义层图案化后的示意图;
图4为本申请实施例提供的在母板衬底上制备发光材料的示意图;
图5为本申请实施例提供的沿行/列的方向设置的喷嘴的示意图;
图6为本申请实施例提供的显示基板的膜层结构示意图;
图7为本申请实施例提供的显示基板的结构示意图;
图8为本申请实施例提供的一种显示基板的阳极示意图;
图9为本申请实施例提供的另一种显示基板的阳极示意图;
图10为本申请实施例提供的显示基板的缺陷修补方法流程图;
图11为本申请提供的显示基板的像素修复电路示意图。
本发明的实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
在本申请的描述中,需要理解的是,术语“纵向”、“横向”、“长度”、“宽度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。在本申请中,“/”表示“或者”的意思。
本申请可以在不同例子中重复参考数字和/或参考字母,这种重复是为了简化和清楚的目的,其本身不指示所讨论各种实施方式和/或设置之间的关系。
传统的显示基板母板中,当两款不同尺寸的显示基板混合排列时,即两款不同尺寸的显示基板的长轴(或长边)排列方向相互垂直时,由于通常显示基板像素排列方式均为子像素长轴(或长边)方向与显示基板的短轴(或短边)方向平行,导致两款不同尺寸的显示基板的像素排列方向相互垂直。因此,打印发光墨水/材料的线形(Line-Bank)打印方式就会受到限制,需要打印完一个尺寸的显示基板后,将显示基板母板旋转90°再打印另一尺寸的显示基板。这样导致了设备成本的增加和生产时间的增加,对量产不利。
在本申请中,提供一种Line-bank打印方式的显示基板像素排列设计,在不同尺寸的显示基板混合排列方式的情况下,不需要旋转显示基板母板即可直接打印不同尺寸的显示基板。从而不增加设备和时间成本,适用于量产。
以下请结合具体实施例对本申请的显示基板母板进行详细描述。
请参照图1所示,为本申请实施例提供的显示基板母板的结构示意图。显示基板母板1包括第一显示基板11和第二显示基板12;至少两个所述第一显示基板11沿第一方向X间隔排布;至少两个所述第二显示基板12沿第一方向X间隔排布,且所述第一显示基板11位于所述第二显示基板12在第二方向Y上的至少一侧。其中,所述第一方向X与所述第二方向Y相互垂直。
其中,所述第一显示基板11与所述第二显示基板12的尺寸不同。本实施例以所述第一显示基板11的尺寸为65’’8K为例,所述第二显示基板12的尺寸为55’’4K为例,当然并不以此为限。
可以理解的是,所述第一显示基板11与所述第二显示基板12在第二方向Y上可以设置多排,本实施例仅以所述第一显示基板11位于所述第二显示基板12在第二方向Y上的一侧为例进行说明。
其中,所述第一显示基板11与所述第二显示基板12在所述显示基板母板1上的排布方式为:所述第一显示基板11的长轴a1与所述第二方向Y平行,所述第二显示基板12的长轴a2与所述第一方向X平行。即两种不同尺寸的显示基板相互垂直排列。
其中,所述第一显示基板11上的子像素111的长轴c1与所述第一显示基板11的短轴b1平行,所述第二显示基板12上的子像素121的长轴c2与所述第二显示基板12的短轴b2平行,并且所述第一显示基板11上相同颜色的子像素以及所述第二显示基板12上相同颜色的子像素均沿所述第一方向X间隔排布。
其中,所述第一显示基板11上的第一子像素1111、第二子像素1112以及第三子像素1113沿所述第二方向Y依次排布,所述第二显示基板12上的第一子像素1211、第二子像素1212以及第三子像素1213沿所述第二方向Y依次排布。
在一种实施例中,所述第一显示基板11上的子像素111的像素开口面积与所述第二显示基板12上的子像素121的像素开口面积相等。
进一步的,所述第一显示基板11上的子像素111在所述第一方向X上的像素开口宽度等于所述第二显示基板12上的子像素121在所述第二方向Y上的像素开口宽度。
其中,本实施例不对所述第一显示基板11的膜层及元器件结构做出具体限定,可以为传统的OLED面板结构。所述第二显示基板12上包括沿所述第一方向X延伸的扫描线和沿所述第二方向Y延伸的数据线,所述第二显示基板12在所述第一方向X上的一行子像素121连接至两条所述扫描线,在所述第二方向Y上的两列子像素121连接至一条所述数据线。所述第二显示基板12的结构设计此处不做详细阐述,具体可参照下文中对显示基板结构的描述。
本申请的显示基板母板采用上述方式设计,可以在不同尺寸的显示基板混合排列方式的情况下,实现不同尺寸的显示基板同时进行Line-bank打印,不需要旋转显示基板母板即可直接打印不同尺寸的显示基板。从而不增加设备和时间成本,适用于量产。
本申请还提供上述显示基板母板的制备方法,结合图2和图3所示,提供一母板衬底100,所述母板衬底100包括第一有效区域1001和第二有效区域1002;所述母板衬底100可以为阵列驱动衬底,即所述母板衬底100对应所述第一有效区域1001和所述第二有效区域1002设置有阵列驱动电路以及与所述阵列驱动电路电连接的阳极。
所述方法包括以下步骤:
步骤S1,如图3所示,在所述母板衬底100上制备像素定义层1003,并对所述像素定义层1003进行图案化,以形成对应所述第一有效区域1001和对应所述第二有效区域1002的子像素孔1004。
在所述步骤S1中,对所述像素定义层1003进行图案化后,形成的对应所述第一有效区域1001内的子像素孔1004的像素开口面积与对应所述第二有效区域1002内的子像素孔1004的像素开口面积相等,且所述第一有效区域1001内的子像素孔1004在所述第一方向X上的像素开口宽度等于所述第二有效区域1002内的子像素孔1004在所述第二方向Y上的像素开口宽度。
在本实施例中,所述第一有效区域1001和所述第二有效区域1002的尺寸不同,可以理解的是,所述第一有效区域1001和所述第二有效区域1002分别对应不同尺寸的显示基板。
在所述步骤S1中,所述第一有效区域1001内形成的子像素孔1004的长轴(即长边)与所述第一有效区域1001的短轴(即短边)平行,所述第二有效区域1002内形成的子像素孔1004的长轴与所述第二有效区域1002的短轴平行。
步骤S2,如图4所示,采用沿行/列的方向设置的喷嘴在所述母板衬底100上沿第一方向X以线形方式在所述第一有效区域1001内的子像素孔以及所述第二有效区域1002内的子像素孔中制备发光材料,以形成在第二方向Y上依次排布的第一发光材料1005、第二发光材料1006以及第三发光材料1007,其中,所述第一方向X与所述第二方向Y相互垂直。
结合图5所示,为本申请实施例提供的沿行/列的方向设置的喷嘴的示意图。图5中仅以喷墨打印设备上的一行喷嘴为例,一所述喷嘴200对应一所述子像素孔1004,可以理解的是,喷墨打印设备上可以设置有多组所述喷嘴200。
在所述步骤S2中,所述喷嘴沿第一方向X同时在所述第一有效区域1001和所述第二有效区域1002中制备相同颜色的发光材料,从而在所述第一方向X上的所述子像素孔1004中形成颜色相同的发光材料。
所述显示基板母板采用上述方式设计,可以在不同尺寸的显示基板混合排列方式的情况下,实现不同尺寸的显示基板同时进行Line-bank打印,不需要旋转显示基板母板即可直接打印不同尺寸的显示基板。
步骤S3,在所述发光材料上制备阴极层。
步骤S4,在所述阴极层上制备薄膜封装层,以形成对应所述第一有效区域的第一显示基板以及对应所述第二有效区域的第二显示基板。
采用上述方法即可制得具有不同尺寸大小的显示基板母板,所述显示基板母板上设有切割道,所述切割道分别围绕第一有效区域以及第二有效区域设置,将制备得到的显示基板母板沿所述切割道进行切割,即可得到多个第一显示基板和多个第二显示基板。
本申请的另一目的是提供一种为电容、薄膜晶体管等元器件提供优化空间的显示基板,同时有利于高像素密度设计以实现基板的高分辨率。
如图6所示,图6为由上述显示基板母板切割后形成的显示基板,其包括层叠设置的衬底21、阵列驱动层22、发光器件层23以及薄膜封装层24。所述阵列驱动层22设置于所述衬底21上;所述发光器件层23设置于所述阵列驱动层22上;所述薄膜封装层24设置于所述发光器件层23上。
其中,所述衬底21可以为玻璃基板,也可以为柔性基板。
可以理解的是,阵列驱动层22包括无机堆叠层以及设置于所述无机堆叠层中的像素驱动电路;所述发光器件层23包括有机堆叠层以及设置于所述有机堆叠层中的发光器件,所述发光器件包括层叠的阳极、发光层、阴极层。
如图7所示,为本申请实施例提供的显示基板的结构示意图。需要说明的是,该显示基板2即为上述显示基板母板切割后形成的所述第二显示基板12。所述显示基板2包括显示区2001和非显示区2002。所述显示区2001内包括沿第一方向X延伸的扫描线G(即G1,G2……)和沿第二方向Y延伸的数据线D(即D1,D2……),所述第一方向X与所述第二方向Y垂直。所述显示基板2还包括阵列分布的子像素121,在所述第一方向X上的所述子像素121的颜色相同。
所述子像素121包括第一子像素1211、第二子像素1212以及第三子像素1213,且所述第一子像素1211、所述第二子像素1212以及所述第三子像素1213沿所述第二方向Y依次排布。所述第一子像素1211、所述第二子像素1212以及所述第三子像素1213形成一像素单元。
本申请的显示基板可以实现显示基板母板的混合排列设计与line bank打印方式的兼容设计,在混合排版(MMG)过程中,本申请的显示基板可以在背板设计保持常规设计(COF在下方,GOA在左右两侧)的基础上,实现横向line bank打印的方案和MMG横直排版方案的兼容。使用Line bank打印可以提高喷墨打印(IJP)制程的膜厚均一性,提高显示质量。使用MMG排版可以提高玻璃基板/母板衬底的利用率,提高量产的经济效益。
本实施例中,所述显示基板在所述第一方向X上的一行子像素121连接至两条所述扫描线G,在所述第二方向Y上的两列子像素121连接至一条所述数据线D。
其中,相邻两条所述数据线和相邻两条所述扫描线围成的区域内设置有两个相同颜色的子像素。
所述显示基板2两侧的所述非显示区2002内设置有GOA电路(栅极驱动电路)221,所述扫描线G与所述GOA电路221电连接,所述GOA电路221用于为所述扫描线G提供栅极驱动信号。所述显示基板2下边框对应的所述非显示区2002上绑定有一维阵列排布的覆晶薄膜(源极驱动器)222,一所述数据线D对应连接至一所述覆晶薄膜222。
所述显示基板的像素设计为HDTG(Half Data Two Gate):即每个像素包含RGB子像素各一个,每行子像素对应两条扫描线,每一列子像素对应一条数据线。所述显示基板的驱动方式为:每一次开启两个栅极驱动信号,比如在驱动第一行子像素时,同时开启G1和G2,此时第一行子像素会通过全部数据线D1,D2…Dn写入信号(如红色子像素);在驱动第二行子像素时,同时开启G3和G4,此时第二行子像素会通过全部数据线D1,D2…Dn写入信号(如绿色子像素);如此类推。
所述显示基板还可减少背板中走线所占的空间,优化电容和薄膜晶体管的空间设计,有利于高像素密度的设计。相比于常规的背板设计,平均每个像素有1根扫描线,3根数据线,一共4根走线。而本申请的单个子像素走线数量为2根扫描线,三个子像素1.5根数据线,一共3.5根走线。释放了0.5根走线的设计空间,以10um线宽,8um的子像素空间计算的话,单个子像素释放了4.8%的设计空间,这些空间可用于优化对电容,薄膜晶体管的设计,更适用于高像素密度的像素设计。
另外,所述显示基板的所述数据线D的数量小于所述扫描线G的数量。由于所述数据线D的数量比原来减半了,使得所述覆晶薄膜222数量也减半了,因此成本得到极大的压缩。而扫描线G的数量增加了,但量产方案使用的是GOA电路设计,不会带来物料上的成本增加,因此所述显示基板可以使所述覆晶薄膜222数量减半,极大地降低了成本,具有很好的量产效益。
如图8所示,为本申请实施例提供的一种显示基板的阳极示意图。所述显示基板的所述发光器件层23包括阳极231以及与所述阳极231同层设置的阳极修复桥232,所述阳极231通过接触孔与所述阵列驱动层22中的像素驱动电路电连接。其中,所述阳极修复桥232由所述阳极231延伸形成的,相邻两个颜色相同的子像素所对应的所述阳极修复桥232相对且交错设置。
需要说明的是,一所述子像素所对应的所述阳极修复桥232与相邻子像素所对应的阳极231和阳极修复桥232存在间隙。从而避免显示基板正常显示时造成相邻两子像素间的短路。
如图9所示,为本申请实施例提供的另一种显示基板的阳极示意图。在另一种实施例中,所述阳极修复桥232与所述阳极231同层且绝缘设置,一所述阳极修复桥232位于相邻两个颜色相同的子像素所对应的所述阳极231之间。
可以理解的是,所述阳极修复桥232与所述阳极231是由同一材料经过同一道光罩工艺形成的。
本申请提供的显示基板还可实现像素修复,具体为:当临近同颜色子像素在制程中出现短线或者短路等问题被切断后会变成浮空的OLED器件,本申请提供的显示基板可通过激光熔接的方式将缺陷子像素(即浮空的OLED器件)与临近相同颜色的子像素电连接,从而使得缺陷子像素发光。
为实现上述目的,本申请还提供了上述显示基板的缺陷修补方法,其中所述显示基板的发光器件层中的阳极与阵列驱动层中的像素驱动电路电连接,所述像素驱动电路用以驱动所述发光器件层中的发光层发光。请参照图10所示,所述方法包括以下步骤:
步骤S1,采用激光在缺陷子像素所对应的像素驱动电路与阳极的连接位点处将所述像素驱动电路与所述阳极连接的部分切断。
具体地,切割位点可以在所述像素驱动电路与所述阳极连接的部分的任意位置,比如切割位点在所述阳极与所述像素驱动电路中的驱动薄膜晶体管连接的位置等。
步骤S2,将所述缺陷子像素所对应的阳极与临近相同颜色的子像素所对应的阳极通过阳极修复桥熔接。
具体地,结合图8所示,当相邻两个颜色相同的子像素所对应的所述阳极修复桥232相对且交错设置时,在所述步骤S2中,采用激光对所述缺陷子像素所对应的阳极上的所述阳极修复桥进行镭射,以使所述缺陷子像素所对应的阳极修复桥与临近相同颜色的子像素所对应的阳极熔接,修复位点如图8中所示的Q。
或者,在所述步骤S2中,采用激光对所述缺陷子像素所对应的阳极上的所述阳极修复桥进行镭射,以使所述缺陷子像素所对应的阳极上的阳极修复桥与临近相同颜色的子像素所对应的阳极上的阳极修复桥熔接。
结合图9所示,一所述阳极修复桥232位于相邻两个颜色相同的子像素所对应的所述阳极231之间。此时,在所述步骤S2中,采用激光对所述缺陷子像素与临近相同颜色的子像素之间的所述阳极修复桥进行镭射,以使所述阳极修复桥分别与所述缺陷子像素所对应的阳极以及临近相同颜色的子像素所对应的阳极熔接,修复位点如图9中所示的P。
请参照图11所示,为本申请提供的显示基板的像素修复电路示意图。图11中M为正常子像素的像素电路,N为缺陷子像素的像素电路,M和N分别为两个相同颜色的子像素的像素电路。此处以E处为切割位点,将缺陷子像素的阳极与像素电路在E处切断后,将该缺陷子像素的阳极通过阳极修复桥熔接至临近相同颜色的正常子像素的像素电路中,此处像素电路N在F位点经阳极修复桥连接至像素电路M中的F’位点(修复路线如图11中的虚线所示),此时,像素电路M中驱动子像素发光的信号同时会传输至像素电路N中发光二极管OLED的阳极,从而使得缺陷子像素正常发光。
由于本申请的所述显示基板能够实现缺陷像素的修复,因此提高了产品的寿命,并且减少了次品的数量,从而节省成本。
综上所述,虽然本申请已以优选实施例揭露如上,但上述优选实施例并非用以限制本申请,本领域的普通技术人员,在不脱离本申请的精神和范围内,均可作各种更动与润饰,因此本申请的保护范围以权利要求界定的范围为准。

Claims (17)

  1. 一种显示基板母板,其包括第一显示基板和第二显示基板;
    至少两个所述第一显示基板沿第一方向间隔排布;
    至少两个所述第二显示基板沿第一方向间隔排布,且所述第一显示基板位于所述第二显示基板在第二方向上的至少一侧,所述第一方向与所述第二方向相互垂直;
    所述第一显示基板的长轴与所述第二方向平行,所述第二显示基板的长轴与所述第一方向平行;
    其中,所述第一显示基板上的子像素的长轴与所述第一显示基板的短轴平行,所述第二显示基板上的子像素的长轴与所述第二显示基板的短轴平行,并且所述第一显示基板上相同颜色的子像素以及所述第二显示基板上相同颜色的子像素均沿所述第一方向间隔排布。
  2. 根据权利要求1所述的显示基板母板,其中,所述第一显示基板上的第一子像素、第二子像素以及第三子像素沿所述第二方向依次排布,所述第二显示基板上的第一子像素、第二子像素以及第三子像素沿所述第二方向依次排布。
  3. 根据权利要求2所述的显示基板母板,其中,所述第一显示基板上的子像素的像素开口面积与所述第二显示基板上的子像素的像素开口面积相等。
  4. 根据权利要求3所述的显示基板母板,其中,所述第一显示基板上的子像素在所述第一方向上的像素开口宽度等于所述第二显示基板上的子像素在所述第二方向上的像素开口宽度。
  5. 根据权利要求1所述的显示基板母板,其中,所述第一显示基板与所述第二显示基板的尺寸不同。
  6. 根据权利要求1所述的显示基板母板,其中,所述第二显示基板上包括沿所述第一方向延伸的扫描线和沿所述第二方向延伸的数据线,所述第二显示基板在所述第一方向上的一行子像素连接至两条所述扫描线,在所述第二方向上的两列子像素连接至一条所述数据线。
  7. 一种显示基板母板的制备方法,其中,母板衬底包括第一有效区域和第二有效区域;
    所述方法包括以下步骤:
    步骤S1,在所述母板衬底上制备有像素定义层,并对所述像素定义层进行图案化,以形成对应所述第一有效区域和对应所述第二有效区域的子像素孔;
    步骤S2,采用沿行/列的方向设置的喷嘴在所述母板衬底上沿第一方向以线形方式在所述第一有效区域的子像素孔以及所述第二有效区域的子像素孔中制备发光材料,以形成在第二方向依次排布的第一发光材料、第二发光材料以及第三发光材料,其中,所述第一方向与所述第二方向相互垂直;
    步骤S3,在所述发光材料上制备阴极层;
    步骤S4,在所述阴极层上制备薄膜封装层,以形成对应所述第一有效区域的第一显示基板以及对应所述第二有效区域的第二显示基板。
  8. 根据权利要求7所述的制备方法,其中,在所述步骤S1中,对所述像素定义层进行图案化后,形成的对应所述第一有效区域的子像素孔的像素开口面积与对应所述第二有效区域的子像素孔的像素开口面积相等,且所述第一有效区域的子像素孔在所述第一方向上的像素开口宽度等于所述第二有效区域的子像素孔在所述第二方向上的像素开口宽度。
  9. 根据权利要求7所述的制备方法,其中,在所述步骤S2中,所述喷嘴沿第一方向同时在所述第一有效区域和所述第二有效区域中制备相同颜色的发光材料,以在所述第一方向上的所述子像素孔中形成颜色相同的发光材料的。
  10. 根据权利要求7所述的制备方法,其中,所述第一有效区域和所述第二有效区域的尺寸不同,在所述步骤S1中,所述第一有效区域内形成的子像素孔的长轴与所述第一有效区域的短轴平行,所述第二有效区域内形成的子像素孔的长轴与所述第二有效区域的短轴平行。
  11. 一种显示基板,其包括:
    衬底;
    阵列驱动层,设置于所述衬底上,包括沿第一方向延伸的扫描线和沿第二方向延伸的数据线,所述第一方向与所述第二方向垂直;
    发光器件层,设置于所述阵列驱动层上;
    薄膜封装层,设置于所述发光器件层上;
    所述显示基板包括阵列分布的子像素,在所述第一方向上的所述子像素的颜色相同;
    其中,所述显示基板在所述第一方向上的一行子像素连接至两条所述扫描线,在所述第二方向上的两列子像素连接至一条所述数据线。
  12. 根据权利要求11所述的显示基板,其中,所述显示基板的所述数据线的数量小于所述扫描线的数量。
  13. 根据权利要求12所述的显示基板,其中,所述显示基板对应非显示区上绑定有一维阵列排布的覆晶薄膜,一所述数据线对应连接至一所述覆晶薄膜。
  14. 根据权利要求11所述的显示基板,其中,所述发光器件层包括阳极以及与所述阳极同层设置的阳极修复桥,所述阳极通过接触孔与所述阵列驱动层中的像素驱动电路电连接。
  15. 根据权利要求14所述的显示基板,其中,所述阳极修复桥由所述阳极延伸形成的,相邻两个颜色相同的子像素所对应的所述阳极修复桥相对且交错设置。
  16. 根据权利要求14所述的显示基板,其中,所述阳极修复桥与所述阳极同层且绝缘设置,一所述阳极修复桥位于相邻两个颜色相同的子像素所对应的所述阳极之间。
  17. 根据权利要求11所述的显示基板,其中,相邻两条所述数据线和相邻两条所述扫描线围成的区域内设置有两个相同颜色的子像素。
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