WO2023024139A1 - 显示面板 - Google Patents

显示面板 Download PDF

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Publication number
WO2023024139A1
WO2023024139A1 PCT/CN2021/116139 CN2021116139W WO2023024139A1 WO 2023024139 A1 WO2023024139 A1 WO 2023024139A1 CN 2021116139 W CN2021116139 W CN 2021116139W WO 2023024139 A1 WO2023024139 A1 WO 2023024139A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel
display area
metal layer
driving circuit
display
Prior art date
Application number
PCT/CN2021/116139
Other languages
English (en)
French (fr)
Inventor
刘俊
李伟
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/600,062 priority Critical patent/US20230053413A1/en
Publication of WO2023024139A1 publication Critical patent/WO2023024139A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance

Definitions

  • the present application relates to the field of display technology, in particular to a display panel.
  • the current under-screen camera technology sets optical modules such as the front camera, infrared sensing device, and fingerprint reader in the display area.
  • optical module When the optical module needs to be used, the light penetrates the display panel to reach the optical The module is ultimately utilized by the optical module.
  • FIG. 1 is a design scheme of an under-screen camera area in the prior art.
  • Figure 1 is only a partial schematic view of the under-screen imaging area of the display panel.
  • the display panel includes a normal display area AA and an under-screen imaging area TA.
  • the under-screen imaging area TA includes a driving area A, a transition driving area B and In the high-transparency area C, the driving area A is provided with a driving unit, and the high-transparency area C is not provided with a driving unit, so the display pixels located in the high-transparency area C pass through the wiring provided in the transition driving area B It is electrically connected with the driving unit located in the driving area A to emit light, thereby increasing the light transmittance of the high transmission area C.
  • the metal wiring densities of the driving region A and the transition driving region B are obviously different, which leads to the problem of uneven display in the two regions, which seriously affects the display effect.
  • the purpose of the present application is to provide a display panel, which is used to solve the technical problem of uneven display in the two regions due to the difference in metal routing density between the driving region A and the transition driving region B in the prior art .
  • the present application provides a display panel, the display panel includes a first display area, and the first display area includes a plurality of first display pixels and a plurality of first pixel driving circuits arranged in an array, wherein The first pixel driving circuit is electrically connected to the first display pixel; and a second display area, the second display area includes a light-transmissive display area, located between the light-transmissive display area and the first display area The drive display area between them, and the transition display area between the light-transmitting display area and the drive display area, and/or between the drive display area and the first display area;
  • the second display area further includes a plurality of second display pixels arranged in an array, the drive display area includes a plurality of second pixel drive circuits, and the second pixel drive circuits are connected to the second display pixel circuits.
  • the transition display area includes a plurality of third pixel drive circuits;
  • the arrangement density of the third pixel driving circuits in the transition display area is less than or equal to the arrangement density of the second pixel driving circuits in the driving display area.
  • the drive display area includes a plurality of first pixel drive circuit islands, and the first pixel drive circuit islands include the plurality of second pixel drive circuits; the transition display area includes a plurality of second pixel drive circuits; A pixel driving circuit island, the second pixel driving circuit island includes the plurality of third pixel driving circuits.
  • the arrangement density of the first pixel driving circuit islands in the driving display area is greater than or equal to the arrangement density of the second pixel driving circuit islands in the transition display area.
  • the arrangement density of the second pixel driving circuit in the area occupied by the first pixel driving circuit island is greater than or equal to that of the third pixel driving circuit in the area occupied by the second pixel driving circuit island.
  • the distribution density of the area is greater than or equal to that of the third pixel driving circuit in the area occupied by the second pixel driving circuit island.
  • the arrangement density of the first pixel driving circuits in the first display area is smaller than the arrangement density of the third pixel driving circuits in the transition display area.
  • the third pixel driving circuit is not electrically connected to the first display pixel and the second display pixel.
  • the second pixel driving circuit provides a driving signal to the second display pixel
  • the third pixel driving circuit does not provide a driving signal to the first display pixel and the second display pixel
  • the second pixel driving circuit includes a semiconductor layer, a first metal layer, a second metal layer, and a third metal layer stacked from bottom to top, and the first metal layer includes a scan line and a light emitting layer.
  • Control signal lines the second metal layer includes reset lines
  • the third metal layer includes data lines and power supply voltage lines
  • the third metal layer passes through the first through hole, the second through hole and the third through hole respectively.
  • the hole is electrically connected with the semiconductor layer, the second metal layer and the first metal layer;
  • the third pixel driving circuit includes the semiconductor layer, the first metal layer, the second metal layer and the third metal layer stacked from bottom to top, and the first metal layer includes the scanning lines and the light emission control signal lines, the second metal layer includes the reset lines, the third metal layer includes the data lines and the power supply voltage lines, wherein the third pixel driving circuit is not At least one of the first through hole, the second through hole or the third through hole is provided.
  • the first via hole includes a first sub-via electrically connecting the data line and the semiconductor layer and a second sub-via electrically connecting the power voltage line and the semiconductor layer. hole; wherein, the third pixel driving circuit is not provided with the first sub-hole and/or the second through-hole.
  • the third pixel driving circuit is not provided with the first through hole, the second through hole and the third through hole.
  • the present application provides another display panel, which includes: a first display area, the first display area includes a plurality of first display pixels arranged in an array and a plurality of first pixel driving circuits, wherein the first pixel driving The circuit is electrically connected to the first display pixel; and a second display area, the second display area includes a light-transmissive display area, and a driving display area located between the light-transmissive display area and the first display area , and a transitional display area located between the light-transmitting display area and the driving display area, and/or between the driving display area and the first display area;
  • the second display area further includes a plurality of second display pixels arranged in an array, the drive display area includes a plurality of second pixel drive circuits, and the second pixel drive circuits are connected to the second display pixel circuits.
  • the transition display area includes a plurality of third pixel drive circuits;
  • the third pixel driving circuit is not electrically connected to the first display pixel and the second display pixel or the third pixel driving circuit does not provide a driving signal to the first display pixel and the second display pixel.
  • Second display pixel Second display pixel.
  • the driving display area includes a plurality of first pixel driving circuit islands, and the first pixel driving circuit islands include the plurality of second pixel driving circuits;
  • the transitional display area includes a plurality of second pixel driver circuit islands, and the second pixel driver circuit island includes the plurality of third pixel driver circuits.
  • the arrangement density of the first pixel driving circuit islands in the driving display area is greater than or equal to the arrangement density of the second pixel driving circuit islands in the transition display area.
  • the arrangement density of the second pixel driving circuit in the area occupied by the first pixel driving circuit island is greater than or equal to that of the third pixel driving circuit in the area occupied by the second pixel driving circuit island.
  • the distribution density of the area is greater than or equal to that of the third pixel driving circuit in the area occupied by the second pixel driving circuit island.
  • the arrangement density of the first pixel driving circuits in the first display area is smaller than the arrangement density of the third pixel driving circuits in the transition display area.
  • the second pixel driving circuit includes a semiconductor layer, a first metal layer, a second metal layer, and a third metal layer stacked from bottom to top, and the first metal layer includes a scan line and a light emitting layer.
  • Control signal lines the second metal layer includes reset lines
  • the third metal layer includes data lines and power supply voltage lines
  • the third metal layer passes through the first through hole, the second through hole and the third through hole respectively.
  • the hole is electrically connected with the semiconductor layer, the second metal layer and the first metal layer;
  • the third pixel driving circuit includes the semiconductor layer, the first metal layer, the second metal layer and the third metal layer stacked from bottom to top, and the first metal layer includes the scanning lines and the light emission control signal lines, the second metal layer includes the reset lines, the third metal layer includes the data lines and the power supply voltage lines, wherein the third pixel driving circuit is not At least one of the first through hole, the second through hole or the third through hole is provided.
  • the first via hole includes a first sub-via electrically connecting the data line and the semiconductor layer and a second sub-via electrically connecting the power voltage line and the semiconductor layer. hole; wherein, the third pixel driving circuit is not provided with the first sub-hole and/or the second through-hole.
  • the beneficial effect of the present application is that the display panel of the present application is provided with a plurality of third pixel drive circuits in the transition display area, and the arrangement density of the third pixel drive circuits is less than or equal to that in the drive display area.
  • the arrangement density of the second pixel driving circuit can further improve the technical problem of uneven display in the two regions caused by the difference in metal routing density between the driving region A and the transition driving region B in the prior art, Thereby, the display effect of the camera area under the screen is improved.
  • the third pixel driving circuit is not electrically connected to the first display pixel and the second display pixel, that is, the present application can not drive the display pixel to emit light by setting in the transition display area
  • the driving circuit (that is, the pseudo-driving circuit) can further improve the existing technology without affecting the inherent circuit design of the display panel. There are technical issues with uneven display.
  • Fig. 1 is a design scheme of a camera area under the screen in the prior art
  • FIG. 2A is a first schematic diagram of the second display area in the embodiment of the present application.
  • FIG. 2B is a second schematic diagram of the second display area in the embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of the transition display area in the embodiment of the present application.
  • FIG. 4 is a schematic diagram of a first display pixel and a second display pixel in an embodiment of the present application
  • FIG. 5 is a schematic diagram of the layout of the pixel driving circuit in the embodiment of the present application.
  • FIG. 6 is a schematic plan view of a second pixel driving circuit in an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a first planar structure of a third pixel driving circuit in an embodiment of the present application.
  • FIG. 8 is a schematic diagram of a second planar structure of a third pixel driving circuit in an embodiment of the present application.
  • FIG. 9 is a schematic diagram of a third planar structure of a third pixel driving circuit in an embodiment of the present application.
  • FIG. 10 is a schematic diagram of the working principle of the 7T1C circuit in the embodiment of the present application.
  • first and second are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features.
  • a feature defined as “first” or “second” may explicitly or implicitly include one or more of said features.
  • “plurality” means two or more, unless otherwise specifically defined.
  • FIG. 1 is a design scheme of an under-screen camera area in the prior art.
  • the display panel includes a normal display area AA and an under-screen imaging area TA.
  • the under-screen imaging area TA includes a driving area A, a transition driving area B and a high-transparency area C.
  • the driving area A is provided with a driving unit.
  • the high-transparency area C is not provided with a drive unit, so the display pixels located in the high-transparency area C are electrically connected to the drive unit located in the drive area A through the wiring provided in the transition drive area B to emit light, thereby The light transmittance of the high transmittance region C is increased.
  • the metal wiring densities of the driving region A and the transition driving region B are obviously different, which leads to the problem of uneven display in the two regions, which seriously affects the display effect.
  • the present application provides a display panel, more specifically an organic light-emitting diode (Organic Light-Emitting Diode, OLED) display panel.
  • the display panel includes a first display area 101 and a second display area 102 .
  • the first display area 101 includes a plurality of first display pixels 101p arranged in an array and a plurality of first pixel driving circuits 1011, wherein the first pixel driving circuits 1011 are electrically connected to the first display pixels 101p;
  • the second display area 102 includes a light-transmissive display area 102a, a drive display area 102c located between the light-transmissive display area 102a and the first display area 101, and a drive display area 102c located between the light-transmissive display area 102a and the first display area 101.
  • the transitional display area 102b between the driving display areas 102c and/or between the driving display area 102c and the first display area 101 .
  • FIG. 2A and FIG. 2B of the present application only show that the transitional display area 102b is located between the light-transmitting display area 102a and the driving display area 102c, in another embodiment of the present application The transitional display area 102b can also be located between the driving display area 102c and the first display area 101 .
  • the second display area 102 includes a plurality of second display pixels 102p arranged in an array, the driving display area 102c includes a plurality of second pixel driving circuits 10211, and the second pixel driving circuits 10211 are connected to the second display The pixels 102p are electrically connected, and the transitional display area 102b includes a plurality of third pixel driving circuits 10221 .
  • the arrangement density of the third pixel driving circuits 10221 in the transitional display area 102b is less than or equal to the arrangement density of the second pixel driving circuits 10211 in the driving display area 102c.
  • a plurality of third pixel driving circuits 10221 are arranged in the transitional display area 102b, and the arrangement density of the third pixel driving circuits 10221 is less than or equal to that of the third pixel driving circuits in the driving display area 102c.
  • the arrangement density of the two-pixel driving circuit 10211 can further improve the technical problem of uneven display in the two regions caused by the difference in the metal wiring density of the driving region A and the transition driving region B in the prior art, thereby improving The display effect of the camera area under the screen.
  • the drive display area 102c includes a plurality of first pixel drive circuit islands 1021, and the first pixel drive circuit islands 1021 include the plurality of second pixel drive circuits 10211; the transition display area 102b includes a plurality of The second pixel driving circuit island 1022 , the second pixel driving circuit island 1022 includes the plurality of third pixel driving circuits 10221 .
  • the shape of the light-transmitting display area 102a includes one of ellipse, circle, or rectangle, and the shapes of the driving display area 102c and the transitional display area 102b include One of oval ring, circular ring or square ring.
  • the shape of the second display area 102 can be set according to specific conditions.
  • the driving display area 102c and the transitional display area 102b are arranged around the light-transmitting display area 102a, their shape changes in a ring along with the shape of the light-transmitting display area 102a.
  • the arrangement shapes of the first pixel driving circuit island 1021 and the second pixel driving circuit island 1022 are set according to the shapes of the driving display area 102c and the transition display area 102b.
  • the arrangement shape of the first pixel driving circuit island 1021 and the second pixel driving circuit island 1022 is strip shape, and the present application is not limited thereto, and can be arranged according to specific situations.
  • the arrangement shapes of the first pixel driving circuit island 1021 and the second pixel driving circuit island 1022 are the same (in this embodiment, they are both strip-shaped), which can further make the transition display area 102b
  • the metal wiring density can be similar to the metal wiring density of the driving display area 102c, thereby improving the technical problem of display unevenness caused by different light reflectivity due to different metal wiring densities.
  • the circuit layout of the transitional display area 102b is the same as or similar to that of the drive display area 102c, which can further effectively improve the problem of uneven display caused by the different metal wiring densities in these two areas. , to improve the display effect.
  • the arrangement density of the first pixel driving circuit island 1021 in the driving display area 102c is greater than or equal to that of the second pixel driving circuit island 1022 in the transition
  • the arrangement density of the display area 102b is greater than or equal to that of the second pixel driving circuit island 1022 in the transition. Therefore, the problem of uneven display caused by the difference in the density of metal traces in the two regions can be further effectively improved, and the display effect can be improved.
  • the arrangement density of the second pixel driving circuit 10211 in the area occupied by the first pixel driving circuit island 1021 is greater than or equal to that of the third pixel driving circuit 10221 in the second pixel driving circuit island 1021.
  • the arrangement density of the area occupied by the pixel driving circuit island 1022; that is, the arrangement density of the second pixel driving circuit 10211 in the driving display area 102c is greater than or equal to that of the third pixel driving circuit 10221 in the transition
  • the arrangement density of the display area 102b Therefore, the problem of uneven display caused by the difference in the density of metal traces in the two regions can be further effectively improved, and the display effect can be improved.
  • the arrangement density of the first pixel driving circuits 1011 in the first display area 101 is smaller than the arrangement density of the second pixel driving circuits 10211 in the driving display area 102c.
  • the arrangement density of the second pixel driving circuits 10211 in the driving display area 102c is equal to the arrangement density of the third pixel driving circuits 10221 in the transition display area 102b
  • the The arrangement density of the first pixel driving circuits 1011 in the first display area 101 can be as similar as possible to the arrangement density of the third pixel driving circuits 10221 in the transition display area 102b, so that the first pixel driving circuits 10221 can be further made
  • a display area 101 has a uniform display effect with the driving display area 102c and the transition display area 102b, thereby improving the overall display effect of the display panel.
  • the arrangement and quantity of the first pixel driving circuit 1011 in the first display area 101, the arrangement and quantity of the second pixel driving circuit 10211 in the first pixel driving circuit island 1021 The arrangement and quantity, and the arrangement and quantity of the third pixel driving circuit 10221 on the second pixel driving circuit island 1022 are just examples, and the present application is not limited thereto, and can be set according to specific situations.
  • the third pixel driving circuit 10221 is not electrically connected to the first display pixel 101p and the second display pixel 102p. Specifically, the second pixel driving circuit 10211 provides a driving signal to the second display pixel 102p, and the third pixel driving circuit 10221 does not provide a driving signal to the first display pixel 101p and the second display pixel 101p. Pixel 102p.
  • the transitional display area 102b also includes a signal wiring 102b1, the signal wiring 102b1 is not electrically connected to the third pixel driving circuit 10221 and is used to transmit the driving signal from the second pixel
  • the driving circuit 10211 transmits to the second display pixel 102p of the light-transmitting display area 102a to drive it to emit light; that is, the light-transmitting display area 102a is not provided with a driving unit, so it is located in the second display pixel 102p of the light-transmitting display area 102a
  • the second display pixel 102p emits light by electrically connecting the signal wire 102b1 arranged in the transitional display area 102b to the second pixel driving circuit 10211 located in the driving display area 102c, thereby improving the light transmission
  • the light transmittance of the display area 102a is not electrically connected to the third pixel driving circuit 10221 and is used to transmit the driving signal from the second pixel
  • the driving circuit 10211 transmits to the second display
  • the present application increases the metal routing density of the transition display area 102b by setting the third pixel drive circuit 10221 (that is, a dummy drive circuit) that cannot drive display pixels to emit light in the transition display area 102b, without affecting the Under the inherent circuit driving design of the above-mentioned display panel, it can improve the technical problem of uneven display in the two areas caused by the difference in the metal wiring density of the driving area A and the transition driving area B in the prior art, thereby improving the display performance of the display panel.
  • the fact that the third pixel driving circuit 10221 is not electrically connected to the second display pixel 102p means that the driving signal cannot pass through the second pixel driving circuit island 1022 to drive the second display pixel 102p to emit light. . Therefore, by setting the third pixel driving circuit 10221 as a dummy driving circuit, the metal routing density of the transition display area 102b can be increased without affecting the inherent circuit driving design of the display panel, thereby making the transition
  • the metal wiring density of the display area 102b is similar to the metal wiring density of the driving display area 102c, thereby improving the technical problem of display unevenness caused by different light reflectivity due to different metal wiring densities. Therefore, the display panel of the present application can improve the display effect of the camera area under the screen.
  • each first display pixel 101p includes a first red sub-pixel 101p1, a first green sub-pixel 101p3 and a first green sub-pixel 101p3.
  • the first red sub-pixel 101p1 , the first green sub-pixel 101p3 and the first blue sub-pixel 101p2 are distributed in a Pentile design in the first display area 101 .
  • the first green sub-pixel 101p3 is oval in shape, and the first red sub-pixel 101p1 and the first blue sub-pixel 101p2 are octagonal in shape.
  • the first display area 101 described in this application may also include other pixel arrangements, but is not limited thereto.
  • one first pixel driving circuit 1011 correspondingly drives one sub-pixel of the first display area 101 (that is, the first red sub-pixel 101p1, the first green sub-pixel 101p3 and the first blue sub-pixel One of the pixels 101p2) emits light.
  • the first pixel driving circuit 1011 may adopt any one of common 7T1C, 6T1C, 5T1C, 4T1C, 3T1C and 2T1C.
  • the plurality of second display pixels 102p are evenly arranged in the second display area 102, that is, the plurality of second display pixels 102p are evenly arranged in the light-transmitting display area 102a, The driving display area 102c and the transition display area 102b.
  • Each second display pixel 102p includes a second red sub-pixel 102p1, a second green sub-pixel 102p3 and a second blue sub-pixel 102p2.
  • the second red sub-pixel 102p1 , the second green sub-pixel 102p3 and the second blue sub-pixel 102p2 are distributed in a Pentile design in the second display area 102 .
  • the shapes of the second red sub-pixel 102p1 , the second green sub-pixel 102p3 and the second blue sub-pixel 102p2 are all circular.
  • the second display area 102 described in this application may also include other pixel arrangements, but is not limited thereto.
  • the size of the first red sub-pixel 101p1 is larger than the size of the second red sub-pixel 102p1
  • the size of the first green sub-pixel 101p3 is larger than the size of the second green sub-pixel 102p3
  • the first blue is larger
  • the size of the sub-pixel 101p2 is larger than the size of the second blue sub-pixel 102p2, so as to ensure that the light-transmitting display area 102a has a high light transmittance.
  • the second pixel driving circuit 10211 is used to drive the second display pixel 102p to emit light, that is, the second pixel driving circuit 10211 of the first pixel driving circuit island 1021 is used to drive the driving display area 102c and the transition While the second display pixel 102p of the display area 102b emits light, it is also used to drive the second display pixel 102p of the light-transmitting display area 102a to emit light, so as to avoid setting a pixel driving circuit in the light-transmitting display area 102a, thereby avoiding pixel driving
  • the metal film layer of the circuit affects the light transmittance of the light-transmissive display area 102a, thereby further improving the light transmittance of the light-transmissive display area 102a.
  • a second pixel driving circuit 10211 can be used to drive at least two of the plurality of second red sub-pixels 102p1, the plurality of second green sub-pixels 102p3 and the plurality of second blue sub-pixels 102p2, so as to reduce the second pixel driving
  • the number of circuits 10211 reduces the space occupied by the first pixel driving circuit island 1021, so that the size of the light-transmitting display area 102a can be increased.
  • the second pixel driving circuit 10211 and the third pixel driving circuit 10221 have the same circuit structure.
  • the second pixel driving circuit 10211 and the third pixel driving circuit 10221 can have the same metal wiring density , so as to further effectively improve the problem of display unevenness caused by the different metal wiring densities in these two regions, and improve the display effect.
  • the circuit structure may adopt any one of common 7T1C, 6T1C, 5T1C, 4T1C, 3T1C and 2T1C.
  • This application uses the circuit structure and working principle of 7T1C as an example to illustrate, but this application is not limited to this, and it can be set according to specific situations.
  • the circuit working principle of 7T1C can be divided into three steps, M1 to M7 respectively represent the first thin film transistor M1, the second thin film transistor M2, the third thin film transistor M3, the fourth thin film transistor M4, the fifth thin film transistor M5, the sixth thin film transistor M6 and the seventh thin film transistor M7, C1 represents a capacitor, the scan line scan[n] of the nth order controls the gate voltage of the second thin film transistor M2, the third thin film transistor M3 and the seventh thin film transistor M7, The scan line scan[n-1] of the n-1th stage controls the gate voltage of the fourth thin film transistor M4, and the light emission control signal line em[n] of the nth stage controls the gates of the fifth thin film transistor M5 and the sixth thin film transistor M6 Voltage.
  • the first step (1) the scan line scan[n-1] of the n-1th step turns on the fourth thin film transistor M4, at this time the reset signal of the reset line VI is a low potential, and the gate of the first thin film transistor M1 is high Therefore, the gate voltage of the first thin film transistor M1 will recover to be the same as the voltage of the reset signal, and this step is also the gate reset of the first thin film transistor M1.
  • the second step (2) the scan line scan[n] of the nth stage is at a low potential and turns on the second thin film transistor M2, the third thin film transistor M3 and the seventh thin film transistor M7, and at this time the data signal data passes through the second thin film transistor M2 and the third thin film transistor M3 are transmitted to the gate of the first thin film transistor M1, so that the gate voltage of the first thin film transistor M1 increases gradually.
  • the M5 and the sixth TFT M6 charge the anode to make the organic light emitting diode (OLED) emit light.
  • the second pixel driving circuit 10211 includes a semiconductor layer 4, a first metal layer 3, a second metal layer 2, and a third metal layer 1 stacked from bottom to top.
  • the first metal layer 3 includes scanning lines Scan and light emission control signal lines EM
  • the second metal layer 2 includes reset lines VI
  • the third metal layer 1 includes data lines DL and power supply voltage lines VDD
  • the third The metal layer 1 is electrically connected to the semiconductor layer 4 , the second metal layer 2 and the first metal layer 3 through the first through hole 11 , the second through hole 12 and the third through hole 13 respectively.
  • circuit patterns of the first metal layer 3, the second metal layer 2, the third metal layer 1, and the semiconductor layer 4 are shown on the left side of FIG. 6, and the circuit patterns on the right side of FIG.
  • the third pixel driving circuit 10221 has the same or similar circuit structure as that of the second pixel driving circuit 10211, that is, the first metal layer 3 and the second metal layer in the third pixel driving circuit 10221
  • the circuit pattern of each layer of layer 2 , the third metal layer 1 and the semiconductor layer 4 is the same as that of the second pixel driving circuit 10211 . Therefore, the third pixel driving circuit 10221 includes the semiconductor layer 4, the first metal layer 3, the second metal layer 2, and the third metal layer 1 stacked from bottom to top.
  • the first metal layer 3 includes the scanning line Scan and the light emission control signal line EM
  • the second metal layer 2 includes the reset line VI
  • the third metal layer 1 includes the data line DL and the Power supply voltage line VDD.
  • the third pixel driving circuit 10221 is not provided with at least one of the first through hole 11 , the second through hole 12 or the third through hole 13 .
  • the data line DL is used to transmit data signals
  • the power supply voltage line VDD is used to transmit power supply voltage signals
  • the scan line Scan is used to transmit scan signals
  • the reset line VI is used to transmit reset signals and/or initialization signals
  • the light emission control signal line EM is used to transmit light emission control signals.
  • the present application does not provide at least one of the first through hole 11, the second through hole 12, or the third through hole 13 in the third pixel driving circuit 10221, so as to
  • the third pixel driving circuit 10221 as a dummy driving circuit, can increase the metal wiring density of the transitional display area 102b without affecting the inherent circuit driving design of the display panel, thereby making the transitional display area 102b
  • the metal wiring density can be similar to the metal wiring density of the driving display area 102c, thereby improving the technical problem of display unevenness caused by different light reflectivity due to different metal wiring densities.
  • the present application makes the third pixel driving circuit 10221 have the same or similar circuit structure as the second pixel driving circuit 10211, and only removes the electrical connection between the metal film layers in the third pixel driving circuit 10221
  • the through-hole structure can only omit the hole-digging step in the third pixel driving circuit 10221 without adding additional process steps, so that the third pixel driving circuit 10221 can be connected with the second pixel
  • the driving circuit 10211 has the same or similar metal wiring density, so that the driving display area 102c and the transitional display area 102b can further have a uniform display effect.
  • the present application can block the signal transmission of the third pixel driving circuit 10221 without adding additional process technology and without changing the inherent circuit driving design by removing the via structure required for the signal transmission path. Therefore, the third pixel driving circuit 10221 can be used as a dummy driving circuit, so that the metal wiring density of the transition display area 102b can be similar to the metal wiring density of the driving display area 102c, thereby improving the metal wiring density Different technical problems lead to uneven display due to different reflectivity of light.
  • the first through hole 11 includes a first sub-through hole 111 electrically connecting the data line DL and the semiconductor layer 4 and an electrical
  • the second sub-through hole 112 is connected to the power supply voltage line VDD and the semiconductor layer 4 ; wherein, the third pixel driving circuit 10221 is not provided with the first sub-through hole 111 .
  • the data signal data in the second step (2) is transmitted to the second
  • the channel of the thin film transistor M2 becomes disconnected, so that the data signal cannot be transmitted to the third pixel driving circuit 10221 through the data line DL, and thus the third pixel driving circuit 10221 cannot be turned on to drive the display pixel to emit light. .
  • the third pixel driving circuit 10221 as a dummy driving circuit can increase the metal routing density of the transitional display area 102b without affecting the inherent circuit driving design of the display panel, thereby making the transitional display area 102b
  • the metal wiring density of 102b is similar to the metal wiring density of the driving display area 102c, thereby improving the technical problem of display unevenness caused by different light reflectivity due to different metal wiring densities.
  • the first sub-via 111 is only removed in the third pixel driving circuit 10221, and only the first sub-hole 111 in the third pixel driving circuit 10221 can be omitted without additional process steps.
  • the step of digging a sub-via hole 111 can make the third pixel driving circuit 10221 and the second pixel driving circuit 10211 have the same or similar metal routing density. Therefore, the driving display area 102c and the transitional display area 102b can further have a uniform display effect.
  • the third pixel driving circuit 10221 is not provided with the second sub-via 112 .
  • the power supply voltage signal in the third step (3) is transmitted to the second The channel of the five thin-film transistors M5 becomes disconnected, which can prevent the power supply voltage signal from being transmitted to the third pixel driving circuit 10221 via the power supply voltage line VDD, and thus make the third pixel driving circuit 10221 unable to conduct and drive Display pixels glow.
  • the third pixel driving circuit 10221 as a dummy driving circuit can increase the metal routing density of the transitional display area 102b without affecting the inherent circuit driving design of the display panel, thereby making the transitional display area 102b
  • the metal wiring density of 102b is similar to the metal wiring density of the driving display area 102c, thereby improving the technical problem of display unevenness caused by different light reflectivity due to different metal wiring densities.
  • the second sub-via 112 is only removed in the third pixel driving circuit 10221, and only the second sub-hole 112 in the third pixel driving circuit 10221 can be omitted without additional process steps.
  • the step of digging two sub-vias 112 can make the third pixel driving circuit 10221 and the second pixel driving circuit 10211 have the same or similar metal routing density. Therefore, the driving display area 102c and the transitional display area 102b can further have a uniform display effect.
  • the third pixel driving circuit 10221 is not provided with the first through hole 11, the second through hole 12 and the the third through hole 13 .
  • the third pixel driving circuit 10221 by removing all the via structures in the third pixel driving circuit 10221, that is, all the signal transmission paths in the first step (1) to the third step (3)
  • the channels are all disconnected, so that all metal film layers are not electrically connected, so that the third pixel driving circuit 10221 cannot be turned on to drive the display pixels to emit light.
  • the third pixel driving circuit 10221 as a dummy driving circuit can increase the metal routing density of the transitional display area 102b without affecting the inherent circuit driving design of the display panel, thereby making the transitional display area 102b
  • the metal wiring density of 102b is similar to the metal wiring density of the driving display area 102c, thereby improving the technical problem of display unevenness caused by different light reflectivity due to different metal wiring densities.
  • the driving display area 102c and the transitional display area 102b can further have a uniform display effect.

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Abstract

一种显示面板，显示面板包括第一显示区（101）及第二显示区（102），第二显示区（102）包括透光显示区（102a）、驱动显示区（102c），以及过渡显示区（102b）；过渡显示区（102b）中的第三像素驱动电路（10221）的排布密度小于或等于驱动显示区（102c）中的第二像素驱动电路（10211）的排布密度。

Description

显示面板 技术领域
本申请涉及显示技术领域，特别涉及一种显示面板。
 背景技术
随着显示技术的快速发展，高屏占比已成为小尺寸显示面板领域的热点。为了实现真正的全面屏，目前屏下摄像头技术将前置摄像头、红外感测器件、指纹识别器等光学模组设置在显示区内，当需要使用光学模组时，光线穿透显示面板到达光学模组最终被光学模组利用。
为了提高屏下摄像（Camera Under Panel，CUP）区的透过率，在一种设计方案中，将CUP区设计区分为驱动区和高透区，通过驱动区的驱动单元来控制CUP区像素的发光，且将光学模组的感光器件放置在透过率最大的高透区，以确保光学模组能够接收到足够多的光量。如图1所示，图1为现有技术中一种屏下摄像区的设计方案。图1所示仅为显示面板在屏下摄像区的局部示意图，所述显示面板包括正常显示区AA及屏下摄像区TA，所述屏下摄像区TA包括驱动区A、过渡驱动区B及高透区C，所述驱动区A设置有驱动单元，所述高透区C未设置有驱动单元，因此位于所述高透区C的显示像素通过设置在所述过渡驱动区B的走线与位于所述驱动区A的驱动单元电性连接而发光，从而提高所述高透区C的透光率。然而，该设计方案中的驱动区A和过渡驱动区B的金属走线密度明显不同，导致两区存在显示不均的问题，进而严重影响显示效果。
 技术问题
因此，急需改善现有技术中因所述驱动区A和所述过渡驱动区B的金属走线密度不同而导致两区存在显示不均的技术问题。
 技术解决方案
本申请的目的在于，提供一种显示面板，用于解决现有技术中，因所述驱动区A和所述过渡驱动区B的金属走线密度不同而导致两区存在显示不均的技术问题。
为了解决上述问题，本申请提供一种显示面板，所述显示面板包括第一显示区，所述第一显示区包括阵列排布的多个第一显示像素及多个第一像素驱动电路，其中所述第一像素驱动电路与所述第一显示像素电性连接；及第二显示区，所述第二显示区包括透光显示区，位于所述透光显示区与所述第一显示区之间的驱动显示区，以及位于所述透光显示区与所述驱动显示区之间、和/或位于所述驱动显示区与所述第一显示区之间的过渡显示区；
其中，所述第二显示区还包括多个阵列排布的第二显示像素，所述驱动显示区包括多个第二像素驱动电路，所述第二像素驱动电路与所述第二显示像素电性连接，所述过渡显示区包括多个第三像素驱动电路；
其中，所述过渡显示区中的所述第三像素驱动电路的排布密度小于或等于所述驱动显示区中的所述第二像素驱动电路的排布密度。
在一些实施例中，所述驱动显示区包括多个第一像素驱动电路岛，所述第一像素驱动电路岛包括所述多个第二像素驱动电路；所述过渡显示区包括多个第二像素驱动电路岛，所述第二像素驱动电路岛包括所述多个第三像素驱动电路。
在一些实施例中，所述第一像素驱动电路岛在所述驱动显示区的排布密度大于或等于所述第二像素驱动电路岛在所述过渡显示区的排布密度。
在一些实施例中，所述第二像素驱动电路在所述第一像素驱动电路岛所占区域的排布密度大于或等于所述第三像素驱动电路在所述第二像素驱动电路岛所占区域的排布密度。
在一些实施例中，所述第一像素驱动电路在所述第一显示区的排布密度小于所述第三像素驱动电路在所述过渡显示区的排布密度。
在一些实施例中，所述第三像素驱动电路与所述第一显示像素及所述第二显示像素皆未电性连接。
在一些实施例中，所述第二像素驱动电路提供驱动信号给所述第二显示像素，所述第三像素驱动电路不提供驱动信号给所述第一显示像素及所述第二显示像素。
在一些实施例中，所述第二像素驱动电路包括由下到上层迭设置的半导体层、第一金属层、第二金属层与第三金属层，所述第一金属层包括扫描线及发光控制信号线，所述第二金属层包括复位线，所述第三金属层包括数据线及电源电压线，且所述第三金属层分别通过第一通孔、第二通孔及第三通孔与所述半导体层、所述第二金属层及所述第一金属层电性连接；
所述第三像素驱动电路包括由下到上层迭设置的所述半导体层、所述第一金属层、所述第二金属层与所述第三金属层，所述第一金属层包括所述扫描线及所述发光控制信号线，所述第二金属层包括所述复位线，所述第三金属层包括所述数据线及所述电源电压线，其中，所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔或所述第三通孔中至少一者。
在一些实施例中，所述第一通孔包括电性连接所述数据线与所述半导体层的第一子通孔及电性连接所述电源电压线与所述半导体层的第二子通孔；其中，所述第三像素驱动电路未设置有所述第一子通孔、和/或所述第二通孔。
在一些实施例中，其中所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔及所述第三通孔。
本申请提供另一种显示面板，其包括:第一显示区，所述第一显示区包括阵列排布的多个第一显示像素及多个第一像素驱动电路，其中所述第一像素驱动电路与所述第一显示像素电性连接；及第二显示区，所述第二显示区包括透光显示区，位于所述透光显示区与所述第一显示区之间的驱动显示区，以及位于所述透光显示区与所述驱动显示区之间、和/或位于所述驱动显示区与所述第一显示区之间的过渡显示区；
其中，所述第二显示区还包括多个阵列排布的第二显示像素，所述驱动显示区包括多个第二像素驱动电路，所述第二像素驱动电路与所述第二显示像素电性连接，所述过渡显示区包括多个第三像素驱动电路；
其中，所述第三像素驱动电路与所述第一显示像素及所述第二显示像素皆未电性连接或所述第三像素驱动电路不提供驱动信号给所述第一显示像素及所述第二显示像素。
在一些实施例中，所述驱动显示区包括多个第一像素驱动电路岛，所述第一像素驱动电路岛包括所述多个第二像素驱动电路；
所述过渡显示区包括多个第二像素驱动电路岛，所述第二像素驱动电路岛包括所述多个第三像素驱动电路。
在一些实施例中，所述第一像素驱动电路岛在所述驱动显示区的排布密度大于或等于所述第二像素驱动电路岛在所述过渡显示区的排布密度。
在一些实施例中，所述第二像素驱动电路在所述第一像素驱动电路岛所占区域的排布密度大于或等于所述第三像素驱动电路在所述第二像素驱动电路岛所占区域的排布密度。
在一些实施例中，所述第一像素驱动电路在所述第一显示区的排布密度小于所述第三像素驱动电路在所述过渡显示区的排布密度。
在一些实施例中，所述第二像素驱动电路包括由下到上层迭设置的半导体层、第一金属层、第二金属层与第三金属层，所述第一金属层包括扫描线及发光控制信号线，所述第二金属层包括复位线，所述第三金属层包括数据线及电源电压线，且所述第三金属层分别通过第一通孔、第二通孔及第三通孔与所述半导体层、所述第二金属层及所述第一金属层电性连接；
所述第三像素驱动电路包括由下到上层迭设置的所述半导体层、所述第一金属层、所述第二金属层与所述第三金属层，所述第一金属层包括所述扫描线及所述发光控制信号线，所述第二金属层包括所述复位线，所述第三金属层包括所述数据线及所述电源电压线，其中，所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔或所述第三通孔中至少一者。
在一些实施例中，所述第一通孔包括电性连接所述数据线与所述半导体层的第一子通孔及电性连接所述电源电压线与所述半导体层的第二子通孔；其中，所述第三像素驱动电路未设置有所述第一子通孔、和/或所述第二通孔。
 有益效果
本申请的有益效果为，本申请的显示面板在所述过渡显示区设置有多个第三像素驱动电路，且所述第三像素驱动电路的排布密度小于或等于所述驱动显示区中的所述第二像素驱动电路的排布密度，进而能够改善现有技术中因所述驱动区A和所述过渡驱动区B的金属走线密度不同而导致两区存在显示不均的技术问题，进而提高屏下摄像区的显示效果。
且进一步的，所述第三像素驱动电路与所述第一显示像素及所述第二显示像素皆未电性连接，亦即，本申请通过在所述过渡显示区设置无法驱动显示像素发光的驱动电路(即伪驱动电路)，进而能在不影响显示面板固有的电路设计下，改善现有技术中因所述驱动区A和所述过渡驱动区B的金属走线密度不同而导致两区存在显示不均的技术问题。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中一种屏下摄像区的设计方案；
图2A为本申请实施例中第二显示区的第一种示意图；
图2B为本申请实施例中第二显示区的第二种示意图；
图3为本申请实施例中过渡显示区的结构示意图；
图4为本申请实施例中第一显示像素与第二显示像素的示意图；
图5为本申请实施例中像素驱动电路的排布示意图；
图6为本申请实施例中第二像素驱动电路的平面结构示意图；
图7为本申请实施例中第三像素驱动电路的第一种平面结构示意图；
图8为本申请实施例中第三像素驱动电路的第二种平面结构示意图；
图9为本申请实施例中第三像素驱动电路的第三种平面结构示意图；
图10为本申请实施例中7T1C电路的工作原理示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或组件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
现结合具体实施例对本申请的技术方案进行描述。
如图1所示，图1为现有技术中一种屏下摄像区的设计方案。所述显示面板包括正常显示区AA及屏下摄像区TA，所述屏下摄像区TA包括驱动区A、过渡驱动区B及高透区C，所述驱动区A设置有驱动单元，所述高透区C未设置有驱动单元，因此位于所述高透区C的显示像素通过设置在所述过渡驱动区B的走线与位于所述驱动区A的驱动单元电性连接而发光，从而提高所述高透区C的透光率。然而，该设计方案中的驱动区A和过渡驱动区B的金属走线密度明显不同，导致两区存在显示不均的问题，进而严重影响显示效果。
请参阅图2A、图2B、图3、图4及图5，本申请提供一种显示面板，更具体的是一种有机发光二极管(Organic Light-Emitting Diode，OLED)显示面板。所述显示面板包括第一显示区101及第二显示区102。所述第一显示区101包括阵列排布的多个第一显示像素101p及多个第一像素驱动电路1011，其中所述第一像素驱动电路1011与所述第一显示像素101p电性连接；所述第二显示区102包括透光显示区102a、位于所述透光显示区102a与所述第一显示区101之间的驱动显示区102c、以及位于所述透光显示区102a与所述驱动显示区102c之间和/或位于所述驱动显示区102c与所述第一显示区101之间的过渡显示区102b。
需说明的是，本申请的图2A及图2B虽然只有示出过渡显示区102b位于所述透光显示区102a与所述驱动显示区102c之间，然而在本申请的另一种实施例中，过渡显示区102b亦可位于所述驱动显示区102c与所述第一显示区101之间。
所述第二显示区102包括多个阵列排布的第二显示像素102p，所述驱动显示区102c包括多个第二像素驱动电路10211，所述第二像素驱动电路10211与所述第二显示像素102p电性连接，所述过渡显示区102b包括多个第三像素驱动电路10221。
其中，所述过渡显示区102b中的所述第三像素驱动电路10221的排布密度小于或等于所述驱动显示区102c中的所述第二像素驱动电路10211的排布密度。
因此，本申请通过在所述过渡显示区102b设置有多个第三像素驱动电路10221，且所述第三像素驱动电路10221的排布密度小于或等于所述驱动显示区102c中的所述第二像素驱动电路10211的排布密度，进而能够改善现有技术中因所述驱动区A和所述过渡驱动区B的金属走线密度不同而导致两区存在显示不均的技术问题，进而提高屏下摄像区的显示效果。
进一步的，所述驱动显示区102c包括多个第一像素驱动电路岛1021，所述第一像素驱动电路岛1021包括所述多个第二像素驱动电路10211；所述过渡显示区102b包括多个第二像素驱动电路岛1022，所述第二像素驱动电路岛1022包括所述多个第三像素驱动电路10221。
如图2A及图2B所示，可选地，所述透光显示区102a的形状包括椭圆形、圆形或矩形其中一种，所述驱动显示区102c与所述过渡显示区102b的形状包括椭圆环形、圆环形或者方环形其中一种。所述第二显示区102的形状可依具体情况进行设置。
可以理解的是，由于所述驱动显示区102c与所述过渡显示区102b环绕所述透光显示区102a而设置，因此，其形状随着所述透光显示区102a的形状而呈环形变化。
进一步地，所述第一像素驱动电路岛1021与所述第二像素驱动电路岛1022的排布形状随着所述驱动显示区102c与所述过渡显示区102b的形状而设置。在此实施例，所述第一像素驱动电路岛1021与所述第二像素驱动电路岛1022的排布形状为长条状，本申请不限于此，可依具体情况进行设置。
较佳的，所述第一像素驱动电路岛1021与所述第二像素驱动电路岛1022的排布形状相同(在本实施例均为长条状)，可以进一步使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。
如图3所示，所述过渡显示区102b的电路排布方式与所述驱动显示区102c相同或相近，而可以进一步有效改善此两区域由于金属走线密度不同而引起的显示不均的问题，提升显示效果。
具体而言，在本申请的一种实施例中，所述第一像素驱动电路岛1021在所述驱动显示区102c的排布密度大于或等于所述第二像素驱动电路岛1022在所述过渡显示区102b的排布密度。从而可以进一步有效改善此两区域由于金属走线密度不同而引起的显示不均的问题，提升显示效果。
进一步地，如图5所示，所述第二像素驱动电路10211在所述第一像素驱动电路岛1021所占区域的排布密度大于或等于所述第三像素驱动电路10221在所述第二像素驱动电路岛1022所占区域的排布密度；亦即，所述第二像素驱动电路10211在所述驱动显示区102c的排布密度大于或等于所述第三像素驱动电路10221在所述过渡显示区102b的排布密度。从而可以进一步有效改善此两区域由于金属走线密度不同而引起的显示不均的问题，提升显示效果。
进一步地，所述第一像素驱动电路1011在所述第一显示区101的排布密度小于所述第二像素驱动电路10211在所述驱动显示区102c的排布密度。
可以理解的是，当所述第二像素驱动电路10211在所述驱动显示区102c的排布密度与所述第三像素驱动电路10221在所述过渡显示区102b的排布密度相等时，所述第一像素驱动电路1011在所述第一显示区101的排布密度可以尽可能相似于所述第三像素驱动电路10221在所述过渡显示区102b的排布密度，从而可以进一步使所述第一显示区101与所述驱动显示区102c及所述过渡显示区102b具有均一的显示效果，进而提升所述显示面板整体的显示效果。
需注意的是，图5中所述第一像素驱动电路1011在所述第一显示区101的排布方式及数量、所述第二像素驱动电路10211在所述第一像素驱动电路岛1021的排布方式及数量、以及所述第三像素驱动电路10221在所述第二像素驱动电路岛1022的排布方式及数量仅为例示，本申请不限于此，可依具体情况进行设置。
进一步的，所述第三像素驱动电路10221与所述第一显示像素101p及所述第二显示像素102p皆未电性连接。具体而言，所述第二像素驱动电路10211提供驱动信号给所述第二显示像素102p，所述第三像素驱动电路10221不提供驱动信号给所述第一显示像素101p及所述第二显示像素102p。
可以理解的是，所述过渡显示区102b还包括讯号走线102b1，所述讯号走线102b1与所述第三像素驱动电路10221亦未电性连接且用于将驱动信号从所述第二像素驱动电路10211传递到所述透光显示区102a的第二显示像素102p以驱动其发光；亦即，所述透光显示区102a未设置有驱动单元，因此位于所述透光显示区102a的第二显示像素102p是通过设置在所述过渡显示区102b的所述讯号走线102b1与位于所述驱动显示区102c的所述第二像素驱动电路10211电性连接而发光，从而提高所述透光显示区102a的透光率。
因此，本申请通过在所述过渡显示区102b设置无法驱动显示像素发光的第三像素驱动电路10221(即伪驱动电路)以增加所述过渡显示区102b的金属走线密度，进而在不影响所述显示面板固有的电路驱动设计下，能够改善现有技术中因所述驱动区A和所述过渡驱动区B的金属走线密度不同而导致两区存在显示不均的技术问题，进而提高屏下摄像区的显示效果。
可以理解的是，所述第三像素驱动电路10221与所述第二显示像素102p未电性连接即表示驱动信号无法通过所述第二像素驱动电路岛1022来驱动所述第二显示像素102p发光。因此，藉由设置所述第三像素驱动电路10221作为伪驱动电路可以在不影响所述显示面板固有的电路驱动设计下，增加所述过渡显示区102b的金属走线密度，进而使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。因此，本申请的显示面板可以提高屏下摄像区的显示效果。
如图4所示，所述多个第一显示像素101p均匀排布于所述第一显示区101，每个第一显示像素101p包括第一红色子像素101p1、第一绿色子像素101p3以及第一蓝色子像素101p2。
具体而言，所述第一红色子像素101p1、所述第一绿色子像素101p3以及所述第一蓝色子像素101p2在所述第一显示区101呈Pentile设计分布。所述第一绿色子像素101p3的形状为椭圆形，所述第一红色子像素101p1和所述第一蓝色子像素101p2呈八边形。本申请所述第一显示区101还可包括其他像素排列方式，不限于此。
进一步地，一个第一像素驱动电路1011对应驱动所述第一显示区101的一个子像素(即所述第一红色子像素101p1、所述第一绿色子像素101p3以及所述第一蓝色子像素101p2中的一个)发光。其中，所述第一像素驱动电路1011可以采用常见的7T1C、6T1C、5T1C、4T1C、3T1C以及2T1C中的任意一种。
如图4所示，所述多个第二显示像素102p均匀排布于所述第二显示区102，亦即所述多个第二显示像素102p均匀排布于所述透光显示区102a、所述驱动显示区102c及所述过渡显示区102b。每个第二显示像素102p包括第二红色子像素102p1、第二绿色子像素102p3以及第二蓝色子像素102p2。
具体而言，所述第二红色子像素102p1、所述第二绿色子像素102p3以及所述第二蓝色子像素102p2在所述第二显示区102呈Pentile设计分布。所述第二红色子像素102p1、所述第二绿色子像素102p3以及所述第二蓝色子像素102p2的形状均为圆形。本申请所述第二显示区102还可包括其他像素排列方式，不限于此。
所述第一红色子像素101p1的尺寸大于所述第二红色子像素102p1的尺寸，所述第一绿色子像素101p3的尺寸大于所述第二绿色子像素102p3的尺寸，所述第一蓝色子像素101p2的尺寸大于所述第二蓝色子像素102p2的尺寸，以保证所述透光显示区102a具有高透光率。
所述第二像素驱动电路10211用于驱动所述第二显示像素102p发光，即所述第一像素驱动电路岛1021的第二像素驱动电路10211用于驱动所述驱动显示区102c及所述过渡显示区102b的第二显示像素102p发光的同时，还用于驱动所述透光显示区102a的第二显示像素102p发光，以避免所述透光显示区102a设置像素驱动电路，从而避免像素驱动电路的金属膜层对所述透光显示区102a的透光率造成影响，进而进一步提高所述透光显示区102a的透光率。
一个第二像素驱动电路10211可以用于驱动多个第二红色子像素102p1、多个第二绿色子像素102p3以及多个第二蓝色子像素102p2中的至少两个，以减少第二像素驱动电路10211的数目，减少第一像素驱动电路岛1021占用的空间，从而使得所述透光显示区102a的尺寸可以增大。
在本申请的一种实施例中，所述第二像素驱动电路10211及所述第三像素驱动电路10221具有相同的电路结构。通过使所述第二像素驱动电路10211及所述第三像素驱动电路10221具有相同的电路结构，所述第二像素驱动电路10211及所述第三像素驱动电路10221可以具有相同的金属走线密度，从而可以进一步有效改善此两区域由于金属走线密度不同而引起的显示不均的问题，提升显示效果。
所述电路结构可以采用常见的7T1C、6T1C、5T1C、4T1C、3T1C以及2T1C中的任意一种。本申请以7T1C的电路结构及工作原理为例进行说明，但本申请不限于此，可依具体情况进行设置。
如图10所示，7T1C的电路工作原理可分为三步骤，M1至M7分别代表第一薄膜晶体管M1、第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4、第五薄膜晶体管M5、第六薄膜晶体管M6及第七薄膜晶体管M7，C1代表电容器，第n阶扫描线scan[n]控制第二薄膜晶体管M2、第三薄膜晶体管M3及第七薄膜晶体管M7的栅极电压，第n-1阶扫描线scan[n-1]控制第四薄膜晶体管M4的栅极电压，第n阶发光控制信号线em[n]控制第五薄膜晶体管M5及第六薄膜晶体管M6的栅极电压。
第一步骤(1):第n-1阶扫描线scan[n-1]导通第四薄膜晶体管M4，此时复位线VI的复位信号是低电位，第一薄膜晶体管M1的栅极是高电位，因此第一薄膜晶体管M1的栅极电压会恢复到和复位信号的电压一样，此步骤亦即为第一薄膜晶体管M1的栅极复位。
第二步骤(2):第n阶扫描线scan[n]处于低电位并导通第二薄膜晶体管M2、第三薄膜晶体管M3及第七薄膜晶体管M7，此时数据信号data经过第二薄膜晶体管M2、第三薄膜晶体管M3传输到第一薄膜晶体管M1的栅极，让第一薄膜晶体管M1的栅极电压逐渐升高。
第三步骤(3):第n阶发光控制信号线em[n]处于低电位并导通第五薄膜晶体管M5及第六薄膜晶体管M6，从而使电源电压线VDD得以传递讯号经由第五薄膜晶体管M5及第六薄膜晶体管M6给阳极充电而使有机发光二极管OLED发光。
具体而言，如图6所示，所述第二像素驱动电路10211包括由下到上层迭设置的半导体层4、第一金属层3、第二金属层2与第三金属层1，所述第一金属层3包括扫描线Scan及发光控制信号线EM，所述第二金属层2包括复位线VI，所述第三金属层1包括数据线DL及电源电压线VDD，且所述第三金属层1分别通过第一通孔11、第二通孔12及第三通孔13与所述半导体层4、所述第二金属层2及所述第一金属层3电性连接。
可以理解的是，图6左边分别为所述第一金属层3、所述第二金属层2、所述第三金属层1与所述半导体层4各层的电路图案，图6右边为所述第一金属层3、所述第二金属层2、所述第三金属层1与所述半导体层4层迭后的示意图；需注意的是，表示通孔的小方框在图中以透视的方式呈现。
所述第三像素驱动电路10221具有与所述第二像素驱动电路10211相同或相似的电路结构，亦即所述第三像素驱动电路10221中的所述第一金属层3、所述第二金属层2、所述第三金属层1与所述半导体层4各层的电路图案与所述第二像素驱动电路10211相同。因此，所述第三像素驱动电路10221包括由下到上层迭设置的所述半导体层4、所述第一金属层3、所述第二金属层2与所述第三金属层1，所述第一金属层3包括所述扫描线Scan及所述发光控制信号线EM，所述第二金属层2包括所述复位线VI，所述第三金属层1包括所述数据线DL及所述电源电压线VDD。其中，所述第三像素驱动电路10221未设置有所述第一通孔11、所述第二通孔12或所述第三通孔13中至少一者。
所述数据线DL用于传输数据信号，所述电源电压线VDD用于传输电源电压信号，所述扫描线Scan用于传输扫描信号，所述复位线VI用于传输复位信号和/或初始化信号，所述发光控制信号线EM用于传输发光控制信号。
具体而言，本申请藉由在所述第三像素驱动电路10221未设置有所述第一通孔11、所述第二通孔12或所述第三通孔13中至少一者，以将所述第三像素驱动电路10221作为伪驱动电路，可以在不影响所述显示面板固有的电路驱动设计下，增加所述过渡显示区102b的金属走线密度，进而使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。
此外，本申请使所述第三像素驱动电路10221具有与所述第二像素驱动电路10211相同或相似的电路结构，且仅在所述第三像素驱动电路10221中去除金属膜层间电性连接的通孔结构，可以在不额外增加工艺步骤的情形下，仅略去所述第三像素驱动电路10221中的挖孔步骤，而可使所述第三像素驱动电路10221与所述第二像素驱动电路10211具有相同或相似的金属走线密度，从而可以进一步使所述驱动显示区102c及所述过渡显示区102b具有均一的显示效果。
可以理解的是，本申请藉由去除讯号传递路径所需的通孔结构，而得以在不增加额外制程工艺且不改变固有电路驱动设计下阻断所述第三像素驱动电路10221的讯号传递，从而得以将所述第三像素驱动电路10221作为伪驱动电路，使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。
进一步地，如图7所示，在本申请的一种实施例中，所述第一通孔11包括电性连接所述数据线DL与所述半导体层4的第一子通孔111及电性连接所述电源电压线VDD与所述半导体层4的第二子通孔112；其中，所述第三像素驱动电路10221未设置有所述第一子通孔111。
在本实施例中，藉由去掉电性连接所述数据线DL与所述半导体层4的所述第一子通孔111，亦即使第二步骤(2)中的数据信号data传递到第二薄膜晶体管M2的通道变成断路，可以使所述数据信号无法经由所述数据线DL传递到所述第三像素驱动电路10221，进而使所述第三像素驱动电路10221无法导通驱动显示像素发光。从而将所述第三像素驱动电路10221作为伪驱动电路，可以在不影响所述显示面板固有的电路驱动设计下，增加所述过渡显示区102b的金属走线密度，进而使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。
此外，仅在所述第三像素驱动电路10221中去除所述第一子通孔111，可以在不额外增加工艺步骤的情形下，仅略去所述第三像素驱动电路10221中的所述第一子通孔111的挖孔步骤，而可使所述第三像素驱动电路10221与所述第二像素驱动电路10211具有相同或相似的金属走线密度。从而可以进一步使所述驱动显示区102c及所述过渡显示区102b具有均一的显示效果。
可选地，如图8所示，在本申请的另一种实施例中，所述第三像素驱动电路10221未设置有所述第二子通孔112。
在本实施例中，藉由去掉电性连接所述电源电压线VDD与所述半导体层4的所述第二子通孔112，亦即使第三步骤(3)中的电源电压讯号传递到第五薄膜晶体管M5的通道变成断路，可以使所述电源电压信号无法经由所述电源电压线VDD传递到所述第三像素驱动电路10221，进而使所述第三像素驱动电路10221无法导通驱动显示像素发光。从而将所述第三像素驱动电路10221作为伪驱动电路，可以在不影响所述显示面板固有的电路驱动设计下，增加所述过渡显示区102b的金属走线密度，进而使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。
此外，仅在所述第三像素驱动电路10221中去除所述第二子通孔112，可以在不额外增加工艺步骤的情形下，仅略去所述第三像素驱动电路10221中的所述第二子通孔112的挖孔步骤，而可使所述第三像素驱动电路10221与所述第二像素驱动电路10211具有相同或相似的金属走线密度。从而可以进一步使所述驱动显示区102c及所述过渡显示区102b具有均一的显示效果。
可选地，如图9所示，在本申请的另一种实施例中，所述第三像素驱动电路10221未设置有所述第一通孔11、所述第二通孔12及所述第三通孔13。
具体而言，在本实施例中，藉由去掉所述第三像素驱动电路10221中所有的通孔结构，亦即使第一步骤(1)到第三步骤(3)中的所有讯号传递路径的通道皆变成断路，可以使所有金属膜层间皆不电性连接，进而使所述第三像素驱动电路10221无法导通驱动显示像素发光。从而将所述第三像素驱动电路10221作为伪驱动电路，可以在不影响所述显示面板固有的电路驱动设计下，增加所述过渡显示区102b的金属走线密度，进而使所述过渡显示区102b的金属走线密度得以和所述驱动显示区102c的金属走线密度相近，进而改善因金属走线密度不同导致对光线反射率不同而产生的显示不均的技术问题。
此外，直接将所述第三像素驱动电路10221中所有的通孔结构皆去除，可以在不额外增加工艺步骤的情形下，仅略去所述第三像素驱动电路10221中所有通孔结构的挖孔步骤，而可使所述第三像素驱动电路10221与所述第二像素驱动电路10211具有相似的金属走线密度。从而可以进一步使所述驱动显示区102c及所述过渡显示区102b具有均一的显示效果。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，其包括:
    第一显示区，所述第一显示区包括阵列排布的多个第一显示像素及多个第一像素驱动电路，其中所述第一像素驱动电路与所述第一显示像素电性连接；及
    第二显示区，所述第二显示区包括透光显示区，位于所述透光显示区与所述第一显示区之间的驱动显示区，以及位于所述透光显示区与所述驱动显示区之间、和/或位于所述驱动显示区与所述第一显示区之间的过渡显示区；
    其中，所述第二显示区还包括多个阵列排布的第二显示像素，所述驱动显示区包括多个第二像素驱动电路，所述第二像素驱动电路与所述第二显示像素电性连接，所述过渡显示区包括多个第三像素驱动电路；
    其中，所述过渡显示区中的所述第三像素驱动电路的排布密度小于或等于所述驱动显示区中的所述第二像素驱动电路的排布密度。
  2. 根据权利要求1所述的显示面板，其中，所述驱动显示区包括多个第一像素驱动电路岛，所述第一像素驱动电路岛包括所述多个第二像素驱动电路；
    所述过渡显示区包括多个第二像素驱动电路岛，所述第二像素驱动电路岛包括所述多个第三像素驱动电路。
  3. 根据权利要求2所述的显示面板，其中，所述第一像素驱动电路岛在所述驱动显示区的排布密度大于或等于所述第二像素驱动电路岛在所述过渡显示区的排布密度。
  4. 根据权利要求2所述的显示面板，其中，所述第二像素驱动电路在所述第一像素驱动电路岛所占区域的排布密度大于或等于所述第三像素驱动电路在所述第二像素驱动电路岛所占区域的排布密度。
  5. 根据权利要求2所述的显示面板，其中，所述第一像素驱动电路在所述第一显示区的排布密度小于所述第三像素驱动电路在所述过渡显示区的排布密度。
  6. 根据权利要求1所述的显示面板，其中，所述第三像素驱动电路与所述第一显示像素及所述第二显示像素皆未电性连接。
  7. 根据权利要求1所述的显示面板，其中，所述第二像素驱动电路提供驱动信号给所述第二显示像素，所述第三像素驱动电路不提供驱动信号给所述第一显示像素及所述第二显示像素。
  8. 根据权利要求6所述的显示面板，其中，所述第二像素驱动电路包括由下到上层迭设置的半导体层、第一金属层、第二金属层与第三金属层，所述第一金属层包括扫描线及发光控制信号线，所述第二金属层包括复位线，所述第三金属层包括数据线及电源电压线，且所述第三金属层分别通过第一通孔、第二通孔及第三通孔与所述半导体层、所述第二金属层及所述第一金属层电性连接；
    所述第三像素驱动电路包括由下到上层迭设置的所述半导体层、所述第一金属层、所述第二金属层与所述第三金属层，所述第一金属层包括所述扫描线及所述发光控制信号线，所述第二金属层包括所述复位线，所述第三金属层包括所述数据线及所述电源电压线，其中，所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔或所述第三通孔中至少一者。
  9. 根据权利要求8所述的显示面板，其中，所述第一通孔包括电性连接所述数据线与所述半导体层的第一子通孔及电性连接所述电源电压线与所述半导体层的第二子通孔；其中，所述第三像素驱动电路未设置有所述第一子通孔、和/或所述第二通孔。
  10. 根据权利要求8所述的显示面板，其中，其中所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔及所述第三通孔。
  11. 根据权利要求7所述的显示面板，其中，所述第二像素驱动电路包括由下到上层迭设置的半导体层、第一金属层、第二金属层与第三金属层，所述第一金属层包括扫描线及发光控制信号线，所述第二金属层包括复位线，所述第三金属层包括数据线及电源电压线，且所述第三金属层分别通过第一通孔、第二通孔及第三通孔与所述半导体层、所述第二金属层及所述第一金属层电性连接；
    所述第三像素驱动电路包括由下到上层迭设置的所述半导体层、所述第一金属层、所述第二金属层与所述第三金属层，所述第一金属层包括所述扫描线及所述发光控制信号线，所述第二金属层包括所述复位线，所述第三金属层包括所述数据线及所述电源电压线，其中，所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔或所述第三通孔中至少一者。
  12. 根据权利要求11所述的显示面板，其中，所述第一通孔包括电性连接所述数据线与所述半导体层的第一子通孔及电性连接所述电源电压线与所述半导体层的第二子通孔；其中，所述第三像素驱动电路未设置有所述第一子通孔、和/或所述第二通孔。
  13. 根据权利要求11所述的显示面板，其中，其中所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔及所述第三通孔。
  14. 一种显示面板，其包括:
    第一显示区，所述第一显示区包括阵列排布的多个第一显示像素及多个第一像素驱动电路，其中所述第一像素驱动电路与所述第一显示像素电性连接；及
    第二显示区，所述第二显示区包括透光显示区，位于所述透光显示区与所述第一显示区之间的驱动显示区，以及位于所述透光显示区与所述驱动显示区之间、和/或位于所述驱动显示区与所述第一显示区之间的过渡显示区；
    其中，所述第二显示区还包括多个阵列排布的第二显示像素，所述驱动显示区包括多个第二像素驱动电路，所述第二像素驱动电路与所述第二显示像素电性连接，所述过渡显示区包括多个第三像素驱动电路；
    其中，所述第三像素驱动电路与所述第一显示像素及所述第二显示像素皆未电性连接或所述第三像素驱动电路不提供驱动信号给所述第一显示像素及所述第二显示像素。
  15. 根据权利要求14所述的显示面板，其中，所述驱动显示区包括多个第一像素驱动电路岛，所述第一像素驱动电路岛包括所述多个第二像素驱动电路；
    所述过渡显示区包括多个第二像素驱动电路岛，所述第二像素驱动电路岛包括所述多个第三像素驱动电路。
  16. 根据权利要求15所述的显示面板，其中，所述第一像素驱动电路岛在所述驱动显示区的排布密度大于或等于所述第二像素驱动电路岛在所述过渡显示区的排布密度。
  17. 根据权利要求15所述的显示面板，其中，所述第二像素驱动电路在所述第一像素驱动电路岛所占区域的排布密度大于或等于所述第三像素驱动电路在所述第二像素驱动电路岛所占区域的排布密度。
  18. 根据权利要求15所述的显示面板，其中，所述第一像素驱动电路在所述第一显示区的排布密度小于所述第三像素驱动电路在所述过渡显示区的排布密度。
  19. 根据权利要求14所述的显示面板，其中，所述第二像素驱动电路包括由下到上层迭设置的半导体层、第一金属层、第二金属层与第三金属层，所述第一金属层包括扫描线及发光控制信号线，所述第二金属层包括复位线，所述第三金属层包括数据线及电源电压线，且所述第三金属层分别通过第一通孔、第二通孔及第三通孔与所述半导体层、所述第二金属层及所述第一金属层电性连接；
    所述第三像素驱动电路包括由下到上层迭设置的所述半导体层、所述第一金属层、所述第二金属层与所述第三金属层，所述第一金属层包括所述扫描线及所述发光控制信号线，所述第二金属层包括所述复位线，所述第三金属层包括所述数据线及所述电源电压线，其中，所述第三像素驱动电路未设置有所述第一通孔、所述第二通孔或所述第三通孔中至少一者。
  20. 根据权利要求19所述的显示面板，其中，所述第一通孔包括电性连接所述数据线与所述半导体层的第一子通孔及电性连接所述电源电压线与所述半导体层的第二子通孔；其中，所述第三像素驱动电路未设置有所述第一子通孔、和/或所述第二通孔。
PCT/CN2021/116139 2021-08-23 2021-09-02 显示面板 WO2023024139A1 (zh)

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