WO2021168964A1 - 一种像素结构及其制备方法、显示面板 - Google Patents

一种像素结构及其制备方法、显示面板 Download PDF

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Publication number
WO2021168964A1
WO2021168964A1 PCT/CN2020/081562 CN2020081562W WO2021168964A1 WO 2021168964 A1 WO2021168964 A1 WO 2021168964A1 CN 2020081562 W CN2020081562 W CN 2020081562W WO 2021168964 A1 WO2021168964 A1 WO 2021168964A1
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Prior art keywords
pixel
electrode
bank
substrate
pixel bank
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PCT/CN2020/081562
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English (en)
French (fr)
Inventor
韩志斌
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/761,856 priority Critical patent/US11600674B2/en
Publication of WO2021168964A1 publication Critical patent/WO2021168964A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • This application relates to the field of display technology, and in particular to a pixel structure, a manufacturing method thereof, and a display panel.
  • OLED displays have gradually become high-end displays that replace liquid crystal displays due to their ultra-high contrast, wide color gamut, fast response, and active light-emitting advantages.
  • the size of OLED displays and OLED TVs continues to increase, the size of their corresponding mass-produced glass substrates is also increasing.
  • the hybrid arrangement Moti Model Group, MMG
  • the pixel arrangement of the OLED panel is that the long side direction of the sub-pixel is parallel to the short side direction of the panel, the long side direction of the sub-pixel R/G/B in Figure 1 is shown in the direction of the arrow, resulting in two OLEDs of different sizes
  • the pixel arrangement directions of the panel are perpendicular to each other.
  • the commonly used method of printing OLED light-emitting materials is to print a whole line of sub-pixels of the same color in the same bank (bank) area, that is, the printing method of Line-Bank (linear bank).
  • the sub-pixels R/G/B are printed as a whole strip respectively. Therefore, the traditional mixed arrangement of OLED panels and pixel arrangements will limit the printing method of Line-Bank. After printing the OLED panel of one product, rotate the glass substrate 90° and then print the OLED panel of another product. This has led to an increase in equipment costs and an increase in production time, which is unfavorable for mass production.
  • the present application provides a pixel structure, a manufacturing method thereof, and a display panel, so as to alleviate the technical problem that the pixel arrangement of the existing mixed arrangement OLED panel restricts the printing method.
  • An embodiment of the present application provides a pixel structure, which includes a substrate, a first pixel bank, and a second pixel bank.
  • the first pixel bank is disposed on the substrate and intersects the longitudinal direction of the substrate.
  • the second pixel bank is disposed on the substrate across the first pixel bank and is parallel to the long side direction of the substrate.
  • a luminescent material of the same color is arranged between two adjacent second pixel banks, and the luminescent material covers part of the first pixel banks.
  • the first pixel bank and the long side direction of the substrate form an angle of 45 degrees or 135 degrees.
  • the thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • the substrate includes a driving circuit and a pixel electrode disposed on the driving circuit.
  • the pixel electrode is connected to the driving circuit through a via hole, and the via holes are all located in the driving circuit. Relatively below the first pixel bank.
  • the pixel electrode includes a main electrode located in a region defined by the first pixel bank and the second pixel bank, and is electrically connected to the main electrode and is separately connected to the main electrode.
  • the connecting electrodes and the bridging electrodes located on two diagonal sides of the main electrode are connected to the driving circuit through the via holes.
  • the connecting electrode and the bridging electrode are both located below the first pixel bank, and the bridging electrode is on the same and adjacent other pixel electrode
  • the connecting electrodes are arranged at intervals.
  • the width of the connecting electrode is smaller than the width of the main electrode.
  • the width of the bridge electrode is smaller than the width of the main electrode.
  • the embodiment of the present application provides a method for manufacturing a pixel structure, which includes the following steps: step S10, preparing a substrate, including providing a substrate, preparing a driving circuit on the substrate, and preparing a pixel electrode on the driving circuit, The pixel electrode is connected to the driving circuit through a via hole and the pixel electrodes are arranged in parallel and spaced apart, and the long side direction of the pixel electrode is parallel to the long side direction of the substrate.
  • Step S20 preparing a pixel bank, including preparing a first pixel bank on the substrate, and preparing a second pixel bank on the substrate, wherein the second pixel bank crosses the first pixel bank , The thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • Step S30 preparing a light-emitting layer, including coating a light-emitting material of the same color between adjacent second pixel banks.
  • each of the pixel electrodes includes a main electrode arranged in a parallelogram shape, and a connecting electrode and a bridge electrode respectively located on two diagonal sides of the main electrode, The bridge electrode is spaced apart from the connecting electrode on another pixel electrode adjacent to the same row, and the inner angle of the main electrode is 45 degrees or 135 degrees.
  • the first pixel bank is located in the interval between the short sides of the main electrode, and covers the connection electrode and the bridge electrode .
  • the second pixel bank is located in the interval between the long sides of the main electrode and crosses a part of the first pixel bank.
  • An embodiment of the present application also provides a display panel, the pixel structure of which includes a substrate, a first pixel bank, and a second pixel bank.
  • the first pixel bank is disposed on the substrate and intersects the longitudinal direction of the substrate.
  • the second pixel bank is disposed on the substrate across the first pixel bank and is parallel to the long side direction of the substrate.
  • a luminescent material of the same color is arranged between two adjacent second pixel banks, and the luminescent material covers part of the first pixel banks.
  • the first pixel bank and the long side direction of the substrate form an angle of 45 degrees or 135 degrees.
  • the thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • the substrate includes a driving circuit and a pixel electrode disposed on the driving circuit, the pixel electrode is connected to the driving circuit through a via hole, and the via hole is located in the Relatively below the first pixel bank.
  • the pixel electrode includes a main electrode located in a region defined by the first pixel bank and the second pixel bank, and is electrically connected to the main electrode and is separately connected to the main electrode.
  • the connecting electrodes and the bridging electrodes located on two diagonal sides of the main electrode are connected to the driving circuit through the via holes.
  • connection electrode and the bridge electrode are both located below the first pixel bank, and the bridge electrode is on the same and adjacent other pixel electrode
  • the connecting electrodes are arranged at intervals.
  • the width of the connection electrode is smaller than the width of the main electrode.
  • the width of the bridge electrode is smaller than the width of the main electrode.
  • the long side direction of the pixel electrode is arranged in parallel with the long side direction of the substrate, so that the long side direction of the sub-pixel formed by the printed luminescent material is aligned with the long side of the substrate.
  • the directions are parallel.
  • mixed arrangement there is no need to rotate the glass substrate 90°, and the OLED panels of the two products can be printed directly. It does not increase the cost of equipment and time, and is suitable for mass production. It solves the problem that the pixel arrangement of the existing mixed arrangement OLED panel restricts the printing method.
  • the main electrode of the pixel electrode is arranged in a parallelogram shape, and the connecting electrode and the bridging electrode are respectively arranged on the two diagonal sides of the main electrode.
  • the connecting electrodes are connected to the driving circuit through via holes, and all via holes are distributed at an oblique direction of 45 degrees, which will not affect the opening area and improve the pixel aperture ratio.
  • FIG. 1 is a schematic diagram of the bottom view of the pixel arrangement of the hybrid arrangement of the OLED panel in the prior art.
  • FIG. 2 is a schematic bottom view of a pixel structure provided by an embodiment of the application.
  • Fig. 3 is a schematic cross-sectional view in the direction of A-A in Fig. 2.
  • Fig. 4 is a schematic cross-sectional view in the direction B-B in Fig. 2.
  • FIG. 5 is a schematic side view of a film structure of a substrate provided by an embodiment of the application.
  • FIG. 6 is a schematic bottom view of the first arrangement of the pixel electrode structure on the substrate according to an embodiment of the application.
  • FIG. 7 is a schematic diagram of comparison of two main electrode structures provided by the embodiments of the application.
  • FIG. 8 is a schematic diagram of the principle of pixel electrode repair provided by an embodiment of the application.
  • FIG. 9 is a schematic bottom view of the position of the pixel electrode and the pixel bank provided by an embodiment of the application.
  • Fig. 10 is a schematic cross-sectional view in the direction of C-C in Fig. 9.
  • FIG. 11 is a schematic bottom view of the second arrangement of the pixel electrode structure on the substrate according to an embodiment of the application.
  • FIG. 12 is a schematic diagram of the steps of a method for manufacturing a pixel structure provided by an embodiment of the application.
  • a pixel structure 100 which includes a substrate 10, a first pixel bank 50 and a second pixel bank 60.
  • the first pixel bank 50 is disposed on the substrate 10 and intersects the longitudinal direction X of the substrate 10.
  • the second pixel bank 60 is disposed on the substrate 10 across the first pixel bank 50 and is parallel to the longitudinal direction X of the substrate 10.
  • a light-emitting material 70 of the same color is arranged between two adjacent second pixel banks 60, and the light-emitting material 70 covers part of the first pixel bank 50.
  • the long side direction X of the substrate refers to a direction parallel to the long side of the substrate.
  • the thickness H2 of the second pixel bank 60 is greater than the thickness H1 of the first pixel bank 50, so that two adjacent second pixel banks 60 are formed between Groove.
  • the luminescent material 70 is printed in the groove, and the luminescent material of the same color is printed in the same groove.
  • the intersection of the first pixel bank 50 and the second pixel bank 60 is covered by the second pixel bank 60, as shown in FIG. 4.
  • the portion of the first pixel bank 50 that does not intersect the second pixel bank 60 is located in the groove and is covered by the luminescent material 70.
  • the luminescent material is printed in the entire groove formed between the second pixel banks, so that the long side direction of the formed sub-pixels is parallel to the long side direction of the substrate.
  • the OLED panels of the two products can be printed directly. It does not increase the cost of equipment and time, and is suitable for mass production. It solves the problem that the pixel arrangement of the existing mixed arrangement OLED panel restricts the printing method.
  • the substrate 10 includes a driving circuit 11 and a pixel electrode 12 disposed on the driving circuit 11, and the pixel electrode 12 is connected to the driving circuit 11 through a via 13.
  • the via holes 13 are located relatively below the first pixel bank 50, and the via holes 13 are covered with pixel electrodes and the first pixel bank 50. See the row of the via holes 13 in FIG.
  • FIG. 6 is a schematic diagram of the arrangement of the pixel electrodes 12, and FIG. 6 removes the first pixel bank and the second pixel bank to clearly show the pixel electrode 12 and the via hole 13.
  • the pixel electrodes 12 are arranged in parallel and spaced apart, and the long side direction of the pixel electrodes 12 is parallel to the long side direction X of the substrate.
  • Each of the pixel electrodes 12 includes a main electrode 121 located in a region defined by the first pixel bank 50 and the second pixel bank 60, and is electrically connected to the main electrode 121 and located in the main electrode.
  • the connecting electrode 122 and the bridging electrode 123 on two diagonal sides of the electrode 121 are connected to the driving circuit 11 through the via 13.
  • the surface shape of the main electrode 121 is a parallelogram, and the connecting electrode 122 and the bridge electrode 123 are arranged on two diagonal sides of the parallelogram. Specifically, it is set at two diagonal angles ⁇ with an angle of 45 degrees in the parallelogram, as shown in FIG. 6.
  • the parallelogram of the surface shape of the main electrode can also be arranged in the main electrode 121' structure as shown in FIG. 7.
  • the connecting electrode 122 and the bridging electrode 123 are respectively located in the interval between the short sides of two adjacent main electrodes 121.
  • the connecting electrode 122 connects the main electrode 121 and the driving circuit through the via 13.
  • the via holes 13 are also arranged in the intervals corresponding to the short sides of the main electrode 121.
  • the width of the connection electrode 122 is smaller than the width of the main electrode 121, and the length of the connection electrode 122 does not exceed the separation distance between the short sides of the main electrode 121.
  • the width of the bridge electrode 123 is smaller than the width of the main electrode 121, and the length of the bridge electrode 123 does not exceed the separation distance between the short sides of the main electrode 121.
  • the bridge electrode 123 is spaced apart from the connecting electrode 122 on the other pixel electrode 12 adjacent to the same row.
  • the bridge electrode 123 is used to make the bridge electrode 123 and another pixel electrode in the same and adjacent to the same and adjacent pixel electrode by means of laser welding or the like when a short-circuit or short-circuit occurs in the control circuit of the corresponding pixel electrode 12 (that is, the corresponding driving circuit)
  • the traces (not shown) connecting the via holes 13 below 12 are connected, so that the pixel electrode 12 corresponding to the bridge electrode 123 can be turned on and off synchronously with the adjacent pixel electrode 12 to avoid the generation of dark spots.
  • FIG. 8 the principle of the bridge electrode welding is shown in FIG. 8, taking a conventional 3T1C (a sub-pixel includes 3 thin film transistors and 1 storage capacitor) circuit as an example, but the application is not limited to this.
  • 3T1C a sub-pixel includes 3 thin film transistors and 1 storage capacitor
  • the application is not limited to this.
  • the sub-pixel G1 when the adjacent sub-pixel G1 of the same color is cut off due to short-line or short-circuit problems during the manufacturing process (the cut-off position in FIG. 8), the sub-pixel G1 will not be lit. However, it can be connected to the adjacent sub-pixel G2 of the same color to emit light by means such as laser welding.
  • the broken line in FIG. 8 indicates the repair connection line.
  • the connecting electrode and the bridging electrode are both located below the first pixel bank, and the bridging electrode is spaced apart from the connecting electrode on the pixel electrode adjacent to the same row.
  • the first pixel bank 50 is entirely arranged in the space between the short sides of the main electrode 121 and covers the connection electrode and the bridge electrode.
  • FIG. 9 removes the luminescent material 70 covering it. 6 and 9, since the internal angle of the main electrode 121 and the connecting electrode 122 or the bridge electrode 123 is 45 degrees, the length of the first pixel bank 50 and the substrate is 45 degrees. The side direction presents an angle of 45 degrees or 135 degrees.
  • the thickness H3 of the first pixel bank 50 is greater than the thickness H4 of the pixel electrode (only the main electrode 121 and the connection electrode 122 of the pixel electrode are shown in FIG. 10).
  • the second pixel bank 60 is entirely arranged in the interval between the long sides of the main electrode 121 and covers a part of the first pixel bank 50.
  • the second pixel bank 60 is parallel to the longitudinal direction of the substrate 10.
  • the thickness of the second pixel bank 60 is greater than the thickness of the first pixel bank 50.
  • the main electrode 121 is located in an area defined by the first pixel bank 50 and the second pixel bank 60.
  • a groove is formed between the adjacent second pixel banks, and the luminescent material is printed in the groove.
  • the luminescent material of the same color is printed in the same groove, and the luminescent material covers the first pixel bank.
  • the long-side direction of the pixel electrode is parallel to the long-side direction of the substrate, so that the long-side direction of the sub-pixel formed by the printed luminescent material is parallel to the long-side direction of the substrate, which solves the problem of the existing mixed arrangement of OLED panels.
  • Pixel arrangement method restricts the printing method.
  • the parallelogram of the pixel electrode is arranged, and the pixel electrode opening is arranged at 45 degrees under the first pixel bank, which improves the pixel aperture ratio.
  • the provided bridge electrodes can repair the corresponding sub-pixels.
  • connection electrode 122 and the bridge electrode 123 of the pixel electrode 12 are arranged at a diagonal angle ⁇ of the main electrode 121 with a diagonal angle of 135 degrees.
  • a method for manufacturing a pixel structure which includes the following steps:
  • Step S10 preparing a substrate, including providing a substrate, preparing a driving circuit on the substrate, preparing a pixel electrode on the driving circuit, the pixel electrode being connected to the driving circuit through a via hole, and the pixel electrode Are arranged in parallel and spaced apart, and the long side direction of the pixel electrode is parallel to the long side direction of the substrate.
  • each of the pixel electrodes includes a main electrode arranged in a parallelogram shape, and a connecting electrode and a bridge electrode located on two diagonal sides of the main electrode, and the bridge electrode is in line with and adjacent to another.
  • the connecting electrodes on the pixel electrodes are arranged at intervals, and the inner angle of the main electrode is 45 degrees or 135 degrees.
  • the connecting electrode and the bridging electrode are respectively located in an interval between two adjacent short sides of the main electrode.
  • the connecting electrode connects the main electrode and the driving circuit through a via hole.
  • the via holes are also arranged in the intervals corresponding to the short sides of the main electrodes.
  • the width of the connection electrode is smaller than the width of the main electrode, and the length of the connection electrode does not exceed the separation distance between the short sides of the main electrode.
  • the width of the bridge electrode is smaller than the width of the main electrode, and the length of the bridge electrode does not exceed the separation distance between the short sides of the main electrode.
  • the bridge electrode is spaced apart from the connecting electrode on the other adjacent pixel electrode in the same row. The bridge electrode is used to connect the bridge electrode to the adjacent pixel circuit by means of laser welding or the like when the control circuit of the corresponding pixel electrode (that is, the corresponding drive circuit) is short-circuited or short-circuited, so that the bridge electrode
  • the corresponding pixel electrode can be turned on and off synchronously with the adjacent pixel electrode to avoid dark spots.
  • Step S20 preparing a pixel bank, including preparing a first pixel bank on the substrate, and preparing a second pixel bank on the substrate, wherein the second pixel bank crosses the first pixel bank , The thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • the first pixel bank is located in the interval between the short sides of the main electrode, and covers the connection electrode and the bridge electrode; the second pixel bank is located at the The interval between the long sides of the main electrode.
  • the first pixel bank is entirely arranged in the space between the short sides of the main electrode, and covers the connection electrode and the bridge electrode. Since the internal angle between the main electrode and the connecting electrode or the bridge electrode is 45 degrees, the first pixel bank and the long side direction of the substrate form an angle of 45 degrees or 135 degrees.
  • the thickness of the first pixel bank is greater than the thickness of the pixel electrode.
  • the second pixel bank is entirely arranged in the interval between the long sides of the main electrode, and crosses the first pixel bank.
  • the second pixel bank is parallel to the long side direction of the substrate.
  • the thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • the main electrode is located in an area defined by the first pixel bank and the second pixel bank.
  • Step S30 preparing a light-emitting layer, including coating a light-emitting material of the same color between adjacent second pixel banks.
  • a groove is formed between the adjacent second pixel banks, and the luminescent material is printed in the groove.
  • the luminescent materials of the same color are printed in the same groove, and the luminescent materials cover the first pixel bank.
  • a display panel the pixel structure of which includes a substrate, a first pixel bank, and a second pixel bank.
  • the first pixel bank is disposed on the substrate and intersects the longitudinal direction of the substrate.
  • the second pixel bank is disposed on the substrate across the first pixel bank and is parallel to the long side direction of the substrate.
  • a luminescent material of the same color is arranged between two adjacent second pixel banks, and the luminescent material covers part of the first pixel banks.
  • the first pixel bank and the long side direction of the substrate form an angle of 45 degrees or 135 degrees.
  • the thickness of the second pixel bank is greater than the thickness of the first pixel bank.
  • the substrate includes a driving circuit and a pixel electrode disposed on the driving circuit, the pixel electrode is connected to the driving circuit through a via hole, and the via hole is located opposite to the first pixel bank .
  • the pixel electrode includes a main electrode located in a defined area of the first pixel bank and the second pixel bank, and is electrically connected to the main electrode and located at two opposite corners of the main electrode.
  • the connecting electrode and the bridge electrode on the side, and the connecting electrode is connected with the driving circuit through the via hole.
  • the connecting electrode and the bridging electrode are both located below the first pixel bank, and the bridging electrode is spaced apart from the connecting electrode on the other adjacent pixel electrode in the same row.
  • the width of the connecting electrode is smaller than the width of the main electrode.
  • the width of the bridge electrode is smaller than the width of the main electrode.
  • the present application provides a pixel structure and a preparation method thereof, and a display panel.
  • the long side direction of the pixel electrode in the pixel structure is arranged in parallel with the long side direction of the substrate, so that the long side direction of the sub-pixel formed by the printed luminescent material is aligned with that of the substrate.
  • the long sides are parallel.
  • mixed arrangement there is no need to rotate the glass substrate 90°, and the OLED panels of the two products can be printed directly. It does not increase the cost of equipment and time, and is suitable for mass production. It solves the problem that the pixel arrangement of the existing mixed arrangement OLED panel restricts the printing method.
  • the main electrode of the pixel electrode is arranged in a parallelogram shape, and the connecting electrode and the bridging electrode are respectively arranged on the two diagonal sides of the main electrode.
  • the connecting electrodes are connected to the driving circuit through via holes, and all via holes are distributed at an oblique direction of 45 degrees, which will not affect the opening area and improve the pixel aperture ratio.

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Abstract

本申请提供一种像素结构及其制备方法以及显示面板。像素结构包括基板、第一像素隔堤及第二像素隔堤。第一像素隔堤与基板的长边方向相交。第二像素隔堤与基板的长边方向平行。相邻的两个第二像素隔堤之间设置有同一颜色的发光材料。使像素设计可以兼容MMG方式的Line-Bank打印，缓解了现有MMG中像素排列方式使打印方式受限的问题。

Description

一种像素结构及其制备方法、显示面板 技术领域
本申请涉及显示技术领域，尤其涉及一种像素结构及其制备方法以及显示面板。
 背景技术
有机发光二极管（Organic Light emitting Display，OLED）显示器由于其超高对比度，广色域，快速响应，主动发光等优势而逐步成为取代液晶显示的高端显示器。随着OLED显示器以及OLED电视尺寸的不断增大，其相应量产的玻璃基板尺寸也不断增大。为最大化玻璃利用率，需要在同一块玻璃基板上制备不同尺寸的OLED产品，即混合排列（Muti Model Group，MMG）技术。传统混合排列OLED面板和像素排列方式如图1所示，65”和55”两款不同尺寸的OLED面板排列方向相互垂直的排列在同一玻璃基板800上。由于其OLED面板像素排列方式均为子像素长边方向与面板短边方向平行，如图1中的子像素R/G/B的长边方向如箭头方向所示，导致两款不同尺寸的OLED面板的像素排列方向相互垂直。而常用的打印OLED发光材料的方式为在同一bank（隔堤）区域内打印一整条同颜色的子像素，即Line-Bank（线状隔堤）的打印方式。如图1所示，子像素R/G/B分别打印呈一整条。因此，传统混合排列OLED面板和像素排列方式就会使Line-Bank的打印方式受到限制。需要打印完一款产品的OLED面板后，旋转玻璃基板90°再打印另一款产品的OLED面板。这导致了设备成本的增加和生产时间的增加，对量产不利。
因此，现有混合排列OLED面板的像素排列方式使打印方式受限的问题需要解决。
 技术问题
本申请提供一种像素结构及其制备方法以及显示面板，以缓解现有混合排列OLED面板的像素排列方式使打印方式受限的技术问题。
 技术解决方案
为解决上述问题，本申请提供的技术方案如下：
本申请实施例提供一种像素结构，其包括基板、第一像素隔堤及第二像素隔堤。所述第一像素隔堤，设置于所述基板上，且与所述基板的长边方向相交。所述第二像素隔堤，跨过所述第一像素隔堤设置于所述基板上，且与所述基板的所述长边方向平行。其中，相邻的两个所述第二像素隔堤之间设置有同一颜色的发光材料，且所述发光材料覆盖部分所述第一像素隔堤上。
在本申请实施例提供的像素结构中，所述第一像素隔堤与所述基板的所述长边方向呈45度或135度夹角。
在本申请实施例提供的像素结构中，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
在本申请实施例提供的像素结构中，所述基板包括驱动电路以及设置在驱动电路上的像素电极，所述像素电极通过过孔与所述驱动电路连接，且所述过孔均位于所述第一像素隔堤的相对下方。
在本申请实施例提供的像素结构中，所述像素电极包括位于所述第一像素隔堤和所述第二像素隔堤限定区域内的主电极，以及与所述主电极电性连接且分别位于所述主电极两对角侧的连接电极和桥接电极，所述连接电极通过所述过孔与所述驱动电路连接。
在本申请实施例提供的像素结构中，所述连接电极和所述桥接电极均位于所述第一像素隔堤的下方，且所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置。
在本申请实施例提供的像素结构中，所述连接电极的宽度小于所述主电极的宽度。
在本申请实施例提供的像素结构中，所述桥接电极的宽度小于所述主电极的宽度。
本申请实施例提供一种像素结构的制备方法，其包括以下步骤：步骤S10、制备基板，包括提供一衬底，在所述衬底上制备驱动电路，在所述驱动电路上制备像素电极，所述像素电极通过过孔与所述驱动电路连接且所述像素电极之间平行间隔设置，所述像素电极的长边方向与所述基板的长边方向平行。步骤S20、制备像素隔堤，包括在所述基板上制备第一像素隔堤，在所述基板上制备第二像素隔堤，其中所述第二像素隔堤跨过所述第一像素隔堤，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。步骤S30、制备发光层，包括在相邻的所述第二像素隔堤之间涂布同一颜色的发光材料。
在本申请实施例提供的像素结构制备方法中，在步骤S10中，每个所述像素电极包括呈平行四边形设置的主电极以及分别位于所述主电极两对角侧的连接电极和桥接电极，所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置，且所述主电极内角的角度为45度或135度。
在本申请实施例提供的像素结构制备方法中，在步骤S20中，所述第一像素隔堤位于所述主电极短边之间的间隔之中，且覆盖所述连接电极和所述桥接电极。
在本申请实施例提供的像素结构制备方法中，所述第二像素隔堤位于所述主电极长边之间的间隔之中，且跨过部分所述第一像素隔堤。
本申请实施例还提供一种显示面板，其像素结构包括基板、第一像素隔堤及第二像素隔堤。所述第一像素隔堤，设置于所述基板上，且与所述基板的长边方向相交。所述第二像素隔堤，跨过所述第一像素隔堤设置于所述基板上，且与所述基板的所述长边方向平行。其中，相邻的两个所述第二像素隔堤之间设置有同一颜色的发光材料，且所述发光材料覆盖部分所述第一像素隔堤上。
在本申请实施例提供的显示面板中，所述第一像素隔堤与所述基板的所述长边方向呈45度或135度夹角。
在本申请实施例提供的显示面板中，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
在本申请实施例提供的显示面板中，所述基板包括驱动电路以及设置在驱动电路上的像素电极，所述像素电极通过过孔与所述驱动电路连接，且所述过孔均位于所述第一像素隔堤的相对下方。
在本申请实施例提供的显示面板中，所述像素电极包括位于所述第一像素隔堤和所述第二像素隔堤限定区域内的主电极，以及与所述主电极电性连接且分别位于所述主电极两对角侧的连接电极和桥接电极，所述连接电极通过所述过孔与所述驱动电路连接。
在本申请实施例提供的显示面板中，所述连接电极和所述桥接电极均位于所述第一像素隔堤的下方，且所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置。
在本申请实施例提供的显示面板中，所述连接电极的宽度小于所述主电极的宽度。
在本申请实施例提供的显示面板中，所述桥接电极的宽度小于所述主电极的宽度。
 有益效果
本申请提供的一种像素结构及其制备方法以及显示面板中，像素电极的长边方向与基板的长边方向平行设置，使打印的发光材料形成的子像素的长边方向与基板的长边方向平行。实现在混合排列方式的情况下，不需要旋转玻璃基板90°，可直接打印两款产品的OLED面板。不增加设备和时间成本，适用于量产。解决了现有混合排列OLED面板的像素排列方式使打印方式受限的问题。同时像素电极的主电极呈平行四边形设置，连接电极和桥接电极分别设置在主电极的两对角侧上，当临近同颜色子像素在制程中出现短线或者短路等问题时，可以通过激光熔接的方式把桥接电极与临近相同颜色的像素桥接在一起，实现修复功能。且连接电极通过过孔连接驱动电路，所有过孔在斜向45度进行分布，不会影响开口区，提高了像素开口率。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中混合排列OLED面板的像素排列方式的下视示意图。
图2为本申请实施例提供的像素结构的下视示意图。
图3为图2中A-A方向的剖面示意图。
图4为图2中B-B方向的剖面示意图。
图5为本申请实施例提供的基板的膜层结构侧视示意图。
图6为本申请实施例提供的像素电极结构在基板上第一种排布的下视结构示意图。
图7为本申请实施例提供的两种主电极结构对比示意图。
图8为本申请实施例提供的像素电极修复的原理示意图。
图9为本申请实施例提供的像素电极与像素隔堤的位置下视示意图。
图10为图9中C-C方向的剖面示意图。
图11为本申请实施例提供的像素电极结构在基板上第二种排布的下视结构示意图。
图12为本申请实施例提供的像素结构制备方法的步骤示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
在一种实施例中，如图2所示，提供一种像素结构100，其包括基板10、第一像素隔堤50及第二像素隔堤60。所述第一像素隔堤50，设置于所述基板10上，且与所述基板10的长边方向X相交。所述第二像素隔堤60，跨过所述第一像素隔堤50设置于所述基板10上，且与所述基板10的所述长边方向X平行。其中，相邻的两个所述第二像素隔堤60之间设置有同一颜色的发光材料70，且所述发光材料70覆盖部分所述第一像素隔堤50上。
具体的，所述基板的长边方向X是指与基板长边平行的方向。
具体的，如图3所示的所述第二像素隔堤60的厚度H2大于所述第一像素隔堤50的厚度H1，使相邻的两个所述第二像素隔堤60之间形成凹槽。发光材料70打印在凹槽内，且同一凹槽内打印同一颜色的发光材料。所述第一像素隔堤50与所述第二像素隔堤60相交的部分被所述第二像素隔堤 60覆盖，如图4所示。所述第一像素隔堤50未与所述第二像素隔堤60相交的部分位于凹槽内且被发光材料70覆盖。
在本实施例中，把发光材料打印在第二像素隔堤之间形成的整条凹槽内，使形成的子像素的长边方向平行于基板的长边方向，实现在混合排列方式的情况下，不需要旋转玻璃基板90°，可直接打印两款产品的OLED面板。不增加设备和时间成本，适用于量产。解决了现有混合排列OLED面板的像素排列方式使打印方式受限的问题。
在一种实施例中，如图5所示，所述基板10包括驱动电路11以及设置在驱动电路11上的像素电极12，所述像素电极12通过过孔13与所述驱动电路11连接。如图2所示，所述过孔13均位于所述第一像素隔堤50的相对下方，过孔13上覆盖有像素电极和第一像素隔堤50，参见图6中过孔13的排布，图6为像素电极12排布的示意图，图6移除第一像素隔堤和第二像素隔堤以清楚显示像素电极12及过孔13。
具体的，请同时参照图2、图5和图6，所述像素电极12之间平行间隔设置，所述像素电极12的长边方向与所述基板的长边方向X平行。每个所述像素电极12包括位于所述第一像素隔堤50和所述第二像素隔堤60限定区域内的主电极121，以及与所述主电极121电性连接且分别位于所述主电极121两对角侧的连接电极122和桥接电极123，所述连接电极122通过所述过孔13与所述驱动电路11连接。
具体的，所述主电极121的表面形状为平行四边形，所述连接电极122和所述桥接电极123设置于平行四边形的两对角侧。具体的，设置于平行四边形中角度为45度的两个对角θ上，如图6所示。当然的，所述主电极的表面形状平行四边形还可以设置成如图7所示的主电极121’结构。
进一步的，如图6所示，所述连接电极122和所述桥接电极123分别位于相邻的两个所述主电极121短边之间的间隔内。具体的，所述连接电极122通过过孔13连接所述主电极121和所述驱动电路。所述过孔13也均设置在对应所述主电极121短边之间的间隔内。所述连接电极122的宽度小于所述主电极121的宽度，所述连接电极122的长度未超出所述主电极121短边之间的间隔距离。
进一步的，所述桥接电极123的宽度小于所述主电极121的宽度，所述桥接电极123的长度也未超出所述主电极121短边之间的间隔距离。且所述桥接电极123与同行且相邻的另一所述像素电极12上的所述连接电极122间隔设置。所述桥接电极123用于在对应的像素电极12的控制电路（即对应的驱动电路）发生短线或短路时，通过激光熔接等方式使所述桥接电极123与同行且相邻的另一像素电极12下方连接过孔13的走线（图未示）连接，使所述桥接电极123对应的像素电极12可以与相邻像素电极12同步明灭，避免产生暗点。
具体的，所述桥接电极熔接的原理如图8所示，以常规的3T1C（一个子像素包括3个薄膜晶体管和1个存储电容）电路为例说明，但本申请不限此。如图8所示，当临近同颜色子像素G1在制程中出现短线或者短路等问题被切断后（如图8中的切断位置），该子像素G1就不会被点亮。但是可以通过激光熔接等方式与临近相同颜色的子像素G2连接发光，如图8中的虚线标示修复连接线。
具体的，所述连接电极和所述桥接电极均位于所述第一像素隔堤的下方，且所述桥接电极与同行且相邻的所述像素电极上的所述连接电极间隔设置。
具体的，如图9所示，所述第一像素隔堤50整条设置在所述主电极121短边之间的间隔内，并覆盖在所述连接电极和所述桥接电极上。为了清楚显示第一像素隔堤50等结构，图9移除覆盖在上方的发光材料70。结合图6和图9，因所述主电极121与所述连接电极122或所述桥接电极123连接侧的的内角角度为45度，故所述第一像素隔堤50与所述基板的长边方向呈45度或135度夹角。
进一步的，如图10所示，所述第一像素隔堤 50的厚度H3大于所述像素电极的厚度H4（图10中只示出像素电极的主电极121和连接电极122）。
进一步的，如图9所示，所述第二像素隔堤60整条设置在所述主电极121长边之间的间隔内，且覆盖在部分所述第一像素隔堤50上。所述第二像素隔堤60平行于所述基板10的长边方向。所述第二像素隔堤60的厚度大于所述第一像素隔堤50的厚度。所述主电极121位于由所述第一像素隔堤50和所述第二像素隔堤60限定的区域内。
进一步的，相邻的所述第二像素隔堤之间形成有凹槽，发光材料打印在凹槽内。同一颜色的发光材料打印在同一凹槽内，且发光材料覆盖所述第一像素隔堤。
在本实施例中，像素电极的长边方向与基板的长边方向平行，使打印的发光材料形成的子像素的长边方向平行于基板的长边方向，解决了现有混合排列OLED面板的像素排列方式使打印方式受限的问题。同时像素电极的平行四边形设置，把像素电极开孔呈45度设置在第一像素隔堤下，提高了像素开口率。而且设置的桥接电极可以修复对应的子像素。
在另一种实施例中，与上述实施例不同的是，所述像素电极12的所述连接电极122和所述桥接电极123设置于所述主电极121对角角度为135度的对角θ’侧，如图11所示，其他说明请参照上述实施例，在此不再赘述。
在一种实施例中，如图12所示，提供一种像素结构的制备方法，其包括以下步骤：
步骤S10、制备基板，包括提供一衬底，在所述衬底上制备驱动电路，在所述驱动电路上制备像素电极，所述像素电极通过过孔与所述驱动电路连接且所述像素电极之间平行间隔设置，所述像素电极的长边方向与所述基板的长边方向平行。
具体的，在步骤S10中，每个所述像素电极包括呈平行四边形设置的主电极以及位于所述主电极两对角侧的连接电极和桥接电极，所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置，且所述主电极内角的角度为45度或135度。
进一步的，所述连接电极和所述桥接电极分别位于相邻的两个所述主电极短边之间的间隔内。具体的，所述连接电极通过过孔连接所述主电极和所述驱动电路。所述过孔也均设置在对应所述主电极短边之间的间隔内。所述连接电极的宽度小于所述主电极的宽度，所述连接电极的长度未超出所述主电极短边之间的间隔距离。
进一步的，所述桥接电极的宽度小于所述主电极的宽度，所述桥接电极的长度未超出所述主电极短边之间的间隔距离。且所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置。所述桥接电极用于在对应的像素电极的控制电路（即对应的驱动电路）发生短线或短路时，通过激光熔接等方式使所述桥接电极与相邻的像素电路连接，使所述桥接电极对应的像素电极可以与相邻像素电极同步明灭，避免产生暗点。
步骤S20、制备像素隔堤，包括在所述基板上制备第一像素隔堤，在所述基板上制备第二像素隔堤，其中所述第二像素隔堤跨过所述第一像素隔堤，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
具体的，在步骤S20中，所述第一像素隔堤位于所述主电极短边之间的间隔之中，且覆盖所述连接电极和所述桥接电极；所述第二像素隔堤位于所述主电极长边之间的间隔之中。
具体的，所述第一像素隔堤整条设置在所述主电极短边之间的间隔之中，并覆盖在所述连接电极和所述桥接电极上。因所述主电极与所述连接电极或所述桥接电极连接的内角角度为45度，故所述第一像素隔堤与所述基板的长边方向呈45度或135度夹角。
进一步的，所述第一像素隔堤的厚度大于所述像素电极的厚度。
进一步的，所述第二像素隔堤整条设置在所述主电极长边之间的间隔之中，且跨过所述第一像素隔堤。所述第二像素隔堤平行于所述基板的长边方向。所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。所述主电极位于由所述第一像素隔堤和所述第二像素隔堤限定的区域内。
步骤S30、制备发光层，包括在相邻的所述第二像素隔堤之间涂布同一颜色的发光材料。
具体的，相邻的所述第二像素隔堤之间形成有凹槽，发光材料打印在凹槽内。同一颜色的发光材料打印在同一凹槽内，且发光材料覆盖所述第一像素隔堤上。
在一种实施例中，提供一种显示面板，其像素结构包括基板、第一像素隔堤及第二像素隔堤。所述第一像素隔堤，设置于所述基板上，且与所述基板的长边方向相交。所述第二像素隔堤，跨过所述第一像素隔堤设置于所述基板上，且与所述基板的所述长边方向平行。其中，相邻的两个所述第二像素隔堤之间设置有同一颜色的发光材料，且所述发光材料覆盖部分所述第一像素隔堤上。
具体的，所述第一像素隔堤与所述基板的所述长边方向呈45度或135度夹角。
具体的，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
具体的，所述基板包括驱动电路以及设置在驱动电路上的像素电极，所述像素电极通过过孔与所述驱动电路连接，且所述过孔均位于所述第一像素隔堤的相对下方。
进一步的，所述像素电极包括位于所述第一像素隔堤和所述第二像素隔堤限定区域内的主电极，以及与所述主电极电性连接且分别位于所述主电极两对角侧的连接电极和桥接电极，所述连接电极通过所述过孔与所述驱动电路连接。
进一步的，所述连接电极和所述桥接电极均位于所述第一像素隔堤的下方，且所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置。
进一步的，所述连接电极的宽度小于所述主电极的宽度。
进一步的，所述桥接电极的宽度小于所述主电极的宽度。
根据上述实施例可知：
本申请提供一种像素结构及其制备方法以及显示面板，像素结构中的像素电极的长边方向与基板的长边方向平行设置，使打印的发光材料形成的子像素的长边方向与基板的长边方向平行。实现在混合排列方式的情况下，不需要旋转玻璃基板90°，可直接打印两款产品的OLED面板。不增加设备和时间成本，适用于量产。解决了现有混合排列OLED面板的像素排列方式使打印方式受限的问题。同时像素电极的主电极呈平行四边形设置，连接电极和桥接电极分别设置在主电极的两对角侧上，当临近同颜色子像素在制程中出现短线或者短路等问题时，可以通过激光熔接的方式把桥接电极与临近相同颜色的像素桥接在一起，实现修复功能。且连接电极通过过孔连接驱动电路，所有过孔在斜向45度进行分布，不会影响开口区，提高了像素开口率。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种像素结构，其包括：
    基板；
    第一像素隔堤，设置于所述基板上，且与所述基板的长边方向相交；以及
    第二像素隔堤，跨过所述第一像素隔堤设置于所述基板上，且与所述基板的所述长边方向平行；
    其中，相邻的两个所述第二像素隔堤之间设置有同一颜色的发光材料，且所述发光材料覆盖部分所述第一像素隔堤上。
  2. 根据权利要求1所述的像素结构，其中，所述第一像素隔堤与所述基板的所述长边方向呈45度或135度夹角。
  3. 根据权利要求2所述的像素结构，其中，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
  4. 根据权利要求2所述的像素结构，其中，所述基板包括驱动电路以及设置在驱动电路上的像素电极，所述像素电极通过过孔与所述驱动电路连接，且所述过孔均位于所述第一像素隔堤的相对下方。
  5. 根据权利要求4所述的像素结构，其中，所述像素电极包括位于所述第一像素隔堤和所述第二像素隔堤限定区域内的主电极，以及与所述主电极电性连接且分别位于所述主电极两对角侧的连接电极和桥接电极，所述连接电极通过所述过孔与所述驱动电路连接。
  6. 根据权利要求5所述的像素结构，其中，所述连接电极和所述桥接电极均位于所述第一像素隔堤的下方，且所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置。
  7. 根据权利要求5所述的像素结构，其中，所述连接电极的宽度小于所述主电极的宽度。
  8. 根据权利要求5所述的像素结构，其中，所述桥接电极的宽度小于所述主电极的宽度。
  9. 一种像素结构的制备方法，其中，包括以下步骤：
    步骤S10、制备基板，包括提供一衬底，在所述衬底上制备驱动电路，在所述驱动电路上制备像素电极，所述像素电极通过过孔与所述驱动电路连接且所述像素电极之间平行间隔设置，所述像素电极的长边方向与所述基板的长边方向平行；
    步骤S20、制备像素隔堤，包括在所述基板上制备第一像素隔堤，在所述基板上制备第二像素隔堤，其中所述第二像素隔堤跨过所述第一像素隔堤，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度；以及
    步骤S30、制备发光层，包括在相邻的所述第二像素隔堤之间涂布同一颜色的发光材料。
  10. 根据权利要求9所述的像素结构制备方法，其中，在步骤S10中，每个所述像素电极包括呈平行四边形设置的主电极以及分别位于所述主电极两对角侧的连接电极和桥接电极，所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置，且所述主电极内角的角度为45度或135度。
  11. 根据权利要求10所述的像素结构制备方法，其中，在步骤S20中，所述第一像素隔堤位于所述主电极短边之间的间隔之中，且覆盖所述连接电极和所述桥接电极。
  12. 根据权利要求11所述的像素结构制备方法，其中，所述第二像素隔堤位于所述主电极长边之间的间隔之中，且跨过部分所述第一像素隔堤。
  13. 一种显示面板，其像素结构包括：
    基板；
    第一像素隔堤，设置于所述基板上，且与所述基板的长边方向相交；以及
    第二像素隔堤，跨过所述第一像素隔堤设置于所述基板上，且与所述基板的所述长边方向平行；
    其中，相邻的两个所述第二像素隔堤之间设置有同一颜色的发光材料，且所述发光材料覆盖部分所述第一像素隔堤上。
  14. 根据权利要求13所述的显示面板，其中，所述第一像素隔堤与所述基板的所述长边方向呈45度或135度夹角。
  15. 根据权利要求14所述的显示面板，其中，所述第二像素隔堤的厚度大于所述第一像素隔堤的厚度。
  16. 根据权利要求14所述的显示面板，其中，所述基板包括驱动电路以及设置在驱动电路上的像素电极，所述像素电极通过过孔与所述驱动电路连接，且所述过孔均位于所述第一像素隔堤的相对下方。
  17. 根据权利要求16所述的显示面板，其中，所述像素电极包括位于所述第一像素隔堤和所述第二像素隔堤限定区域内的主电极，以及与所述主电极电性连接且分别位于所述主电极两对角侧的连接电极和桥接电极，所述连接电极通过所述过孔与所述驱动电路连接。
  18. 根据权利要求17所述的显示面板，其中，所述连接电极和所述桥接电极均位于所述第一像素隔堤的下方，且所述桥接电极与同行且相邻的另一所述像素电极上的所述连接电极间隔设置。
  19. 根据权利要求17所述的显示面板，其中，所述连接电极的宽度小于所述主电极的宽度。
  20. 根据权利要求17所述的显示面板，其中，所述桥接电极的宽度小于所述主电极的宽度。
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