WO2021189493A1 - 显示模组及显示装置 - Google Patents

显示模组及显示装置 Download PDF

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Publication number
WO2021189493A1
WO2021189493A1 PCT/CN2020/081876 CN2020081876W WO2021189493A1 WO 2021189493 A1 WO2021189493 A1 WO 2021189493A1 CN 2020081876 W CN2020081876 W CN 2020081876W WO 2021189493 A1 WO2021189493 A1 WO 2021189493A1
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WO
WIPO (PCT)
Prior art keywords
circuit board
area
pad
layer
display
Prior art date
Application number
PCT/CN2020/081876
Other languages
English (en)
French (fr)
Inventor
白枭
杨盛际
黄冠达
卢鹏程
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202080000408.2A priority Critical patent/CN113826449B/zh
Priority to US17/259,254 priority patent/US11963406B2/en
Priority to EP20900707.9A priority patent/EP4132229A4/en
Priority to PCT/CN2020/081876 priority patent/WO2021189493A1/zh
Publication of WO2021189493A1 publication Critical patent/WO2021189493A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/147—Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/87—Arrangements for heating or cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8794—Arrangements for heating and cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10128—Display
    • H05K2201/10136—Liquid Crystal display [LCD]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding

Definitions

  • the embodiments of the present disclosure relate to the field of display technology, and in particular, to a display module and a display device.
  • FPC Flexible Printed Circuit
  • the embodiments of the present disclosure provide a display module and a display device, which have high reliability.
  • a display module wherein the display module includes:
  • the circuit board structure includes a first circuit board and a second circuit board; the first circuit board has a carrying area and an electrical connection area, and the electrical connection area is provided with a first pad; the second circuit board It has a first area and a second area.
  • the first area is mounted on the electrical connection area of the first circuit board and is electrically connected to the first pad.
  • the second area is configured to be electrically connected to the driving terminal. Connected; and the rigidity of the second circuit board is less than the rigidity of the first circuit board;
  • the display substrate is located in the carrying area of the first circuit board, the display substrate includes a silicon substrate, a driving circuit, and a second pad; at least part of the driving circuit is embedded on the silicon substrate; the driving circuit includes A transistor having a semiconductor layer located inside the silicon substrate; the second pad is electrically connected to the driving circuit, and the second pad is electrically connected to the first pad connect.
  • the first circuit board includes:
  • At least one wiring layer located in the electrical connection area; the wiring layer is located between the adjacent dielectric plates and is electrically connected to the first pad;
  • the first area of the second circuit board is located between the adjacent dielectric boards and is electrically connected to the wiring layer.
  • the first circuit board further includes a plurality of heat dissipation holes, and the plurality of heat dissipation holes are located in the carrying area and penetrate through each layer of the dielectric board.
  • the hole diameter of the heat dissipation hole is 0.1 mm to 0.45 mm.
  • Each layer of the dielectric board is provided with a heat dissipation layer on opposite sides of the dielectric board, and the heat dissipation layer is located in the carrying area;
  • each of the heat dissipation holes penetrates through each layer of the dielectric plate while also penetrating each layer of the heat dissipation layer.
  • the heat dissipation hole is a hole structure filled with a metal material; the heat dissipation layer is a metal heat dissipation layer.
  • the orthographic projection of the display substrate on the medium plate overlaps the orthographic projection of the heat dissipation layer on the medium plate.
  • the multiple layers of sequentially stacked dielectric plates include a first, second, and third dielectric plates that are sequentially stacked; wherein,
  • the display substrate and the first pad are located on a side of the first dielectric plate away from the second dielectric plate;
  • the wiring layer is located between the first dielectric plate and the second dielectric plate, and the wiring layer is electrically connected to the first pad through a via;
  • the first area of the second circuit board is located between the second dielectric board and the third dielectric board, and the first area is electrically connected to the wiring layer through a via hole.
  • the second circuit board is a flexible circuit board.
  • the second circuit board includes:
  • Wiring layer a wiring layer formed on the flexible substrate, the wiring layer including a main wiring portion and a third pad electrically connected to the main wiring portion, the third pad being located in the first region and Electrically connected to the wiring layer, and the main wiring portion is located in the second area;
  • the protection part is located in the second area and formed on the side of the main wiring part away from the flexible substrate.
  • the material of the flexible substrate and the protective part is polyimide, and the material of the wiring layer is a metal material;
  • the material of the dielectric board is glass fiber, and the material of the wiring layer is a metal material.
  • the second pad and the first pad are electrically connected by a metal wire.
  • the display module further includes a protective film layer covering the first pad, the second pad and the metal lead.
  • the display substrate has a display area and a binding area located on at least one side of the display area, and the second pad is located in the binding area;
  • the display substrate further includes a light-emitting element located in the display area, and the light-emitting element is formed on a side of the driving circuit away from the base substrate and electrically connected to the driving circuit.
  • the driving circuit further includes a scan signal line, a data signal line, and a power supply voltage signal line;
  • the power supply voltage signal line is electrically connected to the driving terminal through the second pad and the circuit board structure.
  • a display device which includes any of the above-mentioned display modules.
  • FIG. 1 is a schematic diagram of an assembly of a display substrate and a flexible circuit board in the related art
  • FIG. 2 is a schematic diagram of the assembly of the display substrate and the rigid circuit board in the related art
  • FIG. 3 is a schematic diagram of the structure of the display module described in an embodiment of the disclosure.
  • FIG. 4 is a schematic top view of the display module described in an embodiment of the disclosure.
  • 5a and 5b are schematic cross-sectional views of display modules described in different embodiments of the present disclosure.
  • FIG. 6 is a schematic cross-sectional view of a second circuit board described in an embodiment of the disclosure.
  • FIG. 7 is a schematic cross-sectional view of the display substrate described in an embodiment of the disclosure.
  • Circuit board structure 201, first circuit board; 201a, carrying area, 201b, electrical connection area; 2011, first pad; 2012, first dielectric board; 2013, second dielectric board; 2014, third Dielectric board; 2015, heat dissipation hole; 2016, wiring layer; 2017, via; 2018, heat dissipation layer; 202, second circuit board; 202a, first area; 202b, second area; 2021, flexible substrate; 2022 Protective part; 2023, main wiring part; 2024, third pad; 203, metal lead; 204, protective film layer.
  • on can mean that one layer is directly formed or disposed on another layer, or can mean a layer A layer is formed indirectly or arranged on another layer, that is, there are other layers between the two layers.
  • the display substrate 1 is usually laminated with a flexible circuit board (FPC) 2 through the ACF process, and then is electrically connected to the drive end of the whole machine through the FPC; or, as shown in FIG. 2, the display
  • the substrate 1 is directly arranged on the hard circuit board (PCB) 3, and is electrically connected to the pad 30 on the hard circuit board 3 through the lead 4 through the Wire Bonding process, and then the PCB adopts the back connector 31
  • the signal is sent to the drive end of the complete machine, but the display module formed in this way has low reliability and poor assembly and integration performance.
  • an embodiment of the present disclosure provides a display module, which may include a display substrate 10 and a circuit board structure 20, wherein:
  • the circuit board structure 20 may include a first circuit board 201 and a second circuit board 202; the first circuit board 201 has a carrying area 201a and an electrical connection area 201b, and the carrying area 201a is used for carrying Other components, such as the display substrate 10, the electrical connection area 201b is used to realize the electrical connection between the first circuit board 201 and other components (for example: the display substrate 10 or the second circuit board 202); specifically, the electrical connection area 201b
  • the first pad 2011 is provided.
  • the second circuit board 202 has a first area 202a and a second area 202b.
  • the first area 202a is mounted on the electrical connection area 201b and is electrically connected to the first pad 2011.
  • the second area 202b is configured to be connected to the driving terminal ( (Not shown in the figure) electrical connection. It should be noted that this drive is the drive end of the entire display device.
  • the display substrate 10 is located in the carrying area 201a of the first circuit board 201, and the display substrate 10 has a display area 10a and a binding area 10b located on at least one side of the display area 10a.
  • the area 10 b is provided with a second pad 101, and the second pad 101 is electrically connected to the first pad 2011 to realize the electrical connection between the display substrate 10 and the circuit board structure 20.
  • the rigidity of the first circuit board 201 can be designed to be greater, which can ensure that the first circuit board 201 can be stably supported Display substrate 10; and the rigidity of the second circuit board 202 can be designed to be small, so that the second circuit board 202 has a certain bending ability, so that while ensuring that the circuit board structure 20 can be stably connected to the drive end of the whole machine,
  • the circuit board structure 20 can also be applied to a smaller or more complicated installation space, which improves the application range of the circuit board structure 20 and facilitates the assembly of the whole machine. That is to say, in the embodiment of the present disclosure, in order to ensure the above characteristics, the rigidity of the second circuit board 202 needs to be smaller than the rigidity of the first circuit board 201.
  • the stiffness mentioned in the embodiments of the present disclosure refers to the ability of a material or structure to resist elastic deformation when subjected to a force; among them, an object with a greater stiffness is less likely to be deformed. Since the rigidity of the second circuit board 202 is less than the rigidity of the first circuit board 201, the bending performance of the second circuit board 202 is better than the bending performance of the first circuit board 201.
  • the second circuit board 202 can be a flexible circuit board, and the second circuit board 202 is easily bent; and the first circuit board 201 can be a rigid circuit board, and the first circuit board 201 is not easily bent. fold.
  • the hard circuit board of the embodiment of the present disclosure is electrically connected to the drive end of the whole machine through the flexible circuit board, compared with the solution of providing the back connector on the PCB (hard circuit board), it is guaranteed that the circuit board structure 20 can be While being stably connected to the drive end of the whole machine, the thickness of the circuit board structure 20 can be reduced, thereby reducing the thickness of the entire display module.
  • the second pad 101 on the first circuit board 201 and the first pad 2011 on the display substrate 10 can be electrically connected through a metal lead 203 (for example, a gold wire). Connection, that is, the first circuit board 201 and the display substrate 10 can be electrically connected through the Wire Bonding process.
  • the circuit board structure 20 and the display substrate 10 can be improved. The stability of the connection between them can ensure stable signal transmission and ensure the reliability of the display module.
  • the display module further includes a protective film layer 204.
  • the protective film layer 204 covers the first pad 2011, the second pad 101 and the metal lead 203, so as to avoid the first pad 2011, the second pad 2011 and the second pad.
  • the pad 101 and the metal lead 203 are prone to damage, so as to ensure the stability of the connection between the first pad 2011, the second pad 101 and the metal lead 203.
  • the protective film layer 204 may be a protective glue. After the metal lead 203 is bound to the first pad 2011 and the second pad 101, a layer of protective glue may be coated to protect the first pad 2011, The second pad 101 and the metal lead 203 are protected.
  • the first circuit board 201 may include a dielectric board and a wiring layer 2016.
  • the dielectric board may be provided with multiple layers, and the multiple dielectric boards are stacked in sequence.
  • the dielectric plate may include three layers stacked in sequence, namely, a first dielectric plate 2012, a second dielectric plate 2013, and a third dielectric plate 2014.
  • the first dielectric plate 2012 may be a top layer medium.
  • a side of the first dielectric board 2012 away from the second dielectric board 2013 is provided with a display substrate 10 located in the carrying area 201a and a first pad 2011 located in the electrical connection area 201b; the second dielectric board 2013 is an intermediate layer medium Board; and the third dielectric board 2014 may be a bottom dielectric board.
  • the dielectric board in the first circuit board 201 is not limited to the three layers shown in FIG. 5a and FIG. 5b, and can also be provided with four layers, five layers, etc., depending on the specific situation.
  • the wiring layer 2016 is located in the electrical connection area 201b of the first circuit board 201 and between adjacent dielectric boards.
  • the wiring layer 2016 can be electrically connected to the first pad 2011.
  • a wiring layer 2016 may be disposed between the first dielectric plate 2012 and the second dielectric plate 2013, and the wiring layer 2016 may be electrically connected to the first pad 2011 through the via 2017.
  • the via 2017 is a hole structure filled with a metal material. It should be understood that the wiring layer 2016 in the first circuit board 201 is not limited to one layer in FIG. 5a and FIG. 5b, and may also be multiple layers.
  • the wiring layer 2016 is usually provided with multiple layers, and each layer of wiring The layers 2016 are respectively located between different adjacent dielectric boards, and the wiring layers 2016 of each layer are electrically connected through vias 2017.
  • the material of the dielectric board can be glass fiber, but it is not limited to this, and other materials can also be used, as long as the first circuit board 201 has sufficient support strength That's it.
  • the material of the wiring layer 2016 may be a metal material, such as copper, aluminum, etc., to ensure good conductivity, but it is not limited to this, and may also be other materials with good conductivity.
  • the first circuit board 201 may include a heat dissipation hole 2015, and a plurality of heat dissipation holes 2015 may be provided. And each heat dissipation hole 2015 can penetrate through each layer of dielectric board. Since each heat dissipation hole 2015 penetrates through each layer of dielectric board, when the display substrate 10 is formed on the part of the top dielectric board located in the carrying area 201a, the heat generated by the display substrate 10 can pass through Each heat dissipation hole 2015 transfers heat to the outside, so that the display substrate 10 may be overheated and the display performance may be deteriorated.
  • a plurality of heat dissipation holes 2015 may be evenly arranged in the carrying area 201a to ensure the uniformity of heat dissipation of the display substrate 10.
  • the aperture of the heat dissipation hole 2015 can be 0.1mm to 0.45mm, such as: 0.1mm, 0.15mm, 0.2mm, 0.25mm, 0.3mm, 0.35mm, 0.4mm, 0.45mm, etc., such a design can be It can avoid the situation that the diameter of the heat dissipation hole 2015 is too large and the supporting strength of the first circuit board 201 is deteriorated.
  • the aperture of the heat dissipation hole 2015 by designing the aperture of the heat dissipation hole 2015 to be 0.1 mm to 0.45 mm, while ensuring the support strength of the first circuit board 201, the heat dissipation capability can also be improved.
  • the heat dissipation layer 2018 located in the carrying area 201a is provided on the opposite sides of each layer of the dielectric board to further improve the heat dissipation capacity of the module and ensure a good display effect.
  • the aforementioned heat dissipation hole 2015 penetrates through each layer of the dielectric board and also penetrates each layer of the heat dissipation layer 2018, that is, the heat dissipation hole 2015 can connect each layer of the heat dissipation layer 2018.
  • the heat generated by the display substrate 10 can be transferred to each heat dissipation layer 2018 through the heat dissipation hole 2015 for heat dissipation, so as to improve the heat dissipation efficiency.
  • the heat dissipation hole 2015 may be a hole structure filled with a metal material, and the heat dissipation layer 2018 may be a metal heat dissipation layer to improve the heat dissipation capability.
  • the material filled in the heat dissipation hole 2015 and the material of the heat dissipation layer 2018 are not limited to metal materials such as copper and aluminum, and other materials with good heat dissipation capabilities are also possible.
  • the heat dissipation hole 2015 may also be hollow, that is, no heat dissipation material such as metal is filled in the heat dissipation hole 2015.
  • the orthographic projection of the display substrate 10 on the dielectric board overlaps with the orthographic projection of the heat dissipation layer 2018 on the dielectric board, or the orthographic projection of the display substrate 10 on the dielectric board is located on the orthographic projection of the heat dissipation layer 2018 on the dielectric board. In this way, the contact area between the heat dissipation layer 2018 and the display substrate 10 can be increased, so that the heat dissipation efficiency can be further improved.
  • the first area 202a of the second circuit board 202 is located between adjacent dielectric boards of the first circuit board 201 and is electrically connected to the wiring layer 2016 That is, the second circuit board 202 is partially sandwiched between adjacent dielectric boards of the first circuit board 201.
  • This design not only ensures the stability of the connection between the second circuit board 202 and the first circuit board 201, but also facilitates The second circuit board 202 and the first circuit board 201 are electrically connected inside the first circuit board 201 to ensure stable electrical connection and reduce the difficulty of electrical connection.
  • the first area 202a of the second circuit board 202 is disposed between the second dielectric board 2013 and the third dielectric board 2014, and the first area 202a can pass through the vias 2017 and travel
  • the wire layer 2016 is electrically connected. But it is not limited to this.
  • the first area 202a of the second circuit board 202 can also be arranged on the same layer as the wiring layer 2016, as long as the first area 202a of the second circuit board 202 and the wiring layer 2016 can be stably connected. .
  • the first area 202a of the second circuit board 202 and the wiring layer 2016 can be electrically connected through a plurality of via holes 2017 to ensure that the electrical connection between the first circuit board 201 and the second circuit board 202 is stable.
  • the second circuit board 202 may include a flexible substrate 2021, a wiring layer and a protective part 2022.
  • the wiring layer is formed on the flexible substrate 2021, and the wiring layer may include a main wiring portion 2023 and a third pad 2024 electrically connected to the main wiring portion 2023.
  • the third pad 2024 is located in the first region 202a and is connected to the first circuit board.
  • the wiring layer 2016 of 201 is electrically connected, the main wiring portion 2023 is located in the second area 202b; and the protection portion 2022 is located in the second area 202b and is formed on the side of the main wiring portion 2023 away from the flexible substrate 2021.
  • the protection portion 2022 can be opposite to the second area 202b.
  • the main wiring portion 2023 on the second circuit board 202 plays a protective role. In addition, it can also ensure the structural stability of the second circuit board 202 to facilitate the overall assembly of the product. It should be understood that this second circuit board 202 is not limited to the single-layer wiring shown in FIG.
  • the side of the layer away from the flexible substrate 2021 is provided with a protective part 2022 covering the main wiring part 2023.
  • the material of the flexible substrate 2021 and the protective portion 2022 may be polyimide or other materials to improve the flexibility of the second circuit board 202, so that the second circuit board 202 is easy to bend, but it is not limited to this, and can also be used It is made of other materials, as long as it can make the second circuit board 202 have good bendability.
  • the material of the wiring layer can be a metal material (for example, copper, aluminum, etc.) to ensure that the second circuit board 202 has good conductivity, but it is not limited to this, and other materials with good conductivity can also be used.
  • the display substrate 10 may include a base substrate and a driving circuit; wherein:
  • the base substrate may be a silicon substrate 102, and the silicon substrate 102 is, for example, single crystal silicon or high-purity silicon.
  • the driving circuit may include a circuit structure located in the display area 10a, and may also include a circuit structure located in the binding area 10b.
  • the driving circuit may include a transistor, which has a semiconductor layer, and the semiconductor layer is located inside the silicon substrate 102. The number of transistors in the driving circuit is multiple, and the transistors can be distributed not only in the display area 10a, but also in the bonding area. 10b, or distributed in other non-display areas.
  • the driving circuit of the embodiment of the present disclosure may be electrically connected to the second pad 101 of the bonding area 10b.
  • the second pad 101 is bonded to the first pad 2011 of the first circuit board 201 to form
  • the display substrate 10 provides a signal, such as a power supply voltage signal; that is, the driving circuit may include a power supply voltage signal line (not shown in the figure), and the power supply voltage signal line may be electrically connected to the second pad 101, that is, the power supply voltage
  • the signal line can be electrically connected to the driving end through the second pad 101 and the circuit board structure 20 to obtain a power supply voltage signal from the driving end.
  • the second pad 101 may be provided in the same layer as the conductive structure in the display area 10a to save process.
  • the second pad 101 may be provided in the same layer as the conductive layer 107 of the top layer (farthest from the silicon substrate 102) below the light emitting element 104 in the display area 10a to facilitate the subsequent bonding process.
  • the "same layer arrangement" in the embodiments of the present disclosure means that multiple structures are formed from the same material film through the same or different patterning processes, and thus have the same material.
  • the driving circuit may include a pixel circuit located in the display area 10a, and the pixel circuit may be formed on the silicon substrate 102 by a semiconductor process, for example: the semiconductor layer 1031 of the driving transistor 103 is formed on the silicon substrate 102 by a doping process. That is, the active layer), the source electrode 1032 and the drain electrode 1033, and the insulating layer 1034 is formed by a silicon oxidation process, and the gate electrode 1035 and the plurality of conductive layers 106, 107 are formed by a sputtering process or other processes.
  • the semiconductor layer 1031 of the transistor 103 is located inside the silicon substrate 102; that is, the semiconductor layer 1031 may belong to a part of the silicon substrate 102.
  • the driving circuit may also include a gate driving circuit, a data driving circuit, a data signal line, and a scanning signal line.
  • the data driving circuit and the gate driving circuit are respectively connected to the pixel circuit through the data signal line and the scanning signal line to provide electric signal.
  • the data driving circuit is used to provide data signals
  • the gate driving circuit is used to provide scanning signals, and can also be further used to provide various control signals, power signals, and the like.
  • the gate driving circuit and the data driving circuit may also be integrated in the silicon substrate 102 through the aforementioned semiconductor process. That is to say, the silicon substrate 102 is used as the base substrate in the display substrate 10, and the pixel circuit, the gate driving circuit, and the data driving circuit can all be integrated on the silicon substrate 102. In this case, since the silicon-based circuit can achieve higher accuracy, the gate drive circuit and the data drive circuit can also be formed in the area corresponding to the display area 10a of the display substrate 10, and not necessarily located in the non- Display area. Among them, the gate driving circuit and the data driving circuit can adopt conventional circuit structures in the art, which are not limited in the embodiments of the present disclosure.
  • the display substrate 10 may further include a light-emitting element 104 formed on the side of the driving circuit away from the silicon substrate 102 and located in the display area 10a.
  • the light-emitting element 104 may be connected to the driving circuit. Electric connection.
  • the light-emitting element 104 may include an anode 1041, a light-emitting layer 1042, and a cathode 1043 sequentially formed on the driving substrate 105.
  • the anode 1041 may pass through a contact hole 108 filled with a conductive material (such as metal tungsten, etc.) and a plurality of conductive materials.
  • the layers 106 and 107 are electrically connected to the drain electrode 1033 in the transistor 103; as shown in FIG. 7, one insulating layer 1034 and two conductive layers 106 and 107 are shown. The number of layers is not limited.
  • multiple light-emitting elements 104 may be provided, the anodes 1041 of the multiple light-emitting elements 104 are disconnected from each other, and the cathodes 1043 of the multiple light-emitting elements 104 may be provided as a whole layer.
  • a spacer PDL may or may not be provided between adjacent anodes 1041, depending on the specific situation.
  • the topmost conductive layer 107 in the driving substrate 105 is reflective, for example, a laminated structure of titanium/titanium nitride/aluminum.
  • the conductive layer 107 includes a plurality of sub-layers arranged at intervals, which are respectively arranged in a one-to-one correspondence with the anode 1041 of each light-emitting element 104.
  • the conductive layer 107 can be configured as a reflective layer for reflecting the light emitted by the light emitting element 104 and improving the light extraction efficiency.
  • the orthographic projection of the anode 1041 of each light-emitting element 104 on the silicon substrate 102 falls within the orthographic projection of the portion of its corresponding conductive layer on the silicon substrate 102.
  • the anode 1041 may use a transparent conductive oxide material with a high work function, such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and the like.
  • the display substrate 10 further includes an encapsulation layer 109, a color film layer 110, a cover plate 111, and the like on the side of the light-emitting element 104 away from the silicon substrate 102.
  • the first encapsulation layer 109 is configured to seal the light-emitting element 104 to prevent external moisture and oxygen from penetrating into the light-emitting element 104 and the pixel circuit and causing damage to the device.
  • the first encapsulation layer 109 includes an inorganic thin film or a structure in which organic thin films and inorganic thin films are alternately stacked.
  • the color film layer 110 may include color blocks such as R (red), G (green), and B (blue).
  • the cover 111 is, for example, a glass cover. Wherein, an encapsulation layer 109 may also be provided between the color filter layer 110 and the cover plate 111 to encapsulate the color filter layer 110.
  • the display substrate 10 is an organic light emitting diode (OLED) display substrate or a micro OLED (Micro OLED) display substrate.
  • OLED organic light emitting diode
  • Micro OLED Micro OLED
  • An embodiment of the present disclosure also provides a display device, which includes the display module described in any of the above embodiments.
  • the specific type of the display device is not particularly limited, and the types of display devices commonly used in the field can be used, such as display screens, mobile devices such as mobile phones and notebook computers, wearable devices such as watches, and VR devices. And so on, a person skilled in the art can make a corresponding selection according to the specific purpose of the display device, which will not be repeated here.
  • the display device also includes other necessary components and components. Taking the display as an example, it may also include a housing, a main circuit board, a power cord, etc. The specific usage requirements of the display device shall be supplemented accordingly, which will not be repeated here.
  • This application is intended to cover any variations, uses, or adaptive changes of the present disclosure. These variations, uses, or adaptive changes follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field that are not disclosed in the present disclosure. .
  • the description and the embodiments are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the claims.

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Abstract

一种显示模组及显示装置，所述显示模组包括：电路板结构（20），包括第一电路板（201）和第二电路板（202）；第一电路板（201）具有承载区（201a）和电性连接区（201b），电性连接区（201b）上设置有第一焊盘（2011）；第二电路板（202）具有第一区（202a）及第二区（202b），第一区（202a）安装于电性连接区（201b）、并与第一焊盘（2011）电连接，第二区（202b）配置为与驱动端电连接；且第二电路板（202）的刚度小于第一电路板（201）的刚度；显示基板（10），位于第一电路板（201）的承载区（201a），其包括硅基板（102）、至少部分嵌在硅基板（102）上的驱动电路及与驱动电路电连接的第二焊盘（101）；驱动电路包括具有半导体层（1031）的晶体管（103），半导体层（1031）位于硅基板（102）的内部；第二焊盘（101）与第一焊盘（2011）电连接。

Description

显示模组及显示装置 技术领域
本公开实施例涉及显示技术领域，特别涉及一种显示模组及显示装置。
背景技术
近年，随着虚拟现实(Virtual Reality,简称VR)技术和增强现实(Augmented Reality，简称AR)技术的日益进步，适用于VR/AR领域的显示装置也正在向微型化、高像素密度(Pixel Per Inch,简称PPI)、快速响应和高色域的方向发展。硅基微显示OLED(Organic Light-Emitting Diode，有机电激光显示)面板正是其中突出的一个方向。虽然硅基微显示OLED起步较晚，但凭借着其微型化和高PPI的优势，也正在成为显示领域的新的关注焦点。
由于主要应用于AR/VR领域，因此，为了方便模组组装，柔性电路板(Flexible Printed Circuit，简称：FPC)成为硅基OLED与驱动端连接的主要方式，但由于FPC常采用ACF(Anisotropic Conductive Film，异方性导电胶膜)贴合工艺与硅基OLED连接，信赖性较低。
发明内容
本公开实施例提供一种显示模组及显示装置，具有较高的信赖性。
在本公开的一种实施例中，提供了一种显示模组，其中，所述显示模组包括：
电路板结构，包括第一电路板和第二电路板；所述第一电路板具有承载区和电性连接区，所述电性连接区上设置有第一焊盘；所述第二电路板具有第一区及第二区，所述第一区安装于所述第一电路板的电性连接区、并与所述第一焊盘电连接，所述第二区配置为与驱动端 电连接；且所述第二电路板的刚度小于所述第一电路板的刚度；
显示基板，位于所述第一电路板的承载区，所述显示基板包括硅基板、驱动电路及第二焊盘；所述驱动电路的至少部分嵌在所述硅基板上；所述驱动电路包括晶体管，所述晶体管具有半导体层，所述半导体层位于所述硅基板的内部；所述第二焊盘与所述驱动电路电连接，且所述第二焊盘与所述第一焊盘电连接。
在本公开的一种示例性实施例中，所述第一电路板包括：
多层依次层叠的介质板；以及，
位于所述电性连接区的至少一层走线层；所述走线层位于相邻所述介质板之间，并与所述第一焊盘电连接；
所述第二电路板的第一区位于相邻所述介质板之间，并与所述走线层电连接。
在本公开的一种示例性实施例中，所述第一电路板还包括多个散热孔，多个所述散热孔位于所述承载区并贯穿各层所述介质板。
在本公开的一种示例性实施例中，所述散热孔的孔径为0.1mm至0.45mm。
在本公开的一种示例性实施例中，
各层所述介质板的相对两侧均设置有散热层，所述散热层位于所述承载区；
且各所述散热孔在贯穿各层所述介质板的同时还贯穿各层所述散热层。
在本公开的一种示例性实施例中，所述散热孔为填充有金属材料的孔结构；所述散热层为金属散热层。
在本公开的一种示例性实施例中，所述显示基板在所述介质板上的正投影与所述散热层在所述介质板上的正投影相重叠。
在本公开的一种示例性实施例中，所述多层依次层叠的介质板包括依次层叠的第一介质板、第二介质板及第三介质板；其中，
所述显示基板和所述第一焊盘位于所述第一介质板背离所述第二介质板的一侧；
所述走线层位于所述第一介质板和所述第二介质板之间，且所述 走线层通过过孔与所述第一焊盘电连接；
所述第二电路板的所述第一区位于所述第二介质板与所述第三介质板之间，且所述第一区通过过孔与所述走线层电连接。
在本公开的一种示例性实施例中，所述第二电路板为柔性电路板。
在本公开的一种示例性实施例中，所述第二电路板包括：
柔性基底；
布线层，形成在所述柔性基底上的布线层，所述布线层包括主布线部和与所述主布线部电连接的第三焊盘，所述第三焊盘位于所述第一区并与所述走线层电连接，所述主布线部位于所述第二区；以及
保护部，位于所述第二区并形成在所述主布线部背离所述柔性基底的一侧。
在本公开的一种示例性实施例中，所述柔性基底和所述保护部的材料为聚酰亚胺，所述布线层的材料为金属材料；
所述介质板的材料为玻璃纤维，所述走线层的材料为金属材料。
在本公开的一种示例性实施例中，所述第二焊盘与所述第一焊盘通过金属引线电连接。
在本公开的一种示例性实施例中，所述显示模组还包括保护膜层，所述保护膜层覆盖所述第一焊盘、所述第二焊盘及所述金属引线。
在本公开的一种示例性实施例中，所述显示基板具有显示区和位于所述显示区至少一侧的绑定区，所述第二焊盘位于所述绑定区；
所述显示基板还包括位于所述显示区的发光元件，所述发光元件形成在所述驱动电路背离衬底基板的一侧并与所述驱动电路电连接。
在本公开的一种示例性实施例中，所述驱动电路还包括扫描信号线、数据信号线及电源电压信号线；
其中，所述电源电压信号线通过所述第二焊盘和所述电路板结构与驱动端电连接。
在本公开的一种实施例中，提供了一种显示装置，其中，包括上述任一项所述的显示模组。
附图说明
附图用来提供对本公开实施例的进一步理解，并且构成说明书的一部分，与本公开实施例一起用于解释本公开，并不构成对本公开的限制。通过参考附图对详细示例实施例进行描述，以上和其它特征和优点对本领域技术人员将变得更加显而易见，在附图中：
图1为相关技术中显示基板与柔性电路板的组装示意图；
图2为相关技术中显示基板与硬质电路板的组装示意图；
图3为本公开实施例所描述的显示模组的结构示意图；
图4为本公开实施例所描述的显示模组的俯视示意图；
图5a和图5b为本公开不同实施例所描述的显示模组的截面示意图；
图6为本公开实施例所描述的第二电路板的截面示意图；
图7为本公开实施例所描述的显示基板的截面示意图。
附图说明：
1、显示基板；2、柔性电路板；3、硬质电路板；30、焊盘；31、背面连接器；4、引线；
10、显示基板；10a、显示区；10b、绑定区；101、第二焊盘；102、硅基板；103、驱动晶体管；1031、半导体层；1032、源电极；1033、漏电极；1034、绝缘层；1035、栅极；104、发光元件；1041、阳极、1042、发光层；1043、阴极；105、驱动基板；106、导电层；107、导电层；108、接触孔；109、封装层；110、彩膜层；111、盖板；
20、电路板结构；201、第一电路板；201a、承载区、201b、电性连接区；2011、第一焊盘；2012、第一介质板；2013、第二介质板；2014、第三介质板；2015、散热孔；2016、走线层；2017、过孔；2018、散热层；202、第二电路板；202a、第一区；202b、第二区；2021、柔性基底；2022、保护部；2023、主布线部；2024、第三焊盘；203、金属引线；204、保护膜层。
具体实施方式
下面通过实施例，并结合附图，对本公开的技术方案作进一步具体的说明。在说明书中，相同或相似的附图标号指示相同或相似的部件。下述参照附图对本公开实施方式的说明旨在对本公开的总体发明构思进行解释，而不应当理解为对本公开的一种限制。
另外，在下面的详细描述中，为便于解释，阐述了许多具体的细节以提供对本披露实施例的全面理解。然而明显地，一个或多个实施例在没有这些具体细节的情况下也可以被实施。
需要说明的是，本文中所述的“在……上”、“在……上形成”和“设置在……上”可以表示一层直接形成或设置在另一层上，也可以表示一层间接形成或设置在另一层上，即两层之间还存在其它的层。
用语“一个”、“一”、“该”、“所述”和“至少一个”用以表示存在一个或多个要素/组成部分/等；用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等。
需要说明的是，虽然术语“第一”、“第二”、“第三”等可以在此用于描述各种部件、构件、元件、区域、层和/或部分，但是这些部件、构件、元件、区域、层和/或部分不应受到这些术语限制。而是，这些术语用于将一个部件、构件、元件、区域、层和/或部分与另一个相区分。
相关技术中，如图1所示，显示基板1通常采用ACF工艺与柔性电路板(FPC)2进行贴合，然后通过FPC与整机驱动端电性连接；或者，如图2所示，显示基板1直接设置在硬质电路板(PCB)3上，并通过Wire Bonding(引线键合)工艺与硬质电路板3上的焊盘30通过引线4电性连接，然后PCB采用背面连接器31将信号送出给整机驱动端，但采用此种方式形成的显示模组信赖性较低，且组装整合性能较差。
如图3所示，本公开实施例提供了一种显示模组，该显示模组可 包括显示基板10和电路板结构20，其中，
如图3至图5b所示，电路板结构20可包括第一电路板201和第二电路板202；第一电路板201具有承载区201a和电性连接区201b，此承载区201a用于承载其他部件，例如：显示基板10，电性连接区201b用于实现第一电路板201与其他部件(例如：显示基板10或第二电路板202)电连接；具体地，电性连接区201b上设置有第一焊盘2011。而第二电路板202具有第一区202a及第二区202b，此第一区202a安装于电性连接区201b、并与第一焊盘2011电连接，第二区202b配置为与驱动端(图中未示出)电连接。需要说明的是，此驱动为显示装置整机的驱动端。
如图5a、图5b和图7所示，显示基板10位于第一电路板201的承载区201a，且显示基板10具有显示区10a及位于显示区10a至少一侧的绑定区10b，绑定区10b设置有第二焊盘101，此第二焊盘101与第一焊盘2011电连接，以实现显示基板10与电路板结构20的电性连接。
在本公开的实施例中，由于第一电路板201的承载区201a需要承载其他部件，因此，可将第一电路板201的刚度设计的较大，这样可保证第一电路板201能够稳定支撑显示基板10；而第二电路板202的刚度可设计的较小，以使得第二电路板202具有一定的弯折能力，这样在保证电路板结构20能够与整机驱动端稳定连接的同时，还可使电路板结构20能够适用于较小或较复杂的安装空间内，提高了电路板结构20的适用范围，便于整机组装。也就是说，本公开的实施例中，为了保证以上特性，需使第二电路板202的刚度小于第一电路板201的刚度。
需要说明的是，本公开实施例中提到的刚度是指材料或结构在受力时抵抗弹性变形的能力；其中，刚度越大的物体，其越不容易发生变形。由于第二电路板202的刚度小于第一电路板201的刚度，因此，第二电路板202的弯折性能优于第一电路板201的弯折性能。
在一些实施例中，第二电路板202可为柔性电路板，该第二电路 板202容易被弯折；而第一电路板201可为硬质电路板，该第一电路板201不易被弯折。
其中，由于本公开实施例的硬质电路板通过柔性电路板与整机驱动端电连接，相比于在PCB(硬质电路板)上设置背面连接器的方案，在保证电路板结构20能够稳定地与整机驱动端连接同时，还可减薄电路板结构20的厚度，从而减薄整个显示模组的厚度。
在一些实施例中，如图3至图5b所示，第一电路板201上的第二焊盘101与显示基板10上的第一焊盘2011可通过金属引线203(例如：金线)电连接，即：第一电路板201与显示基板10可通过Wire Bonding工艺进行电连接，相比于采用ACF工艺将FPC与显示基板10进行贴合的方案，可提高电路板结构20与显示基板10之间的连接稳定性，从而可保证信号传输稳定，保证显示模组的信赖性。
其中，如图3所示，显示模组还包括保护膜层204，此保护膜层204覆盖第一焊盘2011、第二焊盘101及金属引线203，以避免第一焊盘2011、第二焊盘101及金属引线203容易发生损坏的情况，从而保证第一焊盘2011、第二焊盘101及金属引线203三者之间的连接稳定性。
举例而言，此保护膜层204可为保护胶，在金属引线203与第一焊盘2011和第二焊盘101绑定之后，可涂覆一层保护胶，以对第一焊盘2011、第二焊盘101及金属引线203进行保护。
在一些实施例中，如图4、图5a和图5b所示，第一电路板201可包括介质板及走线层2016。
详细说明，介质板可设置有多层，且多层介质板依次层叠。如图5a和图5b所示，介质板可包括依次层叠的三层，分别为第一介质板2012、第二介质板2013及第三介质板2014，其中，第一介质板2012可为顶层介质板，该第一介质板2012背离第二介质板2013的一侧设置有位于承载区201a的显示基板10和位于电性连接区201b的第一焊盘2011；第二介质板2013为中间层介质板；而第三介质板2014可为底层介质板。
应当理解的是，第一电路板201中的介质板不限于图5a和图5b中所示的三层，还可设置四层、五层等等，视具体情况而定。
走线层2016位于第一电路板201的电性连接区201b，且位于相邻介质板之间，该走线层2016可与第一焊盘2011电连接。如图5a和图5b所示，一走线层2016可设置在第一介质板2012和第二介质板2013之间，该走线层2016可通过过孔2017与第一焊盘2011电连接，可选地，过孔2017为填充金属材料的孔结构。应当理解的是，第一电路板201中的走线层2016不限于图5a和图5b中一层，也可为多层。由于第一电路板201的电性连接区201b面积较小，为了保证第一电路板201的走线能够在电性连接区201b排开，走线层2016通常设置多层，且每层走线层2016分别位于不同的相邻介质板之间，且各层走线层2016通过过孔2017实现电连接。
举例而言，为了保证第一电路板201具有较大的刚性，介质板的材料可为玻璃纤维，但不限于此，也可采用其他材料，只要能保证第一电路板201具有足够的支撑强度即可。而走线层2016的材料可为金属材料，例如：铜、铝等材料，以保证良好的导电性，但不限于此，也可为其他具有良好导电性的材料。
在一些实施例中，如图5a和图5b所示，第一电路板201可包括散热孔2015，散热孔2015可设置有多个。且各散热孔2015可贯穿各层介质板，由于各散热孔2015贯穿各层介质板，因此，在显示基板10形成在顶层介质板位于承载区201a的部分时，显示基板10产生的热量可通过各散热孔2015向外传递热量，从而可避免显示基板10过热而导致显示性能变差的情况。
在本公开的实施例中，由于第一电路板201的背面不需要设置背面连接器，因此，不需要在第一电路板201的承载区201a设置信号走线，故整个第一电路板201的承载区201a可以设计大量散热孔2015，以大幅度提高显示基板10的散热能力，从而提高显示效果。
应当理解的是，多个散热孔2015可均匀排布在承载区201a，以保证显示基板10散热均匀性。
可选地，散热孔2015的孔径可为0.1mm至0.45mm，比如：0.1mm、0.15mm、0.2mm、0.25mm、0.3mm、0.35mm、0.4mm、0.45mm等等，这样设计一方面可避免散热孔2015的孔径过大而导致第一电路板201的支撑强度变差的情况，另一方面可避免散热孔2015的孔径过小而导致散热能力较差的情况，即：在本公开的实施例中，通过将散热孔2015的孔径设计为0.1mm至0.45mm，在保证第一电路板201的支撑强度的同时，还可提高散热能力。
进一步地，如图5a和图5b所示，各层介质板的相对两侧均设置有位于承载区201a的散热层2018，以进一步提高模组散热能力，保证良好的显示效果。
需要说明的是，前述散热孔2015在贯穿各层介质板的同时还贯穿各层散热层2018，也就是说，散热孔2015可将各层散热层2018连接。本公开实施例中，通过散热孔2015可将显示基板10产生的热量传递到各散热层2018进行散热，以提高散热效率。
如图5a所示，散热孔2015可为填充有金属材料的孔结构，该散热层2018可为金属散热层，以提高散热能力。应当理解的是，该散热孔2015内填充的材料及散热层2018的材料不限于铜、铝等金属材料，其他具有良好散热能力的材料也可。此外，如图5b所示，散热孔2015也可呈空心状，即：散热孔2015内未填充金属等散热材料。
可选地，显示基板10在介质板上的正投影与散热层2018在介质板上的正投影相重叠，或显示基板10在介质板上的正投影位于散热层2018在介质板上的正投影内，这样可增大散热层2018与显示基板10的接触面积，从而可进一步提高散热效率。
在一些实施例中，如图5a、图5b和图6所示，第二电路板202的第一区202a位于第一电路板201的相邻介质板之间，并与走线层2016电连接，也就是说，第二电路板202部分夹在第一电路板201的相邻介质板之间，这样设计不仅可以保证第二电路板202与第一电路板201的连接稳定性，而且还便于第二电路板202与第一电路板201在第一电路板201的内部进行电连接，保证电性连接稳定的同时， 还可降低电连接难度。
如图5a、图5b和图6所示，第二电路板202的第一区202a设置在第二介质板2013与第三介质板2014之间，此第一区202a可通过过孔2017与走线层2016电连接。但不限于此，第二电路板202的第一区202a也可与走线层2016设置在同一层上，只要能够保证第二电路板202的第一区202a与走线层2016稳定连接即可。
其中，第二电路板202的第一区202a与走线层2016可通过多个过孔2017进行电连接，以保证第一电路板201与第二电路板202的电性连接稳定。
在一些实施例中，如图6所示，第二电路板202可包括柔性基底2021、布线层及保护部2022。布线层形成在柔性基底2021上，且布线层可包括主布线部2023和与主布线部2023电连接的第三焊盘2024，此第三焊盘2024位于第一区202a并与第一电路板201的走线层2016电连接，主布线部2023位于第二区202b；而保护部2022位于第二区202b并形成在主布线部2023背离柔性基底2021的一侧，该保护部2022可对第二电路板202上的主布线部2023起到保护作用，另外，还可保证第二电路板202的结构稳定性，方便产品的整体组装。应当理解的是，此第二电路板202不限于图6中所示的单层布线，也可为双层布线，即：可在柔性基底2021的两侧均设置有布线层，且每一布线层远离柔性基底2021的一侧均设置有覆盖主布线部2023的保护部2022。
举例而言，柔性基底2021和保护部2022的材料可为聚酰亚胺等材料，以提高第二电路板202的柔性，使得第二电路板202便于弯折，但不限于此，也可采用其他材料制作而成，只要能够使得第二电路板202具有良好的可弯折性能即可。而布线层的材料可为金属材料(例如：铜、铝等材料)，以保证第二电路板202具有良好的导电性能，但不限于此，也可采用其他具有良好导电性的材料。
在一些实施例中，如图7所示，显示基板10可包括衬底基板和驱动电路；其中：
衬底基板可为硅基板102，该硅基板102例如为单晶硅或高纯度硅。
驱动电路的至少部分嵌在硅基板102上，以使其整体形成为驱动基板105。应当理解的是，驱动电路可包括位于显示区10a的电路结构，也可包括位于绑定区10b的电路结构。驱动电路可包括晶体管，此晶体管具有半导体层，半导体层位于硅基板102的内部，其中，驱动电路中晶体管的数量为多个，且晶体管不仅可分布在显示区10a，还可分布在绑定区10b，或分布在其他非显示区。
本公开实施例的驱动电路可与绑定区10b的第二焊盘101电连接，如图4所示，该第二焊盘101与第一电路板201的第一焊盘2011进行绑定以为显示基板10提供信号，例如电源电压信号；即：驱动电路可包括电源电压信号线(图中未示出)，此电源电压信号线可与第二焊盘101电连接，也就是说，电源电压信号线可通过第二焊盘101和电路板结构20与驱动端电连接，以从驱动端获取电源电压信号。
在一些实施例中，第二焊盘101可以和显示区10a中的导电结构同层设置以节省工艺。例如，第二焊盘101可以与显示区10a中发光元件104以下的最顶层(最远离硅基板102)的导电层107同层设置以方便后续的绑定工艺。
需要说明的是，本公开实施例中的“同层设置”是指多个结构由同一材料膜经相同或不同的构图工艺形成，因而具有相同的材料。
具体地，该驱动电路可包括位于显示区10a的像素电路，此像素电路可通过半导体工艺形成于硅基板102上，例如：通过掺杂工艺在硅基板102上形成驱动晶体管103的半导体层1031(即：有源层)、源电极1032和漏电极1033，并通过硅氧化工艺形成绝缘层1034，以及通过溅射工艺或其他工艺形成栅极1035和多个导电层106、107等。晶体管103的半导体层1031位于硅基板102的内部；即：半导体层1031可属于硅基板102的部分。
需要说明的是，驱动电路还可包括栅极驱动电路、数据驱动电路、数据信号线及扫描信号线，数据驱动电路和栅极驱动电路分别通过数 据信号线和扫描信号线与像素电路连接以提供电信号。该数据驱动电路用于提供数据信号，该栅极驱动电路用于提供扫描信号，还可以进一步用于提供各种控制信号、电源信号等。
在一些实施例中，栅极驱动电路和数据驱动电路也可以通过上述半导体工艺集成在硅基板102中。也就是说，在显示基板10采用硅基板102作为衬底基板，该像素电路、该栅极驱动电路和数据驱动电路都可以集成于该硅基板102上。在此情形下，由于硅基电路可以实现较高的精度，该栅极驱动电路和数据驱动电路例如也可以形成于对应于该显示基板10的显示区10a的区域中，而并不一定位于非显示区。其中，栅极驱动电路和数据驱动电路可以采用本领域内的常规电路结构，本公开的实施例对此不作限制。
在一些实施例中，如图7所示，显示基板10还可包括发光元件104，发光元件104形成在驱动电路背离硅基板102的一侧并位于显示区10a，此发光元件104可与驱动电路电连接。详细说明，发光元件104可包括依次形成在驱动基板105上的阳极1041、发光层1042及阴极1043，此阳极1041可通过填充有导电材料(例如：金属钨等)的接触孔108及多个导电层106、107与晶体管103中的漏电极1033实现电连接；如图7所示，示出了一层绝缘层1034和两层导电层106、107，然而本公开实施例对于绝缘层和导电层的层数不作限制。
其中，发光元件104可设置有多个，多个发光元件104的阳极1041相互断开，且多个发光元件104的阴极1043可整层设置。需要说明的是，相邻阳极1041之间可以设置间隔部(PDL)，也可不设置间隔部(PDL)，视具体情况而定。
在一些实施例中，驱动基板105中的最顶层导电层107具有反射性，例如为钛/氮化钛/铝的层叠结构。例如，该导电层107包括间隔设置的多个子层，分别与各发光元件104的阳极1041一一对应设置。在顶发射结构中，该导电层107可以设置为反射层，用于反射发光元件104发出的光线，提高出光效率。例如，每个发光元件104的阳极1041在硅基板102上的正投影落入其对应的导电层的部分在该硅基 板102上的正投影内。在这种情形，阳极1041可以采用具有高功函数的透明导电氧化物材料，例如ITO(氧化铟锡)、IZO(氧化铟锌)等。
在一些实施例中，该显示基板10还包括位于发光元件104远离硅基板102一侧的封装层109、彩膜层110以及盖板111等。例如，第一封装层109配置为对发光元件104进行密封以防止外界的湿气和氧向该发光元件104及像素电路的渗透而造成对器件的损坏。例如，第一封装层109包括无机薄膜或者包括有机薄膜及无机薄膜交替层叠的结构。彩膜层110可包括R(红)、G(绿)、B(蓝)等色块。盖板111例如为玻璃盖板。其中，在彩膜层110以及盖板111之间也可设置封装层109，以对彩膜层110进行封装。
在一些实施例中，显示基板10为有机发光二极管(OLED)显示基板或微型OLED(Micro OLED)显示基板。
本公开的实施例还提供了一种显示装置，其包括上述任一实施例所描述的显示模组。
根据本公开的实施例，该显示装置的具体类型不受特别的限制，本领域常用的显示装置类型均可，具体例如显示屏、手机、笔记本电脑等移动装置、手表等可穿戴设备、VR装置等等，本领域技术人员可根据该显示设备的具体用途进行相应地选择，在此不再赘述。
需要说明的是，该显示装置除了阵列基板以外，还包括其他必要的部件和组成，以显示器为例，还可包括外壳、主电路板、电源线，等等，本领域善解人意可根据该显示装置的具体使用要求进行相应地补充，在此不再赘述。本领域技术人员在考虑说明书及实践这里公开的内容后，将容易想到本公开的其他实施例。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由权利要求指出。

Claims (16)

  1. 一种显示模组，其中，所述显示模组包括：
    电路板结构，包括第一电路板和第二电路板；所述第一电路板具有承载区和电性连接区，所述电性连接区上设置有第一焊盘；所述第二电路板具有第一区及第二区，所述第一区安装于所述第一电路板的电性连接区、并与所述第一焊盘电连接，所述第二区配置为与驱动端电连接；且所述第二电路板的刚度小于所述第一电路板的刚度；
    显示基板，位于所述第一电路板的承载区，所述显示基板包括硅基板、驱动电路及第二焊盘；所述驱动电路的至少部分嵌在所述硅基板上；所述驱动电路包括晶体管，所述晶体管具有半导体层，所述半导体层位于所述硅基板的内部；所述第二焊盘与所述驱动电路电连接，且所述第二焊盘与所述第一焊盘电连接。
  2. 根据权利要求1所述的显示模组，其中，所述第一电路板包括：
    多层依次层叠的介质板；以及，
    位于所述电性连接区的至少一层走线层；所述走线层位于相邻所述介质板之间，并与所述第一焊盘电连接；
    所述第二电路板的第一区位于相邻所述介质板之间，并与所述走线层电连接。
  3. 根据权利要求2所述的显示模组，其中，所述第一电路板还包括多个散热孔，多个所述散热孔位于所述承载区并贯穿各层所述介质板。
  4. 根据权利要求3所述的显示模组，其中，所述散热孔的孔径为0.1mm至0.45mm。
  5. 根据权利要求3所述的显示模组，其中，
    各层所述介质板的相对两侧均设置有散热层，所述散热层位于所述承载区；
    且各所述散热孔在贯穿各层所述介质板的同时还贯穿各层所述散 热层。
  6. 根据权利要求5所述的显示模组，其中，
    所述散热孔为填充有金属材料的孔结构；所述散热层为金属散热层。
  7. 根据权利要求5所述的显示模组，其中，所述显示基板在所述介质板上的正投影与所述散热层在所述介质板上的正投影相重叠。
  8. 根据权利要求2-7任一项所述的显示模组，其中，
    所述多层依次层叠的介质板包括依次层叠的第一介质板、第二介质板及第三介质板；其中，
    所述显示基板和所述第一焊盘位于所述第一介质板背离所述第二介质板的一侧；
    所述走线层位于所述第一介质板和所述第二介质板之间，且所述走线层通过过孔与所述第一焊盘电连接；
    所述第二电路板的所述第一区位于所述第二介质板与所述第三介质板之间，且所述第一区通过过孔与所述走线层电连接。
  9. 根据权利要求2-8任一项所述的显示模组，其中，所述第二电路板为柔性电路板。
  10. 根据权利要求9所述的显示模组，其中，所述第二电路板包括：
    柔性基底；
    布线层，形成在所述柔性基底上的布线层，所述布线层包括主布线部和与所述主布线部电连接的第三焊盘，所述第三焊盘位于所述第一区并与所述走线层电连接，所述主布线部位于所述第二区；以及
    保护部，位于所述第二区并形成在所述主布线部背离所述柔性基底的一侧。
  11. 根据权利要求10所述的显示模组，其中，
    所述柔性基底和所述保护部的材料为聚酰亚胺，所述布线层的材料为金属材料；
    所述介质板的材料为玻璃纤维，所述走线层的材料为金属材料。
  12. 根据权利要求1所述的显示模组，其中，所述第二焊盘与所 述第一焊盘通过金属引线电连接。
  13. 根据权利要求12所述的显示模组，其中，所述显示模组还包括保护膜层，所述保护膜层覆盖所述第一焊盘、所述第二焊盘及所述金属引线。
  14. 根据权利要求1所述的显示模组，其中，
    所述显示基板具有显示区和位于所述显示区至少一侧的绑定区，所述第二焊盘位于所述绑定区；
    所述显示基板还包括位于所述显示区的发光元件，所述发光元件形成在所述驱动电路背离衬底基板的一侧并与所述驱动电路电连接。
  15. 根据权利要求1所述的显示模组，其中，
    所述驱动电路还包括扫描信号线、数据信号线及电源电压信号线；
    其中，所述电源电压信号线通过所述第二焊盘和所述电路板结构与驱动端电连接。
  16. 一种显示装置，其中，包括权利要求1至15中任一项所述的显示模组。
PCT/CN2020/081876 2020-03-27 2020-03-27 显示模组及显示装置 WO2021189493A1 (zh)

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