WO2021184235A1 - Substrat matriciel, son procédé de fabrication et panneau d'affichage - Google Patents

Substrat matriciel, son procédé de fabrication et panneau d'affichage Download PDF

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Publication number
WO2021184235A1
WO2021184235A1 PCT/CN2020/079876 CN2020079876W WO2021184235A1 WO 2021184235 A1 WO2021184235 A1 WO 2021184235A1 CN 2020079876 W CN2020079876 W CN 2020079876W WO 2021184235 A1 WO2021184235 A1 WO 2021184235A1
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Prior art keywords
layer
anode structure
sub
pixel area
array substrate
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PCT/CN2020/079876
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English (en)
Chinese (zh)
Inventor
刘李
卢鹏程
施蓉蓉
田元兰
魏俊波
张大成
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202310440200.8A priority Critical patent/CN116437712A/zh
Priority to CN202080000301.8A priority patent/CN113812014B/zh
Priority to PCT/CN2020/079876 priority patent/WO2021184235A1/fr
Priority to US17/259,729 priority patent/US11758786B2/en
Publication of WO2021184235A1 publication Critical patent/WO2021184235A1/fr
Priority to US18/321,657 priority patent/US20230301152A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/818—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/852—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/856—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/878—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/10—Transparent electrodes, e.g. using graphene
    • H10K2102/101—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
    • H10K2102/102—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO] comprising tin oxides, e.g. fluorine-doped SnO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/10—Transparent electrodes, e.g. using graphene
    • H10K2102/101—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
    • H10K2102/103—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO] comprising indium oxides, e.g. ITO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/876—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair

Definitions

  • the embodiments of the present disclosure belong to the field of display technology, and specifically relate to an array substrate, a preparation method thereof, and a display panel.
  • OLED Organic Light-Emitting Diodes
  • the OLED display panel includes a light-emitting device, which includes a light-emitting functional layer.
  • the half-wave width of the material of the light-emitting functional layer is usually larger, generally not less than 100nm. Due to the non-uniform spreading effect of the sideband vibration and transition of the material of the light-emitting functional layer, As a result, the light-emitting performance of the light-emitting device is affected. Among them, blue light is the most affected, followed by red light.
  • the embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display panel.
  • an embodiment of the present disclosure provides an array substrate including a driving circuit board and a first electrode layer, an insulating layer, and an anode structure sequentially stacked on the driving circuit board; the anode structure includes The reflective layer, the intermediate dielectric layer and the transparent conductive layer provided on the driving circuit board, wherein,
  • the array substrate has a first pixel area, a second pixel area, and a third pixel area.
  • the anode structure includes a first pixel area, the second pixel area, and the third pixel area.
  • the first electrode layer includes a first sub-portion which is respectively arranged in the first pixel area, the second pixel area and the third pixel area, The second sub-portion and the third sub-portion;
  • the first anode structure is connected to the first sub-portion through a first via hole opened in the insulating layer, and the second anode structure is opened in the insulating layer
  • the second via hole in the second sub-portion is connected to the second sub-portion, and the third anode structure is connected to the third sub-portion through the third via hole opened in the insulating layer;
  • the first sub-portion, the The second sub-portion and the third sub-portion are respectively connected to the pixel circuit in the driving circuit board through
  • the surfaces of the insulating layer that are in contact with the first anode structure, the second anode structure, and the third anode structure are flush, and the second anode structure, the first anode structure, and the first anode structure are flush.
  • the thickness of the intermediate dielectric layer in the three-anode structure increases sequentially.
  • the first side surface of the reflective layer is in contact with and attached to the insulating layer, and the middle The dielectric layer covers all outer sides except the first side surface of the reflective layer, and the peripheral edge area of the intermediate dielectric layer is in contact with and attached to the insulating layer;
  • the transparent conductive layer covers the entire outer side of the intermediate dielectric layer away from the reflective layer, and the peripheral edge area of the transparent conductive layer contacts and adheres to the insulating layer.
  • the surfaces of the first sub-part, the second sub-part and the third sub-part facing away from the driving circuit board are flush;
  • One end of the first via hole in the insulating layer is connected to the part of the transparent conductive layer in the first anode structure that is in contact with the insulating layer, and the other end is connected to the first sub-portion away from the driving circuit
  • the surface of the board is connected to the part of the transparent conductive layer in the first anode structure that is in contact with the insulating layer, and the other end is connected to the first sub-portion away from the driving circuit The surface of the board;
  • One end of the second via hole in the insulating layer is connected to the part of the transparent conductive layer in the second anode structure that is in contact with the insulating layer, and the other end is connected to the second sub-portion away from the driving circuit
  • the surface of the board
  • One end of the third via hole in the insulating layer is connected to the part of the transparent conductive layer in the third anode structure that is in contact with the insulating layer, and the other end is connected to the third sub-portion away from the driving circuit The surface of the board.
  • the orthographic projection of the reflective layer on the drive circuit board is located on the corresponding transparent conductive The layer is within the range of the orthographic projection on the drive circuit board.
  • the thickness range of the intermediate dielectric layer in the second anode structure is The thickness range of the intermediate dielectric layer in the first anode structure is The thickness range of the intermediate dielectric layer in the third anode structure is
  • the reflective layer includes a first metal layer, and a material of the first metal layer includes aluminum.
  • the reflective layer further includes a first protective layer disposed on a side of the first metal layer away from the transparent conductive layer.
  • the first protection layer includes a first sub-protection layer and/or a second sub-protection layer; the first sub-protection layer and the second sub-protection layer are far away from the first metal layer.
  • the directions are stacked one by one;
  • the material of the first sub-protection layer includes titanium, and the material of the second sub-protection layer includes titanium nitride.
  • the thickness of the first metal layer ranges from The thickness range of the first protective layer is
  • the thickness of the transparent conductive layer ranges from
  • the first via, the second via, and the third via are filled with tungsten.
  • the first electrode layer includes a second metal layer, and the material of the second metal layer includes aluminum.
  • the first electrode layer further includes a second protective layer disposed on a side of the second metal layer away from the anode structure.
  • the first electrode layer further includes a third protective layer disposed on a side of the second metal layer close to the anode structure.
  • the second protection layer includes a first sub-protection layer and/or a second sub-protection layer;
  • the third protection layer includes a first sub-protection layer and/or a second sub-protection layer;
  • the first sub-protection layer and the second sub-protection layer are sequentially stacked in a direction away from the second metal layer;
  • the material of the first sub-protection layer includes titanium, and the material of the second sub-protection layer includes titanium nitride.
  • the intermediate dielectric layer is made of inorganic insulating materials.
  • the insulating layer uses inorganic insulating materials.
  • the transparent conductive layer is made of indium tin oxide material.
  • embodiments of the present disclosure provide a display panel, which includes the above-mentioned array substrate, and further includes a light-emitting function layer, a cathode layer, and an encapsulation layer sequentially disposed on the array substrate;
  • the light-emitting functional layer includes a red light-emitting functional layer, a green light-emitting functional layer, and a blue light-emitting functional layer respectively disposed on the first pixel area, the second pixel area, and the third pixel area on the array substrate;
  • the cathode layer extends to cover the red light-emitting functional layer, the green light-emitting functional layer and the blue light-emitting functional layer.
  • embodiments of the present disclosure provide a method for manufacturing an array substrate, wherein the array substrate has a first pixel area, a second pixel area, and a third pixel area, and the manufacturing method includes: preparing a drive circuit board;
  • the first electrode layer, the insulating layer and the anode structure are sequentially prepared on the driving circuit board;
  • preparing the anode structure includes preparing a first anode structure, a second anode structure, and a third anode structure in the first pixel area, the second pixel area, and the third pixel area of the array substrate, respectively.
  • the surfaces of an anode structure, the second anode structure and the third anode structure are flush, and the preparation of the first anode structure, the second anode structure and the third anode structure respectively includes sequentially
  • a reflective layer, an intermediate dielectric layer and a transparent conductive layer are prepared on the driving circuit board;
  • Preparing the first electrode layer includes preparing the first sub-section, the second sub-section and the third sub-section in the first pixel area, the second pixel area and the third pixel area of the array substrate respectively;
  • Preparing the insulating layer includes forming a first via hole, a second via hole, and a third via hole therein; connecting the first anode structure and the first sub-structure through the first via hole opened in the insulating layer Section; Connect the second anode structure and the second sub-portion through a second via hole opened in the insulating layer; Connect the third anode structure through a third via hole opened in the insulating layer With the third subsection;
  • forming the intermediate dielectric layer with successively increasing thicknesses in the second anode structure, the first anode structure, and the third anode structure respectively includes:
  • Exposing and developing to remove the photoresist in the second pixel area partially retain the photoresist in the first pixel area, completely retain the photoresist in the third pixel area, and etch and thin the inorganic insulating film layer in the second pixel area;
  • FIG. 1 is a schematic top view of an array substrate in an exemplary embodiment of the present disclosure
  • FIG. 2 is a cross-sectional view of the structure of the array substrate in FIG. 1 along a section line AA;
  • FIG. 4 is a schematic diagram of another orthographic projection of the reflective layer and the transparent conductive layer on the driving circuit board in each anode structure in an exemplary embodiment of the present disclosure
  • FIG. 5 is a structural cross-sectional view of another array substrate in an exemplary embodiment of the present disclosure.
  • FIG. 6 is a structural cross-sectional view of yet another array substrate in an exemplary embodiment of the present disclosure.
  • FIG. 7 is a structural cross-sectional view of a display panel in an exemplary embodiment of the present disclosure.
  • an exemplary embodiment of the present disclosure provides an array substrate and a preparation thereof Method and display panel.
  • An exemplary embodiment of the present disclosure provides an array substrate, as shown in FIGS. 1 and 2, including a driving circuit board 1 and a first electrode layer 2, an insulating layer 3, and an anode sequentially stacked on the driving circuit board 1.
  • Structure 4 The anode structure 4 includes a reflective layer 41, an intermediate dielectric layer 42, and a transparent conductive layer 43 that are sequentially disposed away from the drive circuit board 1, wherein the array substrate has a first pixel area 101, a second pixel area 102, and a third pixel Area 103, the anode structure 4 includes a first anode structure 201, a second anode structure 202, and a third anode structure 203 respectively disposed in the first pixel area 101, the second pixel area 102, and the third pixel area 103; the first electrode layer 2 includes a first sub-section 21, a second sub-section 22, and a third sub-section 23 respectively disposed in the first pixel area 101, the second pixel area 102 and the third pixel area 103
  • the side of the anode structure 4 facing away from the driving circuit board 1 is used to sequentially provide a light-emitting function layer and a cathode layer.
  • the light-emitting functional layer includes a red light-emitting functional layer, a green light-emitting functional layer and a blue light-emitting functional layer.
  • the red light-emitting functional layer, the green light-emitting functional layer and the blue light-emitting functional layer are located in the first pixel area 101, the second pixel area 102, and the second pixel area, respectively.
  • Three pixel area 103 Three pixel area 103.
  • the first anode structure 201, the red light-emitting functional layer and the cathode layer constitute a red light-emitting device
  • the second anode structure 202, the green light-emitting functional layer and the cathode layer constitute a green light-emitting device
  • the third pixel area 103, the third anode structure 203, the blue light-emitting functional layer and the cathode layer constitute a blue light-emitting device.
  • the second anode structure 202, and the third anode structure 203 By setting the first anode structure 201, the second anode structure 202, and the third anode structure 203 on the flat surface of the insulating layer 3, the second anode structure 202, the first anode structure 201, and the third anode structure 203
  • the thickness of the intermediate dielectric layer 42 in the middle dielectric layer 42 is increased successively, and the length of the microcavity of the light-emitting devices of different colors can be adjusted by adjusting the thickness of the intermediate dielectric layer 42, thereby changing the half-wave width of the emission spectrum of the light-emitting devices of different colors.
  • the microcavity length of the blue light-emitting device can be maximized, followed by red light, and finally green light, thereby improving the half-wave width of different color light-emitting devices.
  • the influence of the non-uniform spreading effect of sideband vibration and transition on the light-emitting performance of light-emitting devices improves the light-emitting performance of different color light-emitting devices, makes the light emitted by different color light-emitting devices more uniform, and improves the performance of the display panel using the array substrate. Display quality.
  • the first side surface of the reflective layer 41 is in contact with and attached to the insulating layer 3
  • the intermediate dielectric layer 42 covers the reflective layer 41 All the outer sides except the first side surface, and the peripheral edge area of the intermediate dielectric layer 42 is in contact with and attached to the insulating layer 3
  • the transparent conductive layer 43 covers the entire intermediate dielectric layer 42 away from the outside of the reflective layer 41
  • the peripheral edge area of the transparent conductive layer 43 is in contact with and attached to the insulating layer 3.
  • the surfaces of the first sub-portion 21, the second sub-portion 22 and the third sub-portion 23 facing away from the driving circuit board 1 are flush; one end of the first via 31 in the insulating layer 3 is connected to the first anode structure 201 The other end of the transparent conductive layer 43 that is in contact with the insulating layer 3 is connected to the surface of the first sub-part 21 away from the driving circuit board 1; one end of the second via 32 in the insulating layer 3 is connected to the second anode structure 202 The other end of the transparent conductive layer 43 that is in contact with the insulating layer 3 is connected to the surface of the second sub-part 22 that faces away from the drive circuit board 1; one end of the third via 33 in the insulating layer 3 is connected to the transparent in the third anode structure 203 The other end of the conductive layer 43 that is in contact with the insulating layer 3 is connected to the surface of the third sub-part 23 away from the driving circuit board 1.
  • the first electrode layer including the first sub-section, the second sub-section and the third sub-section is designed to be connected to the reflective layer in the anode structure through the openings in the insulating layer, and then the reflective layer is opened by opening
  • the via hole in the intermediate dielectric layer is connected to the transparent conductive layer. Because the thickness of the intermediate dielectric layer in the sub-pixel regions of different colors is different, the process of opening the via hole in the intermediate dielectric layer is complicated and difficult.
  • the above-mentioned structure arrangement in this embodiment makes the opening depths of the first via 31, the second via 32 and the third via 33 in the insulating layer 3 the same, thereby simplifying the first via 31 and the second via.
  • the manufacturing process complexity of 32 and the third via 33 reduces the difficulty of manufacturing the first via 31, the second via 32 and the third via 33.
  • the thickness range of the intermediate dielectric layer 42 in the second anode structure 202 is The thickness range of the intermediate dielectric layer 42 in the first anode structure 201 is The thickness range of the intermediate dielectric layer 42 in the third anode structure 203 is
  • the intermediate dielectric layer 42 uses an inorganic insulating material.
  • an inorganic insulating material such as silicon oxide, silicon nitride, etc.
  • Inorganic insulating materials have better water vapor and oxygen penetration effects, which can form better protection against vapor and oxygen intrusion for the light-emitting device.
  • the intermediate dielectric layer 42 may also be an organic insulating material.
  • the insulating layer 3 adopts an inorganic insulating material.
  • an inorganic insulating material such as silicon oxide, silicon nitride, etc.
  • Inorganic insulating materials have better water vapor and oxygen penetration effects, which can form better protection against vapor and oxygen intrusion for the light-emitting device.
  • the insulating layer 3 may also be an organic insulating material.
  • the orthographic projection of the reflective layer 41 on the driving circuit board 1 is located on the corresponding transparent conductive layer 43 during driving. Within the range of the orthographic projection on the circuit board 1. In this way, the light emitted from the light-emitting function layer toward the side of the driving circuit board 1 can be reflected by the reflective layer 41 corresponding to the transparent conductive layer 43.
  • the cathode layer is a light-transmitting layer, and the light emitted from the light-emitting function layer toward the cathode layer is transmitted, thereby realizing a top-emission light-emitting device.
  • the orthographic projection of the reflective layer 41 on the drive circuit board 1 is within the range of the orthographic projection of the corresponding transparent conductive layer 43 on the drive circuit board 1, including: the reflective layer 41 is on the drive circuit board 1.
  • the orthographic projection exactly overlaps with the orthographic projection of the corresponding transparent conductive layer 43 on the drive circuit board 1; or, the orthographic projection of the reflective layer 41 on the drive circuit board 1 is located on the corresponding transparent conductive layer 43 on the drive circuit Within the range of the orthographic projection on the board 1, and the area of the orthographic projection of the reflective layer 41 on the driving circuit board 1 is smaller than the area of the orthographic projection of the corresponding transparent conductive layer 43 on the driving circuit board 1.
  • the shapes of the reflective layer 41 and the transparent conductive layer 43 in the first anode structure, the second anode structure, and the third anode structure are not limited, and the actual design shall prevail.
  • the shape of the orthographic projection of the reflective layer 41 and the corresponding transparent conductive layer 43 on the driving circuit board 1 may be the same or different.
  • the shapes of the reflective layer 41 and the transparent conductive layer 43 in the first anode structure, the second anode structure, and the third anode structure are all rectangular; or, as shown in FIG. 4, the first anode
  • the shapes of the reflective layer 41 and the transparent conductive layer in the structure, the second anode structure and the third anode structure are all hexagons.
  • the reflective layer 41 includes a first metal layer 410, and the material of the first metal layer 410 includes aluminum. Since aluminum has a very high reflectivity to light, the material of the first metal layer 410 includes aluminum, which can improve display brightness without changing the current.
  • the reflective layer 41 further includes a first protective layer 411 disposed on a side of the first metal layer 410 away from the transparent conductive layer 43.
  • the material of the first protective layer 411 is not limited, as long as the first protective layer 411 can be used to protect the first metal layer 410 and prevent the first metal layer 410 from being oxidized.
  • the thickness of the first metal layer 410 ranges from The thickness range of the first protective layer 411 is
  • the first protection layer 411 includes a first sub-protection layer and/or a second sub-protection layer; the first sub-protection layer and the second sub-protection layer are sequentially stacked in a direction away from the first metal layer 410;
  • the material of the first sub-protection layer includes titanium, and the material of the second sub-protection layer includes titanium nitride.
  • the reflective layer 41 may further include a fourth protective layer 412 disposed on the side of the first metal layer 410 close to the transparent conductive layer 43.
  • the fourth protection layer 412 includes a first sub-protection layer and/or a second sub-protection layer, and the first sub-protection layer and the second sub-protection layer are sequentially stacked along a direction away from the first metal layer 410.
  • the material of the first sub-protection layer includes titanium
  • the material of the second sub-protection layer includes titanium nitride.
  • the thickness of the fourth protective layer 412 is not limited, and the actual design shall prevail.
  • the thickness of the fourth protection layer 412 may be 0 ⁇ 200 nm.
  • the thickness of the transparent conductive layer 43 ranges from The material of the transparent conductive layer 43 may be an oxide transparent conductive material.
  • the material of the transparent conductive layer 43 may be indium tin oxide (ITO for short).
  • the first via 31, the second via 32, and the third via 33 are filled with tungsten. Since tungsten has no effect on the contact resistance of aluminum, the via hole can be filled with tungsten, and the first sub-portion 21, the second sub-portion 22 and the third sub-portion 23 of the first electrode layer 2 can be made by the tungsten in the via hole. Correspondingly to be electrically connected to the transparent conductive layer 43 of the first anode structure 201, the second anode structure 202, and the third anode structure 203, respectively.
  • the orthographic projection of the via on the driving circuit board 1 may be a circle, and the diameter of the circle is greater than 0 nm and less than or equal to 500 nm.
  • the size and shape of the via are not limited, as long as the first electrode layer 2 can be sufficiently electrically connected to the transparent conductive layer 43 in the corresponding anode structure 4.
  • the first electrode layer 2 includes a second metal layer 301, and the material of the second metal layer 301 includes aluminum.
  • Aluminum has light weight and good electrical conductivity, which can improve the electrical conductivity of the first electrode layer 2 well.
  • the first electrode layer 2 further includes a second protective layer 302 disposed on the side of the second metal layer 301 away from the anode structure 4. Further optionally, the first electrode layer 2 further includes a third protective layer 303 disposed on the side of the second metal layer 301 close to the anode structure 4.
  • the second protection layer 302 includes a first sub-protection layer and/or a second sub-protection layer;
  • the third protection layer 303 includes a first sub-protection layer and/or a second sub-protection layer;
  • the layer and the second sub-protection layer are sequentially stacked in a direction away from the second metal layer 301;
  • the material of the first sub-protection layer includes titanium, and the material of the second sub-protection layer includes titanium nitride.
  • the second protective layer 302 By disposing the second protective layer 302 on the side of the second metal layer 301 away from the anode structure 4, it is possible to prevent water vapor and oxygen from entering the second metal layer 301 from the side of the second metal layer 301 away from the anode structure 4, thereby avoiding the second metal layer 301.
  • the second metal layer 301 is oxidized.
  • the third protective layer 303 By disposing the third protective layer 303 on the side of the second metal layer 301 close to the anode structure 4, water vapor and oxygen can be prevented from entering the second metal layer 301 from the side of the second metal layer 301 close to the anode structure 4, thereby avoiding the second metal layer 301.
  • the metal layer 301 is oxidized.
  • the driving circuit board 1 includes a substrate 10 and a pixel circuit 11 disposed between the substrate 10 and the first electrode layer 2.
  • the pixel circuit 11 is used to drive the light emitting device to emit light.
  • the pixel circuit 11 includes at least a switching transistor, a driving transistor, and a storage capacitor.
  • the pixel circuit includes at least one switching transistor, one driving transistor, and one storage capacitor.
  • the source of the switching transistor is connected to the data signal terminal, and the drain is connected to the gate 113 of the driving transistor and one end of the storage capacitor.
  • the source 115 of the driving transistor is connected to the VDD signal line or signal terminal, the drain 116 is connected to the other end of the storage capacitor and the first electrode layer 2, and the first electrode layer 2 is connected to the transparent conductive layer 43 of the anode structure 4.
  • the cathode layer of the light emitting device is connected to the VSS signal line or signal terminal.
  • the switching transistor and the driving transistor may be one of bottom-gate silicon-based transistors, top-gate silicon-based transistors, and double-gate silicon-based transistors.
  • the substrate 10 is a silicon substrate; the switching transistor and the driving transistor include an active layer 111 as a part of the silicon substrate, a source 115 and a drain 116 located at opposite ends of the active layer 111 , The gate insulating layer 112, the gate 113, the first interlayer insulating layer 114, the extraction electrode layer 118, and the second interlayer insulating layer 117.
  • the lead-out electrode layer 118 includes a plurality of sub-parts arranged at intervals, and each sub-part is connected to the source 115, the gate 113, and the drain 116 through a tungsten hole, so as to introduce signals to the source 115 and the gate 113, and lead out the drain 116 The output signal on the.
  • the sub-portion connected to the drain 116 is also connected to each sub-portion of the first electrode layer 2 through a tungsten hole, so as to provide a driving signal for each anode structure.
  • the gate 113 is made of polysilicon; the active layer 111 is formed by doping on a silicon substrate; the source 115 and the drain 116 are formed by heavy doping on a silicon substrate; the gate insulating layer 112, the first interlayer insulating layer Both 114 and the second interlayer insulating layer 117 are made of silicon oxide, silicon oxynitride, or silicon nitride.
  • the material of the substrate 10 is not limited.
  • the material of the substrate 10 may also be polyimide, glass, or the like.
  • the switching transistor and the driving transistor may also be thin film transistors.
  • the first anode structure, the second anode structure, and the third anode structure are arranged on the flat surface of the insulating layer, and the second anode structure, the first anode structure
  • the thickness of the intermediate dielectric layer in the third anode structure and the third anode structure are successively increased.
  • the length of the microcavity of the blue light-emitting device can be maximized, followed by red light, and finally green light, thereby improving the half-wavelength of light-emitting devices of different colors.
  • the influence of large width, non-uniform spreading effect of sideband vibration and transition on the light-emitting performance of light-emitting devices improves the light-emitting performance of different color light-emitting devices, makes the light emitted by different color light-emitting devices more uniform, and improves the use of the array substrate The display quality of the display panel.
  • another exemplary embodiment of the present disclosure provides a method for manufacturing the array substrate, wherein the array substrate has a first pixel area, a second pixel area, and a third pixel area .
  • the preparation method includes: preparing a drive circuit board.
  • the first electrode layer, the insulating layer and the anode structure are sequentially prepared on the driving circuit board.
  • preparing the anode structure includes preparing a first anode structure, a second anode structure, and a third anode structure in the first pixel area, the second pixel area, and the third pixel area of the array substrate, respectively, and the insulating layer and the first anode structure, The contact surfaces of the second anode structure and the third anode structure are flush.
  • the preparation of the first anode structure, the second anode structure and the third anode structure respectively includes the preparation of a reflective layer, an intermediate dielectric layer and a transparent conductive layer on the driving circuit board in sequence. Floor.
  • Preparing the first electrode layer includes preparing the first sub-section, the second sub-section and the third sub-section in the first pixel area, the second pixel area and the third pixel area of the array substrate, respectively.
  • Preparing the insulating layer includes forming a first via hole, a second via hole and a third via hole therein; connecting the first anode structure and the first sub-portion through the first via hole opened in the insulating layer; and by opening in the insulating layer
  • the second via hole is connected to the second anode structure and the second sub-portion; the third anode structure is connected to the third sub-portion through the third via hole opened in the insulating layer.
  • the preparation of the intermediate dielectric layer includes forming the intermediate dielectric layers with successively increasing thicknesses in the second anode structure, the first anode structure, and the third anode structure, respectively.
  • forming an intermediate dielectric layer with successively increasing thicknesses in the second anode structure, the first anode structure, and the third anode structure respectively includes:
  • Step S1 deposit an inorganic insulating film layer.
  • Step S2 applying photoresist.
  • Step S3 Exposing and developing to remove the photoresist in the second pixel area, the first pixel area and the area outside the third pixel area, and etching to remove the inorganic insulation in the second pixel area, the first pixel area and the area outside the third pixel area ⁇ Film layer.
  • Step S4 Expose and develop to remove the photoresist in the second pixel area, partially retain the photoresist in the first pixel area, completely retain the photoresist in the third pixel area, and etch and thin the inorganic insulating film in the second pixel area Floor.
  • Step S5 Expose and develop to remove the photoresist in the first pixel area, partially remove the photoresist in the third pixel area, etch and thin the inorganic insulating film in the first pixel area, and further etch and thin the second pixel
  • the inorganic insulating film layer in the zone forms the pattern of the intermediate dielectric layer in the second anode structure and the first anode structure.
  • Step S6 strip the photoresist in the third pixel area to form the pattern of the intermediate dielectric layer in the third anode structure.
  • the intermediate dielectric layer is made of photosensitive organic insulating material, and the thickness of the second anode structure, the first anode structure and the third anode structure can be formed by coating, exposing, and developing the film layer.
  • the intermediate dielectric layer is made of photosensitive organic insulating material, and the thickness of the second anode structure, the first anode structure and the third anode structure can be formed by coating, exposing, and developing the film layer.
  • the insulating layer and the first via hole, the second via hole, and the third via hole in the insulating layer can be prepared by deposition, exposure, development, and etching processes; the insulating layer When a photosensitive organic insulating layer material is used, the insulating layer and the first via hole, the second via hole, and the third via hole in the insulating layer can be prepared by the process methods of film coating, exposure, and development.
  • the active layer, source, and drain of the silicon-based transistor in the driving circuit board are prepared by a doping process, and the gate of the silicon-based transistor is annealed by an excimer laser method. Converted to a gate made of polysilicon.
  • the other film layers of the silicon-based transistors in the driving circuit board and the film layers of the storage capacitor are prepared by traditional patterning processes (including film formation, photoresist coating, exposure, development, etching and other process steps).
  • Each film layer of the thin film transistor in the driving circuit board is prepared by a traditional patterning process (including film formation, photoresist coating, exposure, development, etching and other process steps), which will not be repeated here.
  • the film layers in the first electrode layer, the reflective layer and the transparent conductive layer in the anode structure, and the cathode layer are all prepared by traditional patterning processes (including film formation, photoresist coating, exposure, Process steps such as development, etching, etc.), which will not be repeated here.
  • the light-emitting functional layer is prepared by an evaporation process. I won't repeat it here.
  • FIG. 7 Another exemplary embodiment of the present disclosure provides a display panel, which, as shown in FIG. 7, includes the array substrate in the above-mentioned embodiment, and further includes a light-emitting function layer 5, a cathode layer 6, and Encapsulation layer 7;
  • the light-emitting functional layer 5 includes a red light-emitting functional layer 51, a green light-emitting functional layer 52, and a blue light-emitting functional layer 53 respectively disposed on the first pixel area, the second pixel area and the third pixel area on the array substrate;
  • the cathode The layer 6 extends to cover the red light-emitting functional layer 51, the green light-emitting functional layer 52, and the blue light-emitting functional layer 53.
  • the first anode structure 201, the red light-emitting functional layer 51 and the cathode layer 6 constitute a red light-emitting device
  • the second pixel area, the second anode structure 202, the green light-emitting functional layer 52 and the cathode layer 6 constitute Green light-emitting device
  • the third pixel area, the third anode structure 203, the blue light-emitting functional layer 53, and the cathode layer 6 constitute a blue light-emitting device.
  • a pixel defining layer 8 is further provided between the red light emitting device, the green light emitting device, and the blue light emitting device.
  • the pixel defining layer 8 can prevent light crosstalk between different color light emitting devices and improve the display of the display panel. Effect.
  • the display panel provided in this exemplary embodiment can improve the light-emitting performance of light-emitting devices of different colors by using the array substrate in the above-mentioned embodiment, and make the light emitted by the light-emitting devices of different colors more uniform, thereby improving the display of the display panel. Quality; At the same time, by using the array substrate in the foregoing embodiment, the complexity of the manufacturing process of the display panel can be simplified, and the difficulty of manufacturing the display panel can be reduced.
  • the display panel provided by the exemplary embodiment of the present disclosure may be any product or component with a display function, such as an OLED panel, an OLED TV, a display, a mobile phone, and a navigator.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

L'invention concerne un substrat matriciel comprenant une carte de circuit d'attaque (1) et, empilées de manière séquentielle sur celle-ci, une première couche d'électrode (2), une couche isolante (3) et une structure d'anode (4). La structure d'anode (4) comprend une couche réfléchissante (41), une couche diélectrique intermédiaire (42) et une couche électroconductrice transparente (43) disposées de manière séquentielle à distance de la carte de circuit d'attaque (1). Le substrat matriciel est pourvu d'une première zone de pixel (101), d'une deuxième zone de pixel (102) et d'une troisième zone de pixel (103). La structure d'anode (4) comprend une première structure d'anode (201), une deuxième structure d'anode (202) et une troisième structure d'anode (203). La première couche d'électrode (2) comprend une première sous-partie (21), une deuxième sous-partie (22) et une troisième sous-partie (23). La première structure d'anode (201) est reliée à la première sous-partie (21) par le biais d'un premier trou traversant (31) ménagé dans la couche isolante (3). La deuxième structure d'anode (202) est reliée à la deuxième sous-partie (22) par le biais d'un deuxième trou traversant (32) ménagé dans la couche isolante (3). La troisième structure d'anode (203) est reliée à la troisième sous-partie (23) par le biais d'un troisième trou traversant (33) ménagé dans la couche isolante (3). Les surfaces de la couche isolante (3) en contact avec la première structure d'anode (201), la deuxième structure d'anode (202) et la troisième structure d'anode (203) sont en affleurement. L'épaisseur de la couche diélectrique intermédiaire (42) augmente de manière séquentielle dans la deuxième structure d'anode (202), la première structure d'anode (201) et la troisième structure d'anode (203).
PCT/CN2020/079876 2020-03-18 2020-03-18 Substrat matriciel, son procédé de fabrication et panneau d'affichage WO2021184235A1 (fr)

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CN202310440200.8A CN116437712A (zh) 2020-03-18 2020-03-18 一种阵列基板及其制备方法和显示面板
CN202080000301.8A CN113812014B (zh) 2020-03-18 2020-03-18 一种阵列基板及其制备方法和显示面板
PCT/CN2020/079876 WO2021184235A1 (fr) 2020-03-18 2020-03-18 Substrat matriciel, son procédé de fabrication et panneau d'affichage
US17/259,729 US11758786B2 (en) 2020-03-18 2020-03-18 Array substrate, fabricating method therefor and display panel
US18/321,657 US20230301152A1 (en) 2020-03-18 2023-05-22 Array substrate, fabricating method therefor and display panel

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021184235A1 (fr) * 2020-03-18 2021-09-23 京东方科技集团股份有限公司 Substrat matriciel, son procédé de fabrication et panneau d'affichage
US11980046B2 (en) * 2020-05-27 2024-05-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming an isolation structure having multiple thicknesses to mitigate damage to a display device
US11588135B2 (en) * 2020-07-07 2023-02-21 Avalon Holographies Inc. Microcavity pixel array design and method
US11937478B2 (en) 2021-07-16 2024-03-19 Avalon Holographics Inc. Multi-colored microcavity OLED array having DBR for high aperture display and method of fabricating the same
CN116568099B (zh) * 2023-05-25 2024-05-28 惠科股份有限公司 阵列基板及其制备方法，显示面板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101661951A (zh) * 2008-08-29 2010-03-03 富士胶片株式会社 彩色显示装置及其制造方法
CN104733471A (zh) * 2013-12-23 2015-06-24 昆山国显光电有限公司 一种有机发光显示器件的阵列基板及其制备方法
CN105552083A (zh) * 2014-10-27 2016-05-04 三星显示有限公司 薄膜晶体管阵列基板和有机发光显示装置
CN109285970A (zh) * 2018-09-25 2019-01-29 京东方科技集团股份有限公司 显示基板及其制作方法、以及显示装置
CN110649075A (zh) * 2019-09-27 2020-01-03 京东方科技集团股份有限公司 微腔阳极结构、显示基板及其制作方法

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001148291A (ja) * 1999-11-19 2001-05-29 Sony Corp 表示装置及びその製造方法
KR100527187B1 (ko) * 2003-05-01 2005-11-08 삼성에스디아이 주식회사 고효율 유기전계 발광표시장치 및 그의 제조방법
JP4497881B2 (ja) * 2003-09-30 2010-07-07 三洋電機株式会社 有機ｅｌ素子および有機ｅｌパネル
JP2005108644A (ja) * 2003-09-30 2005-04-21 Sanyo Electric Co Ltd 有機ｅｌ素子
US7825021B2 (en) * 2004-01-16 2010-11-02 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing display device
JP4809087B2 (ja) * 2006-03-14 2011-11-02 セイコーエプソン株式会社 エレクトロルミネッセンス装置、電子機器、およびエレクトロルミネッセンス装置の製造方法
US20100051973A1 (en) * 2008-08-28 2010-03-04 Seiko Epson Corporation Light-emitting device, electronic equipment, and process of producing light-emitting device
KR20100030985A (ko) * 2008-09-11 2010-03-19 삼성전자주식회사 유기 발광 표시 장치
KR101035356B1 (ko) * 2009-12-10 2011-05-20 삼성모바일디스플레이주식회사 유기 발광 표시 장치 및 그 제조 방법
WO2011114424A1 (fr) * 2010-03-15 2011-09-22 パイオニア株式会社 Panneau électroluminescent organique et son procédé de production
US8507920B2 (en) * 2011-07-11 2013-08-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method of forming the same
JP6302186B2 (ja) * 2012-08-01 2018-03-28 株式会社半導体エネルギー研究所 表示装置
KR101980758B1 (ko) * 2012-12-14 2019-08-28 엘지디스플레이 주식회사 Oled 표시 장치 및 그의 제조 방법
KR102109166B1 (ko) * 2013-01-15 2020-05-12 삼성디스플레이 주식회사 박막 트랜지스터 및 이를 구비하는 표시 기판
KR102037850B1 (ko) * 2013-02-27 2019-10-29 엘지디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
WO2015040982A1 (fr) * 2013-09-18 2015-03-26 シャープ株式会社 Dispositif semi-conducteur, dispositif d'affichage et procédé de production d'un dispositif semi-conducteur
KR102305143B1 (ko) * 2014-08-20 2021-09-28 삼성디스플레이 주식회사 표시 장치 및 이의 제조 방법
KR102369300B1 (ko) * 2015-02-24 2022-03-03 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
KR20160139300A (ko) * 2015-05-27 2016-12-07 삼성전자주식회사 칩 온 필름 패키지 및 이를 포함하는 표시 장치
KR102387859B1 (ko) * 2016-09-30 2022-04-15 엘지디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
CN109390372B (zh) * 2017-08-08 2021-11-16 合肥视涯技术有限公司 像素结构及其形成方法、显示屏
CN107994059B (zh) * 2017-11-27 2020-05-26 京东方科技集团股份有限公司 阵列基板及其制造方法
KR102513910B1 (ko) * 2017-12-18 2023-03-23 엘지디스플레이 주식회사 전계발광 표시장치
US10535840B2 (en) * 2018-01-26 2020-01-14 Apple Inc. Organic light-emitting diode displays
CN110459559B (zh) * 2018-05-07 2022-04-12 京东方科技集团股份有限公司 一种显示面板、其制作方法及显示装置
CN112740434B (zh) * 2019-08-23 2023-07-25 京东方科技集团股份有限公司 显示面板及其制作方法、显示装置
KR20210042515A (ko) * 2019-10-10 2021-04-20 엘지디스플레이 주식회사 유기발광 표시장치
US11069873B2 (en) * 2019-10-15 2021-07-20 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of a two-layer via structure to mitigate damage to a display device
JP2021072282A (ja) * 2019-10-28 2021-05-06 キヤノン株式会社 有機デバイス、その製造方法、表示装置、光電変換装置、電子機器、照明装置および移動体
KR20210086336A (ko) * 2019-12-31 2021-07-08 엘지디스플레이 주식회사 표시 패널 및 이를 포함한 헤드 장착형 표시 장치
WO2021184235A1 (fr) * 2020-03-18 2021-09-23 京东方科技集团股份有限公司 Substrat matriciel, son procédé de fabrication et panneau d'affichage

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101661951A (zh) * 2008-08-29 2010-03-03 富士胶片株式会社 彩色显示装置及其制造方法
CN104733471A (zh) * 2013-12-23 2015-06-24 昆山国显光电有限公司 一种有机发光显示器件的阵列基板及其制备方法
CN105552083A (zh) * 2014-10-27 2016-05-04 三星显示有限公司 薄膜晶体管阵列基板和有机发光显示装置
CN109285970A (zh) * 2018-09-25 2019-01-29 京东方科技集团股份有限公司 显示基板及其制作方法、以及显示装置
CN110649075A (zh) * 2019-09-27 2020-01-03 京东方科技集团股份有限公司 微腔阳极结构、显示基板及其制作方法

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US20230301152A1 (en) 2023-09-21
CN113812014B (zh) 2023-05-16

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