WO2021103530A1 - 二维可扩展超导量子比特结构及其腔模控制方法 - Google Patents

二维可扩展超导量子比特结构及其腔模控制方法 Download PDF

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WO2021103530A1
WO2021103530A1 PCT/CN2020/099765 CN2020099765W WO2021103530A1 WO 2021103530 A1 WO2021103530 A1 WO 2021103530A1 CN 2020099765 W CN2020099765 W CN 2020099765W WO 2021103530 A1 WO2021103530 A1 WO 2021103530A1
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qubit
arms
qubits
dimensional
superconducting qubit
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梁福田
邓辉
龚明
吴玉林
彭承志
朱晓波
潘建伟
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University of Science and Technology of China USTC
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/80—Constructional details
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/383—Quantum effect devices, e.g. of devices using quantum reflection, diffraction or interference effects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/86—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group II-VI materials, e.g. ZnO
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/383—Quantum effect devices, e.g. of devices using quantum reflection, diffraction or interference effects
    • H10D48/3835—Semiconductor qubit devices comprising a plurality of quantum mechanically interacting semiconductor quantum dots, e.g. Loss-DiVincenzo spin qubits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00

Definitions

  • the present disclosure belongs to the technical field of quantum computing, and relates to a two-dimensional expandable superconducting qubit structure and a cavity mode control method thereof.
  • Superconducting quantum computing makes use of superconducting qubit quantum state superposition, entanglement and other properties to realize quantum computing.
  • Superconducting qubit can be fabricated on a chip using micro-nano processing technology, and has superior performance such as integration and scalability.
  • superconducting quantum computing has developed rapidly, but for a one-dimensional chain qubit structure, each bit is only coupled with two adjacent qubits on the left and right, which has certain limitations.
  • the present disclosure provides a two-dimensional scalable superconducting qubit structure and a cavity mode control method thereof to at least partially solve the above-mentioned technical problems.
  • a two-dimensional expandable superconducting qubit structure including: a superconducting qubit chip, the superconducting qubit chip containing a plurality of qubits that are two-dimensionally distributed and expandable; Wherein the capacitance part of each qubit has at least five arms distributed in two dimensions, and two of the at least five arms in each qubit are respectively used to connect to the read coupling line and to the control line Connected, the remaining at least three arms are coupled with adjacent qubits through the coupling cavity.
  • the qubit has separate XY control lines and Z control lines, or the qubit has only XY control lines.
  • At least two qubits share a read coupling line.
  • the two-dimensionally distributed multiple qubits form a qubit array.
  • some of the qubits have the same number of arms, and some of the qubits have different numbers of arms; for the number of qubits
  • the distribution of arms between each qubit is one of the following situations: partly the same, completely the same, or completely different.
  • the qubit array includes one or more of the following distribution forms: honeycomb arrangement, grid distribution, snowflake distribution or tree distribution.
  • a cavity mode control method for a two-dimensional expandable superconducting qubit structure using flip-chip soldering and through silicon via technology, in the superconducting qubit chip, a non-qubit circuit The position forms a three-dimensional lead structure for signal extraction.
  • a cavity mode control method for a two-dimensional expandable superconducting qubit structure A plurality of holes are made in the superconducting qubit chip at the position of the non-qubit circuit, and the quantum The bit control circuit and the read coupling circuit are wire-bonded to the packaging box or the circuit board through a plurality of holes in the plurality of holes.
  • control lines between two adjacent qubits are drawn from different holes for bonding.
  • the plurality of holes are distributed in an array.
  • At least five arms are provided by the qubit-based capacitor part, of which two arms are used to connect to the read coupling line, the other is used to connect to the control line, and the remaining at least three arms are used to connect respectively Coupling with adjacent qubits in various directions through a coupling cavity, that is, one of the remaining arms connects to an adjacent qubit, and the connection between each qubit and adjacent qubits and each qubit are realized through the above expansion method
  • the above-mentioned signal reading and control of the at least five arms and the connection of the qubits make it possible to expand in two dimensions with each qubit as the center; in addition, at least three arms are used to communicate with adjacent quantum bits. Bits are connected. Since at least five arms are distributed in a two-dimensional plane, the structure is convenient for two-dimensional expansion and is suitable for the existing flip-chip soldering process or through silicon via technology (TSV) and signal fan-out The boards are connected.
  • TSV silicon via technology
  • the above-mentioned two-dimensional expandable superconducting qubit structure can input and extract signals from the middle of the quantum chip by cutting hole array, flip-chip bonding, TSV, etc., effectively reducing the crosstalk between adjacent qubit signals.
  • Fig. 1 is a schematic diagram of a two-dimensional scalable superconducting qubit structure according to an embodiment of the present disclosure.
  • Fig. 2 is a schematic diagram of a distribution form of six arms with a two-dimensional distribution in a qubit capacitor part according to an embodiment of the present disclosure.
  • FIGS. 3 to 5 are schematic diagrams of the array distribution formed by different numbers of connecting arms between each qubit in the two-dimensional expandable superconducting qubit structure according to an embodiment of the present disclosure.
  • Figure 3 is an example of the array distribution form when the capacitive coupling arm connecting each qubit in the multiple qubits is 4 arms;
  • Figure 4 is the capacitive coupling connecting each qubit in the multiple qubits An example array distribution form when the arms are 3 arms;
  • Fig. 5 is an example array distribution form when the capacitive coupling arms connecting each qubit among multiple qubits are 6 arms.
  • Fig. 6 is a schematic diagram of a reading coupling line shared by every four qubits in the qubit array according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of a cavity mode control method of a two-dimensional scalable superconducting qubit structure according to an embodiment of the present disclosure.
  • a two-dimensional scalable superconducting qubit structure is provided.
  • Fig. 1 is a schematic diagram of a two-dimensional scalable superconducting qubit structure according to an embodiment of the present disclosure.
  • the two-dimensional expandable superconducting qubit structure of the present disclosure includes: a superconducting qubit chip, the superconducting qubit chip contains two-dimensionally distributed and expandable multiple qubits; wherein each The capacitance part of each of the qubits has at least five arms that are two-dimensionally distributed, and two of the at least five arms in each qubit are respectively used to connect with the read coupling line and the control line, The remaining at least three arms are coupled with adjacent qubits through the coupling cavity.
  • the capacitance part of the qubit 1 has six arms as an example, and the corresponding six arms are the first arm 11, the second arm 12, the third arm 13, and the fourth arm.
  • the arms, the fifth arm 15 and the sixth arm 16, wherein two arms of the six arms are respectively used to connect to the reading coupling line and the control line.
  • the fifth arm 15 is connected to the reading coupling line 2 here.
  • the sixth arm 16 is connected to the control line 3 as an example.
  • the remaining four arms are used for coupling with adjacent qubits through the coupling cavity.
  • the dimensional direction forms an extended form of the six lines 1-6. Among them, four lines, such as the four lines 1-4 in this embodiment, are coupled with qubits adjacent in four directions.
  • the number of arms of each qubit is at least 5, that is, at least 3 arms are coupled with other adjacent qubits, except for the 6-arm example described above. In addition, it can also be 7, 8, or even more.
  • the specific connection form can be designed according to actual needs.
  • the length of each arm and the angle distribution between each arm can be simulated or calculated. Arrangement.
  • the qubit has separate XY control lines and Z control lines, or the qubit has only XY control lines. That is, for the capacitance extension arm of the qubit for connecting the control line, the XY control line and the Z control line can be connected separately, or only the XY control line can be connected.
  • Fig. 2 is a schematic diagram of a distribution form of six arms with a two-dimensional distribution in a qubit capacitor part according to an embodiment of the present disclosure.
  • the distribution form of at least five arms of the capacitance part of the qubit of the present disclosure may be various two-dimensional distributions.
  • the included angle between two adjacent arms of the six arms in the qubit is greater than 0° and less than or equal to 180°.
  • the capacitance part of the qubit includes 6 arms, four of the six arms are perpendicular to each other in a "cross" shape, and one of the remaining two arms Distributed between any two adjacent arms of the above four arms, and the remaining one arm is distributed between the remaining three groups of adjacent two arms, specifically which two arms are used to connect to the reading coupling line, Connected to the control circuit, which four arms are used for coupling with adjacent qubits, can be selected according to the actual connection expansion; or in another embodiment, refer to Figure 2 (c) as shown, six The two opposite arms of the two arms are located on the same straight line, and there is an included angle between the two adjacent arms.
  • the angle on the upper left it forms 30°, 120°, 30°, 30°, clockwise in turn. 120° and 30° distribution.
  • some of the qubits have the same number of arms, and some of the qubits have different numbers of arms; for the number of qubits
  • the distribution of arms between each qubit is one of the following situations: partly the same, completely the same, or completely different.
  • each qubit continuously expands to the outside by coupling with adjacent qubits.
  • the "at least five arms" described in this disclosure means that each qubit can continuously expand.
  • the basic unit form, the qubit array form to be introduced below is described with the edge of the array, but in fact, the qubit in the central area can be expanded indefinitely, and then the edges are matched according to the connection needs, and the expansion formed is
  • the qubits located in the middle area are all complete standard structures, that is, as described in the present disclosure, the “capacitance part of each qubit has at least five arms distributed in two dimensions”, which has scalability.
  • Qubits have all arms, and the edge part is the same as the part that "loses" half of the capacitive coupling arms. There is no limit to the qubits at the edge.
  • the qubits at the edge can be adapted according to the needs of the expansion of the middle area.
  • the "capacitive coupling arm” is the arm used for coupling with adjacent qubits in the capacitive extension arm, excluding the capacitive extension arm used for connecting the read coupling line and the control line.
  • FIGS. 3 to 5 are schematic diagrams of the array distribution formed by different numbers of connecting arms between each qubit in the two-dimensional expandable superconducting qubit structure according to an embodiment of the present disclosure.
  • Figure 3 is an example of the array distribution form when the capacitive coupling arm connecting each qubit in the multiple qubits is 4 arms;
  • Figure 4 is the capacitive coupling connecting each qubit in the multiple qubits An example array distribution form when the arms are 3 arms;
  • Fig. 5 is an example array distribution form when the capacitive coupling arms connecting each qubit among multiple qubits are 6 arms.
  • the two-dimensionally distributed multiple qubits form a qubit array
  • the qubit array includes one or more of the following distribution forms: honeycomb arrangement, grid distribution, snowflake distribution or tree distribution.
  • the distribution of the arms between each qubit is one of the following situations: partly the same, completely the same or completely different, among which, the completely identical situation refers to the figure 3.
  • the middle area shown in 3, refer to the middle area shown in Fig. 4 if the part is the same.
  • the expansion method corresponding to the above two cases is relatively simple. It can be copied and expanded by a certain basic unit, corresponding to each qubit in the same array. In completely different situations, you can refer to Figure 3, Figure 4, and Figure 5 to connect and expand them in three different qubit forms.
  • the expansion method can be mesh expansion or dendritic expansion, etc., and each example of the qubit The angle between the arms can be changed to obtain a completely different form, which is not illustrated here.
  • the distribution of qubits in the middle area is taken as an example.
  • the qubits in the edge/edge part are used as an example to make the array have a visual boundary. In fact, The edge part in the figure can be removed to expand infinitely, or the edge part can be added under the required size or expansion specification.
  • a qubit has 6 capacitive expansion arms, 4 of which are used as capacitive coupling arms to couple with adjacent qubits through a resonant cavity. After multiple qubits are expanded in two dimensions Form a grid distribution.
  • a qubit has 5 capacitive expansion arms, of which 3 are used as capacitive coupling arms to couple with adjacent qubits through a resonant cavity. After multiple qubits are expanded in two dimensions Form a honeycomb arrangement.
  • each qubit is connected to other qubits through 3 (as shown in Figure 4) or 4 (as shown in Figure 3) capacitance extension arms.
  • a qubit has 8 capacitive expansion arms, of which 6 are used as capacitive coupling arms to couple with adjacent qubits through a resonant cavity.
  • After multiple qubits are expanded in two dimensions Form a snowflake distribution.
  • a tree-like distribution or other expandable array distribution form can be formed, as long as it follows each mentioned in the present disclosure.
  • the arrays obtained by the expansion of the qubits by connecting the remaining at least three arms with adjacent qubits are all within the protection scope of the present disclosure.
  • each qubit is connected with a read coupling line.
  • adjacent qubits can share the read coupling line, which can reduce the total number of read lines and simplify wiring.
  • at least two qubits share one read coupling line.
  • at least two qubits adjacent to the left and right or up and down share one reading coupling line.
  • FIG. 5 an example case in which at least two qubits share one read coupling line is introduced.
  • Fig. 6 is a schematic diagram of a reading coupling line shared by every four qubits in the qubit array according to an embodiment of the present disclosure.
  • the two-dimensionally distributed multiple qubits form a qubit array.
  • the multiple qubits are distributed in a grid pattern.
  • Two qubits share one read coupling line.
  • the form of the two-dimensionally distributed qubit array can be, but is not limited to, a tree topology or a mesh topology.
  • the two-dimensional expandable superconducting qubit structure of this embodiment is provided with at least five arms based on the capacitance part of the qubit.
  • One of the two arms is used to connect to the reading coupling line, and the other Connected to the control circuit, the remaining at least three arms are used to couple with adjacent qubits in four directions respectively through the coupling cavity, that is, one of the remaining arms is connected to an adjacent qubit, and each is realized by the above-mentioned expansion method.
  • the connection between two qubits and adjacent qubits and the signal reading and control of each qubit realizes the connection of two adjacent qubits.
  • the above-mentioned six-arm distribution form and the connection method of qubits make each The qubit is centered and can be expanded in two dimensions; in addition, at least three arms are used to connect to adjacent qubits, and the distribution of the three arms can cover the two-dimensional plane, so that at least five arms are in two dimensions.
  • the expansion distribution in the three-dimensional plane makes the structure convenient for two-dimensional expansion, and is suitable for the existing flip-chip soldering process or through-silicon via technology (TSV) to connect with the signal fan-out board.
  • TSV through-silicon via technology
  • a cavity mode control method of a two-dimensional scalable superconducting qubit structure is provided.
  • a cavity mode control method for a two-dimensional expandable superconducting qubit structure is provided.
  • a three-dimensional structure is formed at the position of a non-qubit circuit in a superconducting qubit chip.
  • Each through silicon via corresponds to a lead, and the read coupling line and control line can be laid out by setting the distribution and distance of each through silicon hole, thereby reducing the number of read lines, between control lines, and between read and control lines Signal crosstalk effects.
  • FIG. 7 is a schematic diagram of a cavity mode control method of a two-dimensional scalable superconducting qubit structure according to an embodiment of the present disclosure.
  • a cavity mode control method for a two-dimensional expandable superconducting qubit structure includes: making a plurality of holes in the superconducting qubit chip at positions other than the qubit circuit, and the qubit The control circuit and the read coupling circuit are wire-bonded to the packaging box or the circuit board through a plurality of holes in the plurality of holes.
  • control lines between two adjacent qubits are drawn from different holes for bonding.
  • the hole is made by laser cutting; of course, the hole can be made in other forms.
  • a plurality of qubits distributed in two dimensions form a qubit array, and every four qubits share one read coupling line, here Take 4 qubits to form a network unit, and expand on the basis of the network unit to form a grid-like distribution as an illustration.
  • the four qubits are defined In the area, there are multiple holes in the non-line area, and the 4 qubits sharing one read coupling line are interconnected. It is only necessary to wire-bond the shared read coupling line through one of the multiple holes To the macro packaging box or circuit board.
  • the control lines between two adjacent qubits are led out from different holes for bonding. Then, corresponding to a number of network units in a grid-like distribution, the corresponding holes are also in an array distribution.
  • the above-mentioned multiple qubits forming a qubit array is a grid-like distribution as an example, and other types of array distribution forms are also possible, and the corresponding holes are also in the form of array distribution.
  • multiple holes such as laser-cut circular hole arrays
  • the circuit and the reading coupling circuit are wire-bonded to the macro package box or circuit board through several holes in the plurality of holes, which can shorten the wiring length of the two-dimensional qubit, better realize the grounding of the chip, and reduce the phase
  • the crosstalk between adjacent bits suppresses the resonant mode of the sample box and is scalable. It can be used to implement many quantum computing schemes such as error correction codes and two-dimensional quantum simulations, and has good application prospects.
  • the present disclosure provides a two-dimensional scalable superconducting qubit structure and its cavity mode control method. At least five capacitive expansion arms are provided based on the capacitance part of the qubit, and one of the two arms is Used to connect to the reading coupling line, the other arm is used to connect to the control line, and the remaining at least three arms are used to couple with adjacent qubits through the coupling cavity, thereby realizing the connection of two adjacent qubits ,
  • the above-mentioned capacitive extension arm distribution form and qubit connection mode make it possible to expand in two dimensions with each qubit as the center, with good scalability and diversity of distribution forms; two-dimensional expandable superconducting quantum
  • the bit structure can input and extract signals from the quantum chip by cutting hole array, flip-chip soldering and TSV, etc., which can shorten the wiring length of the two-dimensional qubit, better realize the grounding of the chip, and effectively reduce adjacent qubits.
  • the crosstalk between the signals suppresses the resonance mode of the sample box

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Abstract

一种二维可扩展超导量子比特结构及其腔模控制方法，其中二维可扩展超导量子比特结构，包括：超导量子比特芯片，所述超导量子比特芯片中包含二维分布且可扩展的多个量子比特；每个所述量子比特的电容部分具有二维分布的至少五个臂，每一量子比特中的所述至少五个臂中的两个臂分别用于与读取耦合线路连接、与控制线路连接，其余至少三个臂与相邻的量子比特通过耦合腔进行耦合。该结构便于进行二维扩展，并且适用于现有的倒装焊工艺或硅通孔技术与信号扇出板进行连接；在不具备或摆脱倒装焊和硅通孔工艺时，通过在所述超导量子比特芯片中非量子比特线路的位置制作多个孔，基于该孔引线键合至封装盒体或电路板，能够有效减少信号串扰。

Description

二维可扩展超导量子比特结构及其腔模控制方法 技术领域
本公开属于量子计算技术领域，涉及一种二维可扩展超导量子比特结构及其腔模控制方法。
背景技术
超导量子计算利用超导量子比特量子态的叠加、纠缠等性质实现量子计算，超导量子比特可以利用微纳加工技术制作到芯片上，具有可集成、可扩展等优越性能。近年来超导量子计算得到了飞速发展，但对于一维链量子比特结构，每个比特仅与左右相邻的两个量子比特耦合，该结构有一定的局限性。
实现很多量子模拟算法，例如二维伊辛模型、晶格模拟、以及相变模拟等都需要二维的量子比特结构。另外，实现通用量子计算需要进行量子纠错，而现在有实现前景的纠错码方案，例如表层编码(surface code)，也需要二维排布的量子比特结构，二维量子比特结构也具有更好的可扩展性。
随着量子比特数量的增加，会出现以下需要解决的问题：1、布线密度和线长增加，会带来不同比特之间的串扰，以及信号的衰减；2、在二维结构中，中间比特的控制线和读取线很难延伸到芯片边缘进行引线键合，控制信号和读取必须从芯片中央输入和输出；3、随着芯片的增大，样品盒的体积也增大，样品盒作为一个谐振腔产生的谐振模式可能与量子芯片产生耦合，从而影响芯片的性能；4、随着芯片的增大，如果采用传统的在芯片四周接地的方法，芯片中央接地不良，会产生一些杂散的谐振模式影响到量子比特的性能。
发明内容
有鉴于此，本公开提供了一种二维可扩展超导量子比特结构及其腔模控制方法，以至少部分解决以上所提出的技术问题。
根据本公开的一个方面，提供了一种二维可扩展超导量子比特结构， 包括：超导量子比特芯片，所述超导量子比特芯片中包含二维分布且可扩展的多个量子比特；其中每个所述量子比特的电容部分具有二维分布的至少五个臂，每一量子比特中的所述至少五个臂中的两个臂分别用于与读取耦合线路连接、与控制线路连接，其余至少三个臂与相邻的量子比特通过耦合腔进行耦合。
在本公开的一实施例中，所述量子比特具有单独的XY控制线和Z控制线，或者所述量子比特只具有XY控制线。
在本公开的一实施例中，至少两个量子比特共用一路读取耦合线路。
在本公开的一实施例中，所述二维分布的多个量子比特形成量子比特阵列。
在本公开的一实施例中，所述量子比特中六个臂中相邻两个臂之间的夹角大于0°且小于等于180°。
在本公开的一实施例中，在二维分布的多个量子比特中，有部分量子比特的臂的个数相等，有部分量子比特的臂的个数不相等；对于量子比特的臂的个数相等的情况，各个量子比特之间臂的分布形式为如下情况的一种：部分相同、完全相同或者完全不同。
在本公开的一实施例中，所述量子比特阵列包括如下分布形式的一种或几种：蜂巢式排布、网格式分布、雪花式分布或者树状分布。
根据本公开的另一个方面，提供了一种二维可扩展超导量子比特结构的腔模控制方法，利用倒装焊和硅通孔工艺，在所述超导量子比特芯片中非量子比特线路的位置形成立体引线结构，以进行信号的引出。
根据本公开的又一个方面，提供了一种二维可扩展超导量子比特结构的腔模控制方法，在所述超导量子比特芯片中非量子比特线路的位置制作多个孔，所述量子比特的控制线路和读取耦合线路通过所述多个孔中的若干孔引线键合至封装盒体或电路板上。
在本公开的一实施例中，相邻两个量子比特之间的控制线路从不同的孔引出进行键合。
在本公开的一实施例中，所述多个孔呈阵列分布。
从上述技术方案可以看出，本公开实施例提供的二维可扩展超导量子比特结构及其腔模控制方法，至少具有以下有益效果：
(1)通过基于量子比特的电容部分设置的至少五个臂，其中有两个臂一个用于与读取耦合线路连接，另一个用于与控制线路连接，其余的至少三个臂用于分别与各个方向的相邻量子比特通过耦合腔进行耦合，即其余的臂中一条臂连接一个相邻的量子比特，通过上述扩展的方式实现每个量子比特与相邻量子比特的连接以及各个量子比特的信号读取和控制，上述至少五个臂分布的形式和量子比特的连接方式使得以每个量子比特为中心可以向二维方向进行扩展；此外，至少三个臂用于与相邻的量子比特进行连接，由于至少五个臂是在二维平面内的扩展分布，使得该结构便于进行二维扩展，并且适用于现有的倒装焊工艺或硅通孔技术(TSV)与信号扇出板进行连接。
(2)上述二维可扩展超导量子比特结构从量子芯片中间可以通过切割孔阵列，倒装焊，TSV等方式进行信号的输入和引出，有效减少相邻量子比特信号之间的串扰。
(3)通过提出二维可扩展超导量子比特结构的腔模控制方法，在不具备或摆脱倒装焊和TSV工艺时，可以通过在所述超导量子比特芯片中非量子比特线路的位置制作多个孔(比如激光切割的圆孔阵列)，所述量子比特的控制线路和读取耦合线路通过所述多个孔中的若干孔引线键合至宏观封装盒体或电路板上，可以缩短二维量子比特的布线长度，更好地实现芯片的接地，减小相邻比特间的串扰，压制样品盒的谐振模式，具有可扩展性，可以用于实现如纠错码、二维量子模拟等诸多量子计算方案，具有良好的应用前景。
附图说明
图1为根据本公开一实施例所示的二维可扩展超导量子比特结构的示意图。
图2为根据本公开一实施例所示的量子比特电容部分具有的二维分布的六个臂的分布形式示意图。
图3-图5为根据本公开一实施例所示的二维可扩展超导量子比特结构中各个量子比特之间通过不同的连接臂个数形成的阵列分布形式示意图。其中，图3为多个量子比特中各个量子比特之间进行连接的电容耦合臂为 4个臂时示例的阵列分布形式；图4为多个量子比特中各个量子比特之间进行连接的电容耦合臂为3个臂时示例的阵列分布形式；图5为多个量子比特中各个量子比特之间进行连接的电容耦合臂为6个臂时示例的阵列分布形式。
图6为根据本公开一实施例所示的量子比特阵列中每4个量子比特共用一路读取耦合线路的示意图。
图7为根据本公开一实施例所示的二维可扩展超导量子比特结构的腔模控制方法示意图。
【符号说明】
1-量子比特；
11-第一臂；        12-第二臂；
13-第三臂；        14-第四臂；
15-第五臂；        16-第六臂；
2-读取耦合线路；   3-控制线路。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，以下结合具体实施例，并参照附图，对本公开进一步详细说明。
第一实施例
在本公开的第一个示例性实施例中，提供了一种二维可扩展超导量子比特结构。
图1为根据本公开一实施例所示的二维可扩展超导量子比特结构的示意图。
参照图1所示，本公开的二维可扩展超导量子比特结构，包括：超导量子比特芯片，所述超导量子比特芯片中包含二维分布且可扩展的多个量子比特；其中每个所述量子比特的电容部分具有二维分布的至少五个臂，每一量子比特中的所述至少五个臂中的两个臂分别用于与读取耦合线路连接、与控制线路连接，其余至少三个臂与相邻的量子比特通过耦合腔进行耦合。
参照图1所示，本实施例中，以量子比特1的电容部分具有六个臂进 行示例，对应的六个臂分别为第一臂11、第二臂12、第三臂13、第四14臂、第五臂15和第六臂16，其中，六个臂中的两个臂分别用于与读取耦合线路连接、与控制线路连接，例如这里以第五臂15与读取耦合线路2连接，第六臂16与控制线路3连接作为示例，其余的四个臂用于与相邻的量子比特通过耦合腔进行耦合，则对应图1中示意的由该量子比特1作为中心，向二维方向形成①-⑥这六条线路的扩展形式，其中，有四条线路例如本实施例中的①-④这四条线路与四个方向相邻的量子比特进行耦合。
当然，需要说明的是，本公开中，每个量子比特的臂的个数至少为5个，即至少通过3个臂与其他相邻的量子比特进行耦合，除了上面介绍的6个臂的示例之外，还可以是7个、8个乃至更多的个数，具体连接形式可以根据实际需要进行设计，每个臂的长度、各个臂之间的夹角分布等均可以通过模拟或者计算后进行排布。
上述各个臂中，后续以电容扩展臂或者电容部分的臂进行描述，二者含义相同。
在本公开的一实施例中，所述量子比特具有单独的XY控制线和Z控制线，或者所述量子比特只具有XY控制线。即，对量子比特的用于连接控制线路的电容扩展臂而言，可以单独连接XY控制线和Z控制线，或者只连接XY控制线。
下面结合具体实例介绍量子比特中电容扩展臂的分布形式。
图2为根据本公开一实施例所示的量子比特电容部分具有的二维分布的六个臂的分布形式示意图。
本公开的量子比特的电容部分具有的至少五个臂的分布形式可以是各种各样的二维分布。在本公开的一实施例中，所述量子比特中六个臂中相邻两个臂之间的夹角大于0°且小于等于180°。
其中二维分布的一些情况例如为轴对称图形或者中心对称图形，或者是其他的非对称图形，只要实现六个臂的夹角分布覆盖至360°的范围即可，例如在一实施例中，参照图2中(a)和(b)所示，量子比特的电容部分包括6个臂的情形，六个臂中有四个臂相互垂直呈“十”字形，其余两个臂中的一个臂分布于上述四个臂中任意相邻的两臂之间，剩下的一个臂则分布于其余的三组相邻的两臂之间，具体哪两个臂用于与读取耦合线 路连接、与控制线路连接，哪四个臂用于与相邻的量子比特进行耦合，则可以根据实际连接扩展的情况进行选取；或者在另一实施例中，参照图2中(c)所示，六个臂中相对的两个臂位于同一条直线上，两个相邻的臂之间具有夹角，从左上方的夹角描述，顺时针依次形成30°、120°、30°、30°、120°和30°的分布。或者以图2中(c)示例的分布形式作为参考进行某一条或几条臂的位置变化以改变相邻臂之间的夹角分布，例如6个夹角为60°，六个电容扩展臂均匀分布于二维平面上；当然上述实施例仅作为示例，还可以是在上述实施例的基础上进行夹角的变形，比如改变其中某两个臂之间的夹角大小，并且保持轴对称，适应性变化另外对角处两臂的夹角；或者可以在变化之后该量子比特的电容扩展臂的分布不是对称图形，例如图4中示例的量子比特的分布形式。
在本公开的一实施例中，在二维分布的多个量子比特中，有部分量子比特的臂的个数相等，有部分量子比特的臂的个数不相等；对于量子比特的臂的个数相等的情况，各个量子比特之间臂的分布形式为如下情况的一种：部分相同、完全相同或者完全不同。
在二维分布的多个量子比特中，各个量子比特通过与相邻的量子比特耦合连接持续向外部进行扩展，本公开描述的“至少五个臂”是指每个量子比特可以不断进行扩展的基本单元形式，下面要介绍的量子比特阵列形式是以具有阵列边沿进行描述的，而实际上，以中心区域的量子比特可以无限进行扩展，然后按照连接的需要在边沿进行匹配，其中形成的扩展结构中，位于中间区域的量子比特，都是完整的标准结构，即本公开描述的“每个所述量子比特的电容部分具有二维分布的至少五个臂”的情况，具有可扩展能力的量子比特具备所有的臂，而边沿部分，属于“失去”了一半电容耦合臂的部分相同情况，这里并没有限定边沿部分的量子比特，边沿部分的量子比特可以根据中间区域扩展的需要进行适应性添加，只要中间区域的量子比特的电容扩展臂的分布形式确定以及扩展形式确定，边沿的量子比特的电容扩展臂的形式也随之确定。其中“电容耦合臂”为电容扩展臂中用于与相邻的量子比特进行耦合的臂，排除了用于连接读取耦合线路和控制线路的电容扩展臂。
图3-图5为根据本公开一实施例所示的二维可扩展超导量子比特结构 中各个量子比特之间通过不同的连接臂个数形成的阵列分布形式示意图。其中，图3为多个量子比特中各个量子比特之间进行连接的电容耦合臂为4个臂时示例的阵列分布形式；图4为多个量子比特中各个量子比特之间进行连接的电容耦合臂为3个臂时示例的阵列分布形式；图5为多个量子比特中各个量子比特之间进行连接的电容耦合臂为6个臂时示例的阵列分布形式。
所述二维分布的多个量子比特形成量子比特阵列，所述量子比特阵列包括如下分布形式的一种或几种：蜂巢式排布、网格式分布、雪花式分布或者树状分布。
承上所述，对于量子比特的臂的个数相等的情况，各个量子比特之间臂的分布形式为如下情况的一种：部分相同、完全相同或者完全不同，其中，完全相同的情况参照图3所示意的中间区域，部分相同的情况参照图4所示意的中间区域，上述两种情况对应的扩展方式相对较为简单，能以某个基本单元进行复制扩展，对应同一个阵列中各个量子比特完全不同的情况，可以参考图3、图4和图5三种不同的量子比特形式将其进行连接扩展，扩展方式可以是网格式扩展或者是树枝状扩展等，并且各个示例的量子比特的各个臂之间的夹角可以通过变化而得到完全不同的形式，这里不再示例。下面参照图3-图5介绍的量子比特阵列中，以中间区域的量子比特的分布情况来作为示例，边缘/边沿部分的量子比特是为了使该阵列具有可视化的边界而作为示例的，实际上可以去掉附图中的边沿部分而无限进行扩展，或者在需要的尺寸或者扩展规格下增加边沿部分。
参照图3所示，在一实例中，量子比特具有6个电容扩展臂，其中有4个作为电容耦合臂，与相邻的量子比特通过谐振腔进行耦合，多个量子比特进行二维扩展后形成网格式分布。
参照图4所示，在一实例中，量子比特具有5个电容扩展臂，其中有3个作为电容耦合臂，与相邻的量子比特通过谐振腔进行耦合，多个量子比特进行二维扩展后形成蜂巢式排布。
需要说明的是，上面图3和图4示例的形式是通过规整的扩展方式进行的，每个量子比特与其他相邻的量子比特进行耦合的电容耦合臂的个数在一个阵列中是相等的，比如每个量子比特均通过3个(如图4所示)或 4个(如图3所示)电容扩展臂与其他量子比特进行连接，在其它实施例中，在同一个量子比特阵列中，可以存在某些量子比特以第一数量个电容耦合臂与其他量子比特进行耦合，某些量子比特以第二数量个电容耦合臂与其他量子比特进行耦合的形式，且第一数量不等于第二数量。
参照图5所示，在一实例中，量子比特具有8个电容扩展臂，其中有6个作为电容耦合臂，与相邻的量子比特通过谐振腔进行耦合，多个量子比特进行二维扩展后形成雪花式分布。当然，在图3、图4或图5所示例的情况中，通过变化各个臂的夹角分布，可以形成树状分布或者其他可扩展的阵列分布形式，只要遵循本公开提及到的每个量子比特通过其余至少三个臂与相邻量子比特进行连接的扩展方式得到的阵列均在本公开的保护范围之内。
本公开中，每个量子比特均连接有读取耦合线路，当然，相邻的量子比特可以实现读取耦合线路的共用，如此可以减少读取线路的总数量，以简化布线。例如在本公开的一实施例中，至少两个量子比特共用一路读取耦合线路。比如，在一实例中，左右或者上下相邻的至少两个量子比特共用一路读取耦合线路。下面参照图5来介绍至少两个量子比特共用一路读取耦合线路的一种示例情况。
图6为根据本公开一实施例所示的量子比特阵列中每4个量子比特共用一路读取耦合线路的示意图。
在本公开的一实施例中，参照图6所示，所述二维分布的多个量子比特形成量子比特阵列，在该实例的量子比特阵列中，多个量子比特形成网格式分布，每4个量子比特共用一路读取耦合线路。二维分布的量子比特阵列的形式可以但不限于是树形拓扑或者网状拓扑等。
综上所述，本实施例的二维可扩展超导量子比特结构，通过基于量子比特的电容部分设置的至少五个臂，两个臂一个用于与读取耦合线路连接，另一个用于与控制线路连接，其余的至少三个臂用于分别与四个方向的相邻量子比特通过耦合腔进行耦合即其余的臂中一条臂连接一个相邻的量子比特，通过上述扩展的方式实现每个量子比特与相邻量子比特的连接以及各个量子比特的信号读取和控制，从而实现了相邻两个量子比特的连接，上述六个臂分布的形式和量子比特的连接方式使得以每个量子比特为中 心可以向二维方向进行扩展；此外，至少三个臂用于与相邻的量子比特进行连接，三个臂的分布可以覆盖至二维平面，从而使得至少五个臂是在二维平面内的扩展分布，使得该结构便于进行二维扩展，并且适用于现有的倒装焊工艺或硅通孔技术(TSV)与信号扇出板进行连接。当然，上述二维可扩展超导量子比特结构从量子芯片中间可以通过切割孔阵列、倒装焊以及TSV等方式进行信号的输入和引出，有效减少相邻量子比特信号之间的串扰。下面在第二实施例详细介绍切割孔阵列的形式。
第二实施例
在本公开的第二个示例性实施例中，提供了一种二维可扩展超导量子比特结构的腔模控制方法。
在一实施例中，提供一种二维可扩展超导量子比特结构的腔模控制方法，通过利用倒装焊和硅通孔工艺，在超导量子比特芯片中非量子比特线路的位置形成立体引线结构，以进行信号的引出。每一硅通孔对应一条引线，可以通过设置各个硅通孔的分布和距离来布局读取耦合线路和控制线路，从而减少读取线路之间、控制线路之间以及读取与控制线路之间的信号串扰影响。
图7为根据本公开一实施例所示的二维可扩展超导量子比特结构的腔模控制方法示意图。
参照图7所示，在另一实施例中，二维可扩展超导量子比特结构的腔模控制方法，包括：在超导量子比特芯片中非量子比特线路的位置制作多个孔，量子比特的控制线路和读取耦合线路通过所述多个孔中的若干孔引线键合至封装盒体或电路板上。
在本公开的一实施例中，相邻两个量子比特之间的控制线路从不同的孔引出进行键合。
在本公开的一实施例中，所述孔通过激光切割的方式制作；当然，可以通过其他形式制作上述孔。
在一实例中，所述多个孔呈阵列分布。
本实施例中，例如在如图6所示的二维可扩展超导量子比特结构中，二维分布的多个量子比特形成量子比特阵列，每4个量子比特共用一路读取耦合线路，这里以4个量子比特形成一个网络单元，以该网络单元为基 础进行拓展，从而形成网格状的分布形式作为示意，在该二维可扩展超导量子比特结构中，由4个量子比特限定的区域内，在非线路区域具有多个孔，共用一路读取耦合线路的4个量子比特是互联的，只需要将该共用的读取耦合线路通过在多个孔中的一个孔进行引线键合至宏观封装盒体或者电路板即可。为了减弱相邻量子比特之间的信号串扰，将相邻两个量子比特之间的控制线路从不同的孔引出进行键合。那么对应若干个网络单元呈网格状的分布形式，对应的孔也呈阵列分布的形式。
当然，上述多个量子比特形成量子比特阵列是以网格状分布作为示例，还可以是其他类型的阵列分布形式，对应的孔也呈阵列分布的形式。在不具备或摆脱倒装焊和TSV工艺时，可以通过在所述超导量子比特芯片中非量子比特线路的位置制作多个孔(比如激光切割的圆孔阵列)，所述量子比特的控制线路和读取耦合线路通过所述多个孔中的若干孔引线键合至宏观封装盒体或电路板上，可以缩短二维量子比特的布线长度，更好地实现芯片的接地，减小相邻比特间的串扰，压制样品盒的谐振模式，具有可扩展性，可以用于实现如纠错码、二维量子模拟等诸多量子计算方案，具有良好的应用前景。
综上所述，本公开提供了一种二维可扩展超导量子比特结构及其腔模控制方法，通过基于量子比特的电容部分设置的至少五个电容扩展臂，其中两个臂中其中一个用于与读取耦合线路连接，另外一个臂用于与控制线路连接，剩下的至少三个臂用于与相邻量子比特通过耦合腔进行耦合，从而实现了相邻两个量子比特的连接，上述电容扩展臂分布的形式和量子比特的连接方式使得以每个量子比特为中心可以向二维方向进行扩展，具有良好的可扩展性以及分布形式的多样性；二维可扩展超导量子比特结构从量子芯片中间可以通过切割孔阵列、倒装焊以及TSV等方式进行信号的输入和引出，可以缩短二维量子比特的布线长度，更好地实现芯片的接地，有效减少相邻量子比特信号之间的串扰，压制样品盒的谐振模式，得到最优的量子比特性能。
还需要说明的是，虽然结合附图对本公开进行了说明，但是附图中公开的实施例旨在对本公开优选实施方式进行示例性说明，而不能理解为对本公开的一种限制。附图中的尺寸比例仅仅是示意性的，并不能理解为对 本公开的限制。实施例中提到的方向用语，例如“上”、“下”、“前”、“后”、“左”、“右”等，仅是参考附图的方向，并非用来限制本公开的保护范围。贯穿附图，相同的元素由相同或相近的附图标记来表示。在可能导致对本公开的理解造成混淆时，将省略常规结构或构造。
再者，单词“包含”或“包括”不排除存在未列在权利要求中的元件或步骤。位于元件之前的单词“一”或“一个”不排除存在多个这样的元件。
除非存在技术障碍或矛盾，本公开的上述各种实施方式可以自由组合以形成另外的实施例，这些另外的实施例均在本公开的保护范围中。
以上所述的具体实施例，对本公开的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本公开的具体实施例而已，并不用于限制本公开，凡在本公开的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (10)

  1. 一种二维可扩展超导量子比特结构，其特征在于，包括：
    超导量子比特芯片，所述超导量子比特芯片中包含二维分布且可扩展的多个量子比特；
    其中每个所述量子比特的电容部分具有二维分布的至少五个臂，每一量子比特中的所述至少五个臂中的两个臂分别用于与读取耦合线路连接、与控制线路连接，其余至少三个臂与相邻的量子比特通过耦合腔进行耦合。
  2. 根据权利要求1所述的二维超导量子比特结构，其特征在于，所述量子比特具有单独的XY控制线和Z控制线，或者所述量子比特只具有XY控制线。
  3. 根据权利要求1所述的二维超导量子比特结构，其特征在于，至少两个量子比特共用一路读取耦合线路。
  4. 根据权利要求1所述的二维超导量子比特结构，其特征在于，所述二维分布的多个量子比特形成量子比特阵列。
  5. 根据权利要求1所述的二维超导量子比特结构，其特征在于，所述量子比特中六个臂中相邻两个臂之间的夹角大于0°且小于等于180°。
  6. 根据权利要求1所述的二维超导量子比特结构，其特征在于，在二维分布的多个量子比特中，有部分量子比特的臂的个数相等，有部分量子比特的臂的个数不相等；对于量子比特的臂的个数相等的情况，各个量子比特之间臂的分布形式为如下情况的一种：部分相同、完全相同或者完全不同。
  7. 根据权利要求4所述的二维超导量子比特结构，其特征在于，所述量子比特阵列包括如下分布形式的一种或几种：蜂巢式排布、网格式分布、雪花式分布或者树状分布。
  8. 一种如权利要求1-7中任一项所述的二维可扩展超导量子比特结构的腔模控制方法，其特征在于，利用倒装焊和硅通孔工艺，在所述超导量子比特芯片中非量子比特线路的位置形成立体引线结构，以进行信号的引出。
  9. 一种如权利要求1-7中任一项所述的二维可扩展超导量子比特结构 的腔模控制方法，其特征在于，
    在所述超导量子比特芯片中非量子比特线路的位置制作多个孔，所述量子比特的控制线路和读取耦合线路通过所述多个孔中的若干孔引线键合至封装盒体或电路板上。
  10. 根据权利要求9所述的腔模控制方法，其特征在于，相邻两个量子比特之间的控制线路从不同的孔引出进行键合，以减少控制线之间的串扰。
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