WO2021085234A1 - 半導体モジュール、電力変換装置、半導体モジュールの製造方法、および、電力変換装置の製造方法 - Google Patents

半導体モジュール、電力変換装置、半導体モジュールの製造方法、および、電力変換装置の製造方法 Download PDF

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Publication number
WO2021085234A1
WO2021085234A1 PCT/JP2020/039367 JP2020039367W WO2021085234A1 WO 2021085234 A1 WO2021085234 A1 WO 2021085234A1 JP 2020039367 W JP2020039367 W JP 2020039367W WO 2021085234 A1 WO2021085234 A1 WO 2021085234A1
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Prior art keywords
semiconductor module
metal film
insulating substrate
bonding material
semiconductor
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PCT/JP2020/039367
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English (en)
French (fr)
Japanese (ja)
Inventor
辰則 柳本
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Definitions

  • the technology disclosed in the specification of the present application relates to a semiconductor module, a power conversion device, a method for manufacturing a semiconductor module, and a method for manufacturing a power conversion device.
  • insulated gate bipolar transistors that is, IGBTs
  • metal-oxide-semiconductor transistors that is, MOSFET
  • a freewheeling diode connected in antiparallel to the switching device.
  • an IGBT made of a silicon (Si) semiconductor is used as a switching device, and a pin diode made of a Si semiconductor is used as a freewheeling diode.
  • SiC silicon carbide
  • SiC has a dielectric breakdown strength as high as about 10 times that of Si, and the thickness of the drift layer can be reduced to about 1/10 of Si. Therefore, it is possible to realize a low on-voltage of the semiconductor device, and it is also possible to operate in a high temperature environment.
  • a semiconductor device using SiC as a semiconductor material can be made smaller and more efficient than a conventional semiconductor device using Si as a semiconductor material.
  • Semiconductor devices for power conversion such as IGBTs, MOSFETs, and diodes are front-back conductive semiconductor devices in which the main current flows in the thickness direction of the semiconductor device.
  • the back electrode of the semiconductor device is soldered to the metal pattern of the ceramic substrate, and the front electrode of the semiconductor device is connected by wire bonding and soldering to the metal terminal. An energization path is formed.
  • Non-Patent Document 1 if abrupt load fluctuations occur repeatedly due to the operation of the power conversion device, temperature changes inside the module will occur repeatedly. Then, the solder sandwiched between the ceramic substrate and the base plate inside the power semiconductor module repeats volume expansion and contraction due to a temperature change, and cracks occur. Then, the crack lowers the heat dissipation of the entire power semiconductor module, which may lead to the module failure (see, for example, Non-Patent Document 1).
  • Patent Document 1 when joining an insulating member on which a power semiconductor element is mounted and a base plate, a convex step portion is provided on the solder joint surface of the base plate, so that the insulating member and the base plate are bonded to each other.
  • the thermal stress due to the difference in mutual thermal deformation is effectively relaxed, and the crack growth of the solder is suppressed.
  • the technique disclosed in the specification of the present application has been made in view of the problems described above, and is a technique for improving the heat dissipation performance of the semiconductor element provided on the insulating substrate.
  • the first aspect of the technique disclosed in the present specification is an insulating substrate provided with a conductor pattern on at least the upper surface, at least one semiconductor element provided on the upper surface of the conductor pattern, and a part of the lower surface of the insulating substrate.
  • the metal film is provided with a first bonding material provided in the above, and a metal film having a higher thermal conductivity than the first bonding material and provided on another part of the lower surface of the insulating substrate. It is provided on the lower surface of the insulating substrate at a position corresponding to the position where the semiconductor element is arranged.
  • the metal film is provided on the lower surface of the insulating substrate at the position corresponding to the position where the semiconductor element is arranged, the heat generated from the semiconductor element by the metal film is generated by the metal film. Efficient heat dissipation. Therefore, the heat dissipation performance of the semiconductor element provided on the insulating substrate can be improved.
  • FIG. 5 is a plan view of the configuration shown in FIG. 4 when viewed from the lower surface side (lower side of the paper surface in FIG. 4).
  • FIG. 5 is a cross-sectional view schematically showing another example of a part of the configuration of a power semiconductor module according to an embodiment.
  • FIG. 6 is a plan view of the configuration shown in FIG. 6 when viewed from the lower surface side (lower side of the paper surface in FIG. 6). It is sectional drawing which conceptually shows a part example of the structure of the semiconductor module for electric power with respect to embodiment.
  • FIG. 8 is a plan view of the configuration shown in FIG. 8 as viewed from the lower surface side (lower side of the paper surface in FIG. 8). It is a figure which conceptually shows the example of the structure of the power conversion system including the power conversion apparatus of embodiment.
  • the upper surface of " or “the lower surface of " in addition to the upper surface itself or the lower surface itself of the target component, the upper surface of the target component is added. Alternatively, it shall include a state in which other components are formed on the lower surface. That is, for example, when the description "B provided on the upper surface of the instep” is described, it does not prevent another component " ⁇ " from intervening between the instep and the second.
  • the expression "A and B are electrically connected" means that a current can flow in both directions between the configuration A and the configuration B.
  • FIG. 1 is a cross-sectional view schematically showing an example of the configuration of the power semiconductor module 100 according to the present embodiment.
  • FIG. 2 is a plan view of a part of the power semiconductor module 100 shown in FIG. 1 as viewed from the upper surface side (upper side of the paper surface in FIG. 1).
  • FIG. 1 corresponds to a cross-sectional view taken along the line ABA'of FIG. Further, in FIG. 2, the cover or sealing material for closing the opening, which is shown as an example in FIG. 1, is not shown.
  • the configuration of the power semiconductor module 100 will be described with reference to FIGS. 1 and 2.
  • the power semiconductor module 100 includes a base plate 101, a case 102, an insulating substrate 103, a semiconductor element 104, a wiring 106, a terminal 108, and a metal film 109. ing.
  • the case 102 is open on both the top surface side (upper side of the paper surface in FIG. 1) and the bottom surface side (lower side of the paper surface in FIG. 1).
  • the base plate 101 is joined to the case 102 with a resin material or the like, and is housed in the opening on the bottom surface side of the case 102.
  • the base plate 101 has the same shape and area as the opening on the bottom surface side of the case 102, and constitutes the bottom surface of the case 102.
  • the base plate 101 is made of, for example, a Cu plate or a composite material such as AlSiC or Cu—Mo. It is appropriate that the thickness of the base plate 101 is 5 mm or less, and if it has sufficient strength for use, it is more suitable that the thickness is thin.
  • a part of the upper surface of the base plate 101 is joined to a part of the lower surface of the insulating substrate 103 via the under-board bonding material 107b.
  • a part of the upper surface of the base plate 101 is subjected to a surface treatment that enhances the bondability with the under-board bonding material 107b, and for example, nickel (Ni) plating is formed.
  • the under-board bonding material 107b is, for example, a solder using tin (Sn) as a base material.
  • the substrate lower bonding material 107b may be an Ag sintered material or a bonding material for forming a liquid phase diffusion bonding layer, which will be described later.
  • the area other than the region where the insulating substrate 103 is bonded may be covered with a resin resist or the like so that the bonding material 107b under the substrate does not spread.
  • the case 102 is made of, for example, a polyphenyl sulfide resin (PPS), a polybutylene terephthalate resin (PBT), a polyethylene terephthalate resin (PET), or the like.
  • PPS polyphenyl sulfide resin
  • PBT polybutylene terephthalate resin
  • PET polyethylene terephthalate resin
  • sealing material 105 such as resin from the opening on the upper surface side of the case 102, the base plate 101, the insulating substrate 103, the semiconductor element 104, the wiring 106, and the terminal 108 are covered with the sealing material 105.
  • sealing material 105 for example, an epoxy material mixed with a filler, a silicon gel, or the like is used.
  • the encapsulant 105 may have sufficient insulating properties when the power semiconductor module 100 is used.
  • the lower conductor pattern 103f of the insulating substrate 103 is joined to a part of the upper surface of the base plate 101 via the under-board bonding material 107b (solder).
  • the insulating substrate 103 includes an insulating material 103e, an upper conductor pattern 103a formed on the upper surface of the insulating material 103e, an upper conductor pattern 103b formed on the upper surface of the insulating material 103e, and an upper side formed on the upper surface of the insulating material 103e. It includes a conductor pattern 103c, an upper conductor pattern 103d formed on the upper surface of the insulating material 103e, and a lower conductor pattern 103f formed on the lower surface of the insulating material 103e.
  • the insulating material 103e is, for example, a ceramic material such as aluminum oxide (Al 2 O 3 ), aluminum nitride (Al N) or silicon nitride (Si 3 N 4 ), or a binder material such as an epoxy material or a liquid crystal polymer, and silica or alumina. Alternatively, it is composed of an organic insulating material mixed with a filler such as boron nitride (BN).
  • the upper conductor pattern 103a, the upper conductor pattern 103b, the upper conductor pattern 103c, the upper conductor pattern 103d and the lower conductor pattern 103f are, for example, a Cu material alone, a Cu material plated with Ni or silver (Ag), or , Al material is Ni-plated or Ag-plated.
  • a region that includes a region that overlaps with the semiconductor element 104 in a plan view and is larger than the overlapping region is a metal instead of the under-board bonding material 107b.
  • a film 109 is formed. The center position of the metal film 109 overlaps with the center of the region on which the semiconductor element 104 is mounted in a plan view.
  • the outer shape of the semiconductor element 104 in a plan view is generally rectangular, the outer shape of the metal film 109 in a plan view does not have to be rectangular, and for example, the outer shape of the metal film 109 may be circular.
  • the metal film 109 is a metal film formed by a cold spray method, but the material may be any material that can be bonded to the lower conductor pattern 103f, and Cu is specifically applied. Is desirable.
  • the material of the metal film 109 may be any material having a thermal conductivity higher than that of the lower substrate bonding material 107b, and may be another metal material such as Ni or Ag which is a material that can be bonded to the surface material of the lower conductor pattern 103f. There may be.
  • a semiconductor element 104 is bonded to the upper surface of the upper conductor pattern 103a of the insulating substrate 103 via a chip bottom bonding material 107a.
  • the subchip bonding material 107a is obtained by sintering and bonding a paste material consisting of, for example, nanometer-order Ag particles, micrometer-order Ag particles, or a mixture of nanometer-order Ag particles and micrometer-order Ag particles. It is a made Ag sintered material.
  • the subchip bonding material 107a may be a bonding material that forms a liquid phase diffusion bonding layer, such as tin (Sn) and copper (Cu), or tin (Sn) and nickel (Ni).
  • a solder material using tin (Sn) or lead (Pb) as a base material may be used.
  • the semiconductor element 104 includes a switching device 104a and a freewheeling diode 104b.
  • the switching device 104a is, for example, a SiC-MOSFET or Si-IGBT
  • the freewheeling diode 104b is, for example, a SiC-Schottky barrier diode (that is, SBD) or a Si-free wheel diode (free-wheeling diode). That is, FWD).
  • the upper conductor pattern 103a is electrically connected to the drain electrode of the switching device 104a.
  • the semiconductor element 104 when it is not necessary to distinguish between the switching device 104a and the freewheeling diode 104b, it is simply referred to as the semiconductor element 104.
  • a main terminal 108a and a control terminal 108b are installed in the case 102.
  • the switching device 104a is connected to the main terminal 108a by the wire-shaped wiring 106a, and is connected to the control terminal 108b by the source signal wiring 106b and the gate signal wiring 106c.
  • the freewheeling diode 104b is connected to the main terminal 108a by a wire-shaped wiring 106a.
  • upper surface electrodes 110 are provided on the upper surface of the switching device 104a and the upper surface of the freewheeling diode 104b, respectively. Further, a gate pad 110a is provided on the upper surface of the switching device 104a.
  • a protective film 111 is formed on the peripheral edge of the upper surface of the switching device 104a. Further, the protective film 111 is formed on the upper surface of the switching device 104a so as to surround the gate pad 110a. That is, the upper surface electrode 110 and the gate pad 110a are insulated by the protective film 111.
  • the protective film 111 is provided to physically protect the upper surface of the switching device 104a and the upper surface of the freewheeling diode 104b and to increase the insulation distance.
  • polyimide which is an organic substance, SiO 2 or SiN, which is an inorganic substance, is used.
  • Pure Al, AlSi alloy, AlCu alloy and AlSiCu alloy are generally used for the outermost surface of the top electrode 110.
  • the mixing ratio of Si or Cu in this alloy is 5 wt% or less in terms of the weight ratio in the alloy.
  • the thickness of this alloy is about 5 ⁇ m.
  • the wire-shaped wiring 106a of the wiring 106 is an Al wire containing Al as a main component, and a small amount of metal such as Ni may be added in order to increase the strength.
  • the wire diameter of the wire-shaped wiring 106a is about ⁇ 400, but it is arbitrarily designed to satisfy the required energizing capacity such as the number of wedge bonding dots or the wire diameter, and is ⁇ 200 or more. , ⁇ 600 or less is arbitrarily selected.
  • the energizing capacity required for the source signal wiring 106b and the gate signal wiring 106c of the wiring 106 is much smaller than the current capacity required for the wire-shaped wiring 106a which is the main wiring. Therefore, a wire having a wire diameter equal to or smaller than that of the wire-shaped wiring 106a may be selected, and is generally selected between ⁇ 100 ⁇ m and more and ⁇ 400 ⁇ m or less.
  • a wire containing Al as a main component is applied, but a wire containing Cu as a main component may be applied.
  • the outermost surface of the top electrode 110 may be formed of a metal such that the semiconductor element 104 is not destroyed by the Cu wire, which is harder than Al.
  • an electrode by Cu plating or an electrode by Ni plating may be formed. Be selected.
  • the shape of the wire-shaped wiring 106a does not have to be wire-shaped, and may be, for example, plate-shaped wiring.
  • the wire-shaped wiring 106a extends above the semiconductor element 104 from the main terminal 108a.
  • the plate-shaped wiring and the top electrode 110 may be joined by, for example, solder.
  • the upper surface electrode 110 may be a metal capable of ensuring the wettability of the solder, and may be, for example, a metal having Au plating formed on the upper surface of Ni plating.
  • the plate thickness of the plate-shaped wiring is determined by the energized current, and for example, 0.3 mm or more and 1.5 mm or less is appropriate.
  • a diode for temperature detection is provided in the power semiconductor module 100. Similar to the gate signal wiring 106c, Cu wire or Al wire is also used for the wiring connected to the cathode electrode and the anode electrode of this diode.
  • the heat generated by the semiconductor element 104 is dissipated in the vertical direction (Z-axis direction in FIG. 1) of the base plate 101, and is endothermic (cooled) by a cooler (not shown here).
  • the solder which is the under-board bonding material 107b on the lower surface side of the insulating substrate 103, is indirectly sandwiched between the ceramic, which is the insulating material 103e having a small coefficient of linear expansion, and AlSiC, which is the base plate 101 having a small coefficient of linear expansion. Become.
  • the expansion and contraction of the insulating substrate 103 and the base plate 101 located above and below the underboard bonding material 107b is smaller than the expansion and contraction of the solder itself, which is the underboard bonding material 107b. Therefore, stresses of repeated compression and expansion are repeatedly applied to the inside of the solder which is the under-board bonding material 107b, and cracks are generated inside the solder in the vertical direction.
  • the cold spray method is performed at a position of the lower surface of the lower conductor pattern 103f on the lower surface side of the insulating substrate 103, which faces the mounting position of the semiconductor element 104.
  • the metal film 109 formed by the above is formed.
  • the metal film 109 is a cold spray film formed of Cu powder.
  • the coefficient of thermal expansion of Cu is a value between the coefficient of thermal expansion of the solder and the coefficient of thermal expansion of the base plate 101 or the coefficient of thermal expansion of the insulating material 103e. Therefore, it is possible to reduce the stress generated in the under-board bonding material 107b during the operation of the power semiconductor module 100.
  • the film forming rate is slow and the manufacturing cost is high.
  • a cold spray film is formed by laminating powder at high pressure, so that the metal film 109 is formed at an arbitrary position with an arbitrary shape and an arbitrary film thickness. A film can be formed.
  • the cold spray membrane is not a complete bulk body, and there are vacancies inside the membrane. These pores serve as a buffer layer and have the effect of relaxing the stress generated in the metal film 109. Therefore, it can be said that the cold spray method is a desirable film forming method for the metal film 109.
  • the thermal conductivity of Cu in bulk is 387.5 W / m ⁇ K.
  • the pore ratio can be controlled by the conditions of the cold spray method, the apparent thermal conductivity of the cold spray film having pores is 150 W / m ⁇ K or more and 300 W / K /.
  • the thermal conductivity of Sn or Pb-based solder which is in the range of m ⁇ K or less and has a thermal conductivity of 40 W / m ⁇ K or more and 50 W / m ⁇ K or less, It can be seen that it has a much higher thermal conductivity. From this, it can be said that the metal film 109 has sufficient heat dissipation.
  • a method for manufacturing a power semiconductor module having such a metal film 109 will be described. Assembly when the sub-chip bonding material 107a and the sub-board bonding material 107b are solders having the same composition, or when the melting point of the sub-chip bonding material 107a is lower than the melting point of the sub-chip bonding material 107b.
  • the insulating substrate 103 in which the metal film 109 is directly formed on a part of the lower surface of the lower conductor pattern 103f by cold spray is placed on the upper surface of the base plate 101, and the solder as the under-board bonding material 107b is placed on the upper surface of the base plate 101. Arrange so as to sandwich.
  • the lower surface of the semiconductor element 104 is arranged so as to sandwich the subchip bonding material 107a with the upper surface of the upper conductor pattern 103a, and soldering is performed by a reflow furnace.
  • the thickness of the substrate bottom bonding material 107b is determined based on the thickness of the cold spray film (metal film 109). It is appropriate that the thickness of the metal film 109 is 100 ⁇ m or more and 300 ⁇ m or less.
  • the solder thickness was secured by arranging wire bumps or the like on the base plate 101 so that the thickness of the under-board bonding material 107b was uniform, but there were a plurality of metal films 109. Since the semiconductor elements 104 are arranged at positions facing each other, it is not necessary to secure the solder thickness of the under-board bonding material 107b by wire bumps, and the number of related steps can be reduced.
  • the solder which is the under-board bonding material 107b arranged on the lower surface of the metal film 109 in the manufacturing process, is melted by heating with a reflow furnace. Then, the solder is excluded from the lower surface of the metal film 109 due to the weight of the insulating substrate 103 and the semiconductor element 104, but the solder remaining on the uneven surface on the lower surface of the metal film 109 and the upper surface of the base plate 101 are joined to form a bonding layer. .. In addition, the molten solder also penetrates into some of the pores inside the metal film 109, and by filling some of the pores with solder, the apparent thermal conductivity of the metal film 109 is also improved. To do. Further, at the contact portion between the metal film 109 and the solder, Cu is melted to form an intermetallic compound phase of Cu and Sn.
  • the structure in which the metal film 109 is formed on the lower conductor pattern 103f of the insulating substrate 103 has been described, but the state in which the metal film 109 is formed on the upper surface (solder joint surface) of the base plate 101. Even if the structure is joined by the under-board bonding material 107b, the heat dissipation and the reliability of the joint can be improved.
  • the solder layer is interposed between the lower surface of the lower conductor pattern 103f and the upper surface of the metal film 109, the metal film 109 is formed on the lower conductor pattern 103f in terms of improving heat dissipation. It is more effective when there is.
  • the semiconductor element 104 may be bonded to the upper surface of the upper conductor pattern 103a of the insulating substrate 103 in which the metal film 109 is previously formed on the lower surface of the lower conductor pattern 103f by the Ag sintering material. ..
  • the upper conductor pattern 103b, the upper conductor pattern 103c or the upper conductor pattern 103d and the upper surface electrode of the semiconductor element 104 are wired by an aluminum wire.
  • the semiconductor element 104 is bonded to the upper surface of the upper conductor pattern 103a on the insulating substrate 103 by Ag sintering or bonding to form a liquid layer diffusion bonding layer of Sn and Cu
  • the liquid of Ag sintering or Sn and Cu is used.
  • the insulating substrate 103 on which the semiconductor element 104 after heating and pressurization is mounted has a portion on which the semiconductor element 104 is mounted. It warps upward as a peak.
  • the heat dissipation can be improved more effectively as compared with the case where there is no cold spray film.
  • the semiconductor element 104 is bonded to the upper conductor pattern 103a by Ag sintering or forming a liquid phase diffusion bonding layer of Sn and Cu, and then a metal film 109 is formed by a cold spray method.
  • the metal film 109 is formed with the insulating substrate 103 warped upward in a convex shape with the portion on which the semiconductor element 104 is mounted as the apex.
  • the cold spray film (metal film 109) is formed thicker at the center than at the edges. At this time, the metal film 109 is not formed along the shape of the insulating substrate 103, but is formed so that the portion on which the semiconductor element 104 is mounted becomes thick.
  • a metal film 109 is formed between the base plate 101 and the insulating substrate 103, so that the metal film is formed by soldering.
  • the temperature of 109 rises, and the metal film 109 expands accordingly. This is preferable because the convex shape having the portion on which the semiconductor element 104 is mounted as the apex is relaxed.
  • a metal film 109 is mounted on a part of the lower surface (a portion on which the semiconductor element 104 is mounted) of the lower conductor pattern 103f of the insulating substrate 103 in a state where the semiconductor element 104 is mounted and the semiconductor element 104 is wired with an aluminum wire. Is formed.
  • the lower surface of the lower conductor pattern 103f is reflowed and soldered to the upper surface of the base plate 101 in which the plate-shaped sub-board bonding material 107b (solder) is arranged on the upper surface.
  • the case 102 in which the main terminal 108a or the control terminal 108b is installed by insert molding or outsert molding is adhered to the base plate 101 using an adhesive or the like. After that, it is connected to the insulating substrate 103, the main terminal 108a, and the control terminal 108b by wire wiring or the like. After that, the case 102 is filled with the sealing material 105, and the case 102 is further covered with a lid to complete the power semiconductor module 100.
  • FIG. 3 is a cross-sectional view for explaining a method for forming a metal film according to the present embodiment.
  • a metal film 109 is formed on the exposed portion of the lower conductor pattern 103f.
  • the thermal energy and kinetic energy of the metal powder are converted into frictional heat, and the metal powder and the surface to be bonded are respectively. Deformation occurs on the outermost surface of the and entangles with each other. Further, the metal oxide film on the outermost surface of each is removed, and a cold spray film is formed by the reaction occurring at the interface between the metal powder and the surface to be bonded. Further, the metal powder is continuously discharged from the cold spray device onto the previously formed cold spray film and collides with the cold spray film, so that the film thickness of the cold spray film is increased and finally becomes the metal film 109. ..
  • the metal powder supplied from the cold spray device is Cu powder, and its particle size is obtained by passing through a test fluid having a mesh size of 100 ⁇ m (149 mesh) conforming to JIS (Japanese Industrial Standards). Is controlled.
  • an electrolysis method As a method for producing Cu powder, an electrolysis method, a high-pressure swirling water atomizing method, a water atomizing method, or the like is used.
  • the particle shape of the Cu powder produced by the electrolytic method is close to the dendrite shape
  • the particle shape of the Cu powder produced by the high-pressure swirling water atomization method is close to the spherical shape. Regardless of the shape of Cu powder, when it collides with the surface to be joined, it becomes a thin flat shape that does not retain the prototype.
  • Particles that have passed through a sieve with a mesh size of 100 ⁇ m have a particle size distribution of 100 ⁇ m or less.
  • the frequency (number) is the maximum in the particle size distribution diagram in which the horizontal axis is the particle size and the vertical axis is the frequency (number). It is desirable that the particle size is about 20 ⁇ m. That is, it is desirable that particles having a particle size of about 20 ⁇ m form a peak of the distribution, and particles having a smaller particle size and particles having a particle size larger than that are present around the particles forming the peak.
  • the peak particle size is 20 ⁇ m, not only the particles having a particle size of 20 ⁇ m but also the particles having a particle size difference of ⁇ 10% with respect to 20 ⁇ m are used as the particles forming the peak.
  • the opening of the fluid may be less than 100 ⁇ m.
  • a sieve having a mesh size of 53 ⁇ m (270 mesh) is used, particles having a particle size of 53 ⁇ m or less can be obtained.
  • the opening of the fluid is small, the yield will be low. Therefore, in order to form a cold spray film at low cost, it is desirable that the opening of the fluid is about 100 ⁇ m.
  • Particles with a large particle size cannot obtain sufficient kinetic energy to form a cold spray film when they are discharged from the nozzle of a cold spray device described later. Therefore, even if the particles collide with the previously formed cold spray film, the particles do not bond with each other and are repelled by the flow of the discharged gas to the outside of the film, which does not contribute to the film formation.
  • the particle size of the metal powder is preferably small, and is 100 ⁇ m or less, more preferably 60 ⁇ m or less.
  • the lower limit of the particle size of the metal powder is, for example, 1.0 ⁇ m, but it is not necessary to perform sorting by a sieve in order to control the lower limit of the particle size. Further, for the reason described below, it is not necessary to make the particle size of the metal powder uniform, and it is not necessary to perform sorting by a fluid to make the particle size uniform.
  • the metal powder applied to the fluid having a predetermined opening has a particle size distribution equal to or less than the opening.
  • fine particles having a lighter weight preferentially collide with the lower conductor pattern 103f to form a cold spray film, and then the weight becomes heavier. Heavy, large particles collide with the previously formed cold spray film.
  • the side close to the lower conductor pattern 103f becomes a dense cold spray film composed of particles having a small particle size. Since the metal powder having a particle size distribution equal to or less than the above-mentioned opening collides with the dense cold spray film in sequence, a coarser cold spray film is formed on the dense cold spray film. When particles having a small particle size collide with each other, a film having a relatively small powder particle spacing is formed. Therefore, the upper layer of the metal film 109 is a relatively dense film.
  • the powder particle spacing of the metal film 109 is smaller as the powder particle spacing is closer to the lower conductor pattern 103f, and the powder particle spacing is larger as the distance from the lower conductor pattern 103f is larger. It has a film structure in which the powder particle spacing becomes smaller again as it approaches (the surface farthest from 103f).
  • the shape of the metal film 109 is determined by abutting the cold spray film mask 201 on the lower conductor pattern 103f and positioning it.
  • the cold spray film mask 201 is a mask made of SUS having an opening and has a thickness of about 1 mm.
  • the cold spray film mask 201 is a material that is not easily deformed by the collision of powder supplied from the cold spray device, and is not particularly limited as long as it is a material having a thickness that is difficult to be deformed.
  • the metal powder (Cu powder) does not adhere to the insulating material 103e.
  • the lower conductor pattern 103f is made of Cu
  • a Ni plating film may be formed on the surface thereof by a wet plating method, or a Ni sputter film may be formed on the surface thereof by vacuum vapor deposition.
  • Other solderable films may be formed.
  • Cu powder is used as the metal powder used as the material for the metal film 109.
  • the metal powder is a metal that forms a metal bond with the surface to be bonded and is a metal to be bonded when the base plate 101 and the insulating substrate 103 are soldered, for example, Ni. And so on.
  • the thickness of the metal film 109 can be controlled by the irradiation time of the spray, the irradiation speed (gas pressure), and the irradiation temperature. In the present embodiment, it is sufficient that the metal film 109 does not completely dissolve in the molten solder, and from that viewpoint, the metal film 109 having a thickness of 100 ⁇ m or more is sufficient.
  • the thickness of the metal film 109 is preferably 300 ⁇ m or less, for example.
  • the crystal size of the Cu film formed by the wet plating method is about 5 ⁇ m, whereas the cold spray film (metal film 109) is mainly formed by particles of about 20 ⁇ m. Therefore, the outermost surface of the metal film 109 is not smooth as compared with the Cu film formed by the wet plating method, but is non-uniform and has irregularities.
  • the arithmetic average roughness Ra derived from the line roughness measured in the range of 100 ⁇ m ⁇ 100 ⁇ m by a laser microscope is 1 ⁇ m or more and 10 ⁇ m or less.
  • the size of the unevenness here is measured by, for example, a non-contact white interferometer.
  • the presence of non-uniform unevenness on the outermost surface of the metal film 109 increases the area in which the under-board bonding material 107b (solder) wets and spreads. Therefore, the bonding strength between the substrate bottom bonding material 107b (solder) and the metal film 109 is improved.
  • the particle size in the cold spray film described above is, for example, a value measured by an electron backscatter diffraction method (EBSD) by observing a cross section of the metal film 109.
  • EBSD electron backscatter diffraction method
  • the film thickness is 2 ⁇ m or more and 3 ⁇ m or less, and the film thickness distribution is as flat as the nanometer order.
  • the film thickness is several ⁇ m or more and 30 ⁇ m or less, and the film thickness distribution is flat on the submicron order.
  • the metal film 109 is formed by the cold spray method using the cold spray film mask 201.
  • the cold spray film does not rise vertically along the wall surface of the opening of the cold spray film mask 201, but has a shape that is inclined toward the center of the film.
  • the thickness of the metal film 109 can be measured by an ultrasonic flaw detection inspection (Scanning Acoustic Tomography, that is, SAT). That is, the time required for the ultrasonic waves emitted from the ultrasonic probe to be applied to the semiconductor device after the metal film 109 is formed and the ultrasonic waves passing through the metal film 109, and the metal film 109 and the lower conductor. It is measured by the difference from the time until the ultrasonic wave is reflected and returned at the interface with the pattern 103f.
  • SAT Ultrasonic flaw detection inspection
  • a metal film 109 corresponding to each semiconductor element 104 is formed on the corresponding portion on the lower surface of the lower conductor pattern 103f.
  • FIG. 4 is a cross-sectional view schematically showing an example of a part of the configuration of the power semiconductor module according to the present embodiment.
  • FIG. 5 is a plan view of the configuration shown in FIG. 4 as viewed from the lower surface side (lower side of the paper surface in FIG. 4).
  • the other configurations including the substrate lower bonding material 107b are not shown for the sake of simplicity.
  • the power semiconductor module includes an insulating substrate 103, a semiconductor element 104, a wiring 106, and a metal film 109a.
  • the metal film 109a is formed over a portion where a plurality of semiconductor elements 104 (switching device 104a and freewheeling diode 104b) are mounted. In FIG. 5, the metal film 109a is formed over the entire mounting locations of the four semiconductor elements 104.
  • the method for creating the metal film 109a is the same as that described in the first embodiment. That is, a mask for a cold spray film having an opening provided in a portion where the metal film 109a is formed is arranged on the lower conductor pattern 103f, and the metal powder is further irradiated with the cold spray device to form the film. Can be done.
  • the power module can be produced without lowering the productivity.
  • FIG. 6 is a cross-sectional view schematically showing another example of a part of the configuration of the power semiconductor module according to the present embodiment.
  • FIG. 7 is a plan view of the configuration shown in FIG. 6 as viewed from the lower surface side (lower side of the paper surface of FIG. 6).
  • the other configurations including the substrate lower bonding material 107b are not shown for the sake of simplicity.
  • the power semiconductor module includes an insulating substrate 103, a semiconductor element 104, a wiring 106, and a metal film 109b.
  • a plurality of metal films 109b are formed corresponding to the locations where the respective semiconductor elements 104 (switching device 104a or freewheeling diode 104b) are mounted (that is, the metal films 109b are formed in a plurality of locations). .. In FIG. 7, six metal films 109b are formed on each mounting location of one semiconductor element 104, and a plurality of metal films 109b are also formed between the mounting locations of the semiconductor element 104.
  • the method for creating the metal film 109b is the same as that described in the first embodiment. That is, a mask for a cold spray film provided with a plurality of openings corresponding to a portion for forming a plurality of metal films 109b is arranged on the lower conductor pattern 103f, and further, the metal powder is irradiated by the cold spray device. By doing so, a film can be formed.
  • the amount of Cu powder required is suppressed, the heat dissipation is improved, and the heat dissipation is improved.
  • the joint reliability of the joint portion between the base plate 101 and the insulating substrate 103 is improved.
  • the metal film 109 corresponding to the semiconductor element 104 is formed at the corresponding portion on the lower surface of the lower conductor pattern 103f. It was filmed.
  • FIG. 8 is a cross-sectional view conceptually showing a part of an example of the configuration of the power semiconductor module according to the present embodiment.
  • FIG. 9 is a plan view of the configuration shown in FIG. 8 as viewed from the lower surface side (lower side of the paper surface in FIG. 8).
  • the power semiconductor module 100a includes an insulating substrate 103, a case 102, a semiconductor element 104, a wiring 106, a terminal 208, a metal film 109, and a base plate 101. And have.
  • a main terminal 208a and a control terminal 108b are installed in the case 102.
  • the switching device 104a is connected to the main terminal 208a by the wire-shaped wiring 106a, and is connected to the control terminal 108b by the source signal wiring 106b and the gate signal wiring 106c.
  • the freewheeling diode 104b is connected to the main terminal 208a by a wire-shaped wiring 106a.
  • the metal film 109 (or the metal film 109a) is located at a position facing the mounting position of the semiconductor element 104 and a position where the main terminal 208a is mounted.
  • Metal film 109b) is formed.
  • the metal film 109 is formed by arranging a mask for a cold spray film having an opening in a portion where the film is formed on the lower surface of the lower conductor pattern 103f, and further irradiating the metal powder with a cold spray device. A film can be formed.
  • the metal film 109 is formed in an area larger than the projected area of the joint portion 208b of the main terminal 208a (see FIG. 9).
  • a large current is energized in the main terminal 208a with the operation of the power semiconductor module 100a.
  • the cross-sectional area of the main terminal 208a is arbitrarily designed so as to satisfy the energizing capacity required for the operation of the power semiconductor module 100a.
  • the main terminal 208a is often formed of, for example, Cu having a plate thickness of 1 mm.
  • the main terminal 108a is connected to the upper conductor pattern 103b via a wire-shaped wiring material.
  • a wire-shaped wiring material When the energization capacity required for design cannot be obtained by connecting with a wire-shaped wiring material, it is necessary to join the joint portion 208b of the main terminal 208a and the upper conductor pattern 103b like the main terminal 208a.
  • the main terminal 208a and the upper conductor pattern 103b are joined by a solder material, but in recent years, the operating temperature range of the power semiconductor module has expanded, and the joining reliability required for the joining portion has increased. ing.
  • the main terminal 208a is made of a Cu material having a thickness of 1 mm
  • the upper conductor pattern 103b is a metal pattern made of a Cu material
  • the insulating material 103e is made of silicon nitride (AlN).
  • the materials of these configurations are not limited to the contents.
  • the main terminal 208a When energization occurs due to the operation of the power semiconductor module 100a, the main terminal 208a generates heat. Then, a temperature change based on the heat generation may occur.
  • the joint portion 208b Due to the temperature change based on the above heat generation or the temperature change in the ambient environment of the power semiconductor module 100a, the joint portion 208b is stressed (mainly) according to the difference in the coefficient of thermal expansion between the main terminal 208a and the material such as the insulating material 103e. Shear direction) occurs. Further, due to the above temperature change, expansion or contraction of the main terminal 208a occurs, and stress (mainly in the vertical direction) is generated at the joint portion 208b between the main terminal 208a and the upper conductor pattern 103b.
  • silicon nitride (AlN) which is the material of the insulating material 103e used in the present embodiment, has a large thermal conductivity and excellent heat dissipation. Therefore, it is often used in recent years.
  • the stress generated at the joint portion 208b is large, and in conventional solder bonding, solder, which is a bonding material (here). Then, the crack extends to (not shown). Then, the energization path becomes small, and the temperature of the joint rises, so that there is a risk of breakage and an open failure.
  • the Cu of the main terminal 208a and the Cu of the upper conductor pattern 103b are directly bonded to obtain a strong bonding portion 208b, and the required bonding reliability is also satisfied. be able to.
  • the stress generated at the joint was alleviated by creeping the solder material or expanding cracks in the solder material.
  • the stress generated by the difference in the coefficient of thermal expansion between the materials or the stress generated by the expansion or contraction of the main terminal 208a itself causes the main terminal 208a to be formed.
  • the solder which is the under-board bonding material 107b between the lower conductor pattern 103f and the base plate 101, just below the joint portion 208b, has deteriorated.
  • the heat generated by the main terminal 208a being energized or the heat generated by the operation of the semiconductor element 104 cannot be efficiently transmitted to the base plate 101. Then, the heat dissipation property deteriorates.
  • the deterioration of the solder locally progresses only in the portion directly below the main terminal 208a due to the operation of the power semiconductor module 100a.
  • the cold spray method is also performed at a position facing the mounting position of the main terminal 208a on the lower surface of the lower conductor pattern 103f on the lower surface side of the insulating substrate 103.
  • the metal film 109 formed by the above is formed.
  • the coefficient of thermal expansion of Cu is a value between the coefficient of thermal expansion of the solder and the coefficient of thermal expansion of the base plate 101 or the coefficient of thermal expansion of the insulating material 103e. Therefore, it is possible to reduce the stress generated in the substrate lower bonding material 107b during the operation of the power semiconductor module 100a.
  • the cold spray membrane is not a complete bulk body, and there are vacancies inside the membrane. These holes serve as a buffer layer, and alleviate the stress generated in the joint material 107b under the substrate immediately below the joint portion 208b of the main terminal 208a. Therefore, it can be said that the cold spray method is a desirable film forming method for the metal film 109.
  • the structure of the main terminal 208a which is a Cu material and the upper conductor pattern 103b which is a Cu pattern by solid-phase diffusion bonding by ultrasonic waves has been described, but not only that, the main terminal 208a and the upper side by laser irradiation have been described.
  • Direct laser bonding with the conductor pattern 103b or laser irradiation melts the brazing material sandwiched between the main terminal 208a and the upper conductor pattern 103b to bond the main terminal 208a and the upper conductor pattern 103b.
  • the method is also applicable.
  • the structure formed by bonding the main terminal 208a and the upper conductor pattern 103b has been described, but when the bonding portion between the control terminal 108b and the upper conductor pattern 103c is ultrasonically bonded, the control terminal is used.
  • the main terminal 208a and the upper conductor pattern 103b which is a Cu pattern, are ultrasonically bonded to improve the bonding strength as compared with the conventional solder bonding, the main terminal 208a It is possible to obtain a power semiconductor module 100a capable of improving heat dissipation by suppressing the expansion of cracks in the substrate bottom bonding material 107b between the lower conductor pattern 103f directly below and the base plate 101.
  • the semiconductor module according to the above-described embodiment is applied to a power conversion device.
  • the power conversion device to be applied is not limited to that for a specific application, but the case where it is applied to a three-phase inverter will be described below.
  • FIG. 10 is a diagram conceptually showing an example of the configuration of a power conversion system including the power conversion device of the present embodiment.
  • the power conversion system includes a power supply 2100, a power conversion device 2200, and a load 2300.
  • the power supply 2100 is a DC power supply and supplies DC power to the power conversion device 2200.
  • the power supply 2100 can be configured by various types, for example, a DC system, a solar cell, a storage battery, or the like. Further, the power supply 2100 can be configured by a rectifier circuit connected to an AC system, an AC-DC converter, or the like. Further, the power supply 2100 can also be configured by a DC-DC converter that converts the DC power output from the DC system into a predetermined power.
  • the power converter 2200 is a three-phase inverter connected between the power supply 2100 and the load 2300.
  • the power conversion device 2200 converts the DC power supplied from the power supply 2100 into AC power, and further supplies the AC power to the load 2300.
  • the power conversion device 2200 converts a DC power into an AC power and outputs a conversion circuit 2201 and a drive signal for driving each switching element of the conversion circuit 2201. It includes a drive circuit 2202 that outputs power, and a control circuit 2203 that outputs a control signal for controlling the drive circuit 2202 to the drive circuit 2202.
  • the load 2300 is a three-phase electric motor driven by AC power supplied from the power converter 2200.
  • the load 2300 is not limited to a specific application, but is an electric motor mounted on various electric devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad vehicle, an elevator, or an air conditioner. Is.
  • the details of the power conversion device 2200 will be described below.
  • the conversion circuit 2201 includes a switching element and a freewheeling diode (not shown here). Then, when the switching element performs the switching operation, the DC power supplied from the power supply 2100 is converted into AC power and further supplied to the load 2300.
  • the conversion circuit 2201 is a two-level three-phase full bridge circuit, and has six switching elements and each switching element. It includes six freewheeling diodes connected in antiparallel.
  • the semiconductor module according to any of the embodiments described above is applied to at least one of each switching element and each freewheeling diode in the conversion circuit 2201.
  • the six switching elements are connected in series for each of the two switching elements to form an upper and lower arm, and each upper and lower arm constitutes each phase (that is, U phase, V phase and W phase) of the full bridge circuit.
  • the output terminals of the respective upper and lower arms that is, the three output terminals of the conversion circuit 2201 are connected to the load 2300.
  • the conversion circuit 2201 includes a drive circuit (not shown here) for driving each switching element
  • the drive circuit may be built in the semiconductor module, and the semiconductor module is A drive circuit may be separately provided.
  • the drive circuit 2202 generates a drive signal for driving the switching element of the conversion circuit 2201, and further supplies the drive signal to the control electrode of the switching element of the conversion circuit 2201. Specifically, based on the control signal output from the control circuit 2203 described later, a drive signal for turning on the switching element and a drive signal for turning off the switching element are output to the control electrodes of the respective switching elements. To do.
  • the drive signal When the switching element is kept on, the drive signal is a voltage signal equal to or higher than the threshold voltage of the switching element (that is, the on signal), and when the switching element is kept off, the drive signal is the switching element. It becomes a voltage signal below the threshold voltage (that is, an off signal).
  • the control circuit 2203 controls the switching element of the conversion circuit 2201 so that the desired power is supplied to the load 2300. Specifically, the time (that is, the on-time) that each switching element of the conversion circuit 2201 should be in the on state is calculated based on the power to be supplied to the load 2300.
  • the conversion circuit 2201 can be controlled by PWM control that modulates the on-time of the switching element according to the voltage to be output.
  • control circuit 2203 gives a control command to the drive circuit 2202 so that an on signal is output to the switching element that should be turned on at each time point and an off signal is output to the switching element that should be turned off. That is, the control signal) is output.
  • the drive circuit 2202 outputs an on signal or an off signal as a drive signal to the control electrodes of the respective switching elements based on the control signal.
  • the semiconductor module in any of the above-described embodiments is applied as the switching element or the freewheeling diode of the conversion circuit 2201, the on-resistance after the energization cycle is stabilized. Can be made to.
  • the two-level power conversion device has been described, but the semiconductor module in any of the embodiments described above may be applied to the three-level or multi-level power conversion device. .. Further, in the case of supplying electric power to the single-phase load, the semiconductor module in any of the embodiments described above may be applied to the single-phase inverter.
  • the semiconductor module in any of the above-described embodiments can be applied to the DC-DC converter or the AC-DC converter.
  • the power conversion device to which the semiconductor module in any of the above-described embodiments is applied is not limited to the case where the load described above is an electric motor, and is not limited to, for example, an electric discharge machine or a laser machine. It can also be used as a power source for machines, induction cookers or contactless power supply systems. Further, the power conversion device to which the semiconductor module in any of the above-described embodiments is applied can also be used as a power conditioner in a photovoltaic power generation system, a power storage system, or the like.
  • the semiconductor switching element used in the above-described embodiment is not limited to the switching element made of a silicon (Si) semiconductor.
  • the semiconductor switching element is a non-Si semiconductor having a wider band gap than the Si semiconductor. It may be made of a material.
  • Examples of wide bandgap semiconductors that are non-Si semiconductor materials include silicon carbide, gallium nitride-based materials, and diamond.
  • a switching element made of a wide bandgap semiconductor can be used even in a high voltage region where unipolar operation is difficult with a Si semiconductor, and switching loss generated during switching operation can be greatly reduced. Therefore, it is possible to greatly reduce the power loss.
  • switching elements made of wide bandgap semiconductors have low power loss and high heat resistance. Therefore, when a power module including a cooling unit is configured, the heat radiation fins of the heat sink can be miniaturized, so that the semiconductor module can be further miniaturized.
  • switching elements made of wide bandgap semiconductors are suitable for high frequency switching operation. Therefore, when applied to a converter circuit in which a high frequency demand is high, the reactor or capacitor connected to the converter circuit can be miniaturized by increasing the switching frequency.
  • the semiconductor switching element according to the above-described embodiment is a switching element made of a wide-gap semiconductor such as silicon carbide.
  • the replacement may be made across a plurality of embodiments. That is, it may be the case that the respective configurations shown in the examples in different embodiments are combined to produce the same effect.
  • the semiconductor module includes an insulating substrate 103, at least one semiconductor element 104, a first bonding material, and a metal film 109 (or metal film 109a, metal film 109b).
  • the first bonding material corresponds to, for example, the substrate lower bonding material 107b.
  • the insulating substrate 103 is provided with a conductor pattern at least on the upper surface.
  • the conductor pattern corresponds to, for example, the upper conductor pattern 103a.
  • the semiconductor element 104 is provided on the upper surface of the upper conductor pattern 103a.
  • the under-board bonding material 107b is provided on a part of the lower surface of the insulating substrate 103.
  • the metal film 109 has a higher thermal conductivity than the substrate bottom bonding material 107b. Further, the metal film 109 is provided on another part of the lower surface of the insulating substrate 103. The metal film 109 is provided on the lower surface of the insulating substrate 103 at a position corresponding to the position where the semiconductor element 104 is arranged.
  • the metal film 109 is provided on the lower surface of the insulating substrate 103 at the position corresponding to the position where the semiconductor element 104 is arranged, the heat generated from the semiconductor element is efficiently dissipated by the metal film. Therefore, the heat dissipation performance of the semiconductor element provided on the insulating substrate can be improved. Further, when the metal film 109 is made of Cu, the mechanical strength is higher than that of the bonding material made of solder, so that cracks unlike those of solder are less likely to occur, and when they occur. Even so, crack growth is slow. Therefore, the reliability of the joint is unlikely to decrease.
  • the metal film 109 is a cold spray film formed by a cold spray method.
  • the cold spray film does not become a complete bulk body, and since the pores are formed inside the membrane, the pores serve as a buffer layer and have the effect of relaxing the stress generated in the metal film 109. Has. Therefore, the reliability of the joint is unlikely to decrease. Further, since the apparent thermal conductivity of the cold spray film having pores is larger than that of solder or the like, heat dissipation is improved.
  • the cold spray film is a film formed by laminating powder at high pressure.
  • the cold spray film formed by this method has pores, has a higher thermal conductivity than solder or the like, is lower than a bulk body of the same substance, and has irregularities on the surface. ..
  • the cold spray film has a structure of another metal film (bonding material) including solder or the like, for example, by measuring the thermal conductivity and comparing it with the bulk body, or by measuring the arithmetic mean roughness Ra.
  • bonding material including solder or the like
  • cold spray membrane is a term that merely specifies the structure or characteristics of an object by indicating its state.
  • the metal film 109 is formed at least at a position where it overlaps with the semiconductor element 104 in a plan view. According to such a configuration, the metal film 109 can efficiently dissipate the heat generated from the semiconductor element 104.
  • the area where the metal film 109 is formed is larger than the area of the region where the semiconductor element 104 is arranged. According to such a configuration, the metal film 109 can efficiently dissipate the heat generated from the semiconductor element 104 including the component spreading from the semiconductor element 104 in the surface direction of the insulating substrate 103.
  • the center position of the metal film 109 coincides with the center position of the semiconductor element 104 in a plan view. According to such a configuration, the metal film 109 can efficiently dissipate the heat generated from the semiconductor element 104.
  • the semiconductor module includes a second bonding material and a base plate 101.
  • the second bonding material corresponds to, for example, the chip bottom bonding material 107a.
  • the chip bottom bonding material 107a joins the lower surface of the semiconductor element 104 and the upper surface of the upper conductor pattern 103a.
  • the base plate 101 is joined to the lower surface of the insulating substrate 103 by the substrate lower bonding material 107b.
  • the melting point of the subchip bonding material 107a is higher than the melting point of the substrate bottom bonding material 107b.
  • the metal is used when the base plate 101 and the insulating substrate 103 are soldered.
  • the temperature of the film 109 rises, and the metal film 109 expands accordingly. Therefore, it is possible to relax the convex shape having the portion on which the semiconductor element 104 is mounted as the apex.
  • the metal film 109b is provided on the lower surface of the insulating substrate 103 at a plurality of locations with respect to the corresponding semiconductor element 104. According to such a configuration, heat dissipation can be improved while suppressing the amount of Cu powder required as compared with the case where the number of semiconductor elements 104 and the number of metal films 109a are the same. ..
  • a plurality of semiconductor elements 104 are provided.
  • the metal film 109a is provided on the lower surface of the insulating substrate 103 at a position straddling each position where the plurality of semiconductor elements 104 are arranged. According to such a configuration, heat dissipation can be improved as compared with the case where the number of semiconductor elements 104 and the number of metal films 109a are the same. Further, even when different types of semiconductor elements are mounted on the same insulating substrate, setup change does not occur in the process of forming the metal film. Therefore, the power module can be produced without lowering the productivity.
  • the power conversion device has the above-mentioned semiconductor module, and drives the conversion circuit 2201 that converts and outputs the input power and the semiconductor module.
  • the drive circuit 2202 that outputs the drive signal of the above to the semiconductor module and the control circuit 2203 that outputs the control signal for controlling the drive circuit 2202 to the drive circuit 2202 are provided. According to such a configuration, since the metal film 109 is provided on the lower surface of the insulating substrate 103 at the position corresponding to the position where the semiconductor element 104 is arranged, the heat generated from the semiconductor element is efficiently dissipated by the metal film. Therefore, the heat dissipation performance of the semiconductor element provided on the insulating substrate can be improved.
  • At least one semiconductor element 104 is provided on the upper surface of the upper conductor pattern 103a of the insulating substrate 103 on which the upper conductor pattern 103a is provided on at least the upper surface.
  • the under-board bonding material 107b is provided on a part of the lower surface of the insulating substrate 103.
  • a metal film 109 having a higher thermal conductivity than the under-board bonding material 107b is provided on the other part of the lower surface of the insulating substrate 103.
  • providing the metal film 109 means providing the metal film 109 on the lower surface of the insulating substrate 103 at a position corresponding to the position where the semiconductor element 104 is arranged.
  • the metal film 109 is provided on the lower surface of the insulating substrate 103 at the position corresponding to the position where the semiconductor element 104 is arranged, the heat generated from the semiconductor element is efficiently dissipated by the metal film. Therefore, the heat dissipation performance of the semiconductor element provided on the insulating substrate can be improved.
  • providing the metal film 109 means forming the metal film 109 into a film by a cold spray method.
  • the cold spray film does not become a complete bulk body, and since the pores are formed inside the membrane, the pores serve as a buffer layer and have the effect of relaxing the stress generated in the metal film 109. Has. Therefore, the reliability of the joint is unlikely to decrease. Further, since the apparent thermal conductivity of the cold spray film having pores is larger than that of solder or the like, heat dissipation is improved.
  • the provision of the metal film 109 means that the metal film 109 is formed at least at a position where it overlaps with the semiconductor element 104 in a plan view. According to such a configuration, the metal film 109 can efficiently dissipate the heat generated from the semiconductor element 104.
  • the lower surface of the semiconductor element 104 and the upper surface of the upper conductor pattern 103a are joined by the chip bottom bonding material 107a. Then, after joining the lower surface of the semiconductor element 104 and the upper surface of the upper conductor pattern 103a, the base plate 101 is joined to the lower surface of the insulating substrate 103 by the substrate lower bonding material 107b.
  • the melting point of the subchip bonding material 107a is higher than the melting point of the substrate sublayer bonding material 107b.
  • the lower surface of the insulating substrate 103 and the base plate 101 are joined by the substrate lower bonding material 107b.
  • the temperature of the metal film 109 rises when the base plate 101 and the insulating substrate 103 are soldered, and the metal film 109 is formed accordingly. Inflate. Therefore, it is possible to relax the convex shape having the portion on which the semiconductor element 104 is mounted as the apex.
  • the base plate 101 is joined to the lower surface of the insulating substrate 103 by the substrate lower bonding material 107b. Then, after joining the lower surface of the insulating substrate 103 and the upper surface of the base plate 101, the lower surface of the semiconductor element 104 and the upper surface of the upper conductor pattern 103a are joined by the subchip bonding material 107a.
  • the melting point of the subchip bonding material 107a is equal to or lower than the melting point of the substrate bottom bonding material 107b. According to such a configuration, the joining of the base plate 101 can be completed before the semiconductor element 104 is mounted on the insulating substrate 103, so that the degree of freedom of the routing can be increased in addition to the different routing described above. it can.
  • a conversion circuit having a semiconductor module manufactured by the above manufacturing method and converting and outputting input power. 2201 is provided. Then, a drive circuit 2202 that outputs a drive signal for driving the semiconductor module to the semiconductor module is provided. Then, a control circuit 2203 that outputs a control signal for controlling the drive circuit 2202 to the drive circuit 2202 is provided.
  • the metal film 109 is provided on the lower surface of the insulating substrate 103 at the position corresponding to the position where the semiconductor element 104 is arranged, the heat generated from the semiconductor element is efficiently dissipated by the metal film. Therefore, the heat dissipation performance of the semiconductor element provided on the insulating substrate can be improved.
  • the material when a material name or the like is described without being specified, the material contains other additives, for example, an alloy, etc., as long as there is no contradiction. It shall be included.
  • each component in the above-described embodiment is a conceptual unit, and within the scope of the technology disclosed in the present specification, one component is composed of a plurality of structures. And the case where one component corresponds to a part of a structure, and further, the case where a plurality of components are provided in one structure.
  • each component in the above-described embodiment shall include a structure having another structure or shape as long as it exhibits the same function.
  • 100 power semiconductor module 102 case, 101 base plate, 103 insulating substrate, 103a, 103b, 103c, 103d upper conductor pattern, 103e insulating material, 103f lower conductor pattern, 104 semiconductor element, 104a switching device, 104b freewheeling diode, 105 Encapsulant, 106 Wiring, 106a Wire-shaped wiring, 106b Source signal wiring, 106c Gate signal wiring, 107a Subchip bonding material, 107b Subboard bonding material, 108 terminal, 108a Main terminal, 108b Control terminal, 109,109a 109b metal film, 110 top electrode, 110a gate pad, 111 protective film, 201 cold spray film mask, 202 insulating substrate holding jig, 2100 power supply, 2200 power conversion device, 2201 conversion circuit, 2202 drive circuit, 2203 control circuit, 2300 load.

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PCT/JP2020/039367 2019-10-31 2020-10-20 半導体モジュール、電力変換装置、半導体モジュールの製造方法、および、電力変換装置の製造方法 Ceased WO2021085234A1 (ja)

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