JPWO2021085234A1 - - Google Patents

Info

Publication number
JPWO2021085234A1
JPWO2021085234A1 JP2021553453A JP2021553453A JPWO2021085234A1 JP WO2021085234 A1 JPWO2021085234 A1 JP WO2021085234A1 JP 2021553453 A JP2021553453 A JP 2021553453A JP 2021553453 A JP2021553453 A JP 2021553453A JP WO2021085234 A1 JPWO2021085234 A1 JP WO2021085234A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021553453A
Other languages
Japanese (ja)
Other versions
JPWO2021085234A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021085234A1 publication Critical patent/JPWO2021085234A1/ja
Publication of JPWO2021085234A5 publication Critical patent/JPWO2021085234A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
JP2021553453A 2019-10-31 2020-10-20 Pending JPWO2021085234A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2019198275 2019-10-31
PCT/JP2020/039367 WO2021085234A1 (ja) 2019-10-31 2020-10-20 半導体モジュール、電力変換装置、半導体モジュールの製造方法、および、電力変換装置の製造方法

Publications (2)

Publication Number Publication Date
JPWO2021085234A1 true JPWO2021085234A1 (https=) 2021-05-06
JPWO2021085234A5 JPWO2021085234A5 (https=) 2022-02-21

Family

ID=75715952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021553453A Pending JPWO2021085234A1 (https=) 2019-10-31 2020-10-20

Country Status (2)

Country Link
JP (1) JPWO2021085234A1 (https=)
WO (1) WO2021085234A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021208252A1 (de) 2021-07-29 2023-02-02 Robert Bosch Gesellschaft mit beschränkter Haftung Leistungshalbleiterbauelement und Verfahren zum Detektieren von Alterungsschäden eines Leistungshalbleiterbauelements
JP7814194B2 (ja) 2022-03-07 2026-02-16 三菱重工業株式会社 パワーモジュール用基板、及びパワーモジュール用基板の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340719A (ja) * 1999-05-26 2000-12-08 Hitachi Ltd パワー半導体装置
JP2012079962A (ja) * 2010-10-04 2012-04-19 Mitsubishi Electric Corp 半導体装置および半導体装置の製造方法
JP2017139345A (ja) * 2016-02-04 2017-08-10 株式会社日立製作所 半導体装置、並びに半導体装置の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010134580A (ja) * 2008-12-03 2010-06-17 Seiko Epson Corp フィスカルプリンタ
JP2012138029A (ja) * 2010-12-27 2012-07-19 Mitsubishi Heavy Ind Ltd メンテナンス情報配信システム及びメンテナンス情報配信方法
JP6811644B2 (ja) * 2017-02-27 2021-01-13 三菱電機株式会社 パワー半導体装置およびその製造方法、ならびに電力変換装置
JP2018182198A (ja) * 2017-04-19 2018-11-15 株式会社東芝 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000340719A (ja) * 1999-05-26 2000-12-08 Hitachi Ltd パワー半導体装置
JP2012079962A (ja) * 2010-10-04 2012-04-19 Mitsubishi Electric Corp 半導体装置および半導体装置の製造方法
JP2017139345A (ja) * 2016-02-04 2017-08-10 株式会社日立製作所 半導体装置、並びに半導体装置の製造方法

Also Published As

Publication number Publication date
WO2021085234A1 (ja) 2021-05-06

Similar Documents

Publication Publication Date Title
BR112021017339A2 (https=)
BR112021018450A2 (https=)
BR112021017637A2 (https=)
BR112021017892A2 (https=)
BR112021017782A2 (https=)
BR112021017939A2 (https=)
BR112021017738A2 (https=)
BR112021017728A2 (https=)
BR112021018452A2 (https=)
BR112021017703A2 (https=)
BR112021018102A2 (https=)
BR112019016138A2 (https=)
BR112021017732A2 (https=)
BR112021017355A2 (https=)
BR112021018168A2 (https=)
BR112021018093A2 (https=)
BR112021018250A2 (https=)
BR112021018584A2 (https=)
BR112021018484A2 (https=)
JPWO2021085234A1 (https=)
BR112021017949A2 (https=)
BR112021018084A2 (https=)
BR112019016136A2 (https=)
BR112021017983A2 (https=)
BR112021018193A2 (https=)

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20211124

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20211124

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20220816

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20230221