WO2021082400A1 - 一种减少摄像模组点子缺陷的cvd制备方法及其产物 - Google Patents

一种减少摄像模组点子缺陷的cvd制备方法及其产物 Download PDF

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WO2021082400A1
WO2021082400A1 PCT/CN2020/090570 CN2020090570W WO2021082400A1 WO 2021082400 A1 WO2021082400 A1 WO 2021082400A1 CN 2020090570 W CN2020090570 W CN 2020090570W WO 2021082400 A1 WO2021082400 A1 WO 2021082400A1
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refractive index
layer
low refractive
precursor
substrate
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PCT/CN2020/090570
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English (en)
French (fr)
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葛文志
王懿伟
王刚
翁钦盛
矢岛大和
江骏楠
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杭州美迪凯光电科技股份有限公司
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Priority claimed from CN201911060084.7A external-priority patent/CN110885969A/zh
Application filed by 杭州美迪凯光电科技股份有限公司 filed Critical 杭州美迪凯光电科技股份有限公司
Priority to US16/969,572 priority Critical patent/US20220302193A1/en
Priority to JP2020537720A priority patent/JP7086198B2/ja
Priority to KR1020207025627A priority patent/KR102627747B1/ko
Publication of WO2021082400A1 publication Critical patent/WO2021082400A1/zh

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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685—Process for coatings or optical elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/55—Optical parts specially adapted for electronic image sensors; Mounting thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/57—Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00—Optical elements other than lenses
    • G02B5/20—Filters
    • G02B5/28—Interference filters
    • G02B5/285—Interference filters comprising deposited thin solid films
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies

Definitions

  • the present invention relates to the technical field of camera modules, and in particular to a CVD preparation method and its products for reducing point defects of camera modules.
  • a dot is a kind of undesirable defect that appears in optical lenses and camera modules. It refers to the dot-like protrusions formed on the surface of the substrate, sometimes called particles.
  • the idea is mainly in the current optical coating process (ie, vacuum thermal evaporation and magnetron sputtering), it is inevitable that large particles of film material will be deposited on the surface of the substrate along with the film material vapor or sputtered particles. Forming. Sometimes it is an individual spot, and in severe cases, it is a fine spot in the film. Large particle spots can even damage the surface of the substrate and seriously affect the imaging effect. Therefore, in order to ensure the imaging effect, most manufacturers currently require that the dots in the optical components should not exceed 5 ⁇ m dots.
  • optical coating process mainly uses vacuum thermal evaporation (evaporation) and magnetron sputtering, and there is no effective means to control or reduce ideas.
  • Vacuum thermal evaporation is to heat the evaporated substance under vacuum conditions to vaporize and deposit on the surface of the substrate to form a solid film.
  • the process is as follows: (1) Various forms of thermal energy conversion methods (such as resistance heating, electronic heating, high Frequency induction heating, arc heating, laser heating, etc.) to evaporate or sublimate the particles of the coating material into gaseous particles with a certain energy; (2) The gaseous particles are transmitted to the substrate through basically collision-free linear motion; (3) Particles It is deposited on the surface of the substrate and condenses into a thin film; (4) The atoms that make up the thin film are rearranged or chemical bonding changes.
  • thermal energy conversion methods such as resistance heating, electronic heating, high Frequency induction heating, arc heating, laser heating, etc.
  • Magnetron sputtering is a technique that uses charged particles to bombard the surface of the target in a vacuum, so that the bombarded particles are deposited on the substrate.
  • the process is as follows: (1) The electrons fly to the substrate under the action of the electric field E When the medium collides with argon atoms, it ionizes to produce Ar positive ions and new electrons; (2) The new electrons fly to the substrate, and the Ar ions accelerate to the cathode target under the action of the electric field, and bombard the target surface with high energy. Sputtering the target material; (3) In the sputtered particles, neutral target atoms or molecules are deposited on the substrate to form a thin film. Similarly, in the process of bombarding the target material, it is very likely that large particles will be generated, which will then be deposited on the substrate to form dots, which cannot be effectively controlled.
  • One of the objectives of the present invention is to provide a CVD method for reducing dot defects of camera modules in view of the shortcomings of the prior art, which can fundamentally solve the method of generating dots without generating dot defects with a particle size in the micron level.
  • the second object of the present invention is to provide a multilayer film structure, package cover, CLCC package and camera module obtained by the above-mentioned preparation method, which greatly reduces defects caused by dot defects.
  • the base substrate is ultrasonically cleaned and dried to obtain a pre-processed base substrate
  • the above preparation method further includes steps S3 to S4 and/or S5 to S6 that are periodically repeated.
  • the coating combination of the optical element includes the following: SiO 2 low refractive index L layer and TiO 2 high refractive index H layer; SiO 2 low refractive index L layer and Nb 2 O 5 high refractive index layer High refractive index layer; SiO 2 low refractive index L layer + Ta 3 O 5 high refractive index H layer; MgF 2 low refractive index L layer and TiO 2 high refractive index H layer; MgF 2 low refractive index L layer and Nb 2 O 5 High refractive index H layer; Nb 2 O 5 low refractive index L layer and Ta 3 O 5 high refractive index H layer; MgF 2 low refractive index L layer, Al 2 O 3 high refractive index H layer and SiO 2 low refractive index L Layer; Al 2 O 3 low refractive index L layer, H4 high refractive index H layer and MgF 2 low refractive index L layer; Al 2 O 3 low refractive index L layer, ZrO 2 high refractive
  • the difference between the refractive index of the high refractive index H layer and the refractive index of the low refractive index L layer is ⁇ 0.5.
  • the base substrate is a glass, crystal or sapphire substrate.
  • the precursor I is one of SiH 4 , SiHCl 3 , SiCl 2 H 2 , SiCl 4 , Al(CH 3 ) 3 , Cp 2 Mg
  • the precursor II is O 2.
  • the precursor III is TiH 4 , TiCl 4 , NbCl 5 , TaCl 5 , ZrCl 4
  • the precursor IV is one or more of O 2 , O 3 , CO 2 , CO, NO 2 , NO, H 2 O, and F 2 .
  • a multilayer film structure is characterized in that the multilayer film structure is prepared by the above-mentioned CVD preparation method.
  • the number of dots with a size ⁇ 1 ⁇ m in the above-mentioned multilayer film structure is zero.
  • the surface roughness Ra of the above-mentioned multilayer film structure ranges from 0.01 nm to 20 nm.
  • a CLCC package cover plate wherein the package cover plate includes a cover substrate and a functional film covering the cover substrate, the functional film includes a multilayer film structure; the multilayer The film structure is deposited by the above-mentioned CVD preparation method.
  • a CLCC package wherein the CLCC package includes a substrate on which a CMOS located in the middle, a capacitor resistor and a drive motor located at the edge are attached, and the substrate is provided with There is an isolation wall base.
  • the isolation wall base is provided with CMOS sensor vacancies, capacitor resistor vacancies and drive motor vacancies on the corresponding positions of the CMOS, capacitor resistors and drive motors on the substrate.
  • the upper surface of the CMOS sensor vacancies is installed as above.
  • the cover plate is provided.
  • a camera module characterized in that the camera module includes a CLCC package as described above.
  • the product provided by the present invention realizes multi-layer coating of optical elements through chemical vapor deposition.
  • the reaction material does not have evaporation or sputtering process, and it is deposited on the base substrate through vapor reaction, so no large-particle dot defects will be formed. , Thereby greatly improving the imaging quality of the camera module, increasing the product qualification rate, and the optical coating is smoother, stronger, and more practical.
  • the cover plate of the present invention ensures that no large-sized dots appear on the surface, which is far lower than the 5 ⁇ m requirement of the prior art, overcomes the disadvantages that limit the improvement of CMOS pixels, and greatly improves the CLCC package
  • the pixel level of the body and camera module The pixel level of the body and camera module.
  • Figure 1 is a schematic diagram of the multilayer film structure of the present invention.
  • FIG. 2 is a schematic diagram of the structure of the CLCC package according to the present invention.
  • FIG. 3 is a schematic diagram of the cover plate of Embodiment 1 under the eyepiece 10X and the objective lens 100X of the metallurgical microscope;
  • Figure 4 is an AFM diagram of the surface of the cover plate of Example 1;
  • Fig. 5 is a three-dimensional AFM diagram of the surface of the cover plate of embodiment 1;
  • FIG. 6 is a schematic diagram of the cover plate of the comparative example under the eyepiece 10X and the objective lens 100X of the metallurgical microscope.
  • Marking instructions 1, substrate; 2, CMOS; 3, capacitor resistance; 4, drive motor; 5, isolation wall base; 6, cover.
  • the refractive index described herein is set to be obtained under the d-line of the He light source, and the wavelength of the d-line is 587.56 nm.
  • the base substrate is ultrasonically cleaned and dried to obtain a pre-processed base substrate
  • the above preparation method further includes steps S3 to S4 and/or S5 to S6 that are periodically repeated.
  • the coating combination of the optical element includes the following: SiO 2 low refractive index L layer and TiO 2 high refractive index H layer; SiO 2 low refractive index L layer and Nb 2 O 5 high refractive index layer High refractive index layer; SiO 2 low refractive index L layer + Ta 3 O 5 high refractive index H layer; MgF 2 low refractive index L layer and TiO 2 high refractive index H layer; MgF 2 low refractive index L layer and Nb 2 O 5 High refractive index H layer; Nb 2 O 5 low refractive index L layer and Ta 3 O 5 high refractive index H layer; MgF 2 low refractive index L layer, Al 2 O 3 high refractive index H layer and SiO 2 low refractive index L Layer; Al 2 O 3 low refractive index L layer, H4 high refractive index H layer and MgF 2 low refractive index L layer; Al 2 O 3 low refractive index L layer, ZrO 2 high refractive
  • the refractive index of the high refractive index H layer and the low refractive index L layer is ⁇ 0.5. The greater the refractive index difference between the two layers, the better the optical performance.
  • the base substrate is a glass, crystal or sapphire substrate.
  • the precursor I is one of SiH 4 , SiHCl 3 , SiCl 2 H 2 , SiCl 4 , Al(CH 3 ) 3 , Cp 2 Mg
  • the precursor II is O 2.
  • the precursor III is TiH 4 , TiCl 4 , NbCl 5 , TaCl 5 , ZrCl 4
  • the precursor IV is one or more of O 2 , O 3 , CO 2 , CO, NO 2 , NO, H 2 O, and F 2 .
  • a multilayer film structure is prepared by the above ALD preparation method, the number of dots with a size ⁇ 1 ⁇ m is 0, and the surface roughness Ra ranges from 0.01 nm to 20 nm.
  • the current deposition layer is bombarded and modified with plasma.
  • the plasma voltage used in the modification is 100-1000V
  • the current is 100-1000mA
  • the time is preferably 1-2 minutes, otherwise the performance and thickness of the deposited film may be affected.
  • a CLCC package body cover plate includes a cover plate substrate and a functional film covering the cover plate substrate, the functional film includes a multilayer film structure; the multilayer film structure is deposited by the above-mentioned ALD preparation method, After the deposition of each layer of film structure is completed, and before the deposition of the next layer of film structure, the current deposition layer is bombarded and modified with plasma.
  • the conventional ALD deposition process is only suitable for single-layer film deposition. In the process of depositing a multi-layer film structure, after the current layer of film is deposited, due to changes in the deposition surface, the following film may not be successfully deposited.
  • the present invention Through the plasma bombardment surface modification after each layer of film structure, the successful deposition of the multilayer film is realized.
  • the CLCC package includes a substrate 1 on which a CMOS 2 located in the middle and a capacitor resistor 3 and a drive motor 4 located at the edge are attached.
  • An isolation wall base 5 is provided on the substrate 1.
  • the isolation wall base 5 is provided with CMOS sensor vacancies, capacitor resistor vacancies, and drive motor vacancies at positions corresponding to CMOS 2, capacitor resistor 3 and drive motor 4 on the substrate.
  • a cover plate 6 is installed on the upper surface of the CMOS sensor vacancy.
  • a camera module includes a CLCC package as described above.
  • a camera module includes a CLCC package body; the CLCC package body includes a substrate 1 on which a CMOS 2 located in the middle and a capacitor resistor 3 and a drive motor 4 located at the edge are attached.
  • An isolation wall base 5 is provided on the substrate 1.
  • the isolation wall base 5 is provided with CMOS sensor vacancies, capacitor resistor vacancies, and drive motor vacancies at positions corresponding to CMOS 2, capacitor resistor 3 and drive motor 4 on the substrate.
  • a cover plate 6 is installed on the upper surface of the vacant position of the CMOS sensor; the surface particle size of the cover plate 6 is less than or equal to 10 nm, and the roughness Ra is 1.135 nm, as shown in Figures 3 to 5.
  • the above-mentioned cover plate is an optical element of a camera module with a low refractive index layer L of silicon dioxide and a high refractive index layer H of titanium dioxide covered on a glass substrate.
  • the thickness of the low refractive index layer L is 100-200 nm, and the refractive index is 1.46-1.50; the thickness of the high refractive index layer H is 350-650 nm, and the refractive index is 2.28-2.35.
  • the above-mentioned cover plate adopts CVD preparation method, and the process is as follows:
  • Step S1 pre-processing, firstly, the glass substrate is cleaned in an ultrasonic cleaning machine for 60 minutes and dried to obtain a pre-processed substrate;
  • Step S2 Put the pretreated glass substrate into the reaction chamber, evacuate to 0.1-5 Torr, and introduce nitrogen or inert gas;
  • Step S3 Then at 650-700°C, silane and oxygen are pulsed into the reaction chamber at a rate of 60 sccm and 30 sccm, respectively, the aeration time is 0.015s, and the cycle is passed 2000 times, and two deposits are deposited on the substrate. Silicon oxide forms a low refractive index L layer, and the thickness of the low refractive index L layer is 100-200nm;
  • Step S4 Stop feeding silane and oxygen as the raw material gases, purge the reaction chamber with nitrogen or inert gas, and perform surface modification by plasma bombardment;
  • Step S5 At 700-800°C, TiCl 4 and O 2 are introduced into the reaction chamber at a rate of 30 sccm and 30 sccm, respectively.
  • the aeration time is 0.015 s, and the cycle is introduced 2000 times.
  • the reaction is at a low refractive index L
  • a high refractive index H layer TiO 2 is deposited on the layer, and the thickness of the high refractive index H layer is 350-650 nm;
  • Step S6 Stop feeding the raw material gases TiCl 4 and O 2 , and purge the reaction chamber with nitrogen or inert gas;
  • Step S7 Cool to room temperature to obtain optical elements with different refractive index coatings.
  • a camera module includes a CLCC package body; the CLCC package body includes a substrate 1 on which a CMOS 2 located in the middle and a capacitor resistor 3 and a drive motor 4 located at the edge are attached.
  • An isolation wall base 5 is provided on the substrate 1.
  • the isolation wall base 5 is provided with CMOS sensor vacancies, capacitor resistor vacancies, and drive motor vacancies at positions corresponding to CMOS 2, capacitor resistor 3 and drive motor 4 on the substrate.
  • a cover plate 6 is installed on the upper surface of the vacant position of the CMOS sensor; the surface particle size of the cover plate 6 is less than or equal to 10 nm, and the roughness Ra is 0.433 nm.
  • the above-mentioned cover plate is a camera module optical element with a SiO 2 low refractive index layer L and a Nb 2 O 5 high refractive index layer H covered on a crystal substrate.
  • the thickness of the low refractive index layer L is 20-50 nm, and the refractive index is 1.46-1.50; the thickness of the high refractive index layer H is 10-100 nm, and the refractive index is 2.1-2.3.
  • the above-mentioned cover plate adopts CVD preparation method, and the process is as follows:
  • Step S1 pretreatment, first place the crystal substrate substrate in an ultrasonic cleaning machine for 60 minutes and dry, to obtain a preprocessed substrate substrate;
  • Step S2 Put the pretreated crystal substrate substrate into the reaction chamber, evacuate to 0.1-5 Torr, and introduce nitrogen or inert gas;
  • Step S3 Then, at 550-650°C, silane and oxygen are introduced into the reaction chamber at a rate of 10 sccm and 20 sccm, respectively, for a duration of 0.010 s, and the cycle is introduced 1000 times to deposit dioxide on the substrate Silicon forms a low refractive index L layer, and the thickness of the low refractive index L layer is 20-50nm;
  • Step S4 Stop feeding silane and oxygen as the raw material gases, purge the reaction chamber with nitrogen or inert gas, and perform surface modification by plasma bombardment;
  • Step S5 At 700-800°C, NbCl 5 and ozone are introduced into the reaction chamber at a rate of 20 sccm and 20 sccm, respectively.
  • the ventilation time is 0.01 s, and the cycle is introduced 1000 times.
  • the reaction is in the low refractive index L layer.
  • a high refractive index H layer Nb 2 O 5 is deposited on it, and the thickness of the high refractive index H layer is 10-100 nm;
  • Step S6 Stop feeding NbCl 5 and ozone, and purge the reaction chamber with nitrogen or inert gas;
  • Step S7 Cool to room temperature to obtain optical elements with different refractive index coatings.
  • the batch production product size is 80*76*0.21mm, one card is 156 pieces, and the particle condition is monitored by a metallurgical microscope. No particles with a particle size> 1 ⁇ m are observed on all cover plates; further observation of the particle size is not Particles with a particle size> 10nm are observed.
  • a camera module includes a CLCC package body; the CLCC package body includes a substrate 1 on which a CMOS 2 located in the middle and a capacitor resistor 3 and a drive motor 4 located at the edge are attached.
  • An isolation wall base 5 is provided on the substrate 1.
  • the isolation wall base 5 is provided with CMOS sensor vacancies, capacitor resistor vacancies, and drive motor vacancies at positions corresponding to CMOS 2, capacitor resistor 3 and drive motor 4 on the substrate.
  • a cover plate 6 is installed on the upper surface of the vacant position of the CMOS sensor; the surface particle size of the cover plate 6 is less than or equal to 100 nm, and the roughness Ra is 5.962 nm.
  • the cover plate is a camera module optical element covered with a MgF 2 low refractive index L1 layer, Al 2 O 3 high refractive index H layer, and SiO 2 low refractive index L2 layer on a glass substrate.
  • MgF 2 low refractive index L1 layer thickness is 10-20nm, refractive index is 1.35-1.4;
  • Al 2 O 3 high refractive index H layer thickness is 100-200nm, refractive index is 1.54-1.62;
  • SiO 2 low refractive index L2 layer thickness is 200 -300nm, the refractive index is 1.45-1.47.
  • the above-mentioned cover plate adopts CVD preparation method, and the process is as follows:
  • Step S1 pre-processing, firstly, the sapphire substrate is cleaned in an ultrasonic cleaning machine for 60 minutes and dried to obtain a pre-processed substrate;
  • Step S2 Put the pretreated sapphire substrate into the reaction chamber, evacuate to 0.1-5 Torr, and introduce nitrogen or inert gas;
  • Step S3 Then, Cp 2 Mg (magnesocene) and fluorine gas (F 2 ) are introduced into the reaction chamber at a rate of 80 sccm and 80 sccm at a temperature of 500-700°C. Enter 800 times, deposit MgF 2 on the base substrate to form a low refractive index L1 layer, the thickness of the low refractive index L1 layer is 10-20nm;
  • Step S4 Stop feeding Cp 2 Mg (magnesocene) and fluorine gas (F 2 ), purge the reaction chamber with nitrogen or inert gas, and perform surface modification by plasma bombardment;
  • Step S5 At 600-750°C, Al(CH 3 ) 3 and CO 2 are introduced into the reaction chamber at a rate of 90 sccm and 60 sccm, respectively.
  • the aeration time is 0.015 s, and the cycle is introduced 2000 times.
  • a high refractive index H layer Al 2 O 3 is deposited on the low refractive index L layer, and the high refractive index H layer has a thickness of 100-200 nm;
  • Step S6 Stop feeding Al(CH 3 ) 3 and CO 2 , and purge the reaction chamber with nitrogen or inert gas;
  • Step S7 Then, at 650-700°C, silane and oxygen are introduced into the reaction chamber at a rate of 80 sccm and 80 sccm, respectively, for a ventilation time of 0.025s, and the cycle is introduced 3000 times to deposit dioxide on the substrate. Silicon forms a low refractive index L2 layer, and the thickness of the low refractive index L2 layer is 200-300nm;
  • Step S8 Stop feeding the raw material gases silane and oxygen, and purge the reaction chamber with nitrogen or inert gas;
  • Step S9 Cool to room temperature to obtain optical elements with different refractive index coatings.
  • a batch of original tablets with a diameter of 200mm was produced, a total of 21 tablets in one card.
  • the particle condition was monitored by a metallurgical microscope. No particles with a particle size> 1 ⁇ m were observed on all the cover plates, and the pass rate was 100%; further observation of the particle size , No particles with a particle size >100nm were observed.
  • the target product of this embodiment is the same as that of the first embodiment, and the process of the vacuum thermal evaporation preparation method adopted is as follows:
  • Step S1 Firstly, the substrate glass is placed in the fixture, the fixture is placed on the umbrella stand, and the umbrella stand is placed in the chamber of the coating machine.
  • Step S2 Put SiO 2 (silicon dioxide) and TiO 2 (titanium dioxide) into the crucibles on the left and right of the machine cavity respectively, close the door, vacuum to 0.0001-0.001Pa, and set the temperature at 50-400°C Within the range, the machine cavity is always in the pumping range.
  • Step S3 Turn on the electron gun where the SiO 2 (silicon dioxide) is located.
  • the electron gun will end the operation according to the set film thickness. When this thickness is reached, the operation will end, and the remaining molecules will be pumped away by the gas; TiO 2 (titanium dioxide)
  • the electron gun in the) position will automatically open for coating.
  • Step S4 The machine will carry out cyclic coating according to the set number of coating layers.
  • the product of the comparative example was monitored by a metallurgical microscope. The result is shown in Fig. 6, and the dot defect with a particle size ⁇ 5 ⁇ m can be observed. After batch test, the product obtained by the preparation method has a defect rate of 70% due to dot defects (particle size ⁇ 5 ⁇ m).

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Abstract

一种消除摄像模组点子缺陷的CVD制备方法，能够从根本上解决点子的生成途径，不产生粒径在微米级别的点子缺陷。还提供了利用上述制备方法得到的多层膜结构、封装体盖板、CLCC封装体以及摄像模组，极大地减少由于点子缺陷引起的不良。

Description

一种减少摄像模组点子缺陷的CVD制备方法及其产物 技术领域
本发明涉及摄像模组技术领域，尤其涉及一种减少摄像模组点子缺陷的CVD制备方法及其产物。
背景技术
随着智能终端、车载、扫描仪、智能手机、投影仪、安防监控等产业对高清摄像要求的不断提高,以及增强现实、3D技术和手势识别技术在人工智能领域的广泛应用,光学镜头及摄像模组产业在高速发展的同时也不断进行技术的创新迭代，以满足新的应用要求。
点子是出现在光学镜头及摄像模组中的一种不良缺陷，指的是在基片表面形成的点状突起，有时也称之为颗粒(particle)。点子主要是在当前的光学镀膜工艺(即真空热蒸发和磁控溅射)中，不可避免地会出现大颗粒膜料点随着膜料蒸蒸气或者溅射粒子一起沉积到基片的表面而形成的。有时是个别点，严重时是成片的细点，大颗粒点甚至可以打伤基片表面，且会严重地影响成像效果。因此，为了保证成像效果，当前大部分厂家都要求光学元件中的点子不得超过5μm的点子。
然而，目前几乎所有的光学元件表面都要镀制各种各样的薄膜以实现特定的光学性能，即在光学零件表面上镀上一层或多层金属或介质薄膜的工艺过程，以达到减少或增加光的反射、分束、分色、滤光、 偏振等要求；而光学镀膜工艺主要采用的是真空热蒸发(蒸镀)和磁控溅射，尚没有能够控制或者减少点子的有效手段。
真空热蒸发是在真空条件下，加热蒸发物质使之气化并沉积在基片表面形成固体薄膜，其过程如下：(1)采用各种形式的热能转换方式(如电阻加热、电子加热、高频感应加热、电弧加热、激光加热等)，使镀膜材料粒子蒸发或升华，成为具有一定能量的气态粒子；(2)气态粒子通过基本上无碰撞的直线运动方式传输到基体；(3)粒子沉积在基体表面上并凝聚成薄膜；(4)组成薄膜的原子重新排列或化学键合发生变化。由于加热和凝聚过程无法做到绝对均匀，因此无可避免地会出现大液滴或者大颗粒，因此光学镀膜中的点子缺陷无法有效控制，极有可能出现粒径超过5μm的点子，这是当前影响合格率的重要因素。
磁控溅射是在真空中利用荷能粒子轰击靶表面，使被轰击出的粒子沉积在基片上的技术，其过程如下：(1)电子在电场E的作用下，在飞向基片过程中与氩原子发生碰撞，使其电离产生出Ar正离子和新的电子；(2)新电子飞向基片，Ar离子在电场作用下加速飞向阴极靶，并以高能量轰击靶表面，使靶材发生溅射；(3)在溅射粒子中，中性的靶原子或分子沉积在基片上形成薄膜。同样的，在轰击靶材的过程中，极有可能产生大颗粒，进而沉积在基片上形成点子，也无法有效控制。
因此，在光学镜头及摄像模组的工业化生产中，缺乏控制点子缺陷的产生和数量的有效控制途径，降低了产品的合格率，增加了生产 成本，需要开发更优化的生产工艺。
发明内容
本发明的目的之一在于针对现有技术的不足，提供一种减少摄像模组点子缺陷的CVD制备方法，能够从根本上解决点子的生成途径，不产生粒径在微米级别的点子缺陷。
本发明的目的之二在于提供利用上述制备方法得到的多层膜结构、封装体盖板、CLCC封装体以及摄像模组，极大地减少由于点子缺陷引起的不良。
为实现上述目的，本发明的技术方案如下：
S1：将衬底基板通过超声清洗、烘干，得到预处理的衬底基板；
S2：将经预处理的衬底基板放入到反应腔内，抽真空，通入氮气或惰性气体至微正压；
S3：在500-700℃下，同时通入前驱体Ⅰ和前驱体Ⅱ，所述硅烷的流量为10～80sccm，所述氧气的流量为20～80sccm，在衬底基板上沉积形成低折射率L层；
S4：停止通入前驱体Ⅰ和前驱体Ⅱ，用氮气或惰性气体吹扫反应腔；
S5：在600～800℃条件下，通入原料气体前驱体Ⅲ和前驱体Ⅳ，所述前驱体Ⅲ的流量为20-90sccm，所述前驱体Ⅳ的流量为20-60sccm，在低折射率L层上沉积高折射率H层；
S6：停止通入原料气体前驱体Ⅲ和前驱体Ⅳ，用氮气或惰性气体吹扫反应腔；
S7：冷却至室温，得到具有不同折射率镀膜的光学元件；所述高折射率H层的折射率>所述低折射率L层的折射率。
进一步的，上述制备方法中，还包括周期性重复的步骤S3～S4和/或S5～S6。
进一步的，上述制备方法中，所述光学元件的镀膜组合包括以下几种：SiO 2低折射率L层与TiO 2高折射率H层；SiO 2低折射率L层与Nb 2O 5高折射率H层；SiO 2低折射率L层+Ta 3O 5高折射率H层；MgF 2低折射率L层与TiO 2高折射率H层；MgF 2低折射率L层与Nb 2O 5高折射率H层；Nb 2O 5低折射率L层与Ta 3O 5高折射率H层；MgF 2低折射率L层、Al 2O 3高折射率H层与SiO 2低折射率L层；Al 2O 3低折射率L层、H4高折射率H层与MgF 2低折射率L层；Al 2O 3低折射率L层、ZrO 2高折射率H层与MgF 2低折射率L层。
进一步的，上述制备方法中，在双组份材料膜结构中，所述高折射率H层的折射率与所述低折射率L层的折射率之差≥0.5。两层的折射率差越大，光学性能越好。但是折射率差越大的，采用一步工艺实现的难度更大。
进一步的，上述制备方法中，所述衬底基板为玻璃、水晶或者蓝宝石基板。
进一步的，上述制备方法中，所述前驱体Ⅰ为SiH 4、SiHCl 3、SiCl 2H 2、SiCl 4、Al(CH 3) 3，Cp 2Mg中的一种，所述前驱体Ⅱ为O 2、O 3、CO 2、CO、NO 2、NO、H 2O、F 2中的一种或几种，所述前驱体Ⅲ为TiH 4、TiCl 4、NbCl 5、TaCl 5、ZrCl 4中的一种，所述前驱体Ⅳ为为 O 2、O 3、CO 2、CO、NO 2、NO、H 2O、F 2中的一种或几种。
一种多层膜结构，其特征在于，所述多层膜结构由上述CVD制备方法制备。
进一步的，上述多层膜结构中尺寸≥1μm的点子数量为0。
进一步的，上述多层膜结构的表面粗糙度Ra范围为0.01nm～20nm。
一种CLCC封装体盖板，其特征在于，所述封装体盖板包括盖板衬底与覆盖于盖板衬底之上的功能膜，所述功能膜包括多层膜结构；所述多层膜结构通过上述CVD制备方法实现沉积。
一种CLCC封装体，其特征在于，所述所述CLCC封装体包括一基板，所述的基板上贴装有位于中部的CMOS及位于边缘位置的电容电阻和驱动马达，所述的基板上设有一隔离墙底座，所述的隔离墙底座上对应基板上CMOS、电容电阻和驱动马达的位置分别设有CMOS传感器空位、电容电阻空位及驱动马达空位，所述的CMOS传感器空位上表面安装一如上所述的盖板。
一种摄像模组，其特征在于，所述摄像模组包括一如上述CLCC封装体。
该技术方案产生的有益效果如下：
(1)通过CVD(Chemical vapor deposition，化学气相沉积)可以一次性实现光学元件多层高、低折射率膜层的交替沉积，反应物料以气相形式在反应腔反应沉积到衬底基板上，不存在蒸发或者溅射过程，消除了点子缺陷的来源，因此不会形成大颗粒的点子缺陷，从而 大大提高了摄像模组的成像品质，使得CVD在摄像模组的加工过程得到了具有实际性操作意义的应用。
(2)本发明提供的产品，通过化学气相沉积实现光学元件多层镀膜，反应物料不存在蒸发或者溅射过程，是通过气相反应沉积到衬底基板上，因此不会形成大颗粒的点子缺陷，从而大大提高了摄像模组的成像品质，提升了产品合格率，且光学镀膜更加平滑，牢固度更高，实用性更强。
(3)本发明的盖板通过表面的精细控制，保证表面不出现大尺寸的点子，远远低于现有技术的5μm要求，克服了限制CMOS像素提高的不利因素，极大地提高了CLCC封装体和摄像模组的像素水平。
附图说明
图1是本发明涉及的多层膜结构的示意图；
图2是本发明涉及的CLCC封装体结构示意图；
图3是实施例1的盖板在金相显微镜目镜10X、物镜100X下的示意图；
图4是实施例1的盖板表面的AFM图；
图5是实施例1的盖板表面的三维AFM图；
图6是对比例的盖板在金相显微镜目镜10X、物镜100X下的示意图。
标注说明：1，基板；2，CMOS；3，电容电阻；4，驱动马达；5，隔离墙底座；6，盖板。
具体实施方式
下面结合附图及实施方式对本发明做进一步说明。本文中所述的折射率设定为在He光源的d线下获得，所述的d线波长为587.56 nm。
一种减少摄像模组点子缺陷的CVD制备方法，其特征在于，包括如下步骤：
S1:将衬底基板通过超声清洗、烘干，得到预处理的衬底基板；
S2：将经预处理的衬底基板放入到反应腔内，抽真空，通入氮气或惰性气体至微正压；
S3：在500-700℃下，同时通入前驱体Ⅰ和前驱体Ⅱ，所述硅烷的流量为10～80sccm，所述氧气的流量为20～80sccm，在衬底基板上沉积形成低折射率L层；
S4：停止通入前驱体Ⅰ和前驱体Ⅱ，用氮气或惰性气体吹扫反应腔；
S5：在600～800℃条件下，通入原料气体前驱体Ⅲ和前驱体Ⅳ，所述前驱体Ⅲ的流量为20-90sccm，所述前驱体Ⅳ的流量为20-60sccm，在低折射率L层上沉积高折射率H层；
S6：停止通入原料气体前驱体Ⅲ和前驱体Ⅳ，用氮气或惰性气体吹扫反应腔；
S7：冷却至室温，得到具有不同折射率镀膜的光学元件；所述高 折射率H层的折射率>所述低折射率L层的折射率。上述光学元件可通过二次热处理、等离子处理等进一步提高光学性能。
进一步的，上述制备方法中，还包括周期性重复的步骤S3～S4和/或S5～S6。
进一步的，上述制备方法中，所述光学元件的镀膜组合包括以下几种：SiO 2低折射率L层与TiO 2高折射率H层；SiO 2低折射率L层与Nb 2O 5高折射率H层；SiO 2低折射率L层+Ta 3O 5高折射率H层；MgF 2低折射率L层与TiO 2高折射率H层；MgF 2低折射率L层与Nb 2O 5高折射率H层；Nb 2O 5低折射率L层与Ta 3O 5高折射率H层；MgF 2低折射率L层、Al 2O 3高折射率H层与SiO 2低折射率L层；Al 2O 3低折射率L层、H4高折射率H层与MgF 2低折射率L层；Al 2O 3低折射率L层、ZrO 2高折射率H层与MgF 2低折射率L层。
进一步的，上述制备方法中，在双组份材料膜结构(即结构中只含有由两种材料制成的膜)中，所述高折射率H层的折射率与所述低折射率L层的折射率之差≥0.5。两层的折射率差越大，光学性能越好。
进一步的，上述制备方法中，所述衬底基板为玻璃、水晶或者蓝宝石基板。
进一步的，上述制备方法中，所述前驱体Ⅰ为SiH 4、SiHCl 3、SiCl 2H 2、SiCl 4、Al(CH 3) 3，Cp 2Mg中的一种，所述前驱体Ⅱ为O 2、O 3、CO 2、CO、NO 2、NO、H 2O、F 2中的一种或几种，所述前驱体Ⅲ为TiH 4、TiCl 4、NbCl 5、TaCl 5、ZrCl 4中的一种，所述前驱体Ⅳ为为 O 2、O 3、CO 2、CO、NO 2、NO、H 2O、F 2中的一种或几种。
一种多层膜结构，如图1所示，由上述ALD制备方法制备，其尺寸≥1μm的点子数量为0，表面粗糙度Ra范围为0.01nm～20nm。在ALD制备方法中，每层膜结构沉积完成后、下一层膜结构沉积进行前，包括用等离子体对当前沉积层进行轰击改性。改性采用的等离子体电压为100-1000V、电流100-1000mA，时间以1-2分钟为宜，否则有可能影响已沉积膜层的性能与厚度。
一种CLCC封装体盖板，包括盖板衬底与覆盖于盖板衬底之上的功能膜，所述功能膜包括多层膜结构；所述多层膜结构通过上述ALD制备方法实现沉积，每层膜结构沉积完成后、下一层膜结构沉积进行前，包括用等离子体对当前沉积层进行轰击改性。常规ALD沉积工艺仅适用于单层膜沉积，在沉积多层膜结构过程中，当前一层膜实现沉积之后，由于沉积表面发生了变化，会出现后一层膜无法成功沉积的情况，本发明通过在每层膜结构后的等离子体轰击表面改性，实现了多层膜的成功沉积。
一种CLCC封装体，如图2所示，CLCC封装体包括一基板1，所述的基板1上贴装有位于中部的CMOS 2及位于边缘位置的电容电阻3和驱动马达4，所述的基板1上设有一隔离墙底座5，所述的隔离墙底座5上对应基板上CMOS 2、电容电阻3和驱动马达4的位置分别设有CMOS传感器空位、电容电阻空位及驱动马达空位，所述的CMOS传感器空位上表面安装一盖板6。
一种摄像模组，包括一如上述CLCC封装体。
实施例1
一种摄像模组，包含一CLCC封装体；CLCC封装体包括一基板1，所述的基板1上贴装有位于中部的CMOS 2及位于边缘位置的电容电阻3和驱动马达4，所述的基板1上设有一隔离墙底座5，所述的隔离墙底座5上对应基板上CMOS 2、电容电阻3和驱动马达4的位置分别设有CMOS传感器空位、电容电阻空位及驱动马达空位，所述的CMOS传感器空位上表面安装一盖板6；盖板6的表面颗粒尺寸≤10nm，粗糙度Ra为1.135nm，如图3～5所示。
上述盖板为玻璃基板上覆有二氧化硅低折射率层L以及二氧化钛高折射率层H的摄像模组光学元件。低折射率层L层厚为100-200nm，折射率为1.46-1.50；高折射率层H层厚为350-650nm，折射率为2.28-2.35。
上述盖板采用CVD制备方法，过程如下：
步骤S1：预处理，首先将玻璃衬底基板置于超声波清洗机中清洗60min，烘干，得到预处理的衬底基板；
步骤S2：将经预处理的玻璃衬底基板放入到反应腔内，抽真空至0.1-5Torr，通入氮气或惰性气体；
步骤S3：然后在650-700℃，分别以60sccm和30sccm的速率向所述的反应腔内脉冲通入硅烷和氧气，通气时长为0.015s，循环通入2000次，在衬底基板上沉积二氧化硅形成低折射率L层，低折射率L层厚度为100-200nm；
步骤S4：停止通入原料气体硅烷和氧气，用氮气或惰性气体吹扫反应腔，通过等离子轰击进行表面改性；
步骤S5：在700-800℃，分别以30sccm和30sccm的速率向所述的反应腔内通入TiCl 4和O 2，通气时长为0.015s，循环通入2000次，通过反应在低折射率L层上沉积出高折射率H层TiO 2，高折射率H层厚度为350-650nm；
步骤S6：停止通入原料气体TiCl 4和O 2，用氮气或惰性气体吹扫反应腔；
步骤S7：冷却至室温，得到具有不同折射率镀膜的光学元件。
本实施例批次生产直径直径300mm，一卡12片，通过金相显微镜监测颗粒情况，所有盖板未观察到粒径>1μm的颗粒，合格率100％；进一步对颗粒尺寸进行观察，未观察到粒径>10nm的颗粒。
实施例2
一种摄像模组，包含一CLCC封装体；CLCC封装体包括一基板1，所述的基板1上贴装有位于中部的CMOS 2及位于边缘位置的电容电阻3和驱动马达4，所述的基板1上设有一隔离墙底座5，所述的隔离墙底座5上对应基板上CMOS 2、电容电阻3和驱动马达4的位置分别设有CMOS传感器空位、电容电阻空位及驱动马达空位，所述的CMOS传感器空位上表面安装一盖板6；盖板6的表面颗粒尺寸≤10nm，粗糙度Ra为0.433nm。
上述盖板为水晶基板上覆有SiO 2低折射率层L以及Nb 2O 5高折射率层H的摄像模组光学元件。低折射率层L层厚为20-50nm，折射率为1.46-1.50；高折射率层H层厚为10-100nm，折射率为2.1-2.3。
上述盖板采用CVD制备方法，过程如下：
步骤S1：预处理，首先将水晶衬底基板置于超声波清洗机中清洗60min，烘干，得到预处理的衬底基板；
步骤S2：将经预处理的水晶衬底基板放入到反应腔内，抽真空至0.1-5Torr，通入氮气或惰性气体；
步骤S3：然后在550-650℃，分别以10sccm和20sccm的速率向所述的反应腔内通入硅烷和氧气，通气时长为0.010s，循环通入1000次，在衬底基板上沉积二氧化硅形成低折射率L层，低折射率L层厚度为20-50nm；
步骤S4：停止通入原料气体硅烷和氧气，用氮气或惰性气体吹扫反应腔，通过等离子轰击进行表面改性；
步骤S5：在700-800℃，分别以20sccm和20sccm的速率向所述的反应腔内通入NbCl 5和臭氧，通气时长为0.01s，循环通入1000次，通过反应在低折射率L层上沉积出高折射率H层Nb 2O 5，高折射率H层厚度为10-100nm；
步骤S6：停止通入NbCl 5和臭氧，用氮气或惰性气体吹扫反应腔；
步骤S7：冷却至室温，得到具有不同折射率镀膜的光学元件。
本实施例批次生产产品尺寸80*76*0.21mm，一卡156片，通过金相显微镜监测颗粒情况，所有盖板未观察到粒径>1μm的颗粒；；进一步对颗粒尺寸进行观察，未观察到粒径>10nm的颗粒。
实施例3
一种摄像模组，包含一CLCC封装体；CLCC封装体包括一基板1，所述的基板1上贴装有位于中部的CMOS 2及位于边缘位置的电容电阻3和驱动马达4，所述的基板1上设有一隔离墙底座5，所述的隔离墙底座5上对应基板上CMOS 2、电容电阻3和驱动马达4的位置分别设有CMOS传感器空位、电容电阻空位及驱动马达空位，所述的CMOS传感器空位上表面安装一盖板6；盖板6的表面颗粒尺寸≤100nm，粗糙度Ra为5.962nm。
上述盖板为玻璃基板上覆有MgF 2低折射率L1层、Al 2O 3高折射率H层与SiO 2低折射率L2层的摄像模组光学元件。MgF 2低折射率L1层厚10-20nm，折射率为1.35-1.4；Al 2O 3高折射率H层厚100-200nm，折射率为1.54-1.62；SiO 2低折射率L2层厚为200-300nm，折射率为1.45-1.47。
上述盖板采用CVD制备方法，过程如下：
步骤S1：预处理，首先将蓝宝石衬底基板置于超声波清洗机中清洗60min，烘干，得到预处理的衬底基板；
步骤S2：将经预处理的蓝宝石衬底基板放入到反应腔内，抽真空至0.1-5Torr，通入氮气或惰性气体；
步骤S3：然后在500-700℃，分别以80sccm和80sccm的速率向所述的反应腔内通入Cp 2Mg(二茂镁)和氟气(F 2)，通气时长为0.005s，循环通入800次，在衬底基板上沉积MgF 2形成低折射率L1层，低折射率L1层厚度为10-20nm；
步骤S4：停止通入Cp 2Mg(二茂镁)和氟气(F 2)，用氮气或惰性气体吹扫反应腔，通过等离子轰击进行表面改性；
步骤S5：在600-750℃，分别以90sccm和60sccm的速率向所述的反应腔内通入Al(CH 3) 3和CO 2，通气时长为0.015s，循环通入2000次，通过反应在低折射率L层上沉积出高折射率H层Al 2O 3，高折射率H层厚度为100-200nm；
步骤S6：停止通入Al(CH 3) 3和CO 2，用氮气或惰性气体吹扫反应腔；
步骤S7：然后在650-700℃，分别以80sccm和80sccm的速率向所述的反应腔内通入硅烷和氧气，通气时长为0.025s，循环通入3000次，在衬底基板上沉积二氧化硅形成低折射率L2层，低折射率L2层厚度为200-300nm；
步骤S8：停止通入原料气体硅烷和氧气，用氮气或惰性气体吹扫反应腔；
步骤S9：冷却至室温，得到具有不同折射率镀膜的光学元件。
本实施例批次生产直径200mm的原片，一卡共21片，通过金相显微镜监测颗粒情况，所有盖板未观察到粒径>1μm的颗粒，合格率100％；进一步对颗粒尺寸进行观察，未观察到粒径>100nm的颗粒。
对比实施例
本实施例的目标产品与实施例一相同，采用的真空热蒸发制备方法过程如下：
步骤S1：首先把衬底基板玻璃放置在夹具中，夹具置于伞架上，伞架放置镀膜机腔中。
步骤S2：将SiO 2(二氧化硅)和TiO 2(二氧化钛)分别放入机腔中左边和右边的坩埚中，关上仓门，抽真空至0.0001-0.001Pa，温度设定在50-400℃范围内，机腔内一直处在抽气的范围。
步骤S3：打开SiO 2(二氧化硅)所在的位置的电子枪，电子枪会根据设定的膜厚厚度，达到这个厚度就会结束运作，结束后剩余的分子会被气体抽走；TiO 2(二氧化钛)位置的电子枪就会自动打开进行镀膜。
步骤S4：机器会根据设定镀膜层数，进行循环镀膜。
对比实施例的产品通过金相显微镜监测点子情况，结果如图6所示，能够观察到粒径≥5μm的点子缺陷。经过批次试验，利用该制备方法所得产物由于点子缺陷(粒径≥5μm)引起的不良率为70％。
以上实施方式仅用于说明本发明，而并非对本发明的限制，有关技术领域普通技术人员，在不脱离本发明精神和范围的情况下，还可以做出各种变化和变型，因此所有等同的技术方案也属本发明的范畴，本发明专利保护范围应由权利要求限定。

Claims (12)

  1. 一种减少摄像模组点子缺陷的CVD制备方法，其特征在于，包括如下步骤：
    S1：将衬底基板通过超声清洗、烘干，得到预处理的衬底基板；
    S2：将经预处理的衬底基板放入到反应腔内，抽真空，通入氮气或惰性气体至微正压；
    S3：在500-700℃下，同时通入前驱体Ⅰ和前驱体Ⅱ，所述硅烷的流量为10～80sccm，所述氧气的流量为20～80sccm，在衬底基板上沉积形成低折射率L层；
    S4：停止通入前驱体Ⅰ和前驱体Ⅱ，用氮气或惰性气体吹扫反应腔；
    S5：在600～800℃条件下，通入原料气体前驱体Ⅲ和前驱体Ⅳ，所述前驱体Ⅲ的流量为20-90sccm，所述前驱体Ⅳ的流量为20-60sccm，在低折射率L层上沉积高折射率H层；
    S6：停止通入原料气体前驱体Ⅲ和前驱体Ⅳ，用氮气或惰性气体吹扫反应腔；
    S7：冷却至室温，得到具有不同折射率镀膜的光学元件；所述高折射率H层的折射率>所述低折射率L层的折射率。
  2. 根据权利要求1所述的减少摄像模组点子缺陷的CVD制备方法，其特征在于，还包括周期性重复的步骤S3～S4和/或S5～S6。
  3. 根据权利要求2所述的减少摄像模组点子缺陷的CVD制备方法，其特征在于，所述光学元件的镀膜组合包括以下几种：SiO 2低折射率L层与TiO 2高折射率H层；SiO 2低折射率L层与Nb 2O 5高折射率H 层；SiO 2低折射率L层+Ta 3O 5高折射率H层；MgF 2低折射率L层与TiO 2高折射率H层；MgF 2低折射率L层与Nb 2O 5高折射率H层；Nb2O5低折射率L层与Ta 3O 5高折射率H层；MgF 2低折射率L层、Al 2O 3高折射率H层与SiO 2低折射率L层；Al 2O 3低折射率L层、H4高折射率H层与MgF 2低折射率L层；Al 2O 3低折射率L层、ZrO 2高折射率H层与MgF 2低折射率L层。
  4. 根据权利要求3所述的减少摄像模组点子缺陷的CVD制备方法，其特征在于，在双组份材料膜结构中，所述高折射率H层的折射率与所述低折射率L层的折射率之差≥0.5。
  5. 根据权利要求1所述的减少摄像模组点子缺陷的CVD制备方法，其特征在于，所述衬底基板为玻璃、水晶或者蓝宝石基板。
  6. 根据权利要求3所述的减少摄像模组点子缺陷的CVD制备方法，其特征在于，所述前驱体Ⅰ为SiH 4、SiHCl 3、SiCl 2H 2、SiCl 4、Al(CH 3) 3，Cp 2Mg中的一种，所述前驱体Ⅱ为O 2、O 3、CO 2、CO、NO 2、NO、H 2O、F 2中的一种或几种，所述前驱体Ⅲ为TiH 4、TiCl 4、NbCl 5、TaCl 5、ZrCl 4中的一种，所述前驱体Ⅳ为为O 2、O 3、CO 2、CO、NO 2、NO、H 2O、F 2中的一种或几种。
  7. 一种多层膜结构，其特征在于，所述多层膜结构由权利要求1-6所述的消除摄像模组点子缺陷的CVD制备方法制备。
  8. 根据权利要求7所述的多层膜结构，其特征在于，所述多层膜结构中尺寸≥1μm的点子数量为0。
  9. 根据权利要求7所述的多层膜结构，其特征在于，所述多层膜结构 的表面粗糙度Ra范围为0.01nm～20nm。
  10. 一种CLCC封装体盖板，其特征在于，所述封装体盖板包括盖板衬底与覆盖于盖板衬底之上的功能膜，所述功能膜包括多层膜结构；所述多层膜结构通过权利要求1-6任一项所述的CVD制备方法实现沉积。
  11. 一种CLCC封装体，其特征在于，所述所述CLCC封装体包括一基板(1)，所述的基板(1)上贴装有位于中部的CMOS(2)及位于边缘位置的电容电阻(3)和驱动马达(4)，所述的基板(1)上设有一隔离墙底座(5)，所述的隔离墙底座(5)上对应基板上CMOS(2)、电容电阻(3)和驱动马达(4)的位置分别设有CMOS传感器空位、电容电阻空位及驱动马达空位，所述的CMOS传感器空位上表面安装一如权利要求10所述的盖板(6)。
  12. 一种摄像模组，其特征在于，所述摄像模组包括如权利要求11所述的CLCC封装体。
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