WO2021027112A1 - 一种显示面板及显示装置 - Google Patents
一种显示面板及显示装置 Download PDFInfo
- Publication number
- WO2021027112A1 WO2021027112A1 PCT/CN2019/116193 CN2019116193W WO2021027112A1 WO 2021027112 A1 WO2021027112 A1 WO 2021027112A1 CN 2019116193 W CN2019116193 W CN 2019116193W WO 2021027112 A1 WO2021027112 A1 WO 2021027112A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- retaining wall
- area
- top surface
- grooves
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
- H10K50/844—Encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/873—Encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
Definitions
- This application relates to the field of display technology, and in particular to a display panel and a display device.
- O-cut OLED display panel which is characterized by designing an O-shaped through hole in its non-edge display area. Under this O-shaped through hole, a camera, infrared sensor, earpiece, etc. can be placed. Since the position of the O-shaped through hole can be set at will, the position flexibility of the under-screen camera, infrared sensor, earpiece and other modules in the panel display area can be realized.
- TFE Thin Film Encapsulation
- TFE usually contains inorganic, organic, and inorganic laminated structures.
- Inorganic layers are usually deposited by techniques such as chemical vapor deposition (CVD), physical vapor deposition (PVD) or atomic layer deposition (ALD), and organic layers are printed by inkjet (Inkjet Print, IJP) method.
- CVD chemical vapor deposition
- PVD physical vapor deposition
- ALD atomic layer deposition
- IJP inkjet Print
- one or more retaining walls are usually set at the boundary, and the material is organic.
- the film layer was easily peeled off during the manufacturing process, which would cause the OLED device to fail.
- the existing display panel has the problem of film peeling.
- the present application provides a display panel and a display device to alleviate the technical problem of film peeling of the existing display panel.
- the present application provides a display panel, which includes a display area, a digging area, and a buffer area between the display area and the digging area; the display panel includes:
- a driving circuit layer is disposed on the substrate, and the driving circuit is not disposed in the buffer area and the digging area;
- the pixel definition layer is arranged on the driving circuit layer
- the light-emitting function layer is arranged on the pixel definition layer;
- a retaining wall located in the buffer zone and formed on the pixel definition layer
- An encapsulation layer arranged on the light-emitting function layer and the retaining wall;
- the contact area between the top surface of the retaining wall and the encapsulation layer is larger than the projection area of the orthographic projection of the top surface of the retaining wall on the substrate.
- At least one of a groove or a protrusion is formed on the top surface of the retaining wall.
- the grooves or protrusions are continuously arranged.
- the grooves or protrusions are discontinuously arranged.
- the grooves or the protrusions formed on the top surface of the retaining wall are in a row.
- the grooves or the protrusions formed on the top surface of the retaining wall are in multiple rows.
- the multiple rows of the grooves or the protrusions formed on the top surface of the retaining wall are crossed.
- the cross-sectional shape of the groove or protrusion is at least one of an inverted trapezoid, a square, or an arc.
- a plurality of rows of the retaining walls are formed in the buffer area, and at least one row of the retaining walls is formed with grooves on the top surface.
- a plurality of rows of the retaining walls are formed in the buffer area, and at least one row of the retaining walls is formed with protrusions on the top surface.
- the present application also provides a display device including a display panel, the display panel including a display area, a hole-cutting area, and a buffer area between the display area and the hole-cutting area; the display panel further includes:
- a driving circuit layer is disposed on the substrate, and the driving circuit is not disposed in the buffer area and the digging area;
- the pixel definition layer is arranged on the driving circuit layer
- the light-emitting function layer is arranged on the pixel definition layer;
- a retaining wall located in the buffer zone and formed on the pixel definition layer
- An encapsulation layer arranged on the light-emitting function layer and the retaining wall;
- the contact area between the top surface of the retaining wall and the encapsulation layer is larger than the projection area of the orthographic projection of the top surface of the retaining wall on the substrate.
- At least one of a groove or a protrusion is formed on the top surface of the retaining wall.
- the grooves or protrusions are continuously arranged.
- the grooves or protrusions are discontinuously arranged.
- the grooves or the protrusions formed on the top surface of the retaining wall are in a row.
- the grooves or the protrusions formed on the top surface of the retaining wall are in multiple rows.
- the plurality of rows of the grooves or the protrusions formed on the top surface of the retaining wall are crossed.
- the cross-sectional shape of the groove or protrusion is at least one of an inverted trapezoid, a square, or an arc.
- a plurality of rows of the retaining walls are formed in the buffer area, and at least one row of the retaining walls is formed with grooves on the top surface.
- a plurality of rows of the retaining walls are formed in the buffer area, and at least one row of the retaining walls is formed with protrusions on the top surface.
- the application provides a display panel and a display device.
- the display panel includes a display area, a hole-cutting area, and a buffer area between the display area and the hole-cutting area, wherein the pixels in the buffer area are defined
- One or more retaining walls are formed on the layer, the top surface of the retaining wall is provided with at least one groove or protrusion; the packaging layer is provided on the light-emitting function layer and the retaining wall, the top surface of the retaining wall and the packaging
- the contact area of the layer is larger than the projection area of the orthographic projection of the top surface of the retaining wall on the substrate; this application increases the top surface of the retaining wall by arranging grooves or protrusions on the top surface of the retaining wall in the buffer zone.
- the contact area between the surface and the encapsulation layer avoids the problem of film peeling between the retaining wall and the encapsulation layer.
- FIG. 1 is a schematic diagram of a film layer structure of a display panel provided by an embodiment of the application.
- FIG. 2 is a schematic cross-sectional view of the groove on the top surface of the retaining wall provided by the embodiment of the application.
- FIG. 3 is a first cross-sectional schematic diagram of a multi-row retaining wall provided by an embodiment of the application.
- Fig. 4 is a second cross-sectional schematic diagram of a multi-row retaining wall provided by an embodiment of the application.
- 5 to 8 are schematic diagrams of the surface structure of the groove on the top surface of the retaining wall provided by the embodiment of the application.
- 9 to 15 are schematic diagrams of the film structure produced in each step of the display panel production method provided by the embodiments of the application.
- the embodiments of the present application can alleviate it.
- a display panel 100 including a display area AA, a hole-cutting area WK, and a buffer zone HC between the display area AA and the hole-cutting WK area;
- the display panel 100 includes:
- the driving circuit layer 20 is disposed on the substrate 10, and the driving circuit 2 is not disposed in the buffer zone HC and the digging area WK;
- the pixel definition layer 29 is arranged on the driving circuit layer 20;
- the light-emitting function layer 30 is disposed on the pixel definition layer 29;
- the retaining wall 50 is located in the buffer zone HC and formed on the pixel definition layer 29;
- the encapsulation layer 40 is disposed on the light-emitting function layer 30 and the retaining wall 50;
- the contact area between the top surface of the retaining wall 50 and the encapsulation layer 40 is larger than the projection area of the orthographic projection of the top surface of the retaining wall 50 on the substrate 10.
- This embodiment provides a display panel.
- the display panel includes a display area, a cut-out area, and a buffer area between the display area and the cut-out area, wherein a pixel definition layer in the buffer area A retaining wall is formed on the top surface; the encapsulation layer is arranged on the light-emitting function layer and the retaining wall, and the contact area between the top surface of the retaining wall and the encapsulation layer is larger than the projection of the orthographic projection of the top surface of the retaining wall on the substrate Area; this embodiment avoids the problem of film peeling between the barrier wall and the packaging layer by increasing the contact area between the top surface of the barrier wall and the packaging layer.
- a retaining wall 50 is formed on the pixel definition layer 29 in the buffer zone HC, and a groove is formed on the top surface of the retaining wall 50.
- the driving circuit layer 20 is disposed on the substrate 10, and the driving circuit layer 20 includes a buffer layer 21, an active layer 22, and a gate insulation layer that are stacked.
- the buffer layer 21, the gate insulating layer 23, the interlayer insulating layer 25, the planarization layer 27 and the pixel definition layer 29 of the driving circuit layer 20, It extends from the display area AA to the buffer layer HC and the hole-cutting area WK, and the driving circuit 2 does not extend to the buffer layer HC and the hole-cutting area WK.
- an exposure and etching process is used to prepare a barrier wall 50 on the pixel definition layer 29 of the buffer zone HC, and the material of the barrier wall 50 is organic.
- the cross-sectional shape of the retaining wall 50 is a trapezoid, as shown in FIG. 1.
- the cross-sectional shape of the retaining wall may also be a square or other polygons.
- the pixel definition layer 29 and the planarization layer 27 are very sensitive to water and oxygen.
- nanoimprinting or laser etching is used to prepare grooves on the top surface of the retaining wall 50.
- the number of grooves may be one or more. In this embodiment, the number of grooves is preferably two. One, as shown in Figure 1.
- the cross-sectional shape of the groove is an inverted trapezoid, as shown in FIG. 1.
- the cross-sectional shape of the groove may be at least one of a square, an arc, or a triangle, as shown in FIG. 2.
- the light-emitting function layer 30 is disposed on the pixel definition layer 29 of the driving circuit layer 20, and the light-emitting function layer 30 includes a hole injection layer, a hole transport layer, Luminescent material layer, electron transport layer, electron injection layer and cathode layer (not shown).
- the encapsulation layer 40 is disposed on the light-emitting function layer 30 and the barrier wall 50, and the encapsulation layer 40 includes at least a first inorganic encapsulation layer 41 that is stacked. , The first organic encapsulation layer 42 and the second inorganic encapsulation layer 43.
- any process of physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD) is used, and the light-emitting function layer 30 and the barrier
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- the first inorganic encapsulation layer 41 is deposited on the wall 50, and the first inorganic encapsulation layer 41 is filled in the groove on the top surface of the retaining wall 50, increasing the top surface of the retaining wall 50 and the second
- the contact area of an inorganic encapsulation layer 41 effectively avoids the problem of film peeling between the barrier wall 50 and the first inorganic encapsulation layer 41; because the barrier wall is made of organic material, it is easy to contact the second An inorganic encapsulation layer peeled off.
- the first organic encapsulation layer 42 is prepared on the first inorganic encapsulation layer 41 by any process of inkjet printing, spray coating, or coating.
- the first organic encapsulation layer 42 Due to the blocking of the retaining wall 50, the first organic encapsulation layer 42 will not overflow into the buffer zone HC and the digging area WK, and the first organic encapsulation layer 42 is only correspondingly disposed on the light emitting On the functional layer 30.
- any process of physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD) is used again, and the first organic encapsulation layer 42 and The second inorganic encapsulation layer 43 is deposited on the retaining wall 50.
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- laser or exposure etching is used to remove the film layer of the retaining wall 50 near the direction of the excavation area WK to form a through hole;
- the flattening layer 27 and the pixel defining layer 29 on the inner side of the retaining wall 50 near the digging area WK have been removed, and then an encapsulation layer 40 is prepared, so in the digging area After the WK forms the through hole, external water and oxygen will not invade the light-emitting device through the planarization layer 27 and the pixel definition layer 29.
- the barrier wall on the pixel definition layer in the buffer zone, the first organic encapsulation layer is prevented from overflowing the edge during preparation; and the barrier wall is provided on the top surface of the barrier wall.
- Multiple grooves increase the contact area between the retaining wall and the first inorganic encapsulation layer, thereby effectively avoiding the problem of easy peeling of the film between the retaining wall and the first inorganic encapsulation layer.
- the flattening layer and the pixel definition layer on the inner side of the retaining wall close to the digging area are removed to solve the problem of external water The problem that oxygen invades the light emitting device through the planarization layer and the pixel definition layer.
- the difference from the above embodiment is that two retaining walls 50 are formed on the pixel definition layer 29 of the HC in the buffer zone, and the top surface of the retaining wall 50 Provided with bumps.
- the cross-sectional shape of the two retaining walls 50 may be one of polygons such as a trapezoid and a square. In this embodiment, a trapezoid is preferred, as shown in FIG. 3.
- the materials of the two retaining walls 50 are both organic matter.
- the number of the retaining walls may also be greater than two.
- the number of protrusions on the top surface of the retaining wall 50 may be one or more, and three are preferred in this embodiment, as shown in FIG. 3.
- the cross-sectional shape of the protrusion is at least one of polygons such as trapezoid, square, circular arc, or triangle. In this embodiment, a square is preferred.
- the retaining wall 50 is prepared on the pixel definition layer 29 of the buffer zone HC by using an exposure etching process; then, the retaining wall 50 is removed close to the trench by means of laser or exposure etching.
- the pixel defining layer 29 and the planarizing layer 27 inside the hole area prevent water and oxygen from outside from invading the light emitting device through the pixel defining layer and the planarizing layer.
- the protrusions are prepared on the top surface of the retaining wall by nano-imprinting or laser etching.
- two retaining walls are prepared on the pixel definition layer in the buffer zone, and protrusions are provided on the two retaining walls.
- this embodiment The contact area between the retaining wall and the packaging layer is larger, and the problem of film peeling between the retaining wall and the packaging layer is better avoided.
- the difference from FIG. 3 is that two retaining walls 50 are formed on the pixel definition layer in the buffer zone, and one of the retaining walls has a protrusion. There are no protrusions on the other retaining wall, and the number of the protrusions is preferably three.
- the number of the protrusions is preferably three.
- the display panel includes a display area, a digging area, and a buffer area between the display area and the digging area.
- the digging area may be located at any position in the display area, and the buffer area is arranged around the digging area.
- the opening formed in the excavation area WK may be circular, elliptical or polygonal, etc.
- the opening formed in the excavation area is preferably circular.
- one or more rows of retaining walls are arranged in the buffer zone, and the top surface of at least one row of retaining walls is provided with grooves or protrusions.
- a row of retaining walls is provided in the buffer zone, and the top surface of the retaining wall is provided with grooves or protrusions.
- the grooves or protrusions are in a row.
- the grooves or protrusions 51 are discontinuously arranged.
- the grooves or protrusions 51 are continuously arranged.
- the grooves or protrusions are in multiple rows.
- the grooves or protrusions are arranged discontinuously.
- the grooves or protrusions are continuously arranged, as shown in FIG. 7.
- the grooves or protrusions are in multiple rows, and the rows of grooves or protrusions are intersected, as shown in FIG. 8.
- the surface shape of the groove or protrusion may be a ring, an irregular arc, or a broken line.
- the top surface of the retaining wall is provided with grooves or protrusions, and the description is omitted.
- a method for manufacturing a display panel includes the following steps:
- a substrate 10 is provided, and a driving circuit layer 20 is prepared on the substrate 10, including a buffer layer 21, an active layer 22, a gate insulating layer 23, a gate layer 24, an interlayer 25, Source and drain layer 26, planarization layer 27, pixel electrode layer 28, and pixel definition layer 29; wherein said active layer 22, said gate layer 24, said source and drain layer 26 and said pixel electrode layer 28
- the driving circuit 2 is composed of the buffer layer 21, the gate insulating layer 23, the interlayer insulating layer 25, the planarization layer 27 and the pixel definition layer 29 of the driving circuit layer 20.
- the display area AA extends to the buffer layer HC and the hole-cutting area WK, and the driving circuit 2 does not extend to the buffer layer HC and the hole-cutting area WK, as shown in FIG. 9;
- Retaining wall preparation step using an exposure and etching process to prepare a retaining wall 5 on the pixel definition layer 29 of the buffer zone HC, the cross-sectional shape of the retaining wall 50 is trapezoidal, and the material of the retaining wall is organic , As shown in Figure 10;
- step of removing the pixel definition layer and the planarization layer removing the pixel definition layer 29 and the planarization layer 27 on the inner side of the retaining wall 50 near the excavation area WK by means of laser or exposure etching, as shown in FIG. 11 Show
- Groove preparation step prepare a groove on the top surface of the retaining wall 50 by nanoimprinting or laser etching, etc., the cross-sectional shape of the groove is an inverted trapezoid, and the number of grooves is two, such as As shown in Figure 12;
- a step of preparing a light-emitting functional layer preparing a light-emitting functional layer 30 on the pixel defining layer, as shown in FIG. 13;
- the encapsulation layer preparation step using any one of physical vapor deposition (PVD), chemical vapor deposition (CVD) or atomic layer deposition (ALD), etc., in the light-emitting function layer 30 and the barrier
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- the first inorganic encapsulation layer 41 is deposited on the wall 50, and the first inorganic encapsulation layer 41 is filled in the groove on the top surface 50 of the retaining wall; any process of inkjet printing, spraying or coating is adopted
- a first organic encapsulation layer 42 is prepared on the first inorganic encapsulation layer 41.
- the first organic encapsulation layer 42 Due to the blocking of the retaining wall 50, the first organic encapsulation layer 42 will not overflow into the buffer zone HC and the digging area WK, the first organic encapsulation layer 42 is only correspondingly disposed on the light-emitting functional layer 30; again, physical vapor deposition (PVD) or chemical vapor deposition (CVD) or atomic layer deposition (ALD) is used.
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- the second inorganic encapsulation layer 43 is deposited on the first organic encapsulation layer 42 and the retaining wall 50; as shown in FIG. 14;
- a retaining wall with a trapezoidal cross-sectional shape in the buffer zone it is preferable to prepare two grooves with an inverted trapezoidal cross-sectional shape on the top surface of the retaining wall. Limitations with this.
- a display device includes a display panel, the display panel includes a display area, a hole-cutting area, and a buffer area between the display area and the hole-cutting area ;
- the display panel also includes:
- a driving circuit layer is disposed on the substrate, and the driving circuit is not disposed in the buffer area and the digging area;
- the pixel definition layer is arranged on the driving circuit layer
- the light-emitting function layer is arranged on the pixel definition layer;
- a retaining wall located in the buffer zone and formed on the pixel definition layer
- An encapsulation layer arranged on the light-emitting function layer and the retaining wall;
- the contact area between the top surface of the retaining wall and the encapsulation layer is larger than the projection area of the orthographic projection of the top surface of the retaining wall on the substrate.
- the top surface of the retaining wall is formed with at least one of grooves or protrusions.
- the grooves or protrusions are continuously arranged.
- the grooves or protrusions are discontinuously arranged.
- the grooves or the protrusions formed on the top surface of the retaining wall are in a row.
- the grooves or the protrusions formed on the top surface of the retaining wall are in multiple rows.
- the multiple rows of the grooves or the protrusions formed on the top surface of the retaining wall have crosses.
- the cross-sectional shape of the groove or protrusion is at least one of an inverted trapezoid, a square, or an arc.
- a plurality of rows of the retaining walls are formed in the buffer zone, and grooves are formed on the top surface of at least one row of the retaining walls.
- a plurality of rows of the retaining walls are formed in the buffer zone, and at least one row of the retaining walls is formed with protrusions on the top surface.
- the display device includes a display panel.
- the display panel includes a display area, a hole-cutting area, and a buffer area between the display area and the hole-cutting area.
- a retaining wall is formed on the pixel definition layer in the buffer zone, and the top surface of the retaining wall is provided with grooves or protrusions; the packaging layer is arranged on the light-emitting function layer and the retaining wall, and the top surface of the retaining wall is The contact area of the encapsulation layer is larger than the projection area of the orthographic projection of the top surface of the retaining wall on the substrate; in this embodiment, the contact area between the top surface of the retaining wall and the encapsulation layer is increased to avoid the retaining wall.
- the problem of film peeling between the wall and the encapsulation layer is a problem of film peeling between the wall and the encapsulation layer.
- the present application provides a display panel, a manufacturing method thereof, and a display device.
- the display panel includes a display area, a hole-cutting area, and a buffer zone between the display area and the hole-cutting area, Wherein one or more retaining walls are formed on the pixel definition layer in the buffer zone, the top surface of the retaining wall is provided with at least one groove or protrusion; the encapsulation layer is arranged on the light-emitting function layer and the retaining wall, The contact area between the top surface of the retaining wall and the encapsulation layer is larger than the projection area of the orthographic projection of the top surface of the retaining wall on the substrate; the present application adopts the provision of grooves or protrusions on the top surface of the retaining wall in the buffer zone. Therefore, the contact area between the top surface of the retaining wall and the packaging layer is increased, and the problem of film peeling between the retaining wall and the packaging layer is avoided.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Manufacturing & Machinery (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
本申请提供一种显示面板和显示装置,其显示面板包括显示区、挖孔区以及位于显示区和挖孔区之间的缓冲区,在缓冲区内的像素定义层上形成一个或多个挡墙,挡墙顶面设置有凹槽或凸起,封装层设置于发光功能层及挡墙上;从而增大了挡墙顶面与封装层的接触面积,避免了挡墙与封装层之间膜层剥离的问题。
Description
本申请涉及显示技术领域,尤其涉及一种显示面板及显示装置。
现有一种新型O形切割(O-cut)OLED显示面板,其特点是在其非边缘显示区内设计一种O形通孔,此O形通孔下方可放置摄像头、红外传感器、听筒等模组,由于此O形通孔的位置可随意设置,因此可以实现屏下摄像头、红外传感器、听筒等模组在面板显示区域的位置灵活性。当前为了保证OLED面板的柔性,通常采用TFE(Thin Film
Encapsulation)技术对其进行封装保护。TFE通常包含无机、有机、无机叠层结构,无机层通常采用化学气相沉积法(CVD)、物理气相沉积法(PVD)或原子层沉积法(ALD)等技术沉积,有机层则采用喷墨打印(Inkjet Print,IJP)方式形成。为了防止喷墨打印在流平过程中溢出OLED边界,通常在边界处设置一个或多个挡墙,其材质为有机物。然而,由于挡墙与第一层无机封装层材质不同,在制程过程中发现此处易发生膜层剥离,进而导致OLED器件失效。
因此,现有显示面板存在膜层剥离的问题。
本申请提供一种显示面板及显示装置,以缓解现有显示面板存在膜层剥离的技术问题。
为解决上述问题,本申请提供的技术方案如下:
本申请提供一种显示面板,其包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区;所述显示面板包括:
衬底;
驱动电路层,设置于所述衬底上,且驱动电路未设置在所述缓冲区和所述挖孔区;
像素定义层,设置于所述驱动电路层上;
发光功能层,设置于像素定义层上;
挡墙,位于所述缓冲区内,且形成于所述像素定义层上;
封装层,设置于所述发光功能层及所述挡墙上;
其中,所述挡墙顶面与所述封装层的接触面积,大于所述挡墙顶面在所述衬底上正投影的投影面积。
在本申请实施例提供的显示面板中,所述挡墙顶面形成有凹槽或凸起中的至少一种。
在本申请实施例提供的显示面板中,所述凹槽或凸起连续设置 。
在本申请实施例提供的显示面板中,所述凹槽或凸起不连续设置 。
在本申请实施例提供的显示面板中,在所述挡墙顶面形成的所述凹槽或所述凸起为一列。
在本申请实施例提供的显示面板中,在所述挡墙顶面形成的所述凹槽或所述凸起为多列。
在本申请实施例提供的显示面板中,在所述挡墙顶面形成的多列所述凹槽或所述凸起有交叉。
在本申请实施例提供的显示面板中,所述凹槽或凸起的截面形状为倒梯形、方形或圆弧中的至少一种。
在本申请实施例提供的显示面板中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凹槽。
在本申请实施例提供的显示面板中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凸起。
本申请还提供一种显示装置,其包括显示面板,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区;所述显示面板还包括:
衬底;
驱动电路层,设置于所述衬底上,且驱动电路未设置在所述缓冲区和所述挖孔区;
像素定义层,设置于所述驱动电路层上;
发光功能层,设置于像素定义层上;
挡墙,位于所述缓冲区内,且形成于所述像素定义层上;
封装层,设置于所述发光功能层及所述挡墙上;
其中,所述挡墙顶面与所述封装层的接触面积,大于所述挡墙顶面在所述衬底上正投影的投影面积。
在本申请实施例提供的显示装置中,所述挡墙顶面形成有凹槽或凸起中的至少一种。
在本申请实施例提供的显示装置中,所述凹槽或凸起连续设置 。
在本申请实施例提供的显示装置中,所述凹槽或凸起不连续设置 。
在本申请实施例提供的显示装置中,在所述挡墙顶面形成的所述凹槽或所述凸起为一列。
在本申请实施例提供的显示装置中,在所述挡墙顶面形成的所述凹槽或所述凸起为多列。
在本申请实施例提供的显示装置中,在所述挡墙顶面形成的多列所述凹槽或所述凸起有交叉。
在本申请实施例提供的显示装置中,所述凹槽或凸起的截面形状为倒梯形、方形或圆弧中的至少一种。
在本申请实施例提供的显示装置中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凹槽。
在本申请实施例提供的显示装置中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凸起。
本申请提供一种显示面板和显示装置,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区,其中在所述缓冲区内的像素定义层上形成一个或多个挡墙,所述挡墙顶面设置有至少一个凹槽或凸起;封装层设置于发光功能层及所述挡墙上,所述挡墙顶面与所述封装层的接触面积大于所述挡墙顶面在衬底上正投影的投影面积;本申请通过在所述缓冲区内的挡墙顶面设置凹槽或凸起,增大了所述挡墙顶面与所述封装层的接触面积,避免了所述挡墙与所述封装层之间膜层剥离的问题。
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示面板膜层结构示意图。
图2为本申请实施例提供的挡墙顶面凹槽的截面示意图。
图3为本申请实施例提供的多列挡墙的第一种截面示意图。
图4为本申请实施例提供的多列挡墙的第二种截面示意图。
图5至图8为本申请实施例提供的挡墙顶面凹槽的表面结构示意图。
图9至图15为本申请实施例提供的显示面板制备方法中各步骤制得的膜层结构示意图。
以下各实施例的说明是参考附加的图示,用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本申请,而非用以限制本申请。在图中,结构相似的单元是用以相同标号表示。
针对现有显示面板存在膜层剥离的技术问题,本申请实施例可以缓解。
在一种实施例中,如图1所示,提供一种显示面板100,包括显示区AA、挖孔区WK以及位于所述显示区AA和所述挖孔WK区之间的缓冲区HC;所述显示面板100包括:
衬底10;
驱动电路层20,设置于所述衬底10上,且驱动电路2未设置在所述缓冲区HC和所述挖孔区WK;
像素定义层29,设置于所述驱动电路层20上;
发光功能层30,设置于像素定义层29上;
挡墙50,位于所述缓冲区HC内,且形成于所述像素定义层29上;
封装层40,设置于所述发光功能层30及所述挡墙50上;
其中,所述挡墙50顶面与所述封装层40的接触面积,大于所述挡墙50顶面在所述衬底10上正投影的投影面积。
本实施例提供了一种显示面板,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区,其中在所述缓冲区内的像素定义层上形成挡墙;所述封装层设置于发光功能层及所述挡墙上,所述挡墙顶面与所述封装层的接触面积大于所述挡墙顶面在衬底上正投影的投影面积;本实施例通过增大所述挡墙顶面与所述封装层的接触面积,避免了所述挡墙与所述封装层之间膜层剥离的问题。
在一种实施例中,如图1所示,所述缓冲区HC内的所述像素定义层29上形成挡墙50,所述挡墙50顶面形成有凹槽。
在一种实施例中,如图1所示,所述驱动电路层20设置于所述衬底10上,所述驱动电路层20包括层叠设置的缓冲层21、有源层22、栅极绝缘层23、栅极层24、层间绝缘层25、源漏极层26、平坦化层27、像素电极层28和像素定义层29;其中所述有源层22、所述栅极层24、所述源漏极层26和所述像素电极层28组成驱动电路2。
在一种实施例中,所述驱动电路层20的所述缓冲层21、所述栅极绝缘层23、所述层间绝缘层25、所述平坦化层27和所述像素定义层29,从所述显示区AA延伸至所述缓冲层HC和所述挖孔区WK,所述驱动电路2未延伸至所述缓冲层HC和所述挖孔区WK。
在一种实施例中,采用曝光蚀刻工艺,在所述缓冲区HC的所述像素定义层29上制备一个挡墙50,所述挡墙50的材质为有机物。
在一种实施例中,所述挡墙50的截面形状为梯形,如图1所示。
在一种实施例中,所述挡墙的截面形状还可以为方形或其它多边形。
在一种实施例中,所述挡墙50制备完成后,采用激光或曝光蚀刻等方式去除所述挡墙50靠近挖孔区WK内侧的像素定义层29和平坦化层27;因所述像素定义层29和所述平坦化层27的材质为有机物,有机物的阻隔水氧能力较差,去除掉此处的所述像素定义层29和所述平坦化层27能够有效切断外界水氧入侵到发光器件内,发光器件对水氧非常敏感。
在一种实施例中,采用纳米压印或激光蚀刻等方式在所述挡墙50顶面制备凹槽,所述凹槽的数量可以为一个或多个,本实施例优选凹槽数量为两个,如图1所示。
在一种实施例中,所述凹槽的截面形状为倒梯形,如图1所示。
在一种实施例中,所述凹槽的截面形状为还可以为方形、弧形或三角形中的至少一种,如图2所示。
在一种实施例中,所述发光功能层30设置于所述驱动电路层20的所述像素定义层29上,所述发光功能层30包括层叠设置的空穴注入层、空穴传输层、发光材料层、电子传输层、电子注入层和阴极层(图未示出)。
在一种实施例中,如图1所示,所述封装层40设置于所述发光功能层30及所述挡墙50上,所述封装层40至少包括层叠设置的第一无机封装层41、第一有机封装层42和第二无机封装层43。
在一种实施例中,采用物理气相沉积法(PVD)或化学气相沉积法(CVD)或原子层沉积法(ALD)等中的任一种工艺,在所述发光功能层30及所述挡墙50上沉积所述第一无机封装层41,且所述第一无机封装层41填充在所述挡墙50顶面的凹槽内,增大了所述挡墙50顶面与所述第一无机封装层41的接触面积,有效避免了所述挡墙50与所述第一无机封装层41之间膜层剥离的问题;因所述挡墙材质为有机物,容易与接触的所述第一无机封装层发生膜层剥离。
在一种实施例中,采用喷墨打印、喷涂或涂布中的任一工艺在所述第一无机封装层41上制备第一有机封装层42,在制备所述第一有机封装层42时,因所述挡墙50的阻挡,所述第一有机封装层42不会溢出到所述缓冲区HC和所述挖孔区WK,所述第一有机封装层42仅对应设置在所述发光功能层30上。
在一种实施例中,再次采用物理气相沉积法(PVD)或化学气相沉积法(CVD)或原子层沉积法(ALD)等中的任一种工艺,在所述第一有机封装层42及所述挡墙50上沉积所述第二无机封装层43。
在一种实施例中,在所述封装层40制备完成后,采用激光或曝光蚀刻等方式去除所述挡墙50靠近所述挖孔区WK方向的膜层,形成通孔;因在制备发光功能层30前,已经把所述挡墙50靠近所述挖孔区WK内侧的所述平坦化层27和所述像素定义层29去除掉,然后制备封装层40,故在所述挖孔区WK形成通孔后,外界水氧也不会经所述平坦化层27和所述像素定义层29入侵发光器件。
在本实施例中,通过在所述缓冲区内的所述像素定义层上设置所述挡墙,阻挡了所述第一有机封装层在制备时溢出边缘;而且在所述挡墙顶面设置多个凹槽,增大了所述挡墙和所述第一无机封装层之间的接触面积,从而有效避免了所述挡墙和所述第一无机封装层之间膜层易剥离的问题;同时,在所述挡墙制备完成后且所述封装层制备前,把所述挡墙靠近所述挖孔区内侧的所述平坦化层和所述像素定义层去除掉,解决了外界水氧经所述平坦化层和所述像素定义层入侵发光器件的问题。
在一种实施例中,如图3所示,不同于上述实施例的是,所述缓冲区内HC的所述像素定义层29上形成有两个挡墙50,所述挡墙50顶面设置有凸起。
在一种实施例中,所述两个挡墙50的截面形状可以为梯形、方形等多边形中的一种,本实施例优选梯形,如图3所示。
在一种实施例中,所述两个挡墙50的材质均为有机物。
在一种实施例中,所述挡墙的数量还可以大于两个。
在一种实施例中,所述挡墙50顶面的所述凸起数量可以为一个或多个,本实施例优选三个,如图3所示。
在一种实施例中,所述凸起的截面形状为梯形、方形、圆弧或三角形等多边形中至少一种,本实施例优选方形。
在一种实施例中,所述挡墙50采用曝光蚀刻工艺制备在所述缓冲区HC的所述像素定义层29上;然后采用激光或曝光蚀刻等方式去除所述挡墙50靠近所述挖孔区内侧的所述像素定义层29和所述平坦化层27,防止外界水氧经所述像素定义层和所述平坦化层入侵发光器件。
在一种实施例中,采用纳米压印或激光蚀刻等方式在所述挡墙顶面制备所述凸起。
在本实施例中,通过在所述缓冲区内的所述像素定义层上制备两个挡墙,并在两个挡墙上设置凸起,对比上述设置一个挡墙的实施例,本实施例的挡墙与封装层的接触面积更大,更好的避免了挡墙与封装层之间膜层剥离的问题。
在一种实施例中,如图4所示,区别于图3的地方是,所述缓冲区内的所述像素定义层上形成有两个挡墙50,其中一个挡墙上有凸起,另一个挡墙上没有凸起,所述凸起的数量优选三个,具体说明请参照上述实施例,在此不再赘述。
在一种实施例中,显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区。
在一种实施例中,所述挖孔区可以位于所述显示区内的任一位置,所述缓冲区围绕所述挖孔区设置。
在一种实施例中,如图5所示,所述挖孔区WK形成的开孔可以为圆形、椭圆或多边形等,本实施例优选挖孔区形成的开孔为圆形。
在一种实施例中,所述缓冲区内设置有一列或多列挡墙,其中至少一列的挡墙顶面设置有凹槽或凸起。
在一种实施例中,所述缓冲区内设置有一列挡墙,所述挡墙顶面设置有凹槽或凸起。
在一种实施例中,所述凹槽或凸起为一列。
在一种实施例中,如图5所示,所述凹槽或凸起51不连续设置。
在一种实施例中,如图6所示,所述凹槽或凸起51连续设置。
在一种实施例中,所述凹槽或凸起为多列。
在一种实施例中,所述凹槽或凸起不连续设置。
在一种实施例中,所述凹槽或凸起连续设置,如图7所示。
在一种实施例中,所述凹槽或凸起为多列,且所述多列凹槽或凸起有交叉,如图8所示。
在一种实施例中,所述凹槽或凸起的表面形状可以为圆环、不规则圆弧或折线等。
在一种实施例中,所述挡墙为多列时,挡墙顶面设置凹槽或凸起的表面形貌不再赘述。
在本实施例中,通过在挡墙顶面设置一列或多列凹槽或凸起,并把凹槽或凸起的表面形状设置成各种圆环、不规则圆弧或折线等,增大了挡墙与封装层的接触面积,避免了挡墙与封装层间膜层剥离的问题。
在一种实施例中,提供一种显示面板的制备方法,所述制备方法包括以下步骤:
S1,提供一衬底10,并在所述衬底10上制备驱动电路层20,包括层叠设置的缓冲层21、有源层22、栅极绝缘层23、栅极层24、层间25、源漏极层26、平坦化层27、像素电极层28和像素定义层29;其中所述有源层22、所述栅极层24、所述源漏极层26和所述像素电极层28组成驱动电路2,所述驱动电路层20的所述缓冲层21、所述栅极绝缘层23、所述层间绝缘层25、所述平坦化层27和所述像素定义层29,从所述显示区AA延伸至所述缓冲层HC和所述挖孔区WK,所述驱动电路2未延伸至所述缓冲层HC和所述挖孔区WK,如图9所示;
S2,挡墙制备步骤:采用曝光蚀刻工艺,在所述缓冲区HC的所述像素定义层29上制备一个挡墙5,所述挡墙50截面形状为梯形,所述挡墙的材质为有机物,如图10所示;
S3,像素定义层和平坦化层去除步骤:采用激光或曝光蚀刻等方式去除所述挡墙50靠近挖孔区WK内侧的所述像素定义层29和所述平坦化层27,如图11所示;
S4,凹槽制备步骤:采用纳米压印或激光蚀刻等方式在所述挡墙50顶面制备凹槽,所述凹槽的截面形状为倒梯形,所述凹槽的数量为两个,如图12所示;
S5,发光功能层制备步骤:在所述像素定义层上制备发光功能层30,如图13所示;
S6,封装层制备步骤:采用物理气相沉积法(PVD)或化学气相沉积法(CVD)或原子层沉积法(ALD)等中的任一种工艺,在所述发光功能层30及所述挡墙50上沉积所述第一无机封装层41,且所述第一无机封装层41填充在所述挡墙顶面50的凹槽内;采用喷墨打印、喷涂或涂布中的任一工艺在所述第一无机封装层41上制备第一有机封装层42,因所述挡墙50的阻挡,所述第一有机封装层42不会溢出到所述缓冲区HC和所述挖孔区WK,所述第一有机封装层42仅对应设置在所述发光功能层30上;再次采用物理气相沉积法(PVD)或化学气相沉积法(CVD)或原子层沉积法(ALD)等中的任一种工艺,在所述第一有机封装层42及所述挡墙50上沉积所述第二无机封装层43;如图14所示;
S7,挖孔区挖孔步骤:采用激光或曝光蚀刻等方式去除所述挡墙50靠近所述挖孔区WK方向的膜层,形成通孔,如图15所示。
在一种实施例中,本实施例提供的显示面板制备方法,优选在缓冲区制备一个截面形状为梯形的挡墙,在挡墙顶面制备两个截面形状为倒梯形的凹槽,但不局限与此。
在一种实施例中,还提供一种显示装置,所述显示装置包括显示面板,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区;所述显示面板还包括:
衬底;
驱动电路层,设置于所述衬底上,且驱动电路未设置在所述缓冲区和所述挖孔区;
像素定义层,设置于所述驱动电路层上;
发光功能层,设置于像素定义层上;
挡墙,位于所述缓冲区内,且形成于所述像素定义层上;
封装层,设置于所述发光功能层及所述挡墙上;
其中,所述挡墙顶面与所述封装层的接触面积,大于所述挡墙顶面在所述衬底上正投影的投影面积。
在一种实施例中,所述挡墙顶面形成有凹槽或凸起中的至少一种。
在一种实施例中,所述凹槽或凸起连续设置 。
在一种实施例中,所述凹槽或凸起不连续设置 。
在一种实施例中,在所述挡墙顶面形成的所述凹槽或所述凸起为一列。
在一种实施例中,在所述挡墙顶面形成的所述凹槽或所述凸起为多列。
在一种实施例中,在所述挡墙顶面形成的多列所述凹槽或所述凸起有交叉。
在一种实施例中,所述凹槽或凸起的截面形状为倒梯形、方形或圆弧中的至少一种。
在一种实施例中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凹槽。
在一种实施例中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凸起。
本实施例提供了一种显示装置,所述显示装置包括显示面板,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区,其中在所述缓冲区内的像素定义层上形成挡墙,所述挡墙顶面设置有凹槽或凸起;所述封装层设置于发光功能层及所述挡墙上,所述挡墙顶面与所述封装层的接触面积大于所述挡墙顶面在衬底上正投影的投影面积;本实施例通过增大所述挡墙顶面与所述封装层的接触面积,避免了所述挡墙与所述封装层之间膜层剥离的问题。
根据上述实施例可知:本申请提供一种显示面板及其制备方法和显示装置,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区,其中在所述缓冲区内的像素定义层上形成一个或多个挡墙,所述挡墙顶面设置有至少一个凹槽或凸起;封装层设置于发光功能层及所述挡墙上,所述挡墙顶面与所述封装层的接触面积大于所述挡墙顶面在衬底上正投影的投影面积;本申请通过在所述缓冲区内的挡墙顶面设置凹槽或凸起,增大了所述挡墙顶面与所述封装层的接触面积,避免了所述挡墙与所述封装层之间膜层剥离的问题。
综上所述,虽然本申请已以优选实施例揭露如上,但上述优选实施例并非用以限制本申请,本领域的普通技术人员,在不脱离本申请的精神和范围内,均可作各种更动与润饰,因此本申请的保护范围以权利要求界定的范围为准。
Claims (20)
- 一种显示面板,其包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区;所述显示面板包括:衬底;驱动电路层,设置于所述衬底上,且驱动电路未设置在所述缓冲区和所述挖孔区;像素定义层,设置于所述驱动电路层上;发光功能层,设置于像素定义层上;挡墙,位于所述缓冲区内,且形成于所述像素定义层上;封装层,设置于所述发光功能层及所述挡墙上;其中,所述挡墙顶面与所述封装层的接触面积,大于所述挡墙顶面在所述衬底上正投影的投影面积。
- 根据权利要求1所述的显示面板,其中,所述挡墙顶面形成有凹槽或凸起中的至少一种。
- 根据权利要求2所述的显示面板,其中,所述凹槽或凸起连续设置 。
- 根据权利要求2所述的显示面板,其中,所述凹槽或凸起不连续设置 。
- 根据权利要求2所述的显示面板,其中,在所述挡墙顶面形成的所述凹槽或所述凸起为一列。
- 根据权利要求2所述的显示面板,其中,在所述挡墙顶面形成的所述凹槽或所述凸起为多列。
- 根据权利要求6所述的显示面板,其中,在所述挡墙顶面形成的多列所述凹槽或所述凸起有交叉。
- 根据权利要求2所述的显示面板,其中,所述凹槽或凸起的截面形状为倒梯形、方形或圆弧中的至少一种。
- 根据权利要求2所述的显示面板,其中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凹槽。
- 根据权利要求2所述的显示面板,其中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凸起。
- 一种显示装置,其包括显示面板,所述显示面板包括显示区、挖孔区以及位于所述显示区和所述挖孔区之间的缓冲区;所述显示面板包括:衬底;驱动电路层,设置于所述衬底上,且驱动电路未设置在所述缓冲区和所述挖孔区;像素定义层,设置于所述驱动电路层上;发光功能层,设置于像素定义层上;挡墙,位于所述缓冲区内,且形成于所述像素定义层上;封装层,设置于所述发光功能层及所述挡墙上;其中,所述挡墙顶面与所述封装层的接触面积,大于所述挡墙顶面在所述衬底上正投影的投影面积。
- 根据权利要求11所述的显示装置,其中,所述挡墙顶面形成有凹槽或凸起中的至少一种。
- 根据权利要求12所述的显示装置,其中,所述凹槽或凸起连续设置 。
- 根据权利要求12所述的显示装置,其中,所述凹槽或凸起不连续设置 。
- 根据权利要求12所述的显示装置,其中,在所述挡墙顶面形成的所述凹槽或所述凸起为一列。
- 根据权利要求12所述的显示装置,其中,在所述挡墙顶面形成的所述凹槽或所述凸起为多列。
- 根据权利要求16所述的显示装置,其中,在所述挡墙顶面形成的多列所述凹槽或所述凸起有交叉。
- 根据权利要求12所述的显示装置,其中,所述凹槽或凸起的截面形状为倒梯形、方形或圆弧中的至少一种。
- 根据权利要求12所述的显示装置,其中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凹槽。
- 根据权利要求12所述的显示装置,其中,在所述缓冲区形成有多列所述挡墙,至少一列所述挡墙顶面形成有凸起。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/622,354 US11380867B2 (en) | 2019-08-13 | 2019-11-07 | Display panel and display device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910742523.6 | 2019-08-13 | ||
| CN201910742523.6A CN110444572A (zh) | 2019-08-13 | 2019-08-13 | 一种显示面板及显示装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2021027112A1 true WO2021027112A1 (zh) | 2021-02-18 |
Family
ID=68434862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2019/116193 Ceased WO2021027112A1 (zh) | 2019-08-13 | 2019-11-07 | 一种显示面板及显示装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US11380867B2 (zh) |
| CN (1) | CN110444572A (zh) |
| WO (1) | WO2021027112A1 (zh) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102779967B1 (ko) | 2020-01-02 | 2025-03-12 | 삼성디스플레이 주식회사 | 표시 장치 |
| CN113517410A (zh) * | 2020-04-10 | 2021-10-19 | 华为技术有限公司 | 柔性显示面板、显示模组和移动终端 |
| CN111416060A (zh) * | 2020-04-23 | 2020-07-14 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制作方法 |
| CN111627930B (zh) * | 2020-05-27 | 2022-09-09 | 武汉华星光电半导体显示技术有限公司 | 阵列基板及其制备方法与显示面板 |
| CN113594387B (zh) * | 2021-07-29 | 2024-03-12 | 京东方科技集团股份有限公司 | 一种显示面板及其制备方法、显示装置 |
| US20230320176A1 (en) * | 2022-03-29 | 2023-10-05 | Lg Display Co., Ltd. | Light emitting display apparatus |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106601781A (zh) * | 2017-01-25 | 2017-04-26 | 上海天马微电子有限公司 | 有机发光显示面板和显示装置 |
| CN108054291A (zh) * | 2017-12-28 | 2018-05-18 | 上海天马有机发光显示技术有限公司 | 一种柔性显示面板及其制备方法、柔性显示装置 |
| CN109494242A (zh) * | 2018-10-26 | 2019-03-19 | 武汉华星光电半导体显示技术有限公司 | Oled显示面板及其制作方法、oled显示装置 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103887261B (zh) * | 2014-03-03 | 2016-08-31 | 京东方科技集团股份有限公司 | 一种柔性显示器及其制备方法 |
| CN107068715B (zh) * | 2017-03-28 | 2019-12-20 | 上海天马微电子有限公司 | 一种有机发光显示面板、有机发光显示装置以及有机发光显示面板的制备方法 |
| TWI634468B (zh) * | 2017-08-18 | 2018-09-01 | Industrial Technology Research Institute | 透明顯示裝置 |
| CN107658332A (zh) * | 2017-10-25 | 2018-02-02 | 京东方科技集团股份有限公司 | 一种显示面板、显示装置及制作方法 |
| CN108258146B (zh) * | 2018-01-16 | 2020-07-28 | 京东方科技集团股份有限公司 | 一种封装结构及显示装置 |
| CN109065584B (zh) * | 2018-08-06 | 2021-01-26 | 京东方科技集团股份有限公司 | 像素界定层、显示基板及制备方法 |
| KR102663899B1 (ko) * | 2018-09-28 | 2024-05-09 | 삼성디스플레이 주식회사 | 표시 패널 |
| KR102667402B1 (ko) * | 2018-11-30 | 2024-05-23 | 삼성디스플레이 주식회사 | 표시 장치 |
| CN109830521B (zh) * | 2019-03-29 | 2021-03-16 | 武汉天马微电子有限公司 | 有机发光显示面板和显示装置 |
-
2019
- 2019-08-13 CN CN201910742523.6A patent/CN110444572A/zh active Pending
- 2019-11-07 WO PCT/CN2019/116193 patent/WO2021027112A1/zh not_active Ceased
- 2019-11-07 US US16/622,354 patent/US11380867B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106601781A (zh) * | 2017-01-25 | 2017-04-26 | 上海天马微电子有限公司 | 有机发光显示面板和显示装置 |
| CN108054291A (zh) * | 2017-12-28 | 2018-05-18 | 上海天马有机发光显示技术有限公司 | 一种柔性显示面板及其制备方法、柔性显示装置 |
| CN109494242A (zh) * | 2018-10-26 | 2019-03-19 | 武汉华星光电半导体显示技术有限公司 | Oled显示面板及其制作方法、oled显示装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| US11380867B2 (en) | 2022-07-05 |
| CN110444572A (zh) | 2019-11-12 |
| US20210280823A1 (en) | 2021-09-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN113690251B (zh) | 显示面板 | |
| WO2021027112A1 (zh) | 一种显示面板及显示装置 | |
| CN113141779B (zh) | 显示基板及其制作方法和显示装置 | |
| US20220246885A1 (en) | Display panel, display device, and manufacturing methods thereof | |
| WO2020124916A1 (zh) | 全屏显示面板及其制作方法 | |
| KR102649202B1 (ko) | 비표시 영역 상으로 연장하는 유기 발광층을 포함하는 유기 발광 표시 장치 | |
| CN105590949B (zh) | 有机发光二极管显示器及其制造方法 | |
| CN112670332B (zh) | 像素单元及其制作方法和显示装置 | |
| CN106601781A (zh) | 有机发光显示面板和显示装置 | |
| EP3190624A1 (en) | Display panel and preparation method therefor, and display apparatus | |
| CN106531763A (zh) | 显示装置 | |
| CN111063697A (zh) | 一种阵列基板及其制备方法、显示面板 | |
| WO2020113783A1 (zh) | 一种显示屏的制作方法 | |
| KR20120116782A (ko) | 유기발광다이오드 표시장치의 제조방법 | |
| KR102684681B1 (ko) | 관통홀을 구비한 표시패널을 포함하는 표시장치 | |
| US11469397B2 (en) | Array substrate having film layer disconnected at corresponding groove and OLED display panel having the same, and mask | |
| CN109148717B (zh) | Oled显示面板及其制作方法 | |
| WO2020224010A1 (zh) | Oled 显示面板及其制备方法 | |
| CN112018131B (zh) | 柔性显示面板及其制备方法 | |
| JP6837410B2 (ja) | 発光領域を含むディスプレイ装置 | |
| KR20160122362A (ko) | 박막 증착용 마스크 어셈블리 | |
| CN108091677A (zh) | 阵列基板、显示装置以及阵列基板的制造方法 | |
| WO2022083321A1 (zh) | 显示基板及其制作方法、显示装置 | |
| CN109037277B (zh) | 一种oled显示面板的制备方法及oled显示面板、显示装置 | |
| KR101676764B1 (ko) | 유기발광 소자 및 이의 제조방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19941574 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 19941574 Country of ref document: EP Kind code of ref document: A1 |