WO2021020447A1 - 電子素子実装用基板、電子装置、電子モジュールおよび電子素子実装用基板の製造方法 - Google Patents

電子素子実装用基板、電子装置、電子モジュールおよび電子素子実装用基板の製造方法 Download PDF

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Publication number
WO2021020447A1
WO2021020447A1 PCT/JP2020/029070 JP2020029070W WO2021020447A1 WO 2021020447 A1 WO2021020447 A1 WO 2021020447A1 JP 2020029070 W JP2020029070 W JP 2020029070W WO 2021020447 A1 WO2021020447 A1 WO 2021020447A1
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Prior art keywords
insulating layer
electronic element
metal layer
conductor
mounting substrate
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PCT/JP2020/029070
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English (en)
French (fr)
Inventor
明彦 舟橋
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京セラ株式会社
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Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to JP2021535388A priority Critical patent/JP7212783B2/ja
Priority to CN202080053636.6A priority patent/CN114175233A/zh
Priority to US17/630,194 priority patent/US20220270958A1/en
Publication of WO2021020447A1 publication Critical patent/WO2021020447A1/ja

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    • H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits

Definitions

  • the present disclosure relates to a method for manufacturing an electronic element mounting substrate, an electronic device, an electronic module, and an electronic element mounting substrate on which an electronic element or the like is mounted.
  • a substrate for mounting an electronic element which includes an insulating layer and a wiring layer and has a through conductor, is known.
  • Patent Document 1 As a method of manufacturing a substrate for mounting an electronic element, a laminate including an insulating layer and a wiring layer is formed in order to improve the electrical connection of the through conductors of the upper and lower layers. , A method of forming a through hole in the through hole after forming the through hole with a laser is described (see Japanese Patent Application Laid-Open No. 2017-183337).
  • the electronic device mounting substrate includes a first insulating layer, a second insulating layer, a first metal layer, and a through conductor.
  • the first insulating layer and the second insulating layer are located side by side in the first direction.
  • the first metal layer is located between the first insulating layer and the second insulating layer.
  • the through conductor extends in the first direction from the first insulating layer to the second insulating layer.
  • the first metal layer has a first portion located away from the through conductor and a second portion in contact with the through conductor.
  • the thickness of the second part is larger than the thickness of the first part.
  • the electronic device includes the above-mentioned electronic element mounting substrate and the electronic element mounted on the electronic element mounting substrate.
  • the electronic module includes the above-mentioned electronic device and a housing for covering the electronic device provided in the electronic device.
  • the method for manufacturing an electronic element mounting substrate includes a first step to a fifth step.
  • the first step the first insulating layer and the second insulating layer are prepared.
  • a first metal layer having a different thickness is arranged in the second insulating layer.
  • the first insulating layer is laminated with the first metal layer interposed therebetween to obtain the first laminated body.
  • a through hole penetrating the first laminated body is formed so as to penetrate the thick portion of the first metal layer in the stacking direction.
  • a through conductor is formed in the through hole.
  • the method for manufacturing an electronic device mounting substrate includes steps A to E.
  • step A the metal layer A, the metal layer B, and the first insulating layer and the second insulating layer are prepared.
  • step B the metal layer A and the metal layer B are arranged between the first insulating layer and the second insulating layer so that at least a part of them overlap each other.
  • step C the first insulating layer, the metal layer A, the metal layer B, and the second insulating layer are laminated in this order to obtain a second laminated body.
  • step D a through hole penetrating the second laminated body is formed so as to penetrate the portion where the metal layer A and the metal layer B overlap each other in the stacking direction.
  • step E a through conductor is formed in the through hole.
  • FIG. 1A is a top view of the electronic device mounting substrate and the electronic device according to the first embodiment of the present disclosure
  • FIG. 1B is a cross section corresponding to line X1-X1 of FIG. 1A.
  • FIG. 2A is a top view of the electronic module according to another aspect of the first embodiment of the present disclosure
  • FIG. 2B is a cross-sectional view corresponding to line X2-X2 of FIG. 2A. is there.
  • FIG. 3 is an enlarged view of the main part A in FIG. 1 (b).
  • FIG. 4 is an enlarged view of the configuration shown in FIG. 2 at a position corresponding to the main part A of FIG. FIG.
  • FIG. 5 is an enlarged view of another aspect at a position corresponding to the main part A of FIG.
  • FIG. 6 is a schematic view showing a method of manufacturing an electronic device mounting substrate according to the first embodiment of the present disclosure.
  • FIG. 7 is a schematic view showing a method of manufacturing an electronic device mounting substrate according to the first embodiment of the present disclosure.
  • FIG. 8 is a schematic view showing another aspect of the method for manufacturing the electronic device mounting substrate according to the first embodiment of the present disclosure.
  • FIG. 9 is a schematic view showing another aspect of the method for manufacturing the electronic device mounting substrate according to the first embodiment of the present disclosure.
  • FIG. 10A is a schematic view of the periphery of the through conductor in the electronic device mounting substrate according to the second embodiment of the present disclosure as viewed in the first direction, and FIG.
  • FIG. 10B is FIG. 10A.
  • It is sectional drawing corresponding to X10-X10 line of. 11 (a) is a schematic view of the periphery of the through conductor in the electronic device mounting substrate according to the third embodiment of the present disclosure in the first direction
  • FIG. 11 (b) is FIG. 11 (a).
  • FIG. 12 is a cross-sectional view of a substrate for mounting an electronic device according to an aspect of the fourth embodiment of the present disclosure at a position corresponding to a main part A of FIG.
  • FIG. 13 is a cross-sectional view of the electronic device mounting substrate according to the fifth embodiment of the present disclosure at the position corresponding to the main part A of FIG. FIG.
  • FIG. 14 is a cross-sectional view of a substrate for mounting an electronic device according to a sixth embodiment of the present disclosure at a position corresponding to a main part A of FIG. 15 (a) is a schematic view of the periphery of the through conductor in the electronic device mounting substrate according to the first embodiment of the present disclosure in the first direction, and FIG. 15 (b) is FIG. 15 (a). It is sectional drawing corresponding to line X15-X15 of.
  • an electronic device is configured in which an electronic element is mounted on an electronic element mounting substrate.
  • the electronic module is configured to include a housing for covering the electronic device provided on the electronic element mounting substrate.
  • the electronic element mounting substrate, the electronic device, and the electronic module may be in any direction upward or downward, but for convenience, the Cartesian coordinate system xyz is defined and the positive side in the z direction is upward. Further, the direction from the upper side to the lower side is defined as the first direction.
  • FIG. 1 shows a top view and a cross-sectional view of the electronic device 21
  • FIG. 2 shows a top view and a cross-sectional view of the electronic module 31.
  • FIGS. 3 to 5 show an example of an enlarged view of the main part A in FIG. 1 and the position corresponding to the main part A in FIG.
  • FIGS. 6 to 9 show schematic views of the manufacturing method of the electronic element mounting substrate 1.
  • the electronic element mounting substrate 1 has a mounting area 4 on which the electronic element 10 is mounted.
  • the electronic element mounting substrate 1 has at least a first insulating layer 2a and a second insulating layer 2b located side by side in the first direction. Further, a first metal layer 6 which is an internal wiring is provided between the first insulating layer 2a and the second insulating layer 2b. Further, it has a through conductor 5 extending in the first direction from the first insulating layer 2a to the second insulating layer 2b. In FIG. 1, the penetrating conductor 5 penetrates the five insulating layers.
  • the first metal layer 6 has a first portion 6a and a second portion 6b in contact with the through conductor 5, and the second portion 6b is thicker than the first portion 6a.
  • the thickness means the dimension in the first direction.
  • the thickness means the dimension in the stacking direction.
  • the mounting region 4 is a region in which at least one or more electronic elements 10 are mounted, and can be appropriately defined, for example, inside or more of the outermost periphery of the electrode pad 3 described later.
  • the electronic element 10 mounted in the mounting region 4 is not limited to the electronic element, and may be, for example, an electronic component. Further, the number of electronic elements 10 mounted is not limited.
  • the electronic element mounting substrate 1 has a plurality of insulating layers so as to have the first insulating layer 2a and the second insulating layer 2b. In the following, when a plurality of insulating layers are targeted, they are described as the insulating layer 2.
  • Examples of the electrically insulating ceramics used as the material of the insulating layer 2 include an aluminum oxide-based sintered body, a mulite-based sintered body, a silicon carbide-based sintered body, an aluminum nitride-based sintered body, and a silicon nitride-based sintered body. Alternatively, a glass-ceramic sintered body or the like can be mentioned.
  • the material of the insulating layer 2 may be a resin, and examples thereof include a thermoplastic resin, an epoxy resin, a polyimide resin, an acrylic resin, a phenol resin, and a fluorine-based resin.
  • the plurality of insulating layers 2 may be at least two or more layers, and may be formed of five layers as shown in FIG. 1, or may be formed of four or less layers or six or more layers.
  • the thickness is the same, the number of laminated insulating layers 2 is small, so that the electronic element mounting substrate 1 can be made thinner. Further, when the thickness is the same and the number of layers of the insulating layer 2 is large, the rigidity of the electronic element mounting substrate 1 can be increased.
  • the size of one side of the outermost periphery of the electronic element mounting substrate 1 may be, for example, 0.3 mm to 10 cm.
  • the electronic element mounting substrate 1 may be square or rectangular.
  • the electronic element mounting substrate 1 may have a thickness of, for example, 0.2 mm or more.
  • External circuit connection electrodes may be provided on the upper surface, side surface, or lower surface of the electronic element mounting substrate 1.
  • the external circuit connection electrode electrically connects the electronic element mounting substrate 1 and the external circuit board.
  • the through conductor 5, the electrode pad 3, and the electrode for connecting an external circuit formed between the insulating layers 2 are formed.
  • a through conductor other than the through conductor 5 that connects the conductors and the wiring conductors vertically may be provided. Wiring other than these electrodes, wiring conductors, and through conductors 5 may be located only on the surface, only inside, on the surface, and inside of the electronic element mounting substrate 1.
  • the materials of the first metal layer 6, the through conductor 5, the electrode pad 3, the electrode for connecting an external circuit, and other metal layers are tungsten (W) and molybdenum (Mo). , Manganese (Mn), Palladium (Pd), Silver (Ag) or Copper (Cu) or alloys containing at least one metal material selected from these.
  • the materials of the first metal layer 6, the through conductor 5, the electrode pad 3, the electrode for connecting the external circuit, and other metal layers are copper (Cu), gold (Au), and the like. Examples thereof include aluminum (Al), nickel (Ni), molybdenum (Mo), palladium (Pd) or titanium (Ti), and alloys containing at least one metallic material selected from these.
  • the first metal layer 6, the through conductor 5, the electrode pad 3, the electrode for connecting an external circuit, and the other metal layer may further have a plating layer on the upper surface thereof or the exposed portion from the insulating layer 2. According to this configuration, the exposed portion from each upper surface or the insulating layer 2 is protected, so that oxidation can be reduced. Further, according to this configuration, the electrode pad 3 and the electronic element 10 can be satisfactorily electrically connected via an electronic element connecting member 13 such as wire bonding.
  • the plating layer may be, for example, coated with a Ni plating layer having a thickness of 0.5 ⁇ m to 10 ⁇ m, or the Ni plating layer and a gold (Au) plating layer having a thickness of 0.5 ⁇ m to 3 ⁇ m may be sequentially coated. Good.
  • the first metal layer 6 has a first portion 6a and a second portion 6b in contact with the through conductor 5.
  • the thickness of the second part 6b is larger than the thickness of the first part 6a.
  • the first part 6a is located away from the through conductor 5.
  • the first part 6a and the second part 6b are discriminated by the thickness, and the materials may be the same or different.
  • the thickness is the length in the vertical direction according to the cross section along the first direction as shown in FIG.
  • the second portion 6b of the first metal layer 6 is located to enhance the connection reliability between the penetrating conductor 5 penetrating the plurality of insulating layers 2 and the metal layer located between the plurality of insulating layers 2. It is a thing.
  • the contact area between the second part 6b and the penetrating conductor 5 is large, so that the electric resistance becomes high. It does not hinder high functionality.
  • the through hole is formed so as to include the second part 6b and then penetrates. If the conductor 5 is formed, even if it is deformed by pushing the pin, the contact area between the second part 6b and the through conductor 5 is large, which hinders the high functionality of the electronic device due to the high electrical resistance. Less is.
  • the first metal layer 6 having the first part 6a and the second part 6b may be located between the plurality of insulating layers 2, or between the first insulating layer 2a and the second insulating layer 2b. There may be only one layer. At this time, the first metal layer 6 located outside between the first insulating layer 2a and the second insulating layer 2b may be used as another metal layer 6c. Further, between the insulating layers 2, the second part 6b may be located at a plurality of locations or may be located at only one location. Further, when the second part 6b is located at a plurality of places, the thickness of the second part 6b in the cross-sectional view may be different.
  • FIGS. 3 to 6 show an example of an enlarged view of the main part A (or the part corresponding to the main part A) of the present embodiment.
  • the thickness of the second part 6b is one layer thicker than that of the first part 6a.
  • the second part 6b is thicker than the first part 6a in one application or printing.
  • the second part 6b is thicker than the first part 6a in total thickness of at least two layers. In either case, the effect of the present embodiment can be achieved.
  • the second part 6b is thicker than the first part 6a in one coating or printing, a step in the step of applying or printing the paste to be the first metal layer 6. There is little error. Therefore, the clearance between the second part 6b and the first part 6a can be secured with high accuracy, and even when the electronic element mounting substrate 1 is wired at a high density, an inadvertent short circuit between the wirings of different signals occurs. Few.
  • the second part 6b is thicker than the first part 6a in total thickness of the two layers.
  • the paste that becomes the first metal layer 6 is applied or printed twice.
  • a metal component or the like is appropriately added to the paste to be the second layer 6b2.
  • the characteristics can be improved and the viscosity can be changed.
  • the electrical characteristics can be improved by adding a low resistance material such as copper. Further, by using a material having a low viscosity, it is possible to suppress the deformation of the second part 6b when the pin is pushed in.
  • the first metal layer 6 may include a first clearance portion 7 between the second portion 6b and the first portion 6a. That is, the second part 6b may be located away from the first part 6a by the first clearance part 7.
  • the first portion 6a can be a wiring layer through which a signal different from that of the through conductor 5 flows, which contributes to high-density wiring.
  • a third insulating layer 2c located side by side with the second insulating layer 2b in the first direction, and a second metal layer located between the second insulating layer 2b and the third insulating layer 2c.
  • the second clearance portion 8 may be provided between the through conductor 5 and the second metal layer 9. That is, the through conductor 5 may be located away from the second metal layer 9 by the second clearance portion 8.
  • the second metal layer 9 can be a wiring layer through which a signal different from that of the through conductor 5 and the first portion 6a flows, which contributes to high-density wiring.
  • the second metal layer 9 does not necessarily have to be a wiring for flowing a signal different from that of the first part 6a, and may be used as a wiring for connecting with another through conductor and flowing the same signal.
  • the second part 6b may be located in the second clearance part 8 in the plane perspective in the first direction.
  • an example in which the outer edge of the second portion 6b and the inner edge of the second clearance portion 8 overlap is shown. In this way, it includes overlapping with the inside of the second clearance portion 8.
  • the thickness of the second part 6b which is larger than that of the first part 6a, is relaxed by laminating, so that the surface around the through conductor 5 in the electronic element mounting substrate 1 is relaxed. The bulge of the can be reduced.
  • the second clearance portion 8 may be located within the second portion 6b in the plane perspective in the first direction.
  • FIG. 1 shows an example of the electronic device 21.
  • the electronic device 21 includes an electronic element mounting substrate 1 and an electronic element 10 mounted on the upper surface of the electronic element mounting substrate 1.
  • Examples of the electronic element 10 include an imaging element such as a CCD (Charge Coupled Device) type or a CMOS (Complementary Metal Oxide Semiconductor) type, a light emitting element such as an LED (Light Emitting Diode), pressure, pressure, acceleration, a gyro, and the like.
  • the electronic element 10 may be arranged on the upper surface of the electronic element mounting substrate 1 via an adhesive.
  • the adhesive include silver epoxy and thermosetting resin.
  • the electronic element 10 and the electronic element mounting substrate 1 may be electrically connected by, for example, an electronic element connecting member 13.
  • the electronic device 21 may have a lid 12 joined to the upper surface of the electronic element mounting substrate 1 while covering the electronic element 10.
  • the lid 12 for example, when the electronic element 10 is an image pickup element such as CMOS or CCD, or a light emitting element such as an LED, a highly transparent member such as a glass material can be used. Further, for the lid body 12, for example, when the electronic element 10 is an integrated circuit or the like, a metal material, a ceramic material, or an organic material can be used.
  • the lid body 12 may be joined to the electronic element mounting substrate 1 via the lid body connecting member 14.
  • the material constituting the lid connecting member 14 include a thermosetting resin, a low melting point glass, a brazing material made of a metal component, and the like.
  • the electronic device 21 has the electronic element mounting substrate 1 of the present disclosure, it is excellent in reliability, so that the characteristics of the electronic element 10 can be exhibited for a long period of time. Further, in the electronic element mounting substrate 1, the wiring density can be improved by arranging the first clearance portion 7, the second clearance portion 8, and the second metal layer 9, so that the electronic device 21 is highly functional. And miniaturization is possible.
  • FIG. 2 shows an example of the electronic module 31.
  • the electronic module 31 includes a housing 32 that covers the electronic element 10 provided in the electronic device 21. By having the housing 32, it is possible to further improve the airtightness or reduce the direct application of stress from the outside to the electronic device 21.
  • the housing 32 is made of, for example, a resin or a metal material.
  • FIG. 2 shows an example in which the electronic element 10 is covered by the lid connecting member 14 and the lid 12, and further covered by the housing 32. In the example shown in FIG. 2, the housing 32 also covers the side surface of the electronic element mounting substrate 1, but the housing 32 may cover the electronic element 10 on the upper surface of the electronic element mounting substrate 1.
  • the housing 32 may have a lens in a part thereof. Here, not only one lens but also a plurality of lenses may be incorporated, and examples of the material include resin, glass, and crystal. Further, the housing 32 is provided with a drive device or the like for driving up, down, left and right, and is electrically connected to a pad or the like located on the surface of the electronic element mounting substrate 1 via a bonding material such as solder. May be good.
  • the electronic module 31 having such a configuration is called an imaging module.
  • the housing 32 may have an opening into which an external circuit board is inserted.
  • the gap between the openings is closed with a sealing material such as resin after being electrically connected to the electronic element mounting substrate 1. Therefore, the inside of the housing 32 may be made airtight.
  • the method for manufacturing the electronic element mounting substrate 1 includes a first step of preparing a first insulating layer and a second insulating layer, and a second step of arranging a first metal layer having a different thickness in the second insulating layer. , The first step of laminating the first insulating layer with the first metal layer sandwiched between them to obtain the first laminated body 47, and the first laminated body in the laminating direction so as to penetrate the thick portion of the first metal layer. A fourth step of forming a through hole penetrating 47 and a fifth step of forming a through conductor in the through hole are provided. In addition, as shown in FIGS.
  • the steps A to E which are the methods for manufacturing the substrate for mounting the electronic element, are described above. It is basically the same as the first to fifth steps.
  • the first step to the fifth step and the steps A to E are described in detail below as before firing, but the first metal layer, the first insulating layer, and the second insulating layer are prepared and sintered, respectively. It may be produced by arranging it later and joining it.
  • the paste to be the first metal layer is used.
  • the first paste 46 of which the first part is referred to as the first part 46a and the second part is referred to as the second part 46b.
  • the green sheet serving as the insulating layer is collectively referred to as a green sheet 42
  • a green sheet serving as a first insulating layer is referred to as a first green sheet 42a
  • a green sheet serving as a second insulating layer is referred to as a second green sheet 42b.
  • the metal layer A and the metal layer B may be a metal paste, a pad-shaped metal layer, or a metal layer after sintering.
  • First step First, a green sheet 42 including a first green sheet 42a and a second green sheet 42b is prepared.
  • the insulating layer is an aluminum oxide (Al 2 O 3 ) material sintered body
  • the powder of Al 2 O 3 is baked with silica (SiO 2 ), magnesia (MgO), calcia (CaO) or the like.
  • silica SiO 2
  • MgO magnesia
  • CaO calcia
  • a sheet-shaped molded product is obtained by a molding method such as a doctor blade method or a calender roll method.
  • the green sheet 42 is obtained by processing the outer shape of the above-mentioned sheet-shaped molded product with a mold or the like (FIG. 6 (a)). At this time, a notch may be formed as an outer shape, a through hole may be formed, or a slit for taking a large number of pieces may be formed.
  • a sheet-shaped insulating layer when the insulating layer is made of resin, a sheet-shaped insulating layer can be obtained by molding by a transfer molding method, an injection molding method, pressing with a mold, or the like.
  • a sheet-shaped insulating layer when the insulating layer is a glass epoxy resin, a sheet-shaped insulating layer can be obtained by impregnating a base material made of glass fiber with the resin and thermosetting at a predetermined temperature.
  • Second step Next, by applying the first paste 46 to the second green sheet 42b of the green sheet 42 by a screen printing method or the like, the first portion 46a and the thickness of the first portion 46a are thicker. A large second portion 46b is placed in place (FIG. 6B). Here, in order to obtain the second portion 46b, it is applied to a predetermined thickness (thickness of the first portion 46a) by the first screen, and then applied to a predetermined position in the first application region by using the second screen. Can be obtained by doing.
  • the first paste 46 is produced by adding an appropriate solvent and a binder to the metal powder made of the above-mentioned metal material and mixing them to adjust the viscosity to an appropriate level.
  • the first paste 46 may contain glass or ceramics in order to increase the bonding strength with the other green sheets 42 to be laminated.
  • a metal paste serving as a second metal layer, an electrode pad, and an electrode for connecting an external circuit may be applied.
  • the through hole may be filled with a metal paste.
  • a first metal layer having a difference in thickness can be formed by a sputtering method, a vapor deposition method, or the like. Further, after providing a metal film on the surface, it may be formed by a plating method.
  • the first green sheet 42a is placed on the second green sheet 42b coated with the first paste 46 containing the first portion 46a and the second portion 46b having a thickness larger than that of the first portion 46a.
  • the first laminated body 47 is obtained (FIG. 7 (a)).
  • the two-layer laminated body is described here as a target, according to the example shown in FIG. 6, the first laminated body 47 may be used rather than the laminated body of five green sheets 42.
  • a notch or a recess may be formed by a mold or the like.
  • the first laminated body 47 includes the second portion 46b so as to penetrate the thick portion of the first metal layer in the laminating direction (first direction). Form a through hole to penetrate.
  • Examples of the method for forming the through hole include punching, a laser, and the like, in addition to the mold.
  • the through conductor 45 is formed by filling the through holes formed in the fourth step with the above-mentioned metal paste or the like.
  • FIG. 7B shows a through conductor 45 formed on the first laminated body 47.
  • a dividing groove is provided at a predetermined position of the first laminated body 47 provided with the through conductor 45 by using a mold, punching, slicing device, laser, or the like.
  • the dividing groove can also be formed by a slicing device after firing.
  • the first laminated body 47 provided with the through conductor 45 is fired at a temperature of about 1500 ° C. to 1800 ° C. to obtain a sintered body.
  • the above-mentioned first paste 46 is fired at the same time as the green sheet 42 to become the first metal layer. The same applies to the through conductor, the second metal layer, the electrode pad, and the electrode for connecting an external circuit.
  • a substrate for mounting an electronic device can be obtained.
  • it may be divided by breaking along the previously formed dividing groove.
  • the sintered body may be divided by using a slicing device without providing the dividing groove.
  • plating is applied to the surface of the electrode pad, the external connection pad, and each metal layer exposed at the time of the sintered body by using an electrolytic or electroless plating method, respectively. You may.
  • an electronic device can be obtained by mounting the electronic element on the obtained substrate for mounting the electronic element.
  • the electronic element is electrically bonded to the electronic element mounting substrate by an electronic element connecting member.
  • the electronic element may be fixed to the electronic element mounting substrate by using an adhesive or the like.
  • an electronic module can be obtained by providing a housing for covering the electronic element.
  • the second portion 46b can be formed by differentiating the metal paste of the first layer and the metal paste of the second layer as shown in the example shown in FIG.
  • a metal paste is applied to each predetermined position of the first green sheet 42a serving as the first insulating layer and the second green sheet 42b serving as the second insulating layer.
  • it can also be obtained by laminating these.
  • the print area of the second layer is on the metal paste of the first layer, whereas the print area is on the green sheet 42.
  • the first metal layer 6 may be, for example, a signal line.
  • a signal line unlike the power and ground potential patterns, one through conductor 5 conducts with the other wiring. Therefore, the through conductor 5 and the signal line are required to have higher reliability of electrical connection.
  • the signal line (first metal layer 6) since the signal line (first metal layer 6) has the second part 6b as in the present embodiment, it is possible to improve the reliability of the electrical connection. ..
  • FIG. 10 An example of the signal line is shown in FIG. In FIG. 10, in the planar perspective in the first direction, the first part 6a is larger in the x direction and the y direction than the second part 6b located in contact with the through conductor 5, and extends to the negative side in the x direction. An example is shown.
  • FIG. 11 Another example of the signal line is shown in FIG. In FIG. 11, the first part 6a is smaller in the y direction than the second part 6b located in contact with the through conductor 5, and is on the negative side in the x direction from the second part 6b with reference to the second part 6b.
  • An example of extension is shown.
  • the second layer 6b2 may be positioned so as to be in contact with the lower insulating layer 2.
  • the second part 6b has an inclination, and the insulating layer corresponding to this edge is compared with the case where the edge stands on the upper part of the second part 6b in FIG. 11B.
  • the stress related to 2 is reduced, and the reliability of mechanical properties is excellent.
  • the first insulating layer 2a may have a region sandwiched between the first metal layer 6 and the through conductor 5 in a direction orthogonal to the first direction.
  • the expansion of the through conductor 5 and the first metal layer 6 can be suppressed. it can.
  • the thickness of the second part 6b may increase toward the through conductor 5.
  • the connection reliability between the through conductor 5 and the first metal layer 6 including the second portion 6b is excellent.
  • the through-conductor 5 has an upwardly inclined portion
  • the insulating layer 2 in contact with each of the through-conductor 5 and the second portion 6b has an angle. In comparison, since the stress on the corners of the insulating layer 2 is small, the reliability of the mechanical properties is excellent.
  • a metal paste to be the first part 6a and the second part 6b is applied to prepare a laminated body of green sheets, and then a portion to be a through conductor 5.
  • the second layer 6b1 is made to follow the pin by slowing down the speed at which the pin is returned after the pin of the mold is pushed, so that the shape is as shown in FIG. Is possible.
  • the second portion 6b is located side by side with the first region R1 in contact with the through conductor 5 in the direction orthogonal to the first region R1 and penetrates more than the first region R1. It has a second region R2 located away from the conductor 5.
  • the thickness of the second region R2 may be smaller than the thickness of the first region R1. That is, the thickness of the portion of the second portion 6b away from the through conductor 5 in the direction orthogonal to the first direction may be small.
  • the cross-sectional view shape may be a lens shape.
  • the lens shape means that the thickness of the curved surface becomes smaller in the cross-sectional view shape toward the portion where the second portion 6b is separated from the through conductor 5 in the direction orthogonal to the first direction.
  • the second part 6b has a lens shape, the possibility that a gap is generated can be further reduced.
  • the present disclosure is not limited to the examples of the above-described embodiments, and various modifications such as numerical values are possible.
  • the shape of the electrode pad 3 is rectangular in the top view, but it may be circular or other polygonal shape.
  • the arrangement, number, shape, mounting method of electronic elements, etc. of the electrode pads 3 in this embodiment are not specified.
  • the various combinations of the feature portions in the present embodiment are not limited to the examples of the above-described embodiments. In addition, combinations of each embodiment are also possible.

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Abstract

電子素子実装用基板１は、第１絶縁層および第２絶縁層と、第１金属層と、貫通導体とを備えている。第１絶縁層および第２絶縁層は、第１方向に並んで位置している。第１金属層は、第１絶縁層および第２絶縁層の間に位置している。貫通導体は、第１絶縁層から第２絶縁層にわたって第１方向に延びている。第１金属層は、貫通導体から離れて位置する第１部と、貫通導体に接する第２部と、を有している。そして、第２部の厚みは、第１部の厚みよりも大きい。

Description

電子素子実装用基板、電子装置、電子モジュールおよび電子素子実装用基板の製造方法
　本開示は、電子素子等が実装される電子素子実装用基板、電子装置、電子モジュールおよび電子素子実装用基板の製造方法に関するものである。
　絶縁層と配線層を含み、貫通導体を有する電子素子実装用基板が知られている。
　近年、電子素子は高機能化が要求され、端子数が増加傾向にある。そのため、電子素子が実装される電子素子実装用基板においては、上下、同じ層内などにおいて配線層の接続部分が多くなっており、接続信頼性が高いことが要求されている。上下の接続、すなわち貫通導体に関しては、貫通した導体を有する各絶縁層を積層する方法があるが、工程誤差等で上下層間の各絶縁層の導体の位置がズレて電気的に接続しない、または／および、意図しない電気的な接続が発生することが懸念される。また、各絶縁層における導体の大きさを小さくすることができない、または／および、貫通導体間の距離を小さくできず、電子素子実装用基板の高密度配線の障壁になる。
　特許文献１には、電子素子実装用基板を製造する方法として、上下層の貫通導体の電気的な接続をより良好なものとするために、絶縁層と配線層とを含む積層体を形成し、レーザーで貫通孔を形成した後に、この貫通孔内に貫通導体を作製する方法が記載されている（特開２０１７－１８３３３７号公報参照）。
　各絶縁層が積層された積層体において貫通孔を形成する方法として、金型を用いたピンでの打ち抜きにより貫通孔を形成し、この貫通孔内に貫通導体を作製する方法がある。このピンでの打ち抜きにあたり、貫通導体との電気的接続を補助する配線層（内部配線）は、ピンの押し込みにより変形する場合が有る。このときの変形によっては、貫通導体と内部配線との接触面積が小さくなることで電気抵抗が高くなり、電子装置の高機能化の妨げになることが懸念されていた。そのため、今般の電子素子実装用基板には、貫通導体と内部配線との接続信頼性が高いことが求められている。
　本開示の１つの態様に係る電子素子実装用基板は、第１絶縁層および第２絶縁層と、第１金属層と、貫通導体とを備えている。第１絶縁層および第２絶縁層は、第１方向に並んで位置している。第１金属層は、第１絶縁層および第２絶縁層の間に位置している。貫通導体は、第１絶縁層から第２絶縁層にわたって第１方向に延びている。第１金属層は、貫通導体から離れて位置する第１部と、貫通導体に接する第２部と、を有している。そして、第２部の厚みは、第１部の厚みよりも大きい。
　本開示の１つの態様に係る電子装置は、上述した電子素子実装用基板と、電子素子実装用基板に実装された電子素子と、を備える。
　本開示の１つの態様に係る電子モジュールは、上述した電子装置と、前記電子装置に備わる前記電子装置を覆う筐体と、を備える。
　本開示の１つの態様に係る電子素子実装基板の製造方法は、第１工程から第５工程を備える。第１工程では、第１絶縁層および第２絶縁層を準備する。第２工程では、第２絶縁層に、厚みに違いを有する第１金属層を配置する。第３工程では、第１金属層を挟んで第１絶縁層を積層し、第１積層体を得る。第４工程では、積層方向において、第１金属層における厚みの大きい部分を貫通するように第１積層体を貫通する貫通孔を形成する。第５工程では、貫通孔内に貫通導体を形成する。
　本開示の１つの態様に係る電子素子実装基板の製造方法は、工程Ａから工程Ｅを備えている。工程Ａでは、金属層Ａと、金属層Ｂと、第１絶縁層および第２絶縁層とを準備する。工程Ｂでは、第１絶縁層および前記第２絶縁層との間において、少なくとも一部が互いにかさなるように金属層Ａおよび金属層Ｂを配置する。工程Ｃでは、第１絶縁層、前記金属層Ａおよび金属層Ｂ、第２絶縁層を順に積層して、第２積層体を得る。工程Ｄでは、積層方向において、金属層Ａおよび金属層Ｂが互いに重なっている部分を貫通するように第２積層体を貫通する貫通孔を形成する。そして、工程Ｅでは、貫通孔内に貫通導体を形成する。
図１（ａ）は本開示の第１の実施形態に係る電子素子実装用基板および電子装置の上面図であり、図１（ｂ）は図１（ａ）のＸ１－Ｘ１線に対応する断面図である。 図２（ａ）は本開示の第１の実施形態のその他の態様に係る電子モジュールの上面図であり、図２（ｂ）は図２（ａ）のＸ２－Ｘ２線に対応する断面図である。 図３は、図１（ｂ）における要部Ａの拡大図である。 図４は、図１の要部Ａに相当する位置における、図２に示す構成の拡大図である。 図５は、図１の要部Ａに相当する位置における、その他の態様に係る拡大図である。 図６は、本開示の第１の実施形態に係る電子素子実装用基板の製造方法を示す概略図である。 図７は、本開示の第１の実施形態に係る電子素子実装用基板の製造方法を示す概略図である。 図８は、本開示の第１の実施形態に係る電子素子実装用基板の製造方法のその他の態様を示す概略図である。 図９は本開示の第１の実施形態に係る電子素子実装用基板の製造方法のその他の態様を示す概略図である。 図１０（ａ）は本開示の第２の実施形態に係る電子素子実装用基板における貫通導体周辺を第１方向に向かって見た概略図であり、図１０（ｂ）は図１０（ａ）のＸ１０－Ｘ１０線に対応する断面図である。 図１１（ａ）は本開示の第３の実施形態に係る電子素子実装用基板における貫通導体周辺を第１方向に向かって見た概略図であり、図１１（ｂ）は図１１（ａ）のＸ１１－Ｘ１１線に対応する断面図である。 図１２は、図１の要部Ａに相当する位置における、本開示の第４の実施形態の態様に係る電子素子実装用基板の断面図である。 図１３は、図１の要部Ａに相当する位置における、本開示の第５の実施形態の態様に係る電子素子実装用基板の断面図である。 図１４は、図１の要部Ａに相当する位置における、本開示の第６の実施形態の態様に係る電子素子実装用基板の断面図である。 図１５（ａ）は本開示の第１の実施形態に係る電子素子実装用基板における貫通導体周辺を第１方向に向かって見た概略図であり、図１５（ｂ）は図１５（ａ）のＸ１５－Ｘ１５線に対応する断面図である。
　　＜電子素子実装用基板および電子装置の構成＞
　以下、本開示のいくつかの例示的な実施形態について図面を参照して説明する。なお、以下の説明では、電子素子実装用基板に電子素子が実装された構成を電子装置とする。また、電子素子実装用基板に備わる電子装置を覆う筐体を備える構成を電子モジュールとする。電子素子実装用基板、電子装置および電子モジュールは、いずれの方向が上方若しくは下方とされてもよいが、便宜的に、直交座標系ｘｙｚを定義するとともに、ｚ方向の正側を上方とする。また、上方から下方に向かう方向を第１方向とする。
　　（第１の実施形態）
　図１～図９を参照して本開示の第１の実施形態に係る電子素子実装用基板、並びにそれを備えた電子装置について説明する。なお、図１は電子装置２１の上面図および断面図を示しており、図２は電子モジュール３１の上面図および断面図を示している。また、図３～図５には、図１における要部Ａ、および図１における要部Ａに相当する位置の拡大図の例を示している。また、図６～図９には、電子素子実装用基板１の製造方法における概略図を示している。
　電子素子実装用基板１は、上方に電子素子１０が実装される実装領域４を有する。電子素子実装用基板１は、少なくとも第１方向に並んで位置する第１絶縁層２ａ、第２絶縁層２ｂを有する。また、第１絶縁層２ａおよび第２絶縁層２ｂの間に、内部配線である第１金属層６を有する。さらに、第１絶縁層２ａから第２絶縁層２ｂにわたって第１方向に延びる貫通導体５を有する。なお、図１において貫通導体５は、５層の絶縁層を貫通している。
　そして、第１金属層６は、第１部６ａと、貫通導体５に接する第２部６ｂと、を有しており、第２部６ｂは、第１部６ａよりも厚みが大きい。
　ここで、厚みとは、第１方向における寸法をいう。言い換えれば、厚みとは、積層方向における寸法をいう。また、実装領域４とは、少なくとも１つ以上の電子素子１０が実装される領域であり、例えば後述する電極パッド３の最外周の内側またはそれ以上等、適宜定めることが可能である。また、実装領域４に実装される電子素子１０は、電子素子に限らず、例えば電子部品であってもよい。さらに、電子素子１０の実装される個数は限定されない。
　電子素子実装用基板１は、第１絶縁層２ａおよび第２絶縁層２ｂを有しているように複数の絶縁層を有する。以下において、複数の絶縁層を対象とする場合、絶縁層２として記載する。
　絶縁層２の材料として使用される電気絶縁性セラミックスとしては例えば、酸化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化アルミニウム質焼結体、窒化珪素質焼結体またはガラスセラミック焼結体等が挙げられる。また、絶縁層２の材料としては、樹脂でもよく、例えば、熱可塑性の樹脂、エポキシ樹脂、ポリイミド樹脂、アクリル樹脂、フェノール樹脂またはフッ素系樹脂等が挙げられる。
　複数の絶縁層２は、少なくとも２層以上であればよく、図１に示すように５層から形成されていてもよいし、４層以下または６層以上から形成されていてもよい。厚みが同じである場合には、絶縁層２の積層数が少ないことにより、電子素子実装用基板１の薄型化を図ることができる。また、厚みが同じである場合、絶縁層２の積層数が多い場合には、電子素子実装用基板１の剛性を高めることができる。
　電子素子実装用基板１は、例えば、最外周の１辺の大きさが０．３ｍｍ～１０ｃｍであってもよい。上面視において電子素子実装用基板１が四角形状あるとき、正方形であってもよいし長方形であってもよい。また、電子素子実装用基板１は、例えば、厚みが０．２ｍｍ以上であってもよい。
　電子素子実装用基板１の上面、側面または下面には、外部回路接続用電極が設けられていてもよい。外部回路接続用電極は、電子素子実装用基板１と外部回路基板とを電気的に接続するものである。
　さらに、電子素子実装用基板１には、絶縁層２間に形成される第１金属層６、貫通導体５、電極パッド３、外部回路接続用電極以外に、他の金属層である電極や配線導体、配線導体同士を上下に接続する貫通導体５以外の貫通導体が設けられていてもよい。これらの電極、配線導体、貫通導体５以外の配線は、電子素子実装用基板１の表面のみ、内部のみ、表面および内部に位置するものであってもよい。
　絶縁層２が電気絶縁性セラミックスからなる場合、第１金属層６、貫通導体５、電極パッド３、外部回路接続用電極および他の金属層の材質としては、タングステン（Ｗ）、モリブデン（Ｍｏ）、マンガン（Ｍｎ）、パラジウム（Ｐｄ）、銀（Ａｇ）若しくは銅（Ｃｕ）またはこれらから選ばれる少なくとも１種以上の金属材料を含有する合金等が挙げられる。また、絶縁層２が樹脂からなる場合、第１金属層６、貫通導体５、電極パッド３、外部回路接続用電極および他の金属層の材質としては、銅（Ｃｕ）、金（Ａｕ）、アルミニウム（Ａｌ）、ニッケル（Ｎｉ）、モリブデン（Ｍｏ）、パラジウム（Ｐｄ）若しくはチタン（Ｔｉ）またはこれらから選ばれる少なくとも１種以上の金属材料を含有する合金等が挙げられる。
　第１金属層６、貫通導体５、電極パッド３、外部回路接続用電極および他の金属層は、それぞれの上面または絶縁層２からの露出部分において、さらにめっき層を有していてもよい。この構成によれば、それぞれの上面または絶縁層２からの露出部分が保護されるため、酸化を低減することができる。また、この構成によれば、電極パッド３と電子素子１０と、をワイヤボンディング等の電子素子接続部材１３を介して良好に電気的接続することができる。めっき層は、例えば、厚みが０．５μｍ～１０μｍのＮｉめっき層を被着させるか、またはこのＮｉめっき層および厚みが０．５μｍ～３μｍの金（Ａｕ）めっき層を順次被着させてもよい。
　図３に示すように、第１金属層６は、第１部６ａと、貫通導体５に接する第２部６ｂとを有している。第２部６ｂの厚みは、第１部６ａの厚みよりも大きい。第１部６ａは、貫通導体５から離れて位置している。ここで、第１部６ａと第２部６ｂとは、厚みによって判別されるものであり、材質は同じであっても、異なっていてもよい。なお、厚みとは、図３に示すような第１方向に沿った断面によれば、上下方向の長さのことである。ここで、第１金属層６の第２部６ｂは、複数の絶縁層２を貫く貫通導体５と、複数の絶縁層２の間に位置する金属層との接続信頼性を高めるために位置するものである。
　貫通導体５に接する第２部６ｂの厚みが第１部６ａの厚みよりも大きいことにより、第２部６ｂと貫通導体５との接触面積が大きいため、電気抵抗が高くなることよる電子装置の高機能化の妨げになることが少ない。
　また、第２部６ｂの厚みが第１部６ａの厚みよりも大きいときには、貫通導体５を形成するための貫通孔を形成するにあたり、第２部６ｂを含むように貫通孔を形成した後に貫通導体５を形成すれば、ピンの押し込みにより変形したとしても、第２部６ｂと貫通導体５との接触面積が大きいため、電気抵抗が高くなることよる電子装置の高機能化の妨げになることが少ない。
　ここで、第１部６ａと第２部６ｂを有する第１金属層６は、複数の絶縁層２間に位置していてもよいし、第１絶縁層２ａおよび第２絶縁層２ｂの間に１層だけであってもよい。このとき、第１絶縁層２ａおよび第２絶縁層２ｂの間以外に位置した第１金属層６を他の金属層６ｃとしてもよい。また、絶縁層２間において、第２部６ｂは複数個所に位置していてもよいし、１か所だけであってもよい。また、第２部６ｂが複数個所に位置しているとき、断面視における第２部６ｂの厚みはそれぞれ異なっていてもよい。
　図３～図６に本実施形態の要部Ａ（若しくは要部Ａに相当する部分）の拡大図の例を示す。
　図３に示す例では、第２部６ｂが１層の厚みで第１部６ａよりも厚くなっている。言い換えると、第２部６ｂは１回の塗布または印刷で第１部６ａよりも厚くなっている。また、図４に示す例では、第２部６ｂが少なくとも２層の厚みの合計で第１部６ａよりも厚くなっている。どちらの場合においても本実施形態の効果を奏することが可能となる。
　図３に示す例のように、第２部６ｂは１回の塗布または印刷で第１部６ａよりも厚くなっていることで、第１金属層６となるペーストを塗布または印刷する工程において工程誤差が生じることが少ない。よって、第２部６ｂと第１部６ａとのクリアランスを精度よく確保することができ、電子素子実装用基板１を高密度に配線した場合においても、異なる信号の配線間における不用意なショートが少ない。
　図４に示す例のように、第２部６ｂが２層の厚みの合計で第１部６ａよりも厚くなっている。言い換えると第１金属層６となるペーストを２回塗布または印刷している。これにより、例えば、第１部６ａと厚みの同じ部分を第１層６ｂ１、第１層上に位置するのを第２層６ｂ２としたとき、第２層６ｂ２となるペーストに金属成分等を適宜加えて特性向上を図ったり、粘度を変更したりすることができる。特性向上としては、例えば銅などの低抵抗材料を加えることにより、電気特性の向上を図ることができる。また、粘度の低い材料を用いることで、ピンの押し込み時の第２部６ｂの変形を抑制することができる。
　また、第１金属層６は、第２部６ｂと第１部６ａとの間に、第１クリアランス部７を備えていてもよい。つまり、第２部６ｂは、第１クリアランス部７によって第１部６ａと離れて位置していてもよい。このような構成を満たすときには、例えば、第１部６ａを貫通導体５と異なる信号を流す配線層とすることができるため、高密度な配線に寄与する。
　また、図１に示すように、第２絶縁層２ｂと第１方向に並んで位置する第３絶縁層２ｃと、第２絶縁層２ｂおよび第３絶縁層２ｃの間に位置する第２金属層９と、を備えるとき、貫通導体５と第２金属層９との間に、第２クリアランス部８を備えていてもよい。つまり、貫通導体５は、第２クリアランス部８によって第２金属層９と離れて位置していてもよい。このような構成を満たすときには、第２金属層９を貫通導体５および第１部６ａと異なる信号を流す配線層とすることができるため、高密度な配線に寄与する。そして、電子素子実装用基板１の高密度配線をより向上させることができれば、電子装置２１の高機能化および小型化が可能となる。なお、第２金属層９は、必ずしも第１部６ａと異なる信号を流す配線である必要はなく、別の貫通導体で繋いで同じ信号を流す配線として用いてもよい。
　図５に示す例に示すように、第２部６ｂは、第１方向における平面透視において、第２クリアランス部８内に位置していてもよい。図５に示す例においては、第２部６ｂの外縁と第２クリアランス部８の内縁とが重なっている例を示している。このように、第２クリアランス部８内とは重なることを含む。このような構成を満たしているときには、積層することのよって第２部６ｂの第１部６ａよりも厚みが大きい分が緩和されるため、電子素子実装用基板１における貫通導体５の周囲の表面の膨らみを小さくすることができる。
　また、言い換えれば、第２クリアランス部８を有していることによって、電子素子実装用基板１における貫通導体５の周囲の表面に生じる窪みを小さくすることができる。
　また、第２クリアランス部８は、第１方向における平面透視において、第２部６ｂ内に位置していてもよい。このような構成を満たすときには、貫通導体５に近接する部分において、表面の膨らみや窪みを小さくすることができるとともに、高密度な配線を行うことができる。
　　　＜電子装置の構成＞
　図１に電子装置２１の例を示す。電子装置２１は、電子素子実装用基板１と、電子素子実装用基板１の上面に実装された電子素子１０を備えている。
　電子素子１０の一例としては、例えばＣＣＤ（Charge Coupled Device）型またはＣＭＯＳ（Complementary Metal Oxide Semiconductor）型等の撮像素子、ＬＥＤ（Light Emitting Diode）等の発光素子、圧力、気圧、加速度、ジャイロ等のセンサー機能を有する素子、または集積回路等である。
　なお、電子素子１０は、接着材を介して、電子素子実装用基板１の上面に配置されていてもよい。この接着材としては、例えば、銀エポキシまたは熱硬化性樹脂等が挙げられる。また、電子素子１０と電子素子実装用基板１とは例えば電子素子接続部材１３で電気的に接続されていてもよい。
　電子装置２１は、電子素子１０を覆うとともに、電子素子実装用基板１の上面に接合された蓋体１２を有していてもよい。
　蓋体１２は、例えば電子素子１０がＣＭＯＳ、ＣＣＤ等の撮像素子、またはＬＥＤなどの発光素子である場合、ガラス材料等の透明度の高い部材を用いることができる。また蓋体１２は例えば、電子素子１０が集積回路等であるとき、金属製材料、セラミック材料または有機材料を用いることができる。
　蓋体１２は、蓋体接続部材１４を介して電子素子実装用基板１と接合されていてもよい。蓋体接続部材１４を構成する材料として例えば、熱硬化性樹脂または低融点ガラスまたは金属成分からなるろう材等が挙げられる。
　電子装置２１は、本開示の電子素子実装用基板１を有しているため、信頼性に優れるため、電子素子１０が有する特性を長期にわたって発揮することができる。また、電子素子実装用基板１において、第１クリアランス部７、第２クリアランス部８、第２金属層９を配置することにより、配線密度を向上させることができるため、電子装置２１の高機能化および小型化が可能となる。
　　　＜電子モジュールの構成＞
　図２に電子モジュール３１の例を示す。電子モジュール３１は、電子装置２１に備わる電子素子１０を覆う筐体３２を備えている。筐体３２を有することでより気密性の向上または外部からの応力が直接電子装置２１に加えられることを低減することが可能となる。筐体３２は、例えば樹脂または金属材料等からなる。図２においては、電子素子１０が蓋体接続部材１４および蓋体１２によって覆われ、さらに筐体３２で覆われている例を示している。なお、図２に示す例において筐体３２は、電子素子実装用基板１の側面をも覆っているが、電子素子実装用基板１の上面において電子素子１０を覆うものであってもよい。
　筐体３２は、一部にレンズを有していてもよい。ここで、レンズは１個のみならず複数個組み込まれていてもよく、材質としては、樹脂、ガラスまたは水晶等が挙げられる。また、筐体３２は、上下左右の駆動を行う駆動装置等が付いていて、電子素子実装用基板１の表面に位置するパッド等と半田などの接合材を介して電気的に接続されていてもよい。このような構成の電子モジュール３１は、撮像モジュールと呼ばれる。
　なお、筐体３２は、外部回路基板が挿入される開口部を有していてもよい。ここで、筐体３２が開口部を有し、外部回路基板が挿入されるときには、電子素子実装用基板１と電気的に接続した後、樹脂等の封止材等で開口部の隙間を閉じて、筐体３２の内部の気密化を図ってもよい。
　　＜電子素子実装用基板および電子装置の製造方法＞
　次に、本実施形態の電子素子実装用基板１および電子装置２１の製造方法の一例について説明する。なお、下記で示す製造方法の一例は、多数個取りの例の一例の製造方法である。
　以下各工程について、図６および図７を用いて詳細に説明する。
　電子素子実装用基板１の製造方法は、第１絶縁層および第２絶縁層を準備する第１工程と、第２絶縁層に、厚みに違いを有する第１金属層を配置する第２工程と、第１金属層を挟んで第１絶縁層を積層し、第１積層体４７を得る第３工程と、第１金属層における厚みの大きい部分を貫通するように、積層方向において第１積層体４７を貫通する貫通孔を形成する第４工程と、貫通孔内に貫通導体を形成する第５工程と、を備える。なお、後述する図８および図９のように、１層目の金属ペーストと２層目の金属ペーストを異ならせる場合における、電子素子実装用基板の製造方法である工程Ａから工程Ｅは、上述した第１工程から第５工程と基本的には同様である。第１工程から第５工程および工程Ａから工程Ｅは、以下では焼成前として詳細に説明しているが、第１金属層、第１絶縁層、第２絶縁層を準備して、それぞれ焼結後に配置し、接合して作製したものであってもよい。
　なお、以下においては、焼成により、第１金属層、第１絶縁層、第２絶縁層となる例について説明するため、図６および図７に示す例においては、第１金属層となるペーストを総称して第１ペースト４６、このうち第１部となる部分を第１部分４６ａ、第２部となる部分を第２部分４６ｂと記載する。また、絶縁層となるグリーンシートを総称して、グリーンシート４２、第１絶縁層となるグリーンシートを第１グリーンシート４２ａ、第２絶縁層となるグリーンシートを第２グリーンシート４２ｂと記載する。また、金属層Ａ、金属層Ｂは、金属ペーストであってもよいし、パッド状になったものあるいは焼結後等の金属層であってもよい。
　第１工程：まず、第１グリーンシート４２ａおよび第２グリーンシート４２ｂを含むグリーンシート４２を用意する。ここで絶縁層が、酸化アルミニウム（Ａｌ２Ｏ３）質焼結体である場合には、Ａｌ２Ｏ３の粉末に、シリカ（ＳｉＯ２）、マグネシア（ＭｇＯ）およびカルシア（ＣａＯ）等の焼結助剤粉末を添加し、さらに適当なバインダー、溶剤および可塑剤を添加して混合してスラリー状となす。その後、ドクターブレード法またはカレンダーロール法等の成形方法によってシート状成形体を得る。
　次に、前述のシート状成形体を金型等によって外形状を加工することにより、グリーンシート４２を得る（図６（ａ））。このとき、外形状としてノッチを形成したり、貫通孔を形成したり、多数個取りのためのスリットを形成したりしてもよい。
　なお、他の例として絶縁層が樹脂からなる場合は、トランスファーモールド法、インジェクションモールド法または金型等での押圧等で成形することによってシート状の絶縁層を得ることができる。さらに他の例として絶縁層がガラスエポキシ樹脂であるときには、ガラス繊維からなる基材に樹脂を含浸させ、所定の温度で熱硬化させることによってシート状の絶縁層を得ることができる。
　第２工程：次に、スクリーン印刷法等によって、グリーンシート４２のうち、第２グリーンシート４２ｂに、第１ペースト４６を塗布することにより、第１部分４６ａと、第１部分４６ａよりも厚みの大きい第２部分４６ｂとを所定位置に配置する（図６（ｂ））。ここで、第２部分４６ｂを得るには、第１スクリーンによって所定の厚み（第１部分４６ａの厚み）に塗布し、次に第２スクリーンを用いて、１回目の塗布領域の所定位置に塗布することによって得ることができる。第１ペースト４６は、前述した金属材料からなる金属粉末に適当な溶剤およびバインダーを加えて混合することによって、適度な粘度に調整して作製される。なお、第１ペースト４６は、積層する他のグリーンシート４２との接合強度を高めるために、ガラスまたはセラミックスを含んでいても構わない。
　また、他のグリーンシート４２においては、第２金属層、電極パッド、外部回路接続用電極となる金属ペーストを塗布してもよい。グリーンシート４２が貫通孔を有するものであるとき、この貫通孔に金属ペーストを充填してもよい。
　また、他の例として絶縁層が樹脂からなる場合には、スパッタ法、蒸着法等によって厚みに違いを有する第１金属層を形成することができる。また、表面に金属膜を設けた後に、めっき法を用いて形成してもよい。
　第３工程：次に、第１部分４６ａと、第１部分４６ａよりも厚みの大きい第２部分４６ｂとを含む第１ペースト４６が塗布された第２グリーンシート４２ｂ上に第１グリーンシート４２ａを積層することにより、第１積層体４７を得る（図７（ａ））。なお、ここでは２層の積層体を対象に記載したが、図６に示す例によれば、５枚のグリーンシート４２の積層より、第１積層体４７とすればよい。なお、第１積層体４７を得た後に、切欠き部または凹部等となる部分を金型などで作製してもよい。
　第４工程：次に、金型を用い、積層方向（第１方向）において、第１金属層の厚みの大きい部分を貫通するように、つまり第２部分４６ｂを含んで第１積層体４７を貫通する貫通孔を形成する。貫通孔の形成方法としては、金型以外に、パンチング、レーザー等が挙げられる。
　第５工程：次に、第４工程において形成した貫通孔に前述した金属ペースト等を充填することにより貫通導体４５を形成する。図７（ｂ）は、第１積層体４７に貫通導体４５を形成したものを示すものである。
　次に、貫通導体４５を備えた第１積層体４７の所定の位置に、金型、パンチング、スライシング装置またはレーザー等を用いて分割溝を設ける。なお、分割溝は、焼成後にスライシング装置により形成することもできる。
　次に、貫通導体４５を備えた第１積層体４７を約１５００℃～１８００℃の温度で焼成することにより、焼結体を得る。なお、この工程によって、前述した第１ペースト４６は、グリーンシート４２と同時に焼成され、第１金属層となる。貫通導体、第２金属層、電極パッド、外部回路接続用電極についても同様である。
　次に、得られた焼結体を個片に分断することにより、電子素子実装用基板を得ることができる。この分断においては、先に形成した分割溝に沿って破断させて分割すればよい。また、分割溝を設けずとも、スライシング装置を用いて焼結体を分割してもよい。また、分割する前もしくは分割した後に、それぞれ電解または無電解めっき法を用いて、電極パッド、外部接続用パッドおよび焼結体の時点で露出している各金属層の表面にめっきを被着させてもよい。
　次に、得られた電子素子実装用基板に電子素子を実装することにより電子装置を得ることができる。電子素子は電子素子接続部材で電子素子実装用基板と電気的に接合させる。またこのとき、電子素子は、接着材等を用いて電子素子実装用基板に固定しても構わない。
　さらに、得られた電子装置において、電子素子を覆う筐体を備えることにより、電子モジュールを得ることができる。
　また、第２部分４６ｂは、図８に示す例のように、１層目の金属ペーストと、２層目との金属ペーストを異ならせて形成することもできる。
　また、第２部分４６ｂは、図９に示す例のように、第１絶縁層となる第１グリーンシート４２ａ、第２絶縁層となる第２グリーンシート４２ｂのそれぞれの所定位置に金属ペーストを塗布し、これらを積層することによっても得ることができる。この方法によれば、同一面に金属ペーストを複数回印刷するときは、２層目の印刷領域が１層目の金属ペースト上になるのに対し、印刷領域がグリーンシート４２上であるため、スクリーンへの金属ペースト付着や付着による印刷精度低下のおそれが少なく、印刷自体が容易である。
　　（第２の実施形態）
　第１金属層６は、例えばシグナルラインである場合がある。一般的に、シグナルラインについては、電源およびグランドの電位のパターンとは異なり、１つの貫通導体５で他の配線と導通する。そのため、貫通導体５とシグナルラインはより電気的な接続の信頼性が高く要求される。これに対し、本実施形態のようにシグナルライン（第１金属層６）が第２部６ｂを有している構造であることで、電気的な接続の信頼性を向上させることが可能となる。
　シグナルラインの一例を図１０に示す。図１０においては、第１方向における平面透視において、第１部６aが、貫通導体５に接して位置する第２部６ｂよりもｘ方向およびｙ方向において大きく、ｘ方向の負側に延びている例を示している。
　　（第３の実施形態）
　シグナルラインの他の例を図１１に示す。図１１においては、第１部６ａが、貫通導体５に接して位置する第２部６ｂよりもｙ方向において小さく、第２部６ｂを基準にすれば第２部６ｂからｘ方向の負側に延びている例を示している。
　また、図１１（ｂ）に示す例のように第２層６ｂ２が下側の絶縁層２と接するように位置していてもよい。このような構成を満たすときには、第２部６ｂが傾斜を有するものとなり、図１１（ｂ）において第２部６ｂの上部にエッジが立っているときと比較して、このエッジに対応する絶縁層２に係る応力が小さくなり、機械的特性の信頼性に優れる。
　　（第４の実施形態）
　図１２に示すように、第１絶縁層２ａは、第１方向に直交する方向において、第１金属層６と貫通導体５とに挟まれた領域を有していてもよい。このような構成を満たすときには、貫通導体５および第１金属層６に熱が生じたり、熱が伝わったりした際に、貫通導体５と第１金属層６とのそれぞれの膨張を抑制することができる。
　　（第５の実施形態）
　次に、第２部６ｂの他の例について図１３を参照しつつ説明する。
　図１３に示す例ように、第２部６ｂは、貫通導体５に向かって厚みが大きくなっていてもよい。このような構成を満たすときには、貫通導体５と第２部６ｂを含む第１金属層６との接続信頼性に優れる。また、このような構成を満たすときには、貫通導体５に向かって上り傾斜部分を有するものとなることから、貫通導体５と第２部６ｂのそれぞれに接する絶縁層２に角が立っているときと比較して、絶縁層２における角部に係る応力が小さいため、機械的特性の信頼性に優れる。
　図１３に示す電子素子実装用基板１を製造する方法として例えば、第１部６ａおよび第２部６ｂとなる金属ペーストを塗布し、グリーンシートの積層体を作製した後、貫通導体５となる部分に貫通孔を設ける工程において、例えば金型のピンの押し込んだ後のピンを戻すときのスピードを緩めることでピンに第２層６ｂ１を追従させることにより、図１３に示すような形状とすることが可能となる。
　　（第６の実施形態）
　次に、第２部６ｂの他の例について図１４を参照しつつ説明する。
　図１４に示す例ように、第２部６ｂは、貫通導体５と接する第１領域Ｒ１と、第１領域Ｒ１と第１方向に直交する方向に並んで位置するとともに第１領域Ｒ１よりも貫通導体５から離れて位置する第２領域Ｒ２と、を有している。この第２領域Ｒ２の厚みが、第１領域Ｒ１の厚みよりも小さくてもよい。つまり、第２部６ｂは、第１方向に直交する方向における貫通導体５から離れた部分の厚みが小さくてもよい。このような構成を満たすときには、第２部６ｂよりも第１方向に直交する方向における貫通導体５から離れた部分に空隙が生じるおそれを少なくすることができる。また、第１部６ａについても同様である。
　また、第１方向に直交する方向における貫通導体５から離れた部分の厚みが小さい一例としては、断面視形状がレンズ形状であってもよい。ここでレンズ形状とは、第２部６ｂが第１方向に直交する方向における貫通導体５から離れた部分に向かって、断面視形状で曲面に厚みが小さくなっているもののことである。
　このように、第２部６ｂがレンズ形状であるときには、空隙が生じるおそれをさらに少なくすることができる。
　なお、本開示は上述の実施形態の例に限定されるものではなく、数値などの種々の変形は可能である。また、例えば、各図に示す例では、電極パッド３の形状は上面視において矩形状であるが、円形状やその他の多角形状であってもかまわない。また、本実施形態における電極パッド３の配置、数、形状および電子素子の実装方法などは指定されない。なお、本実施形態における特徴部の種々の組み合わせは上述の実施形態の例に限定されるものでない。また、各実施形態同士の組み合わせも可能である。
１・・・・電子素子実装用基板
２・・・・絶縁層
２ａ・・・第１絶縁層
２ｂ・・・第２絶縁層
２ｃ・・・第３絶縁層
３・・・・電極パッド
４・・・・実装領域
５・・・・貫通導体
６・・・・第１金属層
６ａ・・・第１部
６ｂ・・・第２部
６ｂ１・・・第１層
６ｂ２・・・第２層
６ｃ・・・・他の金属層
７・・・・第１クリアランス部
８・・・・第２クリアランス部
９・・・・第２金属層
１０・・・電子素子
１２・・・蓋体
１３・・・電子素子接続部材
１４・・・蓋体接続部材
２１・・・電子装置
３１・・・電子モジュール
３２・・・筐体
４２・・・グリーンシート
４２ａ・・第１グリーンシート
４２ｂ・・第２グリーンシート
４５・・・貫通導体
４６・・・金属層（金属ペースト）
４６ａ・・第１部
４６ｂ・・第２部
４７・・・第１積層体
４８・・・第２積層体
Ｒ１・・・第１領域
Ｒ２・・・第２領域
 

Claims (11)

  1. 　第１方向に並んで位置する第１絶縁層および第２絶縁層と、
    　前記第１絶縁層および前記第２絶縁層の間に位置する第１金属層と、
    　前記第１絶縁層から前記第２絶縁層にわたって前記第１方向に延びる貫通導体と、を備え、
    　前記第１金属層は、前記貫通導体から離れて位置する第１部と、前記貫通導体に接する第２部と、を有しており、
    　前記第２部の厚みは、前記第１部の厚みよりも大きい、電子素子実装用基板。
  2. 　前記第２部は、第１クリアランス部によって前記第１部と離れて位置している、請求項１に記載の電子素子実装用基板。
  3. 　前記第２絶縁層と前記第１方向に並んで位置する第３絶縁層と、
    　前記第２絶縁層および前記第３絶縁層の間に位置する第２金属層と、をさらに備え、
    　前記貫通導体は、前記第１絶縁層から前記第３絶縁層にわたって前記第１方向に延び、
    　前記貫通導体は、第２クリアランス部によって前記第２金属層と離れて位置している、請求項１または請求項２に記載の電子素子実装用基板。
  4. 　前記第１方向における平面透視において、前記第２クリアランス部は、前記第２部内に位置する、請求項３に記載の電子素子実装用基板。
  5. 　前記第１方向における平面透視において、前記第２部は、前記第２クリアランス部内に位置する、請求項３に記載の電子素子実装用基板。
  6. 　前記第２部は、前記貫通導体と接する第１領域と、前記第１領域と前記第１方向に直交する方向に並んで位置するとともに前記第１領域よりも前記貫通導体から離れて位置する第２領域と、を有しており、
    前記第２領域の厚みが、前記第１領域の厚みよりも小さい、請求項１乃至請求項５のいずれかに記載の電子素子実装用基板。
  7. 　前記第１絶縁層は、前記第１方向に直交する方向において、前記第１金属層と前記貫通導体とに挟まれた領域を有する、請求項１乃至請求項６のいずれかに記載の電子装置実装用基板。
  8. 　請求項１～７のいずれか１つに記載の電子素子実装用基板と、
    前記電子素子実装用基板に実装された電子素子と、を備えている、電子装置。
  9. 　請求項８に記載の電子装置と、
    前記電子装置に備わる前記電子素子を覆う筐体と、を備えている、電子モジュール。
  10. 　第１絶縁層および第２絶縁層を準備する第１工程と、
    　前記第２絶縁層に、厚みに違いを有する第１金属層を配置する第２工程と、
    　前記第１金属層を挟んで前記第２絶縁層に前記第１絶縁層を積層し、第１積層体を得る第３工程と、
    　積層方向において、前記第１金属層における厚みの大きい部分を貫通するように前記第１積層体を貫通する貫通孔を形成する第４工程と、
    　前記貫通孔内に貫通導体を形成する第５工程と、を備える、電子素子実装用基板の製造方法。
  11. 　金属層Ａと、金属層Ｂと、第１絶縁層および第２絶縁層とを準備する工程Ａと、
    　前記第１絶縁層および前記第２絶縁層との間に、少なくとも一部が互いに重なるように前記金属層Ａおよび前記金属層Ｂを配置する工程Ｂと、
    　前記第１絶縁層、前記金属層Ａおよび前記金属層Ｂ、前記第２絶縁層を順に積層して、第２積層体を得る工程Ｃと、
    　積層方向において、前記金属層Ａおよび前記金属層Ｂが互いに重なっている部分を貫通するように前記第２積層体を貫通する貫通孔を形成する工程Ｄと、
    　前記貫通孔内に貫通導体を形成する工程Ｅと、を備える、電子素子実装用基板の製造方法。
     
PCT/JP2020/029070 2019-07-30 2020-07-29 電子素子実装用基板、電子装置、電子モジュールおよび電子素子実装用基板の製造方法 WO2021020447A1 (ja)

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CN202080053636.6A CN114175233A (zh) 2019-07-30 2020-07-29 电子元件安装用基板、电子装置、电子模块以及电子元件安装用基板的制造方法
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Citations (4)

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Publication number Priority date Publication date Assignee Title
JP2006165355A (ja) * 2004-12-09 2006-06-22 Matsushita Electric Ind Co Ltd 多層配線基板とその製造方法
JP2009289805A (ja) * 2008-05-27 2009-12-10 Kyocera Corp 部品内蔵基板
JP2014033004A (ja) * 2012-08-01 2014-02-20 Ngk Spark Plug Co Ltd 多層セラミック基板及びその製造方法
JP2017107933A (ja) * 2015-12-08 2017-06-15 新光電気工業株式会社 配線基板及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006165355A (ja) * 2004-12-09 2006-06-22 Matsushita Electric Ind Co Ltd 多層配線基板とその製造方法
JP2009289805A (ja) * 2008-05-27 2009-12-10 Kyocera Corp 部品内蔵基板
JP2014033004A (ja) * 2012-08-01 2014-02-20 Ngk Spark Plug Co Ltd 多層セラミック基板及びその製造方法
JP2017107933A (ja) * 2015-12-08 2017-06-15 新光電気工業株式会社 配線基板及びその製造方法

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