WO2020199234A1 - 有源矩阵微发光二极管显示面板 - Google Patents

有源矩阵微发光二极管显示面板 Download PDF

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Publication number
WO2020199234A1
WO2020199234A1 PCT/CN2019/081962 CN2019081962W WO2020199234A1 WO 2020199234 A1 WO2020199234 A1 WO 2020199234A1 CN 2019081962 W CN2019081962 W CN 2019081962W WO 2020199234 A1 WO2020199234 A1 WO 2020199234A1
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Prior art keywords
layer
emitting diode
light
micro
electrode
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PCT/CN2019/081962
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English (en)
French (fr)
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陈书志
樊勇
李佳育
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020199234A1 publication Critical patent/WO2020199234A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission

Definitions

  • the present invention relates to an Active Matrix Micro Light Emitting Diode (Active Matrix Micro Light Emitting Diode) Diode, AM-Micro LED) display panel
  • the bottom surface of the display panel is a light-emitting surface
  • the periphery of the top surface of the display panel is provided with electrical bonding (Electrical Bonding components are used to bond integrated circuit (IC) chips, such as source drive ICs and gate drive ICs, power lines, common electrode lines, etc. Since the bonding members of the display panel are concentrated on the top surface, and the bottom surface is a light-emitting surface and does not have any bonding members, there is no need to arrange a frame of a non-display area around the light-emitting surface. Splicing to obtain a display panel assembly with seamless display.
  • IC integrated circuit
  • the prior art active matrix liquid crystal display panel (AMLCD) or active matrix organic light emitting diode (AMOLED) display panel 90 is provided with a frame 91 around the display area 900 for bonding (bonding) driving the integrated body Integrated circuit Circuit, IC, including Gate IC or Source IC), such as Chip On Film (COF) 92 and source COF 93. Since there are bonding areas around the border 91 and the surrounding wiring, the border of the display panel 90 has a certain width to form a non-display area. Therefore, when multiple display panels 90 need to be spliced to form a larger display panel assembly, the frame 91 between adjacent display panels 90 forms an obvious splicing seam, which affects the overall display effect.
  • the prior art splicing display technology for liquid crystal display panels can limit the splicing seam to slightly less than 2 mm. However, the splicing seam of about 2 mm still significantly affects the vision and reduces the overall visual effect of the display panel assembly.
  • the inventor provides an active matrix micro light emitting diode (Active Matrix Micro Light Emitting Diode, AM-Micro LED) display panel.
  • active matrix micro light emitting diode Active Matrix Micro Light Emitting Diode, AM-Micro LED
  • the main purpose of the present invention is to provide an active matrix micro-light-emitting diode display panel, the bottom surface of the display panel is a light-emitting surface, and the periphery of the top surface of the display panel is provided with electrical bonding (Electrical Bonding components are used to bond integrated circuit (IC) chips, such as source drive ICs and gate drive ICs, power lines, common electrode lines, etc. Since the bonding members of the display panel are concentrated on the top surface, and the bottom surface is a light-emitting surface and does not have any bonding members, there is no need to set a frame of the non-display area around the light-emitting surface. Splicing to obtain a display panel assembly with seamless display.
  • IC integrated circuit
  • the active matrix micro light emitting diode display panel includes:
  • a glass substrate, the bottom surface of the glass substrate serves as a light-emitting surface and serves as a display area, wherein no frame as a non-display area is provided on the periphery of the bottom surface;
  • a flat layer is arranged opposite to the glass substrate, and the top surface of the flat layer serves as a bonding surface;
  • a micro light emitting diode unit is arranged between the glass substrate and the flat layer, and the light emitted by the light emitting diode passes through the light emitting surface;
  • a plurality of electrical bonding elements are arranged on the flat layer.
  • the active matrix micro light-emitting diode display panel further includes:
  • the light shielding layer is arranged on the glass substrate;
  • the buffer layer is arranged on the light shielding layer
  • the active layer is arranged on the buffer layer
  • a gate insulating layer arranged on the active layer
  • the gate metal layer is arranged on the gate insulating layer
  • a first insulating layer disposed on the buffer layer and covering the active layer, the gate insulating layer and the gate metal layer;
  • the source and drain metal layer is disposed on the first insulating layer and includes a source electrode, a drain electrode and a common electrode;
  • a second insulating layer disposed on the source and drain metal layer
  • the metal reflective layer is arranged on the flat layer and reflects the light emitted by the micro light emitting diode unit out of the bottom surface;
  • the micro light emitting diode unit is disposed on the transparent electrode; wherein, the flat layer covers the micro light emitting diode unit, the transparent electrode layer, and the second insulating layer; wherein, each of the electrical properties
  • the bonding element is electrically connected to one of the gate metal layer, the source drain and the common electrode through a via hole that penetrates at least the planarization layer.
  • the micro light emitting diode unit is a flip chip package structure.
  • the micro light emitting diode unit is a vertical packaging structure.
  • the micro light emitting diode unit includes a P-type semiconductor electrode, an N-type semiconductor electrode, and an electroluminescent layer interposed between the P-type semiconductor electrode and the N-type semiconductor electrode.
  • the micro-light-emitting diode unit includes a Bragg reflective layer disposed on the N-type semiconductor electrode for reflecting light emitted by the micro-light-emitting diode unit out of the bottom surface.
  • the P-type semiconductor electrode of the micro light-emitting diode unit is a transparent electrode
  • the N-type semiconductor electrode is a non-transparent electrode
  • Another object of the present invention is to provide an active matrix micro light emitting diode display panel, including:
  • a glass substrate, the bottom surface of the glass substrate serves as a light-emitting surface and serves as a display area, wherein no frame as a non-display area is provided on the periphery of the bottom surface;
  • the light shielding layer is arranged on the glass substrate;
  • the buffer layer is arranged on the light shielding layer
  • the active layer is arranged on the buffer layer
  • a gate insulating layer arranged on the active layer
  • the gate metal layer is arranged on the gate insulating layer
  • a first insulating layer disposed on the buffer layer and covering the active layer, the gate insulating layer and the gate metal layer;
  • the source and drain metal layer is disposed on the first insulating layer and includes a source electrode, a drain electrode and a common electrode;
  • a second insulating layer disposed on the source and drain metal layer
  • the micro light emitting diode unit is arranged on the transparent electrode, and the light emitted by the light emitting diode passes through the light emitting surface;
  • a flat layer arranged opposite to the glass substrate, covering the micro light emitting diode unit, the transparent electrode layer, and the second insulating layer, and the top surface of the flat layer serves as a bonding surface;
  • a plurality of electrical bonding elements are arranged on the flat layer, wherein each of the electrical bonding elements is electrically connected to the gate metal layer and the source electrode through a via hole at least penetrating the flat layer One of the drain and the common electrode.
  • the micro light emitting diode unit is a flip chip package structure.
  • the micro light emitting diode unit is a vertical packaging structure.
  • the micro light emitting diode unit includes a P-type semiconductor electrode, an N-type semiconductor electrode, and an electroluminescent layer interposed between the P-type semiconductor electrode and the N-type semiconductor electrode.
  • the micro-light-emitting diode unit includes a Bragg reflective layer disposed on the N-type semiconductor electrode for reflecting light emitted by the micro-light-emitting diode unit out of the bottom surface.
  • the P-type semiconductor electrode of the micro light-emitting diode unit is a transparent electrode
  • the N-type semiconductor electrode is a non-transparent electrode
  • Another object of the present invention is to provide an active matrix micro light emitting diode display panel, including:
  • a glass substrate, the bottom surface of the glass substrate serves as a light-emitting surface and serves as a display area, wherein no frame as a non-display area is provided on the periphery of the bottom surface;
  • the light shielding layer is arranged on the glass substrate;
  • the buffer layer is arranged on the light shielding layer
  • the active layer is arranged on the buffer layer
  • a gate insulating layer arranged on the active layer
  • the gate metal layer is arranged on the gate insulating layer
  • a first insulating layer disposed on the buffer layer and covering the active layer, the gate insulating layer and the gate metal layer;
  • the source and drain metal layer is disposed on the first insulating layer and includes a source electrode, a drain electrode and a common electrode;
  • a second insulating layer disposed on the source and drain metal layer
  • the micro light emitting diode unit is arranged on the transparent electrode, and the light emitted by the light emitting diode passes through the light emitting surface;
  • a flat layer arranged opposite to the glass substrate, covering the micro light emitting diode unit, the transparent electrode layer, and the second insulating layer, and the top surface of the flat layer serves as a bonding surface;
  • a plurality of electrical bonding elements are arranged on the flat layer, wherein each of the electrical bonding elements is electrically connected to the gate metal layer and the source electrode through a via hole at least penetrating the flat layer , One of the drain electrode and the common electrode;
  • the micro light-emitting diode unit includes a P-type semiconductor electrode, an N-type semiconductor electrode, and an electroluminescent layer interposed between the P-type semiconductor electrode and the N-type semiconductor electrode;
  • the micro-light-emitting diode unit includes a Bragg reflective layer disposed on the N-type semiconductor electrode for reflecting light emitted by the micro-light-emitting diode unit out of the bottom surface;
  • the P-type semiconductor electrode of the micro light-emitting diode unit is a transparent electrode
  • the N-type semiconductor electrode is a non-transparent electrode
  • the present invention arranges the gate, source and drain of the Thin Film Transistor (TFT) and the common electrode of the micro light-emitting diode unit in the display by opening via holes in the flat layer.
  • the top surface of the panel (the top surface of the flat layer), and the IC chip is bonded to the top surface of the display panel through the bonding of the top electrode, so that the bottom periphery of the display panel does not have any frame, so as to realize a true borderless display.
  • seamless splicing can be realized.
  • FIG. 1 is a top view of a display panel with a frame in the prior art.
  • Figure 2 is an active matrix micro light emitting diode of the present invention (Active Matrix Micro Light Emitting Diode, AM-Micro LED) side cross-sectional view of the display panel.
  • Active Matrix Micro Light Emitting Diode AM-Micro LED
  • Fig. 3 is an enlarged side cross-sectional view of the micro light emitting diode unit of the active matrix micro light emitting diode display panel of the present invention.
  • Fig. 4 is a top view of the active matrix micro light emitting diode display panel of the present invention.
  • the active matrix micro light emitting diode of the present invention (Active Matrix An embodiment of a Micro Light Emitting Diode (AM-Micro LED) display panel includes: a glass substrate 10, a flat layer 70, a micro light emitting diode unit ML, and a plurality of electrical bonding elements 81, 82, and 83.
  • the bottom surface 100 of the glass substrate 10 serves as a light emitting surface and serves as a display area.
  • the user will not see the frame structure when viewing the active matrix micro-light-emitting diode display panel from the bottom surface 100. Therefore, when multiple active-matrix micro-light-emitting diode display panels of the present invention are spliced into a larger active matrix
  • the flat layer 70 is disposed opposite to the glass substrate 10, and the top surface 700 of the flat layer 70 serves as a bonding surface.
  • the micro light emitting diode unit ML is disposed between the glass substrate 10 and the flat layer 70, and the light emitted by the light emitting diode ML passes through the light emitting surface.
  • the plurality of electrical bonding elements 81, 82, and 83 are disposed on the flat layer 70.
  • the plurality of electrical bonding elements 81, 82, 83 can be used to connect to an integrated circuit (Integrated Chip on Film (Circuit, IC) chip, for example, connects the source COF 85 and the gate COF 86.
  • integrated circuit Integrated Chip on Film (Circuit, IC) chip
  • the active matrix micro light emitting diode display panel further includes: a light shielding layer 20, a buffer layer 30, an active layer 40, a gate insulating layer GI, a gate metal layer GA, and a first The insulating layer 50, the source/drain metal layer SD, the second insulating layer 60, the transparent electrode layer T, and the metal reflective layer 80.
  • the light shielding layer 20 is disposed on the glass substrate 10.
  • the buffer layer 30 is disposed on the light shielding layer 20.
  • the active layer 40 is disposed on the buffer layer 30.
  • the gate insulating layer GI is disposed on the active layer 40.
  • the gate metal layer GA is disposed on the gate insulating layer GI.
  • the first insulating layer 50 is disposed on the buffer layer 30 and covers the active layer 40, the gate insulating layer GI, and the gate metal layer GA.
  • the source-drain metal layer SD is disposed on the first insulating layer 50 and includes a source electrode, a drain electrode, and a common electrode Vcom.
  • the second insulating layer 60 is disposed on the source drain metal layer SD.
  • the transparent electrode layer T is disposed on the second insulating layer 60.
  • the metal reflective layer 80 is disposed on the flat layer 70 and reflects the light emitted by the micro light emitting diode unit ML out of the bottom surface 100.
  • the micro light emitting diode unit ML is disposed on the transparent electrode layer T; wherein, the flat layer 70 covers the micro light emitting diode unit ML, the transparent electrode layer T, and the second insulating layer 60; wherein,
  • Each of the electrical junction elements 81, 82, 83 is electrically connected to the gate metal layer GA, the source and drain electrodes, and the common electrode Vcom through a via H that penetrates at least the planarization layer 70. One of them.
  • the micro light emitting diode unit ML is a flip chip package structure or a vertical package structure.
  • the micro light-emitting diode unit ML includes a P-type semiconductor electrode P, an N-type semiconductor electrode N, and a voltage between the P-type semiconductor electrode P and the N-type semiconductor electrode N Luminescent layer EL.
  • the P-type semiconductor electrode P of the micro light emitting diode unit ML is a transparent electrode
  • the N-type semiconductor electrode N is a non-transparent electrode.
  • the micro light-emitting diode unit ML includes a Bragg reflective layer (Distributed Bragg reflector DBR is used to reflect the light emitted by the micro light emitting diode unit ML out of the bottom surface 100.
  • DBR distributed Bragg reflector
  • Another embodiment of the active matrix micro-light emitting diode display panel of the present invention includes: a glass substrate 10, a light shielding layer 20, a buffer layer 30, an active layer 40, a gate insulating layer GI, a gate metal layer GA, and a first insulating layer 50.
  • This embodiment does not include a metal reflective layer.
  • the bottom surface 100 of the glass substrate 10 serves as a light-emitting surface and serves as a display area, wherein the periphery of the bottom surface 100 is not provided with a frame as a non-display area.
  • the light shielding layer 20 is disposed on the glass substrate 10.
  • the buffer layer 30 is disposed on the light shielding layer 20.
  • the active layer 40 is disposed on the buffer layer 30.
  • the gate insulating layer GI is disposed on the active layer 40.
  • the gate metal layer GA is disposed on the gate insulating layer GI.
  • the first insulating layer 50 is disposed on the buffer layer 30 and covers the active layer 40, the gate insulating layer GI, and the gate metal layer GA.
  • the source-drain metal layer SD is disposed on the first insulating layer 50 and includes a source electrode, a drain electrode, and a common electrode Vcom.
  • the second insulating layer 60 is disposed on the source drain metal layer SD.
  • the transparent electrode layer T is disposed on the second insulating layer 60.
  • the micro light emitting diode unit ML is arranged on the transparent electrode layer T, and the light emitted by the light emitting diode passes through the light emitting surface.
  • the flat layer 70 is disposed opposite to the glass substrate 10 and covers the micro light emitting diode unit ML, the transparent electrode layer T, and the second insulating layer 60.
  • the top surface 700 of the flat layer 70 serves as a bonding surface.
  • the plurality of electrical bonding elements 81, 82, and 83 are arranged on the flat layer 70.
  • Each of the electrical junction elements 81, 82, 83 is electrically connected to the gate metal layer GA, the source and drain electrodes, and the common electrode Vcom through a via H that penetrates at least the planarization layer 70.
  • the plurality of electrical bonding elements 81, 82, 83 can be respectively used to connect Chip on Film with integrated circuit (IC) chips, such as connecting source and gate COF 85 and grid COF 86.
  • IC integrated circuit
  • the manufacturing method of the active matrix micro light-emitting diode display panel of the present invention generally includes the glass substrate 10, the light shielding layer 20, the buffer layer 30, the active layer 40, the gate insulating layer GI, The gate metal layer GA, the first insulating layer 50, the source drain metal layer SD, the second insulating layer 60, the transparent electrode layer T, the micro light emitting diode unit ML, the The flat layer 70, the plurality of electrical bonding elements 81, 82, 83, and the metal reflective layer 80 are arranged in sequence, but some of the steps can be reversed or performed simultaneously, for example, the plurality of electrical The steps of joining the elements 81, 82, 83 and the metal reflective layer 80 can be reversed or performed simultaneously.
  • the micro light emitting diode unit ML is a flip chip package structure or a vertical package structure.
  • the micro light-emitting diode unit ML includes a P-type semiconductor electrode P, an N-type semiconductor electrode N, and a voltage between the P-type semiconductor electrode P and the N-type semiconductor electrode N Luminescent layer EL.
  • the P-type semiconductor electrode P of the micro light emitting diode unit ML is a transparent electrode
  • the N-type semiconductor electrode N is a non-transparent electrode.
  • the micro light-emitting diode unit ML includes a Bragg reflective layer (Distributed Bragg reflector DBR is used to reflect the light emitted by the micro light emitting diode unit ML out of the bottom surface 100.
  • DBR distributed Bragg reflector
  • the present invention integrates the gate, source and drain of the thin film transistor (Thin Film Transistor, TFT) and the common electrode of the micro light emitting diode unit ML by opening the via hole H in the flat layer 70 Vcom is set on the top surface 700 of the display panel (the top surface 700 of the flat layer 70), and the IC chip is bonded to the top surface 700 of the display panel by bonding the electrodes on the top surface 700, so that the bottom surface of the display panel does not have any border , In order to realize the true borderless display. By adopting this borderless display panel, seamless splicing can be realized.
  • TFT Thin Film Transistor

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Abstract

一种有源矩阵微发光二极管显示面板，包括玻璃基板（10）、平坦层（70）、微发光二极管单元、以及多个电性接合元件（81、82、83）。玻璃基板的底面（100）作为发光面，并且作为显示区，其中，底面的周缘上不设置作为非显示区的边框。平坦层与玻璃基板相对设置，平坦层顶面（700）作为接合面。微发光二极管单元设置在玻璃基板与平坦层之间，且发光二极管所发出的光线穿出发光面。多个电性接合元件设置在平坦层上。显示面板在发光面的周缘外侧不设置任何边框，从而达到无边框显示的效果。

Description

有源矩阵微发光二极管显示面板 技术领域
本发明是关于一种有源矩阵微发光二极管(Active Matrix Micro Light Emitting Diode, AM-Micro LED)显示面板，所述显示面板的底面为发光面，且所述显示面板的顶面周缘设置有电性接合(Electrical Bonding)构件以用于接合积体电路(Integrated Circuit, IC)晶片，例如源极驱动IC及栅极驱动IC、电源线、公共电极线等。由于所述显示面板的接合构件集中在顶面，而所述底面为发光面且不具有任何接合构件，因此所述发光面周围无须设置非显示区的边框，进而可通过将多个上述显示面板拼接而得到具有无缝显示的显示面板组件。
 背景技术
请参照图1，现有技术的有源矩阵液晶显示面板(AMLCD)或有源矩阵有机发光二极管(AMOLED)显示面板90在显示区900周围设置有边框91以用于接合(Bonding)驱动积体电路（Integrated Circuit, IC，包括Gate IC或Source IC），例如栅极薄膜覆晶封装(Chip On Film, COF) 92和源极COF 93。由于所述边框91四周存在Bonding区域及周边的走线，导致显示面板90的边框具有一定的宽度而形成一非显示区。因此，当需要拼接多个显示面板90组成一个更大的显示面板组件时，相邻的显示面板90间的边框91形成明显的拼接缝而影响整体显示效果。现有技术的液晶显示面板拼接显示技术可将拼接缝限制在略小于2mm，然而，所述约2mm的拼接缝仍有显着影响视觉，降低了显示面板组件的整体视觉效果。
故，有必要提供一种有源矩阵微发光二极管显示面板，以解决现有技术所存在的问题。
 技术问题
本发明人有鉴于现有技术的多个显示面板拼接后存在有接缝而无法达到无缝显示效果的问题，提供一种有源矩阵微发光二极管(Active Matrix Micro Light Emitting Diode, AM-Micro LED)显示面板。
 技术解决方案
本发明的主要目的在于提供一种有源矩阵微发光二极管显示面板，所述显示面板的底面为发光面，且所述显示面板的顶面周缘设置有电性接合(Electrical Bonding)构件以用于接合积体电路(Integrated Circuit, IC)晶片，例如源极驱动IC及栅极驱动IC、电源线、公共电极线等。由于所述显示面板的接合构件集中在顶面，而所述底面为发光面且不具有任何接合构件，因此所述发光面周围无须设置非显示区的边框，因此可通过将多个上述显示面板拼接而得到具有无缝显示的显示面板组件。
为达上述目的，所述有源矩阵微发光二极管显示面板包括：
玻璃基板，所述玻璃基板的底面作为发光面，并且作为显示区，其中，所述底面的周缘上不设置作为非显示区的边框；
平坦层，与所述玻璃基板相对设置，所述平坦层顶面作为接合面；
微发光二极管单元，设置所述玻璃基板与所述平坦层之间，且所述发光二极管所发出的光线穿出所述发光面；以及
多个电性接合元件，设置在所述平坦层上。
在本发明一实施例中，所述有源矩阵微发光二极管显示面板进一步包括有：
遮光层，设置在所述玻璃基板上；
缓冲层，设置在所述遮光层上；
有源层，设置在所述缓冲层上；
栅极绝缘层，设置在所述有源层上；
栅极金属层，设置在所述栅极绝缘层上；
第一绝缘层，设置在所述缓冲层上并且覆盖所述有源层、所述栅极绝缘层以及所述栅极金属层；
源极漏极金属层，设置在第一绝缘层上，包括源极、漏极以及公共电极；
第二绝缘层，设置在所述源极漏极金属层上；
透明电极层，设置在所述第二绝缘层上；
金属反射层，设置在所述平坦层上，将所述微发光二极管单元所发出的光线反射穿出所述底面；
其中，所述微发光二极管单元设置在所述透明电极上；其中，所述平坦层覆盖所述微发光二极管单元、所述透明电极层、所述第二绝缘层；其中，各所述电性接合元件通过一至少贯穿所述平坦层的过孔而电连接到所述栅极金属层、所述源极漏极以及所述公共电极的其中一者。
在本发明一实施例中，所述微发光二极管单元为覆晶封装结构。
在本发明一实施例中，所述微发光二极管单元为垂直封装结构。
在本发明一实施例中，所述微发光二极管单元包括P型半导体电极、N型半导体电极以及介于所述P型半导体电极与所述N型半导体电极之间的电致发光层。
在本发明一实施例中，所述微发光二极管单元包括设置在所述N型半导体电极上的布拉格反射层，用于将所述微发光二极管单元所发出光线反射穿出所述底面。
在本发明一实施例中，所述微发光二极管单元的所述P型半导体电极为透明电极，且所述N型半导体电极为非透明电极。
本发明另一目的在于提供一种有源矩阵微发光二极管显示面板，包括：
玻璃基板，所述玻璃基板的底面作为发光面，并且作为显示区，其中，所述底面的周缘上不设置作为非显示区的边框；
遮光层，设置在所述玻璃基板上；
缓冲层，设置在所述遮光层上；
有源层，设置在所述缓冲层上；
栅极绝缘层，设置在所述有源层上；
栅极金属层，设置在所述栅极绝缘层上；
第一绝缘层，设置在所述缓冲层上并且覆盖所述有源层、所述栅极绝缘层以及所述栅极金属层；
源极漏极金属层，设置在第一绝缘层上，包括源极、漏极以及公共电极；
第二绝缘层，设置在所述源极漏极金属层上；
透明电极层，设置在所述第二绝缘层上；
微发光二极管单元，设置在所述透明电极上，且所述发光二极管所发出的光线穿出所述发光面；
平坦层，与所述玻璃基板相对设置，覆盖所述微发光二极管单元、所述透明电极层、所述第二绝缘层，所述平坦层顶面作为接合面；以及
多个电性接合元件，设置在所述平坦层上，其中，各所述电性接合元件通过一至少贯穿所述平坦层的过孔而电连接到所述栅极金属层、所述源极漏极以及所述公共电极的其中一者。
在本发明一实施例中，所述微发光二极管单元为覆晶封装结构。
在本发明一实施例中，所述微发光二极管单元为垂直封装结构。
在本发明一实施例中，所述微发光二极管单元包括P型半导体电极、N型半导体电极以及介于所述P型半导体电极与所述N型半导体电极之间的电致发光层。
在本发明一实施例中，所述微发光二极管单元包括设置在所述N型半导体电极上的布拉格反射层，用于将所述微发光二极管单元所发出光线反射穿出所述底面。
在本发明一实施例中，所述微发光二极管单元的所述P型半导体电极为透明电极，且所述N型半导体电极为非透明电极。
本发明又一目的在于提供一种有源矩阵微发光二极管显示面板，包括：
玻璃基板，所述玻璃基板的底面作为发光面，并且作为显示区，其中，所述底面的周缘上不设置作为非显示区的边框；
遮光层，设置在所述玻璃基板上；
缓冲层，设置在所述遮光层上；
有源层，设置在所述缓冲层上；
栅极绝缘层，设置在所述有源层上；
栅极金属层，设置在所述栅极绝缘层上；
第一绝缘层，设置在所述缓冲层上并且覆盖所述有源层、所述栅极绝缘层以及所述栅极金属层；
源极漏极金属层，设置在第一绝缘层上，包括源极、漏极以及公共电极；
第二绝缘层，设置在所述源极漏极金属层上；
透明电极层，设置在所述第二绝缘层上；
微发光二极管单元，设置在所述透明电极上，且所述发光二极管所发出的光线穿出所述发光面；
平坦层，与所述玻璃基板相对设置，覆盖所述微发光二极管单元、所述透明电极层、所述第二绝缘层，所述平坦层顶面作为接合面；以及
多个电性接合元件，设置在所述平坦层上，其中，各所述电性接合元件通过一至少贯穿所述平坦层的过孔而电连接到所述栅极金属层、所述源极、漏极以及所述公共电极的其中一者；
其中，所述微发光二极管单元包括P型半导体电极、N型半导体电极以及介于所述P型半导体电极与所述N型半导体电极之间的电致发光层；
其中，所述微发光二极管单元包括设置在所述N型半导体电极上的布拉格反射层，用于将所述微发光二极管单元所发出光线反射穿出所述底面；
其中，所述微发光二极管单元的所述P型半导体电极为透明电极，且所述N型半导体电极为非透明电极。
 有益效果
与现有技术相比较，本发明通过在所述平坦层开设过孔的方式将薄膜晶体管(Thin Film Transistor, TFT)的栅极、源极及漏极及微发光二极管单元的公共电极设置在显示面板的顶面（平坦层的顶面），并通过对顶面电极的接合实现把IC晶片接合在显示面板的顶面，使得显示面板的底面周缘不具任何边框，以实现真正的无边框显示。通过采用此无边框显示面板，即可实现无缝拼接。
为让本发明的上述内容能更明显易懂，下文特举优选实施例，配合所附图式，作详细说明如下：
 附图说明
图1是一现有技术的具边框的显示面板的俯视图。
图2是本发明有源矩阵微发光二极管(Active Matrix Micro Light Emitting Diode, AM-Micro LED)显示面板的侧面剖视图。
图3是本发明有源矩阵微发光二极管显示面板的微发光二极管单元的放大侧面剖视图。
图4是本发明有源矩阵微发光二极管显示面板的顶面视图。
 本发明的实施方式
请参照图2，本发明有源矩阵微发光二极管(Active Matrix Micro Light Emitting Diode, AM-Micro LED)显示面板的一实施例包括：玻璃基板10、平坦层70、微发光二极管单元ML、以及多个电性接合元件81、82、83。
所述玻璃基板10的底面100作为发光面，并且作为显示区。所述底面100的周缘上不设置作为非显示区的边框。换言之，使用者从底面100观看所述有源矩阵微发光二极管显示面板时，不会看到边框结构，因此，当多个本发明有源矩阵微发光二极管显示面板拼接成一较大的有源矩阵微发光二极管显示面板组件时，相邻两有源矩阵微发光二极管显示面板的底面100之间不具任何作为非显示区的边框。
所述平坦层70与所述玻璃基板10相对设置，所述平坦层70顶面700作为接合面。
如图2及图3所示，所述微发光二极管单元ML设置于所述玻璃基板10与所述平坦层70之间，且所述发光二极管ML所发出的光线穿出所述发光面。
请参照图2及图4，所述多个电性接合元件81、82、83设置在所述平坦层70上。所述多个电性接合元件81、82、83可分别用于连接具有积体电路(Integrated Circuit, IC)晶片的覆晶薄膜封装(Chip on Film)，例如连接源极COF 85以及栅极COF 86。
在本发明较佳实施例中，所述有源矩阵微发光二极管显示面板进一步包括有：遮光层20、缓冲层30、有源层40、栅极绝缘层GI、栅极金属层GA、第一绝缘层50、源极漏极金属层SD、第二绝缘层60、透明电极层T、以及金属反射层80。
所述遮光层20设置在所述玻璃基板10上。所述缓冲层30设置在所述遮光层20上。所述有源层40设置在所述缓冲层30上。所述栅极绝缘层GI设置在所述有源层40上。所述栅极金属层GA设置在所述栅极绝缘层GI上。所述第一绝缘层50设置在所述缓冲层30上并且覆盖所述有源层40、所述栅极绝缘层GI以及所述栅极金属层GA。所述源极漏极金属层SD设置在第一绝缘层50上，包括源极、漏极以及公共电极Vcom。所述第二绝缘层60设置在所述源极漏极金属层SD上。所述透明电极层T设置在所述第二绝缘层60上。所述金属反射层80设置在所述平坦层70上，将所述微发光二极管单元ML所发出的光线反射穿出所述底面100。所述微发光二极管单元ML设置在所述透明电极层T上；其中，所述平坦层70覆盖所述微发光二极管单元ML、所述透明电极层T、所述第二绝缘层60；其中，各所述电性接合元件81、82、83通过一至少贯穿所述平坦层70的过孔H而电连接到所述栅极金属层GA、所述源极漏极以及所述公共电极Vcom的其中一者。
在本发明较佳实施例中，所述微发光二极管单元ML为覆晶封装结构或是垂直封装结构。
在本发明较佳实施例中，所述微发光二极管单元ML包括P型半导体电极P、N型半导体电极N以及介于所述P型半导体电极P与所述N型半导体电极N之间的电致发光层EL。在本发明较佳实施例中，所述微发光二极管单元ML的所述P型半导体电极P为透明电极，且所述N型半导体电极N为非透明电极。
在本发明较佳实施例中，所述微发光二极管单元ML包括设置在所述N型半导体电极N上的布拉格反射层(Distributed Bragg reflector)DBR，用于将所述微发光二极管单元ML所发出光线反射穿出所述底面100。
本发明有源矩阵微发光二极管显示面板的另一实施例包括：玻璃基板10、遮光层20、缓冲层30、有源层40、栅极绝缘层GI、栅极金属层GA、第一绝缘层50、源极漏极金属层SD、第二绝缘层60、透明电极层T、微发光二极管单元ML、平坦层70、以及多个电性接合元件81、82、83。本实施例与上一实施例差别在于本实施例不包括金属反射层。
所述玻璃基板10的底面100作为发光面，并且作为显示区，其中，所述底面100的周缘上不设置作为非显示区的边框。
所述遮光层20设置在所述玻璃基板10上。
所述缓冲层30设置在所述遮光层20上。
所述有源层40设置在所述缓冲层30上。
所述栅极绝缘层GI设置在所述有源层40上。
所述栅极金属层GA设置在所述栅极绝缘层GI上。
所述第一绝缘层50设置在所述缓冲层30上并且覆盖所述有源层40、所述栅极绝缘层GI以及所述栅极金属层GA。
所述源极漏极金属层SD设置在第一绝缘层50上，包括源极、漏极以及公共电极Vcom。
所述第二绝缘层60设置在所述源极漏极金属层SD上。
所述透明电极层T设置在所述第二绝缘层60上。
所述微发光二极管单元ML设置在所述透明电极层T上，且所述发光二极管所发出的光线穿出所述发光面。
所述平坦层70与所述玻璃基板10相对设置，覆盖所述微发光二极管单元ML、所述透明电极层T、所述第二绝缘层60，所述平坦层70顶面700作为接合面。
所述多个电性接合元件81、82、83设置在所述平坦层70上。各所述电性接合元件81、82、83通过一至少贯穿所述平坦层70的过孔H而电连接到所述栅极金属层GA、所述源极漏极以及所述公共电极Vcom的其中一者。所述多个电性接合元件81、82、83可分别用于连接具有积体电路(Integrated Circuit, IC)晶片的覆晶薄膜封装(Chip on Film)，例如连接源及栅极COF 85以及栅极COF 86。
此外，本发明有源矩阵微发光二极管显示面板制造方法大致上包括所述玻璃基板10、所述遮光层20、所述缓冲层30、所述有源层40、所述栅极绝缘层GI、所述栅极金属层GA、所述第一绝缘层50、所述源极漏极金属层SD、所述第二绝缘层60、所述透明电极层T、所述微发光二极管单元ML、所述平坦层70、所述多个电性接合元件81、82、83、以及所述金属反射层80依序设置的步骤，但部分步骤可颠倒或同时进行，例如，设置所述多个电性接合元件81、82、83、以及所述金属反射层80的步骤可颠倒或同时进行。
在本发明较佳实施例中，所述微发光二极管单元ML为覆晶封装结构或是垂直封装结构。
在本发明较佳实施例中，所述微发光二极管单元ML包括P型半导体电极P、N型半导体电极N以及介于所述P型半导体电极P与所述N型半导体电极N之间的电致发光层EL。在本发明较佳实施例中，所述微发光二极管单元ML的所述P型半导体电极P为透明电极，且所述N型半导体电极N为非透明电极。
在本发明较佳实施例中，所述微发光二极管单元ML包括设置在所述N型半导体电极N上的布拉格反射层(Distributed Bragg reflector) DBR，用于将所述微发光二极管单元ML所发出光线反射穿出所述底面100。
与现有技术相比较，本发明通过在所述平坦层70开设过孔H的方式将薄膜晶体管(Thin Film Transistor, TFT)的栅极、源极及漏极及微发光二极管单元ML的公共电极Vcom设置在显示面板的顶面700（平坦层70的顶面700），并通过对顶面700电极的接合实现把IC晶片接合在显示面板的顶面700，使得显示面板的底面周缘不具任何边框，以实现真正的无边框显示。通过采用此无边框显示面板，即可实现无缝拼接。

Claims (14)

  1. 一种有源矩阵微发光二极管显示面板，包括：
    玻璃基板，所述玻璃基板的底面作为发光面，并且作为显示区，其中，所述底面的周缘上不设置作为非显示区的边框；
    平坦层，与所述玻璃基板相对设置，所述平坦层顶面作为接合面；
    微发光二极管单元，设置所述玻璃基板与所述平坦层之间，且所述发光二极管单元所发出的光线穿出所述发光面；以及
    多个电性接合元件，设置在所述平坦层上。
  2. 如权利要求1所述的有源矩阵微发光二极管显示面板，其中所述有源矩阵微发光二极管显示面板进一步包括：
    遮光层，设置在所述玻璃基板上；
    缓冲层，设置在所述遮光层上；
    有源层，设置在所述缓冲层上；
    栅极绝缘层，设置在所述有源层上；
    栅极金属层，设置在所述栅极绝缘层上；
    第一绝缘层，设置在所述缓冲层上并且覆盖所述有源层、所述栅极绝缘层以及所述栅极金属层；
    源极漏极金属层，设置在第一绝缘层上，包括源极、漏极以及公共电极；
    第二绝缘层，设置在所述源极漏极金属层上；
    透明电极层，设置在所述第二绝缘层上；
    金属反射层，设置在所述平坦层上，将所述微发光二极管单元所发出的光线反射穿出所述底面；
    其中，所述微发光二极管单元设置在所述透明电极上；其中，所述平坦层覆盖所述微发光二极管单元、所述透明电极层、所述第二绝缘层；其中，各所述电性接合元件通过一至少贯穿所述平坦层的过孔而电连接到所述栅极金属层、所述源极、所述漏极以及所述公共电极的其中一者。
  3. 如权利要求1所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元为覆晶封装结构。
  4. 如权利要求1所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元为垂直封装结构。
  5. 如权利要求1所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元包括P型半导体电极、N型半导体电极以及介于所述P型半导体电极与所述N型半导体电极之间的电致发光层。
  6. 如权利要求5所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元包括设置在所述N型半导体电极上的布拉格反射层，用于将所述微发光二极管单元所发出光线反射穿出所述底面。
  7. 如权利要求5所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元的所述P型半导体电极为透明电极，且所述N型半导体电极为非透明电极。
  8. 一种有源矩阵微发光二极管显示面板，包括：
    玻璃基板，所述玻璃基板的底面作为发光面，并且作为显示区，其中，所述底面的周缘上不设置作为非显示区的边框；
    遮光层，设置在所述玻璃基板上；
    缓冲层，设置在所述遮光层上；
    有源层，设置在所述缓冲层上；
    栅极绝缘层，设置在所述有源层上；
    栅极金属层，设置在所述栅极绝缘层上；
    第一绝缘层，设置在所述缓冲层上并且覆盖所述有源层、所述栅极绝缘层以及所述栅极金属层；
    源极漏极金属层，设置在第一绝缘层上，包括源极、漏极以及公共电极；
    第二绝缘层，设置在所述源极漏极金属层上；
    透明电极层，设置在所述第二绝缘层上；
    微发光二极管单元，设置在所述透明电极上，且所述发光二极管所发出的光线穿出所述发光面；
    平坦层，与所述玻璃基板相对设置，覆盖所述微发光二极管单元、所述透明电极层、所述第二绝缘层，所述平坦层顶面作为接合面；以及
    多个电性接合元件，设置在所述平坦层上，其中，各所述电性接合元件通过一至少贯穿所述平坦层的过孔而电连接到所述栅极金属层、所述源极、漏极以及所述公共电极的其中一者。
  9. 如权利要求8所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元为覆晶封装结构。
  10. 如权利要求8所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元为垂直封装结构。
  11. 如权利要求8所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元包括P型半导体电极、N型半导体电极以及介于所述P型半导体电极与所述N型半导体电极之间的电致发光层。
  12. 如权利要求11所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元包括设置在所述N型半导体电极上的布拉格反射层，用于将所述微发光二极管单元所发出光线反射穿出所述底面。
  13. 如权利要求11所述的有源矩阵微发光二极管显示面板，其中所述微发光二极管单元的所述P型半导体电极为透明电极，且所述N型半导体电极为非透明电极。
  14. 一种有源矩阵微发光二极管显示面板，包括：
    玻璃基板，所述玻璃基板的底面作为发光面，并且作为显示区，其中，所述底面的周缘上不设置作为非显示区的边框；
    遮光层，设置在所述玻璃基板上；
    缓冲层，设置在所述遮光层上；
    有源层，设置在所述缓冲层上；
    栅极绝缘层，设置在所述有源层上；
    栅极金属层，设置在所述栅极绝缘层上；
    第一绝缘层，设置在所述缓冲层上并且覆盖所述有源层、所述栅极绝缘层以及所述栅极金属层；
    源极漏极金属层，设置在第一绝缘层上，包括源极、漏极以及公共电极；
    第二绝缘层，设置在所述源极漏极金属层上；
    透明电极层，设置在所述第二绝缘层上；
    微发光二极管单元，设置在所述透明电极上，且所述发光二极管所发出的光线穿出所述发光面；
    平坦层，与所述玻璃基板相对设置，覆盖所述微发光二极管单元、所述透明电极层、所述第二绝缘层，所述平坦层顶面作为接合面；以及
    多个电性接合元件，设置在所述平坦层上，其中，各所述电性接合元件通过一至少贯穿所述平坦层的过孔而电连接到所述栅极金属层、所述源极、漏极以及所述公共电极的其中一者；
    其中，所述微发光二极管单元包括P型半导体电极、N型半导体电极以及介于所述P型半导体电极与所述N型半导体电极之间的电致发光层；
    其中，所述微发光二极管单元包括设置在所述N型半导体电极上的布拉格反射层，用于将所述微发光二极管单元所发出光线反射穿出所述底面；
    其中，所述微发光二极管单元的所述P型半导体电极为透明电极，且所述N型半导体电极为非透明电极。
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