WO2020140769A1 - 显示背板及其制作方法、显示装置 - Google Patents

显示背板及其制作方法、显示装置 Download PDF

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Publication number
WO2020140769A1
WO2020140769A1 PCT/CN2019/126939 CN2019126939W WO2020140769A1 WO 2020140769 A1 WO2020140769 A1 WO 2020140769A1 CN 2019126939 W CN2019126939 W CN 2019126939W WO 2020140769 A1 WO2020140769 A1 WO 2020140769A1
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WIPO (PCT)
Prior art keywords
substrate
filling layer
display backplane
electronic device
glue material
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PCT/CN2019/126939
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English (en)
French (fr)
Inventor
薛智勇
白妮妮
彭利满
刘亮亮
张倩倩
刘淑杰
李海龙
马玲玲
米红玉
刘旭
陈强
景国栋
Original Assignee
京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Application filed by 京东方科技集团股份有限公司, 鄂尔多斯市源盛光电有限责任公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/959,379 priority Critical patent/US11258016B2/en
Publication of WO2020140769A1 publication Critical patent/WO2020140769A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/191Deposition of organic active material characterised by provisions for the orientation or alignment of the layer to be deposited
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1296Multistep manufacturing methods adapted to increase the uniformity of device parameters
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays

Definitions

  • the present invention relates to the field of display technology, and in particular, to a display backplane, a manufacturing method thereof, and a display device.
  • the surface of the substrate facing away from the electronic device and the alignment mark has a concave area, and the concave area is located near the alignment mark in the display back plate, it is easy to cause the module process , The registration mark in the display backplane cannot be recognized.
  • the first invention provides a display backplane, including:
  • a filling layer filling at least part of the recessed area on the surface of the substrate facing away from the electronic device, an orthographic projection of the at least part of the recessed area on the substrate and the alignment mark on the substrate
  • the minimum distance between the orthographic projections on is less than 200 ⁇ m.
  • the filling layer fills all recessed areas on the surface of the substrate facing away from the electronic device.
  • the substrate includes a thinned substrate.
  • the total thickness of the thinned substrate and the filling layer is smaller than the thickness of the substrate before thinning.
  • the maximum thickness of the filling layer in the direction perpendicular to the substrate is greater than or equal to the depth of the recessed region in the direction perpendicular to the substrate.
  • the optical performance of the filling layer is the same as the optical performance of the substrate.
  • the present invention provides a display device including the above display backplane.
  • the present invention provides a manufacturing method of the display backplane, which is used to manufacture the above display backplane.
  • the manufacturing method includes:
  • the minimum distance between the orthographic projection of and the orthographic projection of the registration mark on the substrate is less than 200 ⁇ m.
  • the manufacturing method further includes:
  • the step of forming a filling layer on the surface of the substrate facing away from the electronic device specifically includes:
  • Curing the glue material to form the filling layer is greater than or equal to the depth of the recessed area in the direction perpendicular to the substrate.
  • the manufacturing method further includes:
  • the glue material retention area corresponds to a target area
  • the orthographic projection of the target area on the substrate covers the at least part Orthographic projection of the recessed area on the substrate
  • the adhesive material removal area corresponds to other areas except the target area
  • the step of curing the glue material specifically includes:
  • FIG. 1 is a schematic diagram of a recessed area near the alignment mark in the related art
  • FIG. 2 is a schematic cross-sectional view along A1A2 direction in FIG. 1;
  • Figure 3 is a schematic diagram of the size of the recessed area
  • FIG. 4 is a schematic diagram of forming a filling layer in a recessed area provided by an embodiment of the present invention.
  • FIG. 5 is a schematic cross-sectional view along the direction B1B2 in FIG. 4;
  • FIG. 6 is a schematic diagram of the filling layer just filling the recessed area.
  • the preparation process of the organic light-emitting diode display device generally includes: as shown in FIGS. 1 and 2, the display backplane is first made, the display backplane includes a substrate 1 and electronic devices and alignment marks 3 formed on the substrate 1, and then the substrate The side on which the electronic device and the alignment mark 3 are formed continues to form the light-emitting unit, and then the module process is performed, and the position of the alignment mark 3 is observed and recognized from the side of the substrate 1 facing away from the electronic device and the alignment mark 3 using a microscope, and then Bind modules such as flexible circuit boards to the display backplane.
  • the surface of the substrate 1 facing away from the electronic device and the alignment mark 3 has a recessed area 4, and the recessed area 4 is located near the alignment mark 3 in the display backplane, it is easy to cause the display backplane when performing the module process The registration mark 3 in cannot be recognized.
  • An object of the present invention is to provide a display backplane, a manufacturing method thereof, and a display device, which are used to solve the problem that the recessed area existing on the substrate in the display backplane in the related art easily affects the recognition alignment mark.
  • an embodiment of the present invention provides a display backplane including a substrate 1, an electronic device and an alignment mark 3 provided on the substrate 1, and a filling layer 2, which is filled At least part of the recessed area 4 on the surface of the substrate 1 facing away from the electronic device, the minimum distance between the orthographic projection of the at least part of the recessed area 4 on the substrate 1 and the orthographic projection of the alignment mark 3 on the substrate 1 is less than 200 ⁇ m.
  • the electronic device and the alignment mark 3 can be formed on the same side of the substrate 1 first, and then a filling layer 2 can be formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 can fill the surface of the substrate 1 facing away from the electronic device At least part of the recessed area 4, the orthographic projection of the at least partly recessed area 4 on the substrate 1 is located within a predetermined range around the center of the orthographic projection of the alignment mark 3 on the substrate 1.
  • the minimum distance between the orthographic projection of the at least partially concave region 4 on the substrate 1 and the orthographic projection of the alignment mark 3 on the substrate 1 is less than 200 ⁇ m, that is, the at least partially concave region 4 on the substrate 1
  • the orthographic projection may partially overlap the orthographic projection of the registration mark 3 on the substrate 1, or the orthographic projection of the at least part of the recessed area 4 on the substrate 1 is located near the orthographic projection of the registration mark 3 on the substrate 1.
  • the above-mentioned peripheral preset range centered on the orthographic projection of the alignment mark 3 on the substrate 1 can be set according to actual needs, as long as the peripheral preset range can meet all the depressions that affect the recognition of the alignment mark 3 The area 4 is sufficient.
  • the above-mentioned peripheral preset range centered on the orthographic projection of the alignment mark 3 on the substrate 1 is limited to the edge area surrounding the display area in the display backplane, but it is not limited thereto.
  • the surface of the substrate 1 facing away from the electronic device can be observed with a microscope to accurately identify the alignment mark 3, and then the flexible circuit can be adjusted according to the alignment mark 3 Modules such as boards are bound to the display backplane.
  • a filling layer 2 is formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 can fill At least part of the recessed area 4 of the surface of the electronic device, the minimum distance between the orthographic projection of the at least partly recessed area 4 on the substrate 1 and the orthographic projection of the alignment mark 3 on the substrate 1 is less than 200 ⁇ m, so that it is located in alignment
  • the at least part of the recessed areas 4 in the preset range around the mark 3 are filled with a filling layer 2 to prevent the at least part of the recessed areas 4 from affecting the recognition alignment mark 3; therefore, the embodiment of the present invention provides When performing the module process on the display backplane, it can accurately identify the alignment mark 3 on the display backplane, so as to avoid poor alignment in the module process.
  • the process of manufacturing the filling layer 2 on the display backplane is simple and easy to implement, therefore, the mass production
  • the filling layer 2 provided in the above embodiment may also fill all the recessed regions 4 on the surface of the substrate 1 facing away from the electronic device.
  • the filling layer 2 is provided to fill all the recessed regions 4 located on the surface of the substrate 1 facing away from the electronic device, in addition to ensuring the accurate identification of the alignment mark 3 on the display backplane, it also makes the display backplane have better optics Performance, so that when the display backplane is applied to a display device, it is more conducive to the display effect of the display device.
  • the substrate 1 of the display backplane in the display device is generally thinned, which is generally performed on the display backplane
  • the surface of the substrate 1 facing away from the electronic device and the alignment mark 3 is chemically etched to reduce the thickness of the substrate 1, but this In the thinning method, it is easy to produce a concave region 4 on the thinned surface of the substrate 1.
  • the diameter of the concave region 4 is generally 20 ⁇ m-110 ⁇ m.
  • the depth H of the concave region 4 is about 1.72 ⁇ m and the diameter D About 107.57 ⁇ m.
  • the substrate 1 provided in the above embodiment includes the thinned substrate 1, it can be arranged in a direction perpendicular to the substrate 1, and the total thickness of the thinned substrate 1 and the filling layer 2 is smaller than that of the substrate 1 before thinning thickness.
  • the thickness of the filling layer 2 formed on the substrate 1 can be limited so that the filling layer 2 is located on the substrate 1 facing away from the electronic device At the same time, the concave region 4 on the surface is filled, and the total thickness of the thinned substrate 1 and the filling layer 2 in the direction perpendicular to the substrate 1 is smaller than the thickness of the substrate 1 before thinning.
  • the thickness of the generally used substrate is about 5um when it is not thinned.
  • the total thickness of the thinned substrate 1 and the filling layer 2 can be controlled between 2.2 ⁇ m-3 ⁇ m , But not limited to this.
  • the thickness of the thinning of the substrate 1 is generally limited.
  • the filling layer 2 is formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 can fill the concave region 4 on the surface of the substrate 1 facing away from the electronic device, therefore,
  • a thicker thickness may be thinned to leave a margin for forming the filling layer 2 so that the total thickness of the thinned substrate 1 and the filling layer 2 Can better meet the needs of thin.
  • the thickness of the display backplane can be adjusted by controlling the thickness of the substrate 1 and the thickness of the filling layer 2.
  • the maximum thickness of the filling layer 2 in the direction perpendicular to the substrate 1 may be set to be greater than or equal to the depth of the recessed region 4 in the direction perpendicular to the substrate 1.
  • the thickness of the above-mentioned filling layer 2 can be set according to actual needs, so as to be able to completely fill the recessed area 4. As shown in FIG. 6, when the maximum thickness of the filling layer 2 in the direction perpendicular to the substrate 1 is equal to the recess When the depth of the area 4 in the direction perpendicular to the substrate 1, the filling layer 2 can just fill the recessed area 4, so that the filling layer 2 can repair the recessed area 4 while making the display backplane have a minimum thickness.
  • the filling layer 2 is equivalent to a flattening layer, that is, a filling layer 2 includes a portion filled in the recessed area 4 and a portion located outside the recessed area 4, and the surface of the filling layer 2 facing away from the electronic device is a flat surface.
  • the filling layer 2 of this structure not only repairs the recessed area 4 but also makes the surface of the display backplane facing away from the electronic device more smooth, which ensures that the display backplane has better optical performance.
  • the optical performance of the filling layer 2 may be the same as or similar to the optical performance of the substrate 1.
  • the optical performance of the filling layer 2 is the same as or similar to the optical performance of the substrate 1, so that no refractive interface is formed between the filling layer 2 and the substrate 1, thereby preventing the filling layer 2 from adversely affecting the optical performance of the display backplane Impact, to achieve a fundamental solution to the impact of the recessed area 4 on the display backplane and module technology.
  • the filling layer 2 There are various types of the filling layer 2 above.
  • a plastic material similar to the optical performance of the substrate 1 may be used.
  • acrylic may be used for filling.
  • An embodiment of the present invention further provides a display device, including the display backplane provided by the above embodiment.
  • the display device provided by the embodiment of the present invention can avoid the display device when including the above display backplane The problem of poor alignment occurs in the process, which ensures the production yield of the display device.
  • the display backplane provided by the foregoing embodiment has high mass production feasibility, the display device provided by the embodiment of the present invention can better adapt to the production line requirements of the display device when the display backplane is included.
  • An embodiment of the present invention also provides a manufacturing method of a display backplane, which is used to manufacture the display backplane provided by the foregoing embodiment.
  • the manufacturing method includes:
  • a filling layer 2 is formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 fills at least part of the recessed area 4 on the surface of the substrate 1 facing away from the electronic device, and the orthographic projection and alignment mark of the at least part of the recessed area 4 on the substrate 1 3
  • the minimum distance between orthographic projections on the substrate 1 is less than 200 ⁇ m.
  • the electronic device and the alignment mark 3 can be fabricated on the same side of the substrate 1, and then a filling layer 2 can be formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 can fill the surface of the substrate 1 facing away from the electronic device ⁇ At least part of the recessed area 4.
  • the orthographic projection of the at least part of the recessed area 4 on the substrate 1 may be located in a peripheral preset range centered on the orthographic projection of the alignment mark 3 on the substrate 1, and the peripheral preset range may be based on actual needs Setting, as long as the preset range of the periphery can include all the recessed regions 4 that have an influence on the recognition of the registration mark 3; for example, the periphery around the orthographic projection of the registration mark 3 on the substrate 1 as the center
  • the preset range is limited to the edge area surrounding the display area in the display backplane, but it is not limited to this.
  • the display backplane manufactured by the above manufacturing method is used to form a display device, in the module process, the surface of the substrate 1 in the display backplane facing away from the electronic device can be observed with a microscope to accurately identify the alignment mark 3, and then The alignment mark 3 binds modules such as flexible circuit boards to the display backplane.
  • a filling layer 2 is formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 can fill at least part of the recessed area 4 on the surface of the substrate 1 facing away from the electronic device ,
  • the minimum distance between the orthographic projection of the at least part of the recessed area 4 on the substrate 1 and the orthographic projection of the alignment mark 3 on the substrate 1 is less than 200 ⁇ m, so that the At least part of the recessed area 4 is filled with a filling layer 2 to avoid the impact of the at least part of the recessed area 4 on the identification alignment mark 3; therefore, the display backplane manufactured by using the manufacturing method provided by the embodiment of the present invention is used to mold When assembling the process, it can accurately identify the alignment mark 3 on the display backplane, so as to avoid poor alignment in the module process.
  • the process of manufacturing the filling layer 2 on the display backplane is simple and easy. Therefore, the manufacturing method provided by the embodiment of the present invention
  • the manufacturing method of the display backplane provided by the above embodiment further includes: performing a thinning operation on the surface of the substrate 1 facing away from the electronic device.
  • the substrate 1 of the display backplane in the display device may be thinned. After device and alignment mark 3.
  • the thickness of the substrate 1 can be reduced by chemically etching the surface of the substrate 1 facing away from the electronic device and the alignment mark 3.
  • the substrate 1 facing away from the electronic device when performing a thinning operation on the surface of the substrate 1 facing away from the electronic device, it may be arranged in a direction perpendicular to the substrate 1, and the total thickness of the thinned substrate 1 and the filling layer 2 is less than that of the thinned substrate 1 Front thickness.
  • the thickness of the filling layer 2 formed on the substrate 1 can be limited so that the filling layer 2 will be located on the back of the substrate 1
  • the total thickness of the thinned substrate 1 and the filling layer 2 in the direction perpendicular to the substrate 1 is smaller than the thickness of the substrate 1 before thinning.
  • the thickness of the generally used substrate is about 5um when it is not thinned.
  • the total thickness of the thinned substrate 1 and the filling layer 2 can be controlled between 2.2 ⁇ m-3 ⁇ m , But not limited to this.
  • the thickness of the thinning of the substrate 1 is generally limited.
  • the filling layer 2 is formed on the surface of the substrate 1 facing away from the electronic device, and the filling layer 2 can fill the depression on the surface of the substrate 1 facing away from the electronic device Region 4, therefore, when the substrate 1 of the display backplane is thinned, a thicker thickness can be thinned to leave a margin for forming the filling layer 2, so that the total thickness of the thinned substrate 1 and the filling layer 2 The thickness can better meet the needs of thinness.
  • the step of forming the filling layer 2 on the surface of the substrate 1 facing away from the electronic device specifically includes:
  • a glue material is coated on the surface of the substrate 1 facing away from the electronic device, and the glue material fills all the recessed regions 4.
  • the optical performance of the glue material is the same as that of the substrate 1;
  • the glue material is cured to form a filling layer 2 whose maximum thickness in the direction perpendicular to the substrate 1 is greater than or equal to the depth of the recessed region 4 in the direction perpendicular to the substrate 1.
  • a coating process may be used to apply a glue material on the surface of the substrate 1 facing away from the electronic device.
  • the glue material can fill all the recessed regions 4, and then the glue material is cured to form the filling layer 2.
  • the filling layer 2 Since the equipment used in the current coating process has high accuracy, when the filling layer 2 is formed by coating, the filling effect of the filling layer 2 on the concave region 4 can be well guaranteed. More specifically, when the filling layer 2 is prepared by a glue developing machine, since the accuracy of the glue developing machine can be achieved to 0.9 ⁇ m, the depth on the substrate 1 is 1.7 ⁇ m (currently the depth of the recessed area 4 is generally 1.7 ⁇ m (Left and right) the recessed area 4 and the manufactured filling layer 2 can achieve good filling thereof.
  • the optical properties of the adhesive material used may be the same as or similar to the optical properties of the substrate 1, so that no refractive interface will be formed between the filling layer 2 and the substrate 1, thereby avoiding the optical performance of the filling layer 2 on the display backplane It has an adverse effect and fundamentally solves the effect of the recessed area 4 on the display backplane and module process.
  • the filling layer 2 can be made of acrylic.
  • the thickness of the above-mentioned filling layer 2 can be set according to actual needs, so as to be able to completely fill the recessed area 4, as shown in FIG. 6, when the maximum thickness of the filling layer 2 in the direction perpendicular to the substrate 1 is equal to the recessed area 4 At a depth in the direction perpendicular to the substrate 1, the filling layer 2 can fill the recessed area 4 just so that the filling layer 2 repairs the recessed area 4 while allowing the display backplane to have a minimum thickness. As shown in FIG.
  • the filling layer 2 is equivalent to a flattening layer, that is, a filling layer 2 includes a portion filled in the recessed area 4 and a portion located outside the recessed area 4, and the surface of the filling layer 2 facing away from the electronic device is a flat surface.
  • the filling layer 2 of this structure not only repairs the recessed area 4 but also makes the surface of the display backplane facing away from the electronic device more smooth, which ensures that the display backplane has better optical performance.
  • the method for manufacturing the display backplane provided by the above embodiment further includes:
  • the glue material retention area corresponds to the target area
  • the orthographic projection of the target area on the substrate 1 covering the at least part of the recessed area 4 on the substrate 1 Orthographic projection
  • the area where the glue material is removed corresponds to the area other than the target area
  • the steps for curing the adhesive include:
  • an exposure operation may be performed on the glue material to form a glue material retention area and a glue material removal Area, where the glue retention area corresponds to the target area, the orthographic projection of the target area on the substrate 1 covers the orthographic projection of the at least part of the recessed area 4 on the substrate 1; the glue removal area and the area other than the target area Corresponding to other areas; then remove the glue material in the glue material removal area, and keep the glue material in the glue material retention area, so that the remaining glue material can fill the at least part of the recessed area 4 well, before removing After the adhesive material located in the adhesive material removal area, the adhesive material located in the adhesive material retention area can be cured, so as to complete the production of the filling layer 2 filling only the at least part of the recessed area 4.
  • the above method of manufacturing the filling layer 2 filling only the at least part of the recessed area 4 not only ensures that when the display backplane manufactured by using the manufacturing method provided in the above embodiment is applied to the module process, the pair of display backplanes can be accurately identified Bit mark 3, in order to avoid bad alignment in the module process, it also minimizes the amount of glue used, and reduces the production cost of the display backplane.

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Abstract

一种显示背板及其制作方法、显示装置。所述显示背板包括:基底(1),设置在所述基底(1)上的电子器件和对位标识(3),以及填充层(2),所述填充层(2)填充位于所述基底(1)背向所述电子器件的表面的至少部分凹陷区域(4),所述至少部分凹陷区域(4)在所述基底(1)上的正投影与所述对位标识(3)在所述基底(1)上的正投影之间的最小距离小于200μm。

Description

显示背板及其制作方法、显示装置
相关申请的交叉引用
本公开主张在2019年01月04日在中国提交的中国专利申请号No.201910007859.8的优先权,其全部内容通过引用包含于此。
技术领域
本发明涉及显示技术领域,尤其涉及一种显示背板及其制作方法、显示装置。
背景技术
在有机发光二极管显示装置的制备过程中,当基底背向电子器件和对位标识的表面具有凹陷区域,且该凹陷区域位于显示背板中的对位标识附近时,容易导致在进行模组工艺时,显示背板中的对位标识无法被识别。
发明内容
一方面,本发明的第提供一种显示背板,包括:
基底,
设置在所述基底上的电子器件和对位标识,以及
填充层,所述填充层填充位于所述基底背向所述电子器件的表面的至少部分凹陷区域,所述至少部分凹陷区域在所述基底上的正投影与所述对位标识在所述基底上的正投影之间的最小距离小于200μm。
可选地,所述填充层填充位于所述基底背向所述电子器件的表面的全部凹陷区域。
可选地,所述基底包括减薄后的基底,在垂直于所述基底的方向上,该减薄后的基底与所述填充层的总厚度小于所述基底在减薄前的厚度。
可选地,所述填充层在垂直于所述基底的方向上的最大厚度大于或等于所述凹陷区域在垂直于所述基底的方向上的深度。
可选地,所述填充层的光学性能与所述基底的光学性能相同。
另一方面,基于上述显示背板的技术方案,本发明提供一种显示装置,包括上述显示背板。
又一方面,基于上述显示背板的技术方案,本发明提供一种显示背板的制作方法,用于制作上述显示背板,所述制作方法包括:
在基底上形成电子器件和对位标识;
在所述基底背向所述电子器件的表面形成填充层,所述填充层填充位于所述基底背向所述电子器件的表面的至少部分凹陷区域,所述至少部分凹陷区域在所述基底上的正投影与所述对位标识在所述基底上的正投影之间的最小距离小于200μm。
可选地,在形成所述填充层之前,所述制作方法还包括:
对所述基底背向所述电子器件的表面进行减薄操作,在垂直于所述基底的方向上,减薄后的基底与所述填充层的总厚度小于所述基底在减薄前的厚度。
可选地,当所述填充层填充位于所述基底背向所述电子器件的表面的全部凹陷区域时,所述在所述基底背向所述电子器件的表面形成填充层的步骤具体包括:
在所述基底背向所述电子器件的表面涂布胶材,所述胶材填充所述全部凹陷区域,所述胶材的光学性能与所述基底的光学性能相同;
对所述胶材进行固化,形成所述填充层,所述填充层在垂直于所述基底的方向上的最大厚度大于或等于所述凹陷区域在垂直于所述基底的方向上的深度。
可选地,当所述填充层填充所述基底背向所述电子器件的表面的至少部分凹陷区域时,在对所述胶材进行固化之前,所述制作方法还包括:
对所述胶材进行曝光,形成胶材保留区域和胶材去除区域,其中所述胶材保留区域与目标区域相对应,所述目标区域在所述基底上的正投影,覆盖所述至少部分凹陷区域在所述基底上的正投影;所述胶材去除区域与除所述目标区域之外的其它区域相对应;
将位于所述胶材去除区域的胶材去除;
所述对所述胶材进行固化的步骤具体包括:
对位于所述胶材保留区域的胶材进行固化。
附图说明
此处所说明的附图用来提供对本发明的进一步理解,构成本发明的一部分,本发明的示意性实施例及其说明用于解释本发明,并不构成对本发明的不当限定。在附图中:
图1为相关技术中在对位标识附近产生凹陷区域的示意图;
图2为图1中沿A1A2方向的截面示意图;
图3为凹陷区域的尺寸示意图;
图4为本发明实施例提供的在凹陷区域形成填充层的示意图;
图5为图4中沿B1B2方向的截面示意图;
图6为填充层刚好填平凹陷区域的示意图。
附图标记:
1-基底,      2-填充层,
3-对位标识,  4-凹陷区域。
具体实施方式
为了进一步说明本发明实施例提供的显示背板及其制作方法、显示装置,下面结合说明书附图进行详细描述。
有机发光二极管显示装置的制备过程一般包括:如图1和图2所示,先制作显示背板,显示背板包括基底1和形成在基底1上的电子器件和对位标识3,然后在基底形成有电子器件和对位标识3的一侧继续形成发光单元,接着进行模组工艺,利用显微镜从基底1背向电子器件和对位标识3的一侧观察识别对位标识3的位置,然后在显示背板上绑定柔性电路板等模块。
但是当基底1背向电子器件和对位标识3的表面具有凹陷区域4,且该凹陷区域4位于显示背板中的对位标识3附近时,容易导致在进行模组工艺时,显示背板中的对位标识3无法被识别。
本发明的目的在于提供一种显示背板及其制作方法、显示装置,用于解 决相关技术中存在于显示背板中基底上的凹陷区域,容易对识别对位标识产生影响的问题。
如图4-图6所示,本发明实施例提供了一种显示背板,包括基底1,设置在基底1上的电子器件和对位标识3,以及填充层2,所述填充层2填充位于基底1背向电子器件的表面的至少部分凹陷区域4,至少部分凹陷区域4在基底1上的正投影与对位标识3在基底1上的正投影之间的最小距离小于200μm。
具体地,可先在基底1的同一侧形成电子器件和对位标识3,然后在基底1背向电子器件的表面形成填充层2,该填充层2能够填充位于基底1背向电子器件的表面的至少部分凹陷区域4,该至少部分凹陷区域4在基底1上的正投影,位于以对位标识3在基底1上的正投影为中心的周边预设范围内。更详细地说,该至少部分凹陷区域4在基底1上的正投影与对位标识3在基底1上的正投影之间的最小距离小于200μm,即该至少部分凹陷区域4在基底1上的正投影可与对位标识3在基底1上的正投影部分重叠,或者该至少部分凹陷区域4在基底1上的正投影位于对位标识3在基底1上的正投影的附近。需要说明,上述以对位标识3在基底1上的正投影为中心的周边预设范围可根据实际需要设置,只需满足该周边预设范围能够包括对识别对位标识3产生影响的全部凹陷区域4即可;示例性的,将上述以对位标识3在基底1上的正投影为中心的周边预设范围限制为所述显示背板中围绕显示区域的边缘区域,但不仅限于此。
当应用上述显示背板制作显示装置时,在模组工艺中,可以利用显微镜观察基底1背向电子器件的表面,以准确识别对位标识3,然后再根据该对位标识3,将柔性电路板等模块绑定在显示背板上。
根据上述显示背板的具体结构和应用方式可知,本发明实施例提供的显示背板中,在基底1背向电子器件的表面制作了填充层2,该填充层2能够填充位于基底1背向电子器件的表面的至少部分凹陷区域4,所述至少部分凹陷区域4在基底1上的正投影与对位标识3在基底1上的正投影之间的最小距离小于200μm,从而使得位于对位标识3周边预设范围内的所述至少部分凹陷区域4中均填充有填充层2,避免了所述至少部分凹陷区域4对识别 对位标识3产生影响;因此,在应用本发明实施例提供的显示背板进行模组工艺时,能够准确识别显示背板上的对位标识3,以避免模组工艺中产生对位不良。另外,在显示背板上制作填充层2的工艺简单易行,因此,本发明实施例提供的显示背板的量产可行性强。
可选地,上述实施例提供的填充层2还可以填充位于基底1背向电子器件的表面的全部凹陷区域4。
具体地,设置填充层2填充位于基底1背向电子器件的表面的全部凹陷区域4,除了能够保证准确识别显示背板上的对位标识3之外,还使得显示背板具有更好的光学性能,这样在将该显示背板应用在显示装置中时,更有利于显示装置的显示效果。
可选地,由于显示装置越来越向着薄型化发展,目前为了实现显示装置的薄型化,一般会对显示装置中显示背板的基底1进行减薄处理,该减薄处理一般在显示背板制作完成之后进行,即在基底1上制作完电子器件和对位标识3之后,对基底1背向电子器件和对位标识3的表面进行化学腐蚀,以减薄基底1的厚度,但是这种减薄方式,容易在基底1减薄面上产生凹陷区域4,凹陷区域4的直径一般在20μm-110μm,示例性的,如图3所示,凹陷区域4的深度H约为1.72μm,直径D约为107.57μm。
当上述实施例提供的基底1包括减薄后的基底1时,可设置在垂直于基底1的方向上,该减薄后的基底1与填充层2的总厚度小于基底1在减薄前的厚度。
具体地,为了保证减薄后的基底1能够使得显示背板更加薄型化,可对形成在基底1上的填充层2的厚度进行限制,以使得填充层2在将位于基底1背向电子器件的表面的凹陷区域4填满的同时,还满足在垂直于基底1的方向上,减薄后的基底1与填充层2的总厚度小于基底1在减薄前的厚度。示例性的,一般使用的基底在未减薄时,厚度在5um左右,在对基底进行减薄后,该减薄后的基底1与填充层2的总厚度可控制在2.2μm-3μm之间,但不仅限于此。
可选地,相关技术中在对显示背板中的基底1进行减薄操作时,为了避免过度减薄使基底1的表面产生大量的凹陷区域4,一般会限制对基底1减 薄的厚度。而上述实施例提供的显示背板中,由于在基底1背向电子器件的表面形成了填充层2,且该填充层2能够填充位于基底1背向电子器件的表面的凹陷区域4,因此,在对上述实施例提供的显示背板的基底1进行减薄时,可以减薄更厚的厚度,以为形成填充层2留出余量,使得减薄后的基底1和填充层2的总厚度能够更好的满足薄型化需求。
另外值得注意,当对显示背板的厚度有要求时,可通过控制对基底1的减薄厚度,以及填充层2的厚度,实现对显示背板的厚度调节。
在一些实施例中,可设置填充层2在垂直于基底1的方向上的最大厚度大于或等于凹陷区域4在垂直于基底1的方向上的深度。
具体地,上述填充层2的厚度可根据实际需要设置,以能够完全填满凹陷区域4为宜,如图6所示,当设置填充层2在垂直于基底1的方向上的最大厚度等于凹陷区域4在垂直于基底1的方向上的深度时,填充层2能够将凹陷区域4刚好填满,实现填充层2在对凹陷区域4进行修补的同时,使显示背板具有最小的厚度。
如图5所示,当设置填充层2在垂直于基底1的方向上的最大厚度大于凹陷区域4在垂直于基底1的方向上的深度时,填充层2相当于平坦化层,即填充层2包括填充在凹陷区域4的部分以及位于凹陷区域4之外的部分,该填充层2背向电子器件的表面为平整的表面。这种结构的填充层2不仅对凹陷区域4进行修补,还使得显示背板背向电子器件的表面更加平整,保证了显示背板具有更好的光学性能。
在一些实施例中,可设置填充层2的光学性能与基底1的光学性能相同或相似。
具体地,设置填充层2的光学性能与基底1的光学性能相同或相似,能够使得填充层2与基底1之间不会形成折射界面,从而避免填充层2对显示背板的光学性能产生不良影响,实现从根本上解决凹陷区域4对显示背板和模组工艺产生的影响。上述填充层2的种类多种多样,示例性的,可选用与基底1的光学性能相似的胶材制作,可选地,当显示背板中的基底1选用玻璃材质时,可采用亚克力制作填充层2。
本发明实施例还提供了一种显示装置,包括上述实施例提供的显示背板。
由于上述实施例提供的显示背板在进行模组工艺时,能够准确识别显示背板上的对位标识3,因此本发明实施例提供的显示装置在包括上述显示背板时,能够避免显示装置中出现对位不良的问题,保证了显示装置的制作良率。另外,由于上述实施例提供的显示背板量产可行性强,因此,本发明实施例提供的显示装置在包括上述显示背板时,能够更好的适应显示装置的产线要求。
本发明实施例还提供了一种显示背板的制作方法,用于制作上述实施例提供的显示背板,所述制作方法包括:
在基底1上形成电子器件和对位标识3;
在基底1背向电子器件的表面形成填充层2,填充层2填充位于基底1背向电子器件的表面的至少部分凹陷区域4,至少部分凹陷区域4在基底1上的正投影与对位标识3在基底1上的正投影之间的最小距离小于200μm。
具体地,可先在基底1的同一侧制作电子器件和对位标识3,然后在基底1背向电子器件的表面形成填充层2,该填充层2能够填充位于基底1背向电子器件的表面的至少部分凹陷区域4。需要说明,所述至少部分凹陷区域4在基底1上的正投影,可以位于以对位标识3在基底1上的正投影为中心的周边预设范围内,该周边预设范围可根据实际需要设置,只需满足该周边预设范围能够包括对识别对位标识3产生影响的全部凹陷区域4即可;示例性的,将上述以对位标识3在基底1上的正投影为中心的周边预设范围限制为所述显示背板中围绕显示区域的边缘区域,但不仅限于此。
当应用采用上述制作方法制作的显示背板形成显示装置时,在模组工艺中,可以利用显微镜观察显示背板中基底1背向电子器件的表面,以准确识别对位标识3,然后再根据该对位标识3,将柔性电路板等模块绑定在显示背板上。
本发明实施例提供的显示背板的制作方法中,在基底1背向电子器件的表面制作了填充层2,该填充层2能够填充位于基底1背向电子器件的表面的至少部分凹陷区域4,所述至少部分凹陷区域4在基底1上的正投影与对位标识3在基底1上的正投影之间的最小距离小于200μm,从而使得位于对位标识3周边预设范围内的所述至少部分凹陷区域4中均填充有填充层2, 避免了所述至少部分凹陷区域4对识别对位标识3产生影响;因此,在应用采用本发明实施例提供制作方法制作的显示背板进行模组工艺时,能够准确识别显示背板上的对位标识3,以避免模组工艺中产生对位不良。另外,在显示背板上制作填充层2的工艺简单易行,因此,采用本发明实施例提供的制作方法制作显示背板具有较强的量产可行性。
可选地,在形成填充层2之前,上述实施例提供的显示背板的制作方法还包括:对基底1背向电子器件的表面进行减薄操作。
具体地,由于显示装置越来越向着薄型化发展,为了实现显示装置的薄型化,可以对显示装置中显示背板的基底1进行减薄处理,该减薄处理可以在基底1上制作完电子器件和对位标识3之后进行。可采用的具体减薄方式多种多样,示例性的,可通过对基底1背向电子器件和对位标识3的表面进行化学腐蚀,来减薄基底1的厚度。
可选地,当对基底1背向电子器件的表面进行减薄操作时,可设置在垂直于基底1的方向上,减薄后的基底1与填充层2的总厚度小于基底1在减薄前的厚度。更详细地说,为了保证减薄后的基底1能够使得显示背板更加薄型化,可对形成在基底1上的填充层2的厚度进行限制,以使得填充层2在将位于基底1背向电子器件的表面的凹陷区域4填满的同时,还满足在垂直于基底1的方向上,减薄后的基底1与填充层2的总厚度小于基底1在减薄前的厚度。示例性的,一般使用的基底在未减薄时,厚度在5um左右,在对基底进行减薄后,该减薄后的基底1与填充层2的总厚度可控制在2.2μm-3μm之间,但不仅限于此。
可选地,在对显示背板中的基底1进行减薄操作时,为了避免过度减薄使基底1的表面产生大量的凹陷区域4,一般会限制对基底1减薄的厚度。而采用上述实施例提供的制作方法制作的显示背板中,由于在基底1背向电子器件的表面形成了填充层2,且该填充层2能够填充位于基底1背向电子器件的表面的凹陷区域4,因此,在对显示背板的基底1进行减薄时,可以减薄更厚的厚度,以为形成填充层2留出余量,从而使得减薄后的基底1和填充层2的总厚度能够更好的满足薄型化需求。
可选地,当填充层2填充位于基底1背向电子器件的表面的全部凹陷区 域4时,在基底1背向电子器件的表面形成填充层2的步骤具体包括:
在基底1背向电子器件的表面涂布胶材,胶材填充全部凹陷区域4,胶材的光学性能与基底1的光学性能相同;
对胶材进行固化,形成填充层2,填充层2在垂直于基底1的方向上的最大厚度大于或等于凹陷区域4在垂直于基底1的方向上的深度。
具体地,可采用涂布工艺在基底1背向电子器件的表面涂布胶材,胶材能够填充全部凹陷区域4,然后对胶材进行固化,形成填充层2。
由于目前涂布工艺所用到的设备均具有较高的精度,因此在涂布形成填充层2时,能够很好的保证填充层2对凹陷区域4的填充效果。更具体的说,利用涂胶显影机制备填充层2时,由于涂胶显影机的精度能够实现至0.9μm,因此,对于基底1上深度为1.7μm(目前凹陷区域4的深度一般在1.7μm左右)的凹陷区域4,所制作的填充层2能够实现对其良好的填充。
值得注意,采用的胶材的光学性能可与基底1的光学性能相同或相似,这样能够使得填充层2与基底1之间不会形成折射界面,从而避免填充层2对显示背板的光学性能产生不良影响,实现从根本上解决凹陷区域4对显示背板和模组工艺产生的影响。在一些实施例中,当显示背板中的基底1选用玻璃材质时,可采用亚克力制作填充层2。
另外,上述填充层2的厚度可根据实际需要设置,以能够完全填满凹陷区域4为宜,如图6所示,当设置填充层2在垂直于基底1的方向上的最大厚度等于凹陷区域4在垂直于基底1的方向上的深度时,填充层2能够将凹陷区域4刚好填满,使得填充层2在对凹陷区域4进行修补的同时,使显示背板具有最小的厚度。如图5所示,当设置填充层2在垂直于基底1的方向上的最大厚度大于凹陷区域4在垂直于基底1的方向上的深度时,填充层2相当于平坦化层,即填充层2包括填充在凹陷区域4的部分以及位于凹陷区域4之外的部分,该填充层2背向电子器件的表面为平整的表面。这种结构的填充层2不仅对凹陷区域4进行修补,还使得显示背板背向电子器件的表面更加平整,保证了显示背板具有更好的光学性能。
可选地,当填充层2填充基底1背向电子器件的表面的至少部分凹陷区域4时,在对胶材进行固化之前,上述实施例提供的显示背板的制作方法还 包括:
对胶材进行曝光,形成胶材保留区域和胶材去除区域,其中胶材保留区域与目标区域相对应,目标区域在基底1上的正投影,覆盖所述至少部分凹陷区域4在基底1上的正投影;胶材去除区域与除目标区域之外的其它区域相对应;
将位于胶材去除区域的胶材去除;
对胶材进行固化的步骤具体包括:
对位于胶材保留区域的胶材进行固化。
具体地,当填充层2填充基底1背向电子器件的表面的至少部分凹陷区域4时,在对胶材进行固化之前,可以对胶材进行曝光操作,以形成胶材保留区域和胶材去除区域,其中胶材保留区域与目标区域相对应,目标区域在基底1上的正投影,覆盖所述至少部分凹陷区域4在基底1上的正投影;胶材去除区域与除目标区域之外的其它区域相对应;然后将位于胶材去除区域的胶材去除,将位于胶材保留区域的胶材保留,这样使得保留下来的胶材能够很好的填充所述至少部分凹陷区域4,在去除位于胶材去除区域的胶材后,可对位于胶材保留区域的胶材进行固化,从而完成仅填充所述至少部分凹陷区域4的填充层2的制作。
上述制作仅填充所述至少部分凹陷区域4的填充层2的方法,不仅保证了在应用采用上述实施例提供制作方法制作的显示背板进行模组工艺时,能够准确识别显示背板上的对位标识3,以避免模组工艺中产生对位不良,还最大限度的减少了胶材的使用量,很好的降低了显示背板的制作成本。
除非另外定义,本公开使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其它元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置 改变后,则该相对位置关系也可能相应地改变。
可以理解,当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
在上述实施方式的描述中,具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种显示背板,包括:
    基底,
    设置在所述基底上的电子器件和对位标识,以及
    填充层,所述填充层填充位于所述基底背向所述电子器件的表面的至少部分凹陷区域,所述至少部分凹陷区域在所述基底上的正投影与所述对位标识在所述基底上的正投影之间的最小距离小于200μm。
  2. 根据权利要求1所述的显示背板,其中,所述填充层填充位于所述基底背向所述电子器件的表面的全部凹陷区域。
  3. 根据权利要求1或2所述的显示背板,其中,所述基底包括减薄后的基底,在垂直于所述基底的方向上,该减薄后的基底与所述填充层的总厚度小于所述基底在减薄前的厚度。
  4. 根据权利要求1或2所述的显示背板,其中,所述填充层在垂直于所述基底的方向上的最大厚度大于或等于所述凹陷区域在垂直于所述基底的方向上的深度。
  5. 根据权利要求1或2所述的显示背板,其中,所述填充层的光学性能与所述基底的光学性能相同。
  6. 一种显示装置,包括如权利要求1~5中任一项所述的显示背板。
  7. 一种显示背板的制作方法,用于制作如权利要求1~5中任一项所述的显示背板,所述制作方法包括:
    在基底上形成电子器件和对位标识;
    在所述基底背向所述电子器件的表面形成填充层,所述填充层填充位于所述基底背向所述电子器件的表面的至少部分凹陷区域,所述至少部分凹陷区域在所述基底上的正投影与所述对位标识在所述基底上的正投影之间的最小距离小于200μm。
  8. 根据权利要求7所述的显示背板的制作方法,其中,在形成所述填充层之前,所述制作方法还包括:
    对所述基底背向所述电子器件的表面进行减薄操作,在垂直于所述基底 的方向上,减薄后的基底与所述填充层的总厚度小于所述基底在减薄前的厚度。
  9. 根据权利要求7或8所述的显示背板的制作方法,其中,当所述填充层填充位于所述基底背向所述电子器件的表面的全部凹陷区域时,所述在所述基底背向所述电子器件的表面形成填充层的步骤具体包括:
    在所述基底背向所述电子器件的表面涂布胶材,所述胶材填充所述全部凹陷区域,所述胶材的光学性能与所述基底的光学性能相同;
    对所述胶材进行固化,形成所述填充层,所述填充层在垂直于所述基底的方向上的最大厚度大于或等于所述凹陷区域在垂直于所述基底的方向上的深度。
  10. 根据权利要求9所述的显示背板的制作方法,其中,当所述填充层填充所述基底背向所述电子器件的表面的至少部分凹陷区域时,在对所述胶材进行固化之前,所述制作方法还包括:
    对所述胶材进行曝光,形成胶材保留区域和胶材去除区域,其中所述胶材保留区域与目标区域相对应,所述目标区域在所述基底上的正投影,覆盖所述至少部分凹陷区域在所述基底上的正投影;所述胶材去除区域与除所述目标区域之外的其它区域相对应;
    将位于所述胶材去除区域的胶材去除;
    所述对所述胶材进行固化的步骤具体包括:
    对位于所述胶材保留区域的胶材进行固化。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104362079A (zh) * 2014-09-15 2015-02-18 合肥京东方光电科技有限公司 一种轻薄型显示面板及其制作方法、以及显示装置
CN105378821A (zh) * 2013-07-16 2016-03-02 索尼公司 制造衬底的方法和制造电子器件的方法
CN105785632A (zh) * 2014-09-30 2016-07-20 乐金显示有限公司 显示装置
CN106229295A (zh) * 2016-09-05 2016-12-14 京东方科技集团股份有限公司 显示面板的减薄方法和显示装置
CN109728165A (zh) * 2019-01-04 2019-05-07 京东方科技集团股份有限公司 一种显示背板及其制作方法、显示装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6232228B1 (en) * 1998-06-25 2001-05-15 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor devices, etching composition for manufacturing semiconductor devices, and semiconductor devices made using the method
NL1024090C2 (nl) * 2003-08-12 2005-02-15 Otb Group Bv Werkwijze voor het aanbrengen van een dunne-film-afsluitlaagsamenstel op een device met microstructuren, alsmede een device voorzien van een dergelijk dunne-film-afsluitlaagsamenstel.
US7206472B2 (en) * 2005-03-15 2007-04-17 Fujitsu Ltd. Optical backplanes with integrated optical couplers and methods of making the same
GB0624994D0 (en) * 2006-12-14 2007-01-24 Plastic Logic Ltd Distortion tolerant pixel design
US9646831B2 (en) * 2009-11-03 2017-05-09 The Trustees Of Columbia University In The City Of New York Advanced excimer laser annealing for thin films
US9450038B2 (en) * 2014-07-31 2016-09-20 Lg Display Co., Ltd. Flexible display
CN110459677B (zh) * 2014-08-01 2022-11-22 正交公司 有机电子装置的光刻法图案化
US9349758B2 (en) * 2014-09-30 2016-05-24 Lg Display Co., Ltd. Flexible display device with divided power lines and manufacturing method for the same
US9287329B1 (en) * 2014-12-30 2016-03-15 Lg Display Co., Ltd. Flexible display device with chamfered polarization layer
CN107068861B (zh) * 2016-07-15 2019-08-09 广东聚华印刷显示技术有限公司 电致发光器件及其制备方法和应用
TWI613915B (zh) * 2016-11-23 2018-02-01 財團法人工業技術研究院 影像感測器
KR20220123750A (ko) * 2016-11-25 2022-09-08 뷰리얼 인크. 시스템 기판으로의 마이크로 디바이스의 집적
CN208240682U (zh) * 2018-04-26 2018-12-14 云谷(固安)科技有限公司 一种柔性基板和柔性显示面板
CN109801837A (zh) * 2019-02-02 2019-05-24 京东方科技集团股份有限公司 驱动背板的激光退火工艺及掩膜版

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105378821A (zh) * 2013-07-16 2016-03-02 索尼公司 制造衬底的方法和制造电子器件的方法
CN104362079A (zh) * 2014-09-15 2015-02-18 合肥京东方光电科技有限公司 一种轻薄型显示面板及其制作方法、以及显示装置
CN105785632A (zh) * 2014-09-30 2016-07-20 乐金显示有限公司 显示装置
CN106229295A (zh) * 2016-09-05 2016-12-14 京东方科技集团股份有限公司 显示面板的减薄方法和显示装置
CN109728165A (zh) * 2019-01-04 2019-05-07 京东方科技集团股份有限公司 一种显示背板及其制作方法、显示装置

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