WO2020129600A1 - Procédé de recuit au laser et procédé de fabrication de transistor à film mince - Google Patents

Procédé de recuit au laser et procédé de fabrication de transistor à film mince Download PDF

Info

Publication number
WO2020129600A1
WO2020129600A1 PCT/JP2019/047135 JP2019047135W WO2020129600A1 WO 2020129600 A1 WO2020129600 A1 WO 2020129600A1 JP 2019047135 W JP2019047135 W JP 2019047135W WO 2020129600 A1 WO2020129600 A1 WO 2020129600A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon film
laser
irradiation
region
amorphous silicon
Prior art date
Application number
PCT/JP2019/047135
Other languages
English (en)
Japanese (ja)
Inventor
水村 通伸
Original Assignee
株式会社ブイ・テクノロジー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社ブイ・テクノロジー filed Critical 株式会社ブイ・テクノロジー
Priority to KR1020217008104A priority Critical patent/KR20210103457A/ko
Priority to CN201980076602.6A priority patent/CN113169050A/zh
Publication of WO2020129600A1 publication Critical patent/WO2020129600A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683Continuous wave laser beam
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/06Shaping the laser beam, e.g. by masks or multi-focusing
    • B23K26/064Shaping the laser beam, e.g. by masks or multi-focusing by means of optical elements, e.g. lenses, mirrors or prisms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02595Microstructure polycrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02598Microstructure monocrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • the present invention relates to a laser annealing method and a thin film transistor manufacturing method.
  • a thin film transistor (TFT: Thin Film Transistor) is used as a switching element for actively driving a thin display (FPD: Flat Panel Display) such as a liquid crystal display (LCD: Liquid Crystal Display) and an organic EL display (OLED: Organic Electroluminescence Display). It is used.
  • Amorphous silicon (a-Si: amorphous Silicon), polycrystalline silicon (p-Si: polycrystalline Silicon), or the like is used as a material of a semiconductor layer of a thin film transistor (hereinafter referred to as a TFT).
  • Amorphous silicon has a low mobility ( ⁇ ), which is an index of electron mobility. For this reason, amorphous silicon cannot support the high mobility required for FPDs, which are becoming higher in density and definition. Therefore, as the switching element in the FPD, it is preferable to form the channel semiconductor layer from polycrystalline silicon having a mobility significantly higher than that of amorphous silicon.
  • a method for forming a polycrystalline silicon film an amorphous silicon film is irradiated with laser light by an excimer laser annealing (ELA) device using an excimer laser to recrystallize the amorphous silicon film. There is a method for forming polycrystalline silicon.
  • the amorphous silicon film formed on the entire surface of the substrate is subjected to excimer laser annealing using laser pulse light only in the TFT formation region (channel semiconductor layer region) to form a polycrystalline silicon film.
  • a technique of partially forming the see Patent Document 1.
  • the arrangement of the microlenses is set so that the beam spot of the laser pulse light can be irradiated to the entire TFT formation region with respect to the TFT formation region.
  • the crystal grain size of the polycrystalline silicon formed by the irradiation of the excimer laser pulse light is about several tens to several hundreds nm. With such a crystal grain size, higher mobility cannot be satisfied. Even today, a TFT of a driver circuit for turning on/off a pixel transistor in an FPD is required to have high mobility in a channel semiconductor layer region. Further, in the FPD, as the size thereof is increased, the resolution is increased, and the moving image characteristics are increased in speed, the TFT as a switching element of the pixel is also required to have high mobility.
  • the present invention has been made in view of the above problems, and provides a laser annealing method capable of selectively forming a high mobility polycrystalline silicon film, a pseudo single crystal silicon film, or the like in a necessary region.
  • the purpose is to do.
  • Another object of the present invention is to provide a method for manufacturing a high performance thin film transistor having high mobility.
  • an aspect of the present invention is to irradiate a laser beam to a reforming scheduled region for reforming an amorphous silicon film to crystallize the reforming scheduled region.
  • a laser irradiation method for modifying a film the first irradiation for irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the modification target region and a step of irradiating the surface of the amorphous silicon film with a second laser beam from the seed crystal region as a starting point, so that the amorphous silicon film in the region to be modified becomes the crystallized silicon film.
  • the amorphous silicon film is formed on a substrate having a gate wiring formed on its surface through a gate insulating film, and the region to be modified overlaps the gate wiring.
  • the seed crystal region is a region to be a channel semiconductor layer of a thin film transistor set in the amorphous silicon film formed in the region, and the seed crystal region may be arranged outside in a direction orthogonal to the longitudinal direction of the gate wiring. preferable.
  • the irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition in which the amorphous silicon film is microcrystallized as a seed crystal, and the second irradiation step is performed.
  • the irradiation of the second laser light is preferably continuous irradiation using continuous wave laser light.
  • the first laser light is irradiated with ON-OFF modulation of the continuous wave laser light used in the second irradiation step.
  • the first irradiation step and the second irradiation step use a spatial light modulator for selectively reflecting a laser beam to selectively irradiate a laser beam into the reforming scheduled region. It is preferable to carry out.
  • a large number of micromirrors are arranged in a matrix, and each of the micromirrors individually irradiates a laser beam onto the surface of the amorphous silicon film and a non-irradiation state. It is preferable that the state is selectively driven so that the state can be switched.
  • a plurality of laser pulse beams are irradiated to the outside of the modification target region by using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiation is performed.
  • the crystallized silicon film is preferably selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
  • a method of manufacturing a thin film transistor wherein the gate wiring, the gate insulating film, and the amorphous silicon film are sequentially formed on the substrate, Irradiation of the first laser beam is performed on the outside of the region to be modified to be the channel semiconductor layer set in the amorphous silicon film and on the outside of the gate wiring in the direction orthogonal to the longitudinal direction of the gate wiring.
  • the irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition in which the amorphous silicon film is microcrystallized as a seed crystal, and the second irradiation step is performed.
  • the irradiation of the second laser light is preferably continuous irradiation using continuous wave laser light.
  • the first laser light is irradiated with ON-OFF modulation of the continuous wave laser light used in the second irradiation step.
  • the first irradiation step and the second irradiation step use a spatial light modulator for selectively reflecting a laser beam to selectively irradiate a laser beam into the reforming scheduled region. It is preferable to carry out.
  • a large number of micromirrors are arranged in a matrix, and each of the micromirrors individually irradiates a laser beam onto the surface of the amorphous silicon film and a non-irradiation state. It is preferable that the state is selectively driven so that the state can be switched.
  • a plurality of laser-modulated beams are irradiated to the outside of the region to be modified by using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiation is performed.
  • the crystallized silicon film is preferably selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
  • a high-mobility polycrystalline silicon film or a pseudo single crystal silicon film can be selectively formed in a necessary region, and a high-performance TFT can be realized.
  • the method of manufacturing a thin film transistor according to the present invention it is possible to manufacture a high-performance TFT with a small number of processes.
  • FIG. 1 is a flowchart showing a laser annealing method according to the first embodiment of the present invention.
  • FIG. 2 is a schematic configuration diagram of a laser annealing apparatus used in the laser annealing method according to the first embodiment of the present invention.
  • FIG. 3 is an explanatory diagram schematically showing an arrangement example of micromirrors in the laser annealing apparatus used in the laser annealing method according to the first embodiment of the present invention.
  • FIG. 4 shows a region where a crystal structure formed when a laser beam is irradiated to the amorphous silicon film is satisfied, the power density condition of the laser beam to be irradiated, and the amorphous silicon film (substrate to be processed).
  • FIG. 5 is an explanatory diagram showing a first irradiation step of forming a seed crystal region in the laser annealing method according to the embodiment of the present invention.
  • FIG. 6 is an explanatory diagram showing a state where the second irradiation step of performing the second irradiation with the seed crystal region formed in the first irradiation step as a starting point is started in the laser annealing method according to the embodiment of the present invention.
  • FIG. 7 is an explanatory diagram showing a state in which all the regions to be modified are modified into pseudo single crystal silicon films by the second irradiation step in the laser annealing method according to the embodiment of the present invention.
  • FIG. 5 is an explanatory diagram showing a first irradiation step of forming a seed crystal region in the laser annealing method according to the embodiment of the present invention.
  • FIG. 6 is an explanatory diagram showing a state where the second irradiation step of performing the second irradiation with the
  • FIG. 8A is a process plan view showing a glass substrate (gate substrate) on which a gate wiring used in the laser annealing method according to the embodiment of the present invention is formed.
  • FIG. 8-2 is a process plan view showing a glass substrate (gate substrate) on the entire surface of which an amorphous silicon film is formed in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8C is a process plan view showing a region to be modified in a glass substrate (gate substrate) having an amorphous silicon film formed on the entire surface thereof in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8-4 is a process plan view showing a state where the first irradiation process is performed in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8-5 is a process plan view showing a state where the second irradiation process is performed in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8-6 is a process plan view showing a state where the metal film is deposited on the entire substrate after the second irradiation process in the laser annealing method according to the embodiment of the present invention.
  • FIGS. 8-7 are process plan views showing a state in which the metal film is patterned to form the source/drain in the laser annealing method according to the embodiment of the present invention.
  • FIG. 9 is an AB sectional view showing a section taken along line AB in FIG. 8-7.
  • FIG. 10 is an explanatory diagram showing an imaging optical system in the MLA laser annealing apparatus used in the laser annealing method according to the embodiment of the present invention.
  • FIG. 11 is an explanatory diagram showing an imaging optical system in the MLA laser annealing apparatus used in the laser annealing method according to the embodiment of the present invention.
  • the laser annealing method of the present invention is used to irradiate a laser beam to a modification target area for modifying an amorphous silicon film to modify the modification target area into a crystallized silicon film.
  • This laser annealing method comprises a first irradiation step of irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the modification target region, and a seed crystal region
  • the substrate 1 to be processed includes a glass substrate 2, a plurality of gate wirings 3 arranged on the surface of the glass substrate 2, a glass substrate 2 and a gate insulation formed on the gate wiring 3.
  • the film 4 and the amorphous silicon film 5 deposited on the entire surface of the gate insulating film 4 are provided.
  • the substrate 1 to be processed is also referred to as a gate substrate.
  • the substrate 1 to be processed finally becomes a TFT substrate in which a thin film transistor (TFT) or the like is formed.
  • TFT thin film transistor
  • the substrate 1 to be processed is transported along the direction orthogonal to the longitudinal direction of the gate wiring 3 in the laser annealing process. That is, the longitudinal direction of the gate wiring 3 is a direction orthogonal to the transport direction T, as shown in FIGS.
  • the gate wiring 3 shown in FIG. 2 is in a state of being cut along the longitudinal direction.
  • one gate wiring 3 is shown in FIGS. 5 to 7, a large number of gate wirings 3 are arranged on the glass substrate 2 in parallel with each other.
  • the substrate 1 to be processed is provided with a plurality of alignment marks (not shown) at predetermined positions.
  • a rectangular reforming-scheduled region 6 is set in the amorphous silicon film 5 formed above the gate wiring 3.
  • the region 6 to be modified finally becomes the channel semiconductor layer region of the TFT.
  • a plurality of regions 6 to be modified are set according to the number of TFTs formed along the longitudinal direction of the gate wiring 3.
  • the width dimension W (see FIG. 5) of the region to be modified 6 is set to be substantially the same as the width of the gate wiring 3.
  • the laser annealing apparatus 10 includes a base 11, a laser light source unit 12, a laser beam irradiation unit 13, and a control unit 14.
  • the laser beam irradiation unit 13 does not move during the annealing process, but the substrate 1 to be processed is moved.
  • the base 11 is provided with a substrate transfer means (not shown).
  • the substrate 1 to be processed is placed on the base 11 and is transported in the transport direction (scanning direction) T by a substrate transport means (not shown).
  • the transport direction T is a direction orthogonal to the longitudinal direction of the gate wiring 3.
  • the laser light source unit 12 includes a CW laser light source 15 as a light source that oscillates continuous wave laser light (CW laser light), and ON-OFF modulation of the CW laser light to generate a first laser light.
  • the laser light source unit 12 includes a CW laser light as a second laser light and a CW laser modulated light as a first laser light obtained by ON-OFF modulating the CW laser light emitted from the CW laser light source 15. It is set so that two types of laser light can be emitted.
  • the laser beam LB is emitted from the light emitting unit 17 toward the digital micromirror device 18 side of the laser beam irradiation unit 13, which will be described later.
  • CW laser light source 15 various lasers such as a semiconductor laser, a solid-state laser, a liquid laser, a gas laser can be used.
  • the laser beam irradiation unit 13 is arranged above the base 11 by a support frame (not shown) or the like.
  • the laser beam irradiation unit 13 includes a digital micromirror device (DMD: Digital Micromirror Device, registered trademark of Texas Instruments) 18, a damper (absorber) 19, a microlens array 20, and a projection. And a lens 21.
  • DMD Digital Micromirror Device, registered trademark of Texas Instruments
  • a digital micromirror device (hereinafter referred to as DMD) 18 includes a drive substrate (CMOS substrate) 22 and a large number of micromirrors (thin film mirrors) 23 (23A to 23F: A to F).
  • the columns are each provided with six symbols).
  • the number of micromirrors 23 will be described as 36, but the actual number is more than the number of pixels for high-definition television.
  • the micro mirror 23 is formed in a square shape having a side length of about ten and several ⁇ m. A large number of pixel regions are arranged in a matrix on the drive substrate 22, and a CMOS SRAM cell is formed in each pixel region.
  • the micro mirror 23 is arranged on the drive substrate 22 so as to correspond to each CMOS SRAM cell.
  • the micro mirror 23 is provided by the MEMS (Micro Electro Mechanical Systems) technology.
  • Each micro mirror 23 is provided so as to be movable to two positions. Specifically, for example, it is configured to be rotationally moved to two positions forming an angle of +10 degrees and an angle of ⁇ 10 degrees with respect to the substrate surface.
  • the micro mirror 23 is driven so as to be displaced to the above two positions in accordance with the output data from the CMOS SRAM cell side.
  • the laser beam LB is collectively entered from the laser light source unit 12 side to a large number of micro mirrors 23 forming the array.
  • the respective micro mirrors 23 (23A to 23F) are set so as to reflect a part of the laser light of the laser beam LB in two directions by selectively moving to the above two positions. ..
  • One of these two directions is a direction in which a part of the laser light of the laser beam LB is directed to the damper 19, and the other of the two directions is a part of the laser beam LB. This is the direction in which light is directed to the surface of the substrate 1 to be processed.
  • the laser beams reflected from the respective micromirrors (23A1, 23A2, 23A3, 23A4, 23A5, 23A6) in a predetermined row of the DMD 18 are converted into six laser beams LBd1, LBd2, LBd3, LBd4, LBd5. It is schematically shown by LBd6.
  • the row including the micro mirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 is used, but the micro mirrors 23 in other rows may be used.
  • the damper 19 is arranged at a position for receiving the laser beam reflected by the micro mirror 23 in the off state when the micro mirror 23 is in the off state (for example, the angle with respect to the drive substrate 22 is ⁇ 10 degrees, non-irradiation state). Has been done.
  • the microlens array 20 collects the laser beams LBd (LBd1 to LBd6, etc.) reflected by the micromirrors 23 in the on state (for example, the angle with respect to the drive substrate 22 is +10 degrees, the irradiation state) toward the projection lens 21.
  • the projection lens 21 is set so as to image the introduced laser beam LBd (LBd1 to LBd6, etc.) on the surface of the substrate 1 to be processed.
  • the control unit 14 controls the substrate transfer means (not shown) provided on the base 11, the laser light source unit 12, and the DMD 18. Specifically, the control unit 14 is set to drive and control a substrate transfer unit (not shown) to move the target substrate 1 in the transfer direction T at a predetermined speed. Further, the control unit 14 is set so that the position information of the reforming-scheduled region 6 (see FIGS. 5 to 7) in the substrate 1 to be processed is input from a position detection unit (not shown). The position detecting means detects an alignment mark (not shown) provided on the substrate 1 to be processed and outputs a detection signal thereof to the controller 14.
  • control unit 14 is set to drive and control the laser light source unit 12 and the laser beam irradiation unit 13 to perform the first irradiation and the second irradiation on the substrate 1 to be processed. ..
  • the control unit 14 causes the laser light source unit 12 to emit the laser light as the first laser light.
  • the output of this laser light is set to a relatively low energy.
  • the control unit 14 causes the laser light source unit 12 to continuously emit the CW laser light as the second laser light.
  • the output of CW laser light is set to be relatively high.
  • the laser light source unit 12 is turned off, or all the micromirrors 23 (23A to 23F) in the DMD 18 are turned off so that the laser beam LB is reflected toward the damper 19. Is set to state.
  • the control unit 14 is configured to output a drive signal to the DMD 18 when the reforming scheduled area 6 reaches a predetermined position with respect to the base 11 based on the position information data of the reforming scheduled area 6. Has been done.
  • the DMD 18 to which the drive signal is input is controlled to turn on the micromirrors 23 (for example, 23A1, 23A2, 23A3, 23A4, 23A5, 23A6) in a predetermined row.
  • the laser beam LB formed by the laser light emitted from the laser light source unit 12 is reflected by these micro mirrors 23 (23A1, 23A2, 23A3, 23A4, 23A5, 23A6). And is incident on the surface of the substrate 1 to be processed.
  • the laser beams LBd1, LBd2, LBd3, LBd4, LBd5, and LBd6 reflected from the respective micromirrors 23 are lateral to the gate wiring 3 and outside the modification-scheduled region 6 (at the peripheral portion).
  • a beam spot is projected on the outer side (first irradiation).
  • control unit 14 is set to drive and control the laser light source unit 12 and the laser beam irradiation unit 13 based on the position information so as to perform the second irradiation on the modification target area 6.
  • the beam spot of the CW laser light as the second laser light is located on the side of the non-modified region 6 side. It is projected on the surface of the crystalline silicon film 5.
  • the locus of the beam spot is set so as to cover the reforming target area 6 and move. A method of moving the beam spot of the CW laser light so as to cover the modification target area 6 by the second irradiation will be described in the laser annealing method described later.
  • the control unit 14 controls so that the CW laser light oscillated from the CW laser light source 15 is continuously irradiated directly from the light emitting unit 17 with the ON-OFF signal generator 16 in the OFF state.
  • FIG. 4 shows a region where the crystal structure formed when the amorphous silicon film 5 is irradiated with the laser light is satisfied and the power density condition of the laser light to be irradiated and the amorphous silicon film (covered). It is a map shown from the viewpoint of the scanning speed condition on the processing substrate side.
  • the laser annealing apparatus 10 includes a storage unit (not shown) in which a map having the contents shown in FIG. 4 is stored.
  • the control unit 14 refers to this map at any time to perform the first irradiation and the second irradiation.
  • the control unit 14 determines that the scan speed of the substrate to be processed 1 and the power density of the laser light PL (see FIG. 5) emitted from the laser light source unit 12 are small in the map shown in FIG. The control is performed so that the crystal region is satisfied.
  • the control unit 14 controls the scanning speed of the substrate 1 to be processed and the power density of the CW laser light CWL (see FIG. 6) emitted from the laser light source unit 12 from the lateral crystal (pseudo single crystal) in the map shown in FIG. The control is performed so that the conditions for the (crystal) region are satisfied.
  • the substrate 1 to be processed and the laser annealing apparatus 10 used in the laser annealing method according to the present embodiment have been described above, but the laser annealing method and the method of manufacturing a thin film transistor using these are described below.
  • the laser annealing method and the thin film transistor manufacturing method according to the present embodiment will be described with reference to the flowchart of FIG.
  • the laser annealing method according to the present embodiment will be described by including it in the method of manufacturing a thin film transistor.
  • the laser annealing method according to this embodiment includes a first irradiation step (step 4) and a second irradiation step (step 5) described below (see FIG. 1).
  • a plurality of gate wirings 3 are formed on the glass substrate 2 in parallel.
  • an amorphous silicon film 5 is formed on the entire surface of the glass substrate 2 on which the gate wiring 3 is formed, and a substrate to be processed (gate substrate) 1 is manufactured (step). 1).
  • the substrate 1 to be processed is washed (step 2). Since the cleaned amorphous silicon film 5 of the substrate 1 to be processed contains hydrogen, for example, dehydrogenation processing is performed at about 450° C. for several hours (step 3).
  • the substrate 1 to be processed is set on the base 11 of the laser annealing apparatus 10 and is moved along the transport direction T at a predetermined scan speed.
  • step 4 the control unit 14 sends a drive signal to the DMD 18 when the scheduled reforming region 6 reaches a predetermined position based on the positional information of the reforming scheduled region 6. Output. Based on the drive signal, the DMD 18 to which the drive signal is input turns on the micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 in the preset columns.
  • FIG. 5 shows an ON state of the plurality of micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 in a row (the micromirrors 23 in the ON state are shaded).
  • the laser beam LB composed of the pulsed laser light emitted from the laser light source unit 12 is the laser beams LBd1, LBd2, LBd3, LBd4, which are reflected by the micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6.
  • LBd5 and LBd6 are the laser light PL shown in FIG. Incident on.
  • the seed crystal is a region outside the reforming scheduled region 6 and along the downstream edge of the reforming scheduled region 6 in the transport direction T.
  • Regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are formed.
  • the amorphous silicon film 5 is changed to microcrystalline silicon.
  • the surface of these seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 has an uneven structure.
  • FIG. 6, FIG. 7, and FIG. 8-5 show the second irradiation step.
  • the control unit 14 drives and controls the laser light source unit 12 and the laser beam irradiation unit 13 based on the position information of the reforming scheduled area 6 to control the reforming scheduled area 6.
  • the second irradiation is started.
  • the beam spot of the CW laser light CWL serving as the second laser light is set to a non-beam spot starting from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6.
  • Annealing is performed by projecting on the surface of the crystalline silicon film 5.
  • FIG. 6 and FIG. 7 show the ON state of the plurality of micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 that are also used for the second irradiation (the micromirrors 23 in the ON state are shaded in a grid pattern).
  • the microcrystalline silicon forming the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 functions as a seed crystal to promote the amorphous silicon film 5 to become a pseudo single crystal (lateral crystal).
  • a high quality pseudo single crystal silicon film 5B can be formed.
  • the second irradiation is performed until the trajectory of the beam spot of each CW laser light CWL reaches the edge (one side) on the upstream side in the transport direction T of the modification target area 6.
  • the pseudo single crystal silicon film 5B can be grown on the entire region 6 to be modified.
  • the pseudo single crystal silicon film 5B formed through the above steps 4 and 5 starts from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, and the pseudo single crystal silicon film is formed over the entire region 6 to be modified.
  • a lateral crystal film of 5B is uniformly formed.
  • the pseudo single crystal silicon film 5B has a large mobility (electron mobility) and is suitable for manufacturing a high mobility TFT.
  • the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are set so as to be spaced apart from each other, so that the pseudo single crystal silicon film 5B is formed. Almost grow in the width direction of the gate wiring 3.
  • the metal film 7 is formed on the entire surface of the substrate by, for example, the vapor deposition method (step 6).
  • the material of the metal film 7 is, for example, an aluminum (Al) alloy.
  • an etching mask (not shown) is formed on the metal film 7 by using a photolithography technique (step 7).
  • This etching mask is a resist mask for forming the metal film 7 on the source/drain electrodes.
  • etching mask for example, wet etching using a mixed acid type etching solution as an etchant is performed to expose the metal film exposed from the etching mask and the seed crystal regions 5A1, 5A2, 5A3, 5A4. , 5A5, 5A6 including the exposed regions of the amorphous silicon film 5 are removed (step 8).
  • the metal film 7 is processed into the source electrode 7S, the drain electrode 7D, the source line 7SL, etc., as shown in FIG. 8-7. Further, the amorphous silicon film 5 including the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 exposed after the etching of the metal film 7 is also etched. As a result, as shown in FIGS. 8-7 and 9, the amorphous silicon film 5 in that region is removed and the underlying gate insulating film 4 is exposed. In this way, the manufacture of the TFT 8 is completed.
  • the modification target area 6 since the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are formed outside the modification target area 6, the modification target area 6 to be the channel semiconductor layer area. Only the pseudo single crystal silicon film 5B can be formed inside, and the performance of the TFT can be improved.
  • a pseudo single crystal silicon film (a polycrystalline silicon film can be grown from a seed crystal region) can be selectively formed in a necessary region, and a seed crystal having an uneven structure can be formed.
  • the regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 can be removed in a later etching process of the metal film 7. Therefore, it is not necessary to perform a special step for removing the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6.
  • the CW laser light CWL is used as the laser light PL after being ON-OFF modulated by the ON-OFF signal generator 16
  • the laser light PL is used in one laser light source unit 12.
  • the modified region 6 is the channel semiconductor layer region of the TFT
  • the pseudo single crystal silicon film 5B formed after the second irradiation is directly used as the channel semiconductor layer region.
  • a patterning step such as a photolithography step or a wet etching step for forming the channel semiconductor layer region, a rinsing/cleaning step after the patterning step, etc. are unnecessary, and the manufacturing process of the TFT substrate is eliminated. Can be significantly reduced.
  • the DMD 18 is used as the spatial light modulator, so that the laser beam is gradually continuous in the width direction of the modification target region 6 only by the on/off operation of the micromirror 23. Annealing can proceed as described above. Therefore, it is not necessary to move the substrate 1 to be processed in the width direction or move the laser beam irradiation unit 13 in the width direction of the substrate 1 to be processed.
  • FIGS. 10 and 11 show an imaging optical system of an MLA laser annealing device that can be used in the laser annealing method according to the embodiment of the present invention.
  • the rest of the configuration of this MLA laser annealing apparatus is the same as that of the laser annealing apparatus 10 described above, and therefore its explanation is omitted.
  • the laser beam LB which is the pulsed laser light emitted from the laser light source unit 12 side shown in FIG. 2, is reflected by the mirror 25 and directly below the corresponding lens of the microlens array 20 via the mask 26.
  • the laser beam LB2 is set to irradiate the scheduled reforming region 6 when the scheduled reforming region 6 reaches.
  • This MLA laser annealing apparatus is used in the first irradiation step of forming a seed crystal region outside the modification target region 6 performed in step 4 of the laser annealing method in the present embodiment.
  • the spatial light modulator may be a liquid crystal cell having an optical shutter function, a grating light valve (GLV: Grating Light Valve, a registered trademark of Silicon Light Machines, Inc.). It is also possible to use a thin-film micromirror array (TMA).
  • GLV Grating Light Valve, a registered trademark of Silicon Light Machines, Inc.
  • TMA thin-film micromirror array
  • the DMD 18 is used as the spatial light modulator, but other beam moving means for moving the laser beam may be used without using the spatial light modulator.
  • the first irradiation step is performed by vibrating the micromirror 23 at high speed to perform pulse width modulation.
  • the pseudo single crystal silicon film 5B is formed as the crystallized silicon film, but it is of course possible to grow the polycrystalline silicon film from the seed crystal region. Also in this case, it is possible to form a high-quality polycrystalline silicon film starting from the seed crystal region.
  • the second laser light for forming the polycrystalline silicon film excimer laser light oscillated from the ELA device can also be used.
  • the TFT structure is a so-called bottom gate type structure in which the gate wiring 3 is formed on the glass substrate 2 on the glass substrate 2. It is possible to apply.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Ceramic Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)

Abstract

La présente invention concerne un procédé de recuit au laser pour reformer une région de reformation planifiée, dans laquelle la reformation d'un film de silicium amorphe doit être effectuée, dans un film de silicium cristallisé par irradiation de la région de reformation planifiée avec une lumière laser, le procédé de recuit au laser comprenant une première étape d'irradiation consistant à réaliser une première irradiation avec une lumière laser pour former une région de germe cristallin comprenant du silicium microcristallin dans le film de silicium amorphe à l'extérieur de la région de reformation planifiée, et une seconde étape d'irradiation consistant à irradier une surface du film de silicium amorphe avec une seconde lumière laser à partir de la région de germe cristallin, provoquant ainsi un développement de cristal de telle sorte que le film de silicium amorphe dans la région de reformation planifiée devient le film de silicium cristallisé.
PCT/JP2019/047135 2018-12-18 2019-12-03 Procédé de recuit au laser et procédé de fabrication de transistor à film mince WO2020129600A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020217008104A KR20210103457A (ko) 2018-12-18 2019-12-03 레이저 어닐 방법 및 박막 트랜지스터의 제조 방법
CN201980076602.6A CN113169050A (zh) 2018-12-18 2019-12-03 激光退火方法及薄膜晶体管的制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-236398 2018-12-18
JP2018236398A JP2020098867A (ja) 2018-12-18 2018-12-18 レーザアニール方法および薄膜トランジスタの製造方法

Publications (1)

Publication Number Publication Date
WO2020129600A1 true WO2020129600A1 (fr) 2020-06-25

Family

ID=71101443

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/047135 WO2020129600A1 (fr) 2018-12-18 2019-12-03 Procédé de recuit au laser et procédé de fabrication de transistor à film mince

Country Status (5)

Country Link
JP (1) JP2020098867A (fr)
KR (1) KR20210103457A (fr)
CN (1) CN113169050A (fr)
TW (1) TW202036679A (fr)
WO (1) WO2020129600A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113634900A (zh) * 2021-07-21 2021-11-12 上海理工大学 一种使用增材制造技术制备镍基合金定向双晶的方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01276617A (ja) * 1988-04-27 1989-11-07 Seiko Epson Corp 半導体装置の製造方法
JP2003163165A (ja) * 2001-11-28 2003-06-06 Semiconductor Energy Lab Co Ltd 半導体装置の製造方法
JP2003218027A (ja) * 2002-01-18 2003-07-31 Sumitomo Heavy Ind Ltd 結晶成長方法及びレーザアニール装置
JP2004342875A (ja) * 2003-05-16 2004-12-02 Fuji Photo Film Co Ltd レーザアニール装置
JP2006156676A (ja) * 2004-11-29 2006-06-15 Sumitomo Heavy Ind Ltd レーザアニール方法
JP2008015523A (ja) * 2006-06-30 2008-01-24 Lg Phillips Lcd Co Ltd 液晶表示素子の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5471046B2 (ja) 2009-06-03 2014-04-16 株式会社ブイ・テクノロジー レーザアニール方法及びレーザアニール装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01276617A (ja) * 1988-04-27 1989-11-07 Seiko Epson Corp 半導体装置の製造方法
JP2003163165A (ja) * 2001-11-28 2003-06-06 Semiconductor Energy Lab Co Ltd 半導体装置の製造方法
JP2003218027A (ja) * 2002-01-18 2003-07-31 Sumitomo Heavy Ind Ltd 結晶成長方法及びレーザアニール装置
JP2004342875A (ja) * 2003-05-16 2004-12-02 Fuji Photo Film Co Ltd レーザアニール装置
JP2006156676A (ja) * 2004-11-29 2006-06-15 Sumitomo Heavy Ind Ltd レーザアニール方法
JP2008015523A (ja) * 2006-06-30 2008-01-24 Lg Phillips Lcd Co Ltd 液晶表示素子の製造方法

Also Published As

Publication number Publication date
TW202036679A (zh) 2020-10-01
KR20210103457A (ko) 2021-08-23
CN113169050A (zh) 2021-07-23
JP2020098867A (ja) 2020-06-25

Similar Documents

Publication Publication Date Title
JP2004311935A (ja) 単結晶シリコン膜の製造方法
US20060197093A1 (en) Semiconductor device including semiconductor thin films having different crystallinity, substrate of the same, and manufacturing method of the same, and liquid crystal display and manufacturing method of the same
JP6781872B2 (ja) レーザ照射装置および薄膜トランジスタの製造方法
WO2017145519A1 (fr) Procédé de recuit laser, dispositif de recuit laser et substrat de transistors à couches minces
JP5800292B2 (ja) レーザ処理装置
WO2020137399A1 (fr) Procédé et dispositif de recuit laser
WO2017067336A1 (fr) Substrat de matrice, son procédé de fabrication, écran d'affichage et appareil d'affichage
WO2020129600A1 (fr) Procédé de recuit au laser et procédé de fabrication de transistor à film mince
WO2020158464A1 (fr) Procédé de recuit laser et appareil de recuit laser
CN110998795A (zh) 激光照射装置、薄膜晶体管的制造方法及投影掩模
JP2006504262A (ja) 多結晶化方法、多結晶シリコン薄膜トランジスタの製造方法、及びそのためのレーザー照射装置
WO2020129562A1 (fr) Appareil de recuit au laser
WO2020129601A1 (fr) Procédé de recuit au laser et appareil de recuit au laser
JP2007208174A (ja) レーザアニール技術、半導体膜、半導体装置、及び電気光学装置
JP4763983B2 (ja) 光変調素子、結晶化装置、結晶化方法、薄膜半導体基板の製造装置、薄膜半導体基板の製造方法、薄膜半導体装置、薄膜半導体装置の製造方法、表示装置及び位相シフタ
JP7161758B2 (ja) レーザアニール装置
WO2020158424A1 (fr) Procédé de recuit laser, dispositif de recuit laser et substrat de film de silicium cristallin
US20200168642A1 (en) Laser irradiation device, projection mask, laser irradiation method, and program
WO2019107108A1 (fr) Dispositif d'irradiation laser, procédé d'irradiation laser et masque de projection
JP2006054223A (ja) 半導体薄膜の結晶化方法、結晶化された半導体薄膜を有する基板、そして半導体薄膜の結晶化装置
JP3587083B2 (ja) 半導体装置の製造方法
JP2007299911A (ja) 半導体膜の製造方法
JP2008205046A (ja) 薄膜トランジスタ及びその製造方法
JP2006024753A (ja) 薄膜トランジスタの製造方法、薄膜トランジスタ、半導体装置の製造方法および表示装置
JP2008294466A (ja) 半導体薄膜の形成方法、半導体薄膜の形成装置、結晶化方法および結晶化装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19901315

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19901315

Country of ref document: EP

Kind code of ref document: A1