WO2020129600A1 - Laser anneal method and method for manufacturing thin-film transistor - Google Patents

Laser anneal method and method for manufacturing thin-film transistor Download PDF

Info

Publication number
WO2020129600A1
WO2020129600A1 PCT/JP2019/047135 JP2019047135W WO2020129600A1 WO 2020129600 A1 WO2020129600 A1 WO 2020129600A1 JP 2019047135 W JP2019047135 W JP 2019047135W WO 2020129600 A1 WO2020129600 A1 WO 2020129600A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon film
laser
irradiation
region
amorphous silicon
Prior art date
Application number
PCT/JP2019/047135
Other languages
French (fr)
Japanese (ja)
Inventor
水村　通伸
Original Assignee
株式会社ブイ・テクノロジー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社ブイ・テクノロジー filed Critical 株式会社ブイ・テクノロジー
Priority to CN201980076602.6A priority Critical patent/CN113169050A/en
Priority to KR1020217008104A priority patent/KR20210103457A/en
Publication of WO2020129600A1 publication Critical patent/WO2020129600A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/06—Shaping the laser beam, e.g. by masks or multi-focusing
    • B23K26/064—Shaping the laser beam, e.g. by masks or multi-focusing by means of optical elements, e.g. lenses, mirrors or prisms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02595—Microstructure polycrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • the present invention relates to a laser annealing method and a thin film transistor manufacturing method.
  • a thin film transistor (TFT: Thin Film Transistor) is used as a switching element for actively driving a thin display (FPD: Flat Panel Display) such as a liquid crystal display (LCD: Liquid Crystal Display) and an organic EL display (OLED: Organic Electroluminescence Display). It is used.
  • Amorphous silicon (a-Si: amorphous Silicon), polycrystalline silicon (p-Si: polycrystalline Silicon), or the like is used as a material of a semiconductor layer of a thin film transistor (hereinafter referred to as a TFT).
  • Amorphous silicon has a low mobility ( ⁇ ), which is an index of electron mobility. For this reason, amorphous silicon cannot support the high mobility required for FPDs, which are becoming higher in density and definition. Therefore, as the switching element in the FPD, it is preferable to form the channel semiconductor layer from polycrystalline silicon having a mobility significantly higher than that of amorphous silicon.
  • a method for forming a polycrystalline silicon film an amorphous silicon film is irradiated with laser light by an excimer laser annealing (ELA) device using an excimer laser to recrystallize the amorphous silicon film. There is a method for forming polycrystalline silicon.
  • the amorphous silicon film formed on the entire surface of the substrate is subjected to excimer laser annealing using laser pulse light only in the TFT formation region (channel semiconductor layer region) to form a polycrystalline silicon film.
  • a technique of partially forming the see Patent Document 1.
  • the arrangement of the microlenses is set so that the beam spot of the laser pulse light can be irradiated to the entire TFT formation region with respect to the TFT formation region.
  • the crystal grain size of the polycrystalline silicon formed by the irradiation of the excimer laser pulse light is about several tens to several hundreds nm. With such a crystal grain size, higher mobility cannot be satisfied. Even today, a TFT of a driver circuit for turning on/off a pixel transistor in an FPD is required to have high mobility in a channel semiconductor layer region. Further, in the FPD, as the size thereof is increased, the resolution is increased, and the moving image characteristics are increased in speed, the TFT as a switching element of the pixel is also required to have high mobility.
  • the present invention has been made in view of the above problems, and provides a laser annealing method capable of selectively forming a high mobility polycrystalline silicon film, a pseudo single crystal silicon film, or the like in a necessary region.
  • the purpose is to do.
  • Another object of the present invention is to provide a method for manufacturing a high performance thin film transistor having high mobility.
  • an aspect of the present invention is to irradiate a laser beam to a reforming scheduled region for reforming an amorphous silicon film to crystallize the reforming scheduled region.
  • a laser irradiation method for modifying a film the first irradiation for irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the modification target region and a step of irradiating the surface of the amorphous silicon film with a second laser beam from the seed crystal region as a starting point, so that the amorphous silicon film in the region to be modified becomes the crystallized silicon film.
  • the amorphous silicon film is formed on a substrate having a gate wiring formed on its surface through a gate insulating film, and the region to be modified overlaps the gate wiring.
  • the seed crystal region is a region to be a channel semiconductor layer of a thin film transistor set in the amorphous silicon film formed in the region, and the seed crystal region may be arranged outside in a direction orthogonal to the longitudinal direction of the gate wiring. preferable.
  • the irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition in which the amorphous silicon film is microcrystallized as a seed crystal, and the second irradiation step is performed.
  • the irradiation of the second laser light is preferably continuous irradiation using continuous wave laser light.
  • the first laser light is irradiated with ON-OFF modulation of the continuous wave laser light used in the second irradiation step.
  • the first irradiation step and the second irradiation step use a spatial light modulator for selectively reflecting a laser beam to selectively irradiate a laser beam into the reforming scheduled region. It is preferable to carry out.
  • a large number of micromirrors are arranged in a matrix, and each of the micromirrors individually irradiates a laser beam onto the surface of the amorphous silicon film and a non-irradiation state. It is preferable that the state is selectively driven so that the state can be switched.
  • a plurality of laser pulse beams are irradiated to the outside of the modification target region by using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiation is performed.
  • the crystallized silicon film is preferably selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
  • a method of manufacturing a thin film transistor wherein the gate wiring, the gate insulating film, and the amorphous silicon film are sequentially formed on the substrate, Irradiation of the first laser beam is performed on the outside of the region to be modified to be the channel semiconductor layer set in the amorphous silicon film and on the outside of the gate wiring in the direction orthogonal to the longitudinal direction of the gate wiring.
  • the irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition in which the amorphous silicon film is microcrystallized as a seed crystal, and the second irradiation step is performed.
  • the irradiation of the second laser light is preferably continuous irradiation using continuous wave laser light.
  • the first laser light is irradiated with ON-OFF modulation of the continuous wave laser light used in the second irradiation step.
  • the first irradiation step and the second irradiation step use a spatial light modulator for selectively reflecting a laser beam to selectively irradiate a laser beam into the reforming scheduled region. It is preferable to carry out.
  • a large number of micromirrors are arranged in a matrix, and each of the micromirrors individually irradiates a laser beam onto the surface of the amorphous silicon film and a non-irradiation state. It is preferable that the state is selectively driven so that the state can be switched.
  • a plurality of laser-modulated beams are irradiated to the outside of the region to be modified by using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiation is performed.
  • the crystallized silicon film is preferably selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
  • a high-mobility polycrystalline silicon film or a pseudo single crystal silicon film can be selectively formed in a necessary region, and a high-performance TFT can be realized.
  • the method of manufacturing a thin film transistor according to the present invention it is possible to manufacture a high-performance TFT with a small number of processes.
  • FIG. 1 is a flowchart showing a laser annealing method according to the first embodiment of the present invention.
  • FIG. 2 is a schematic configuration diagram of a laser annealing apparatus used in the laser annealing method according to the first embodiment of the present invention.
  • FIG. 3 is an explanatory diagram schematically showing an arrangement example of micromirrors in the laser annealing apparatus used in the laser annealing method according to the first embodiment of the present invention.
  • FIG. 4 shows a region where a crystal structure formed when a laser beam is irradiated to the amorphous silicon film is satisfied, the power density condition of the laser beam to be irradiated, and the amorphous silicon film (substrate to be processed).
  • FIG. 5 is an explanatory diagram showing a first irradiation step of forming a seed crystal region in the laser annealing method according to the embodiment of the present invention.
  • FIG. 6 is an explanatory diagram showing a state where the second irradiation step of performing the second irradiation with the seed crystal region formed in the first irradiation step as a starting point is started in the laser annealing method according to the embodiment of the present invention.
  • FIG. 7 is an explanatory diagram showing a state in which all the regions to be modified are modified into pseudo single crystal silicon films by the second irradiation step in the laser annealing method according to the embodiment of the present invention.
  • FIG. 5 is an explanatory diagram showing a first irradiation step of forming a seed crystal region in the laser annealing method according to the embodiment of the present invention.
  • FIG. 6 is an explanatory diagram showing a state where the second irradiation step of performing the second irradiation with the
  • FIG. 8A is a process plan view showing a glass substrate (gate substrate) on which a gate wiring used in the laser annealing method according to the embodiment of the present invention is formed.
  • FIG. 8-2 is a process plan view showing a glass substrate (gate substrate) on the entire surface of which an amorphous silicon film is formed in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8C is a process plan view showing a region to be modified in a glass substrate (gate substrate) having an amorphous silicon film formed on the entire surface thereof in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8-4 is a process plan view showing a state where the first irradiation process is performed in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8-5 is a process plan view showing a state where the second irradiation process is performed in the laser annealing method according to the embodiment of the present invention.
  • FIG. 8-6 is a process plan view showing a state where the metal film is deposited on the entire substrate after the second irradiation process in the laser annealing method according to the embodiment of the present invention.
  • FIGS. 8-7 are process plan views showing a state in which the metal film is patterned to form the source/drain in the laser annealing method according to the embodiment of the present invention.
  • FIG. 9 is an AB sectional view showing a section taken along line AB in FIG. 8-7.
  • FIG. 10 is an explanatory diagram showing an imaging optical system in the MLA laser annealing apparatus used in the laser annealing method according to the embodiment of the present invention.
  • FIG. 11 is an explanatory diagram showing an imaging optical system in the MLA laser annealing apparatus used in the laser annealing method according to the embodiment of the present invention.
  • the laser annealing method of the present invention is used to irradiate a laser beam to a modification target area for modifying an amorphous silicon film to modify the modification target area into a crystallized silicon film.
  • This laser annealing method comprises a first irradiation step of irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the modification target region, and a seed crystal region
  • the substrate 1 to be processed includes a glass substrate 2, a plurality of gate wirings 3 arranged on the surface of the glass substrate 2, a glass substrate 2 and a gate insulation formed on the gate wiring 3.
  • the film 4 and the amorphous silicon film 5 deposited on the entire surface of the gate insulating film 4 are provided.
  • the substrate 1 to be processed is also referred to as a gate substrate.
  • the substrate 1 to be processed finally becomes a TFT substrate in which a thin film transistor (TFT) or the like is formed.
  • TFT thin film transistor
  • the substrate 1 to be processed is transported along the direction orthogonal to the longitudinal direction of the gate wiring 3 in the laser annealing process. That is, the longitudinal direction of the gate wiring 3 is a direction orthogonal to the transport direction T, as shown in FIGS.
  • the gate wiring 3 shown in FIG. 2 is in a state of being cut along the longitudinal direction.
  • one gate wiring 3 is shown in FIGS. 5 to 7, a large number of gate wirings 3 are arranged on the glass substrate 2 in parallel with each other.
  • the substrate 1 to be processed is provided with a plurality of alignment marks (not shown) at predetermined positions.
  • a rectangular reforming-scheduled region 6 is set in the amorphous silicon film 5 formed above the gate wiring 3.
  • the region 6 to be modified finally becomes the channel semiconductor layer region of the TFT.
  • a plurality of regions 6 to be modified are set according to the number of TFTs formed along the longitudinal direction of the gate wiring 3.
  • the width dimension W (see FIG. 5) of the region to be modified 6 is set to be substantially the same as the width of the gate wiring 3.
  • the laser annealing apparatus 10 includes a base 11, a laser light source unit 12, a laser beam irradiation unit 13, and a control unit 14.
  • the laser beam irradiation unit 13 does not move during the annealing process, but the substrate 1 to be processed is moved.
  • the base 11 is provided with a substrate transfer means (not shown).
  • the substrate 1 to be processed is placed on the base 11 and is transported in the transport direction (scanning direction) T by a substrate transport means (not shown).
  • the transport direction T is a direction orthogonal to the longitudinal direction of the gate wiring 3.
  • the laser light source unit 12 includes a CW laser light source 15 as a light source that oscillates continuous wave laser light (CW laser light), and ON-OFF modulation of the CW laser light to generate a first laser light.
  • the laser light source unit 12 includes a CW laser light as a second laser light and a CW laser modulated light as a first laser light obtained by ON-OFF modulating the CW laser light emitted from the CW laser light source 15. It is set so that two types of laser light can be emitted.
  • the laser beam LB is emitted from the light emitting unit 17 toward the digital micromirror device 18 side of the laser beam irradiation unit 13, which will be described later.
  • CW laser light source 15 various lasers such as a semiconductor laser, a solid-state laser, a liquid laser, a gas laser can be used.
  • the laser beam irradiation unit 13 is arranged above the base 11 by a support frame (not shown) or the like.
  • the laser beam irradiation unit 13 includes a digital micromirror device (DMD: Digital Micromirror Device, registered trademark of Texas Instruments) 18, a damper (absorber) 19, a microlens array 20, and a projection. And a lens 21.
  • DMD Digital Micromirror Device, registered trademark of Texas Instruments
  • a digital micromirror device (hereinafter referred to as DMD) 18 includes a drive substrate (CMOS substrate) 22 and a large number of micromirrors (thin film mirrors) 23 (23A to 23F: A to F).
  • the columns are each provided with six symbols).
  • the number of micromirrors 23 will be described as 36, but the actual number is more than the number of pixels for high-definition television.
  • the micro mirror 23 is formed in a square shape having a side length of about ten and several ⁇ m. A large number of pixel regions are arranged in a matrix on the drive substrate 22, and a CMOS SRAM cell is formed in each pixel region.
  • the micro mirror 23 is arranged on the drive substrate 22 so as to correspond to each CMOS SRAM cell.
  • the micro mirror 23 is provided by the MEMS (Micro Electro Mechanical Systems) technology.
  • Each micro mirror 23 is provided so as to be movable to two positions. Specifically, for example, it is configured to be rotationally moved to two positions forming an angle of +10 degrees and an angle of ⁇ 10 degrees with respect to the substrate surface.
  • the micro mirror 23 is driven so as to be displaced to the above two positions in accordance with the output data from the CMOS SRAM cell side.
  • the laser beam LB is collectively entered from the laser light source unit 12 side to a large number of micro mirrors 23 forming the array.
  • the respective micro mirrors 23 (23A to 23F) are set so as to reflect a part of the laser light of the laser beam LB in two directions by selectively moving to the above two positions. ..
  • One of these two directions is a direction in which a part of the laser light of the laser beam LB is directed to the damper 19, and the other of the two directions is a part of the laser beam LB. This is the direction in which light is directed to the surface of the substrate 1 to be processed.
  • the laser beams reflected from the respective micromirrors (23A1, 23A2, 23A3, 23A4, 23A5, 23A6) in a predetermined row of the DMD 18 are converted into six laser beams LBd1, LBd2, LBd3, LBd4, LBd5. It is schematically shown by LBd6.
  • the row including the micro mirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 is used, but the micro mirrors 23 in other rows may be used.
  • the damper 19 is arranged at a position for receiving the laser beam reflected by the micro mirror 23 in the off state when the micro mirror 23 is in the off state (for example, the angle with respect to the drive substrate 22 is ⁇ 10 degrees, non-irradiation state). Has been done.
  • the microlens array 20 collects the laser beams LBd (LBd1 to LBd6, etc.) reflected by the micromirrors 23 in the on state (for example, the angle with respect to the drive substrate 22 is +10 degrees, the irradiation state) toward the projection lens 21.
  • the projection lens 21 is set so as to image the introduced laser beam LBd (LBd1 to LBd6, etc.) on the surface of the substrate 1 to be processed.
  • the control unit 14 controls the substrate transfer means (not shown) provided on the base 11, the laser light source unit 12, and the DMD 18. Specifically, the control unit 14 is set to drive and control a substrate transfer unit (not shown) to move the target substrate 1 in the transfer direction T at a predetermined speed. Further, the control unit 14 is set so that the position information of the reforming-scheduled region 6 (see FIGS. 5 to 7) in the substrate 1 to be processed is input from a position detection unit (not shown). The position detecting means detects an alignment mark (not shown) provided on the substrate 1 to be processed and outputs a detection signal thereof to the controller 14.
  • control unit 14 is set to drive and control the laser light source unit 12 and the laser beam irradiation unit 13 to perform the first irradiation and the second irradiation on the substrate 1 to be processed. ..
  • the control unit 14 causes the laser light source unit 12 to emit the laser light as the first laser light.
  • the output of this laser light is set to a relatively low energy.
  • the control unit 14 causes the laser light source unit 12 to continuously emit the CW laser light as the second laser light.
  • the output of CW laser light is set to be relatively high.
  • the laser light source unit 12 is turned off, or all the micromirrors 23 (23A to 23F) in the DMD 18 are turned off so that the laser beam LB is reflected toward the damper 19. Is set to state.
  • the control unit 14 is configured to output a drive signal to the DMD 18 when the reforming scheduled area 6 reaches a predetermined position with respect to the base 11 based on the position information data of the reforming scheduled area 6. Has been done.
  • the DMD 18 to which the drive signal is input is controlled to turn on the micromirrors 23 (for example, 23A1, 23A2, 23A3, 23A4, 23A5, 23A6) in a predetermined row.
  • the laser beam LB formed by the laser light emitted from the laser light source unit 12 is reflected by these micro mirrors 23 (23A1, 23A2, 23A3, 23A4, 23A5, 23A6). And is incident on the surface of the substrate 1 to be processed.
  • the laser beams LBd1, LBd2, LBd3, LBd4, LBd5, and LBd6 reflected from the respective micromirrors 23 are lateral to the gate wiring 3 and outside the modification-scheduled region 6 (at the peripheral portion).
  • a beam spot is projected on the outer side (first irradiation).
  • control unit 14 is set to drive and control the laser light source unit 12 and the laser beam irradiation unit 13 based on the position information so as to perform the second irradiation on the modification target area 6.
  • the beam spot of the CW laser light as the second laser light is located on the side of the non-modified region 6 side. It is projected on the surface of the crystalline silicon film 5.
  • the locus of the beam spot is set so as to cover the reforming target area 6 and move. A method of moving the beam spot of the CW laser light so as to cover the modification target area 6 by the second irradiation will be described in the laser annealing method described later.
  • the control unit 14 controls so that the CW laser light oscillated from the CW laser light source 15 is continuously irradiated directly from the light emitting unit 17 with the ON-OFF signal generator 16 in the OFF state.
  • FIG. 4 shows a region where the crystal structure formed when the amorphous silicon film 5 is irradiated with the laser light is satisfied and the power density condition of the laser light to be irradiated and the amorphous silicon film (covered). It is a map shown from the viewpoint of the scanning speed condition on the processing substrate side.
  • the laser annealing apparatus 10 includes a storage unit (not shown) in which a map having the contents shown in FIG. 4 is stored.
  • the control unit 14 refers to this map at any time to perform the first irradiation and the second irradiation.
  • the control unit 14 determines that the scan speed of the substrate to be processed 1 and the power density of the laser light PL (see FIG. 5) emitted from the laser light source unit 12 are small in the map shown in FIG. The control is performed so that the crystal region is satisfied.
  • the control unit 14 controls the scanning speed of the substrate 1 to be processed and the power density of the CW laser light CWL (see FIG. 6) emitted from the laser light source unit 12 from the lateral crystal (pseudo single crystal) in the map shown in FIG. The control is performed so that the conditions for the (crystal) region are satisfied.
  • the substrate 1 to be processed and the laser annealing apparatus 10 used in the laser annealing method according to the present embodiment have been described above, but the laser annealing method and the method of manufacturing a thin film transistor using these are described below.
  • the laser annealing method and the thin film transistor manufacturing method according to the present embodiment will be described with reference to the flowchart of FIG.
  • the laser annealing method according to the present embodiment will be described by including it in the method of manufacturing a thin film transistor.
  • the laser annealing method according to this embodiment includes a first irradiation step (step 4) and a second irradiation step (step 5) described below (see FIG. 1).
  • a plurality of gate wirings 3 are formed on the glass substrate 2 in parallel.
  • an amorphous silicon film 5 is formed on the entire surface of the glass substrate 2 on which the gate wiring 3 is formed, and a substrate to be processed (gate substrate) 1 is manufactured (step). 1).
  • the substrate 1 to be processed is washed (step 2). Since the cleaned amorphous silicon film 5 of the substrate 1 to be processed contains hydrogen, for example, dehydrogenation processing is performed at about 450° C. for several hours (step 3).
  • the substrate 1 to be processed is set on the base 11 of the laser annealing apparatus 10 and is moved along the transport direction T at a predetermined scan speed.
  • step 4 the control unit 14 sends a drive signal to the DMD 18 when the scheduled reforming region 6 reaches a predetermined position based on the positional information of the reforming scheduled region 6. Output. Based on the drive signal, the DMD 18 to which the drive signal is input turns on the micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 in the preset columns.
  • FIG. 5 shows an ON state of the plurality of micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 in a row (the micromirrors 23 in the ON state are shaded).
  • the laser beam LB composed of the pulsed laser light emitted from the laser light source unit 12 is the laser beams LBd1, LBd2, LBd3, LBd4, which are reflected by the micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6.
  • LBd5 and LBd6 are the laser light PL shown in FIG. Incident on.
  • the seed crystal is a region outside the reforming scheduled region 6 and along the downstream edge of the reforming scheduled region 6 in the transport direction T.
  • Regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are formed.
  • the amorphous silicon film 5 is changed to microcrystalline silicon.
  • the surface of these seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 has an uneven structure.
  • FIG. 6, FIG. 7, and FIG. 8-5 show the second irradiation step.
  • the control unit 14 drives and controls the laser light source unit 12 and the laser beam irradiation unit 13 based on the position information of the reforming scheduled area 6 to control the reforming scheduled area 6.
  • the second irradiation is started.
  • the beam spot of the CW laser light CWL serving as the second laser light is set to a non-beam spot starting from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6.
  • Annealing is performed by projecting on the surface of the crystalline silicon film 5.
  • FIG. 6 and FIG. 7 show the ON state of the plurality of micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 that are also used for the second irradiation (the micromirrors 23 in the ON state are shaded in a grid pattern).
  • the microcrystalline silicon forming the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 functions as a seed crystal to promote the amorphous silicon film 5 to become a pseudo single crystal (lateral crystal).
  • a high quality pseudo single crystal silicon film 5B can be formed.
  • the second irradiation is performed until the trajectory of the beam spot of each CW laser light CWL reaches the edge (one side) on the upstream side in the transport direction T of the modification target area 6.
  • the pseudo single crystal silicon film 5B can be grown on the entire region 6 to be modified.
  • the pseudo single crystal silicon film 5B formed through the above steps 4 and 5 starts from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, and the pseudo single crystal silicon film is formed over the entire region 6 to be modified.
  • a lateral crystal film of 5B is uniformly formed.
  • the pseudo single crystal silicon film 5B has a large mobility (electron mobility) and is suitable for manufacturing a high mobility TFT.
  • the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are set so as to be spaced apart from each other, so that the pseudo single crystal silicon film 5B is formed. Almost grow in the width direction of the gate wiring 3.
  • the metal film 7 is formed on the entire surface of the substrate by, for example, the vapor deposition method (step 6).
  • the material of the metal film 7 is, for example, an aluminum (Al) alloy.
  • an etching mask (not shown) is formed on the metal film 7 by using a photolithography technique (step 7).
  • This etching mask is a resist mask for forming the metal film 7 on the source/drain electrodes.
  • etching mask for example, wet etching using a mixed acid type etching solution as an etchant is performed to expose the metal film exposed from the etching mask and the seed crystal regions 5A1, 5A2, 5A3, 5A4. , 5A5, 5A6 including the exposed regions of the amorphous silicon film 5 are removed (step 8).
  • the metal film 7 is processed into the source electrode 7S, the drain electrode 7D, the source line 7SL, etc., as shown in FIG. 8-7. Further, the amorphous silicon film 5 including the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 exposed after the etching of the metal film 7 is also etched. As a result, as shown in FIGS. 8-7 and 9, the amorphous silicon film 5 in that region is removed and the underlying gate insulating film 4 is exposed. In this way, the manufacture of the TFT 8 is completed.
  • the modification target area 6 since the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are formed outside the modification target area 6, the modification target area 6 to be the channel semiconductor layer area. Only the pseudo single crystal silicon film 5B can be formed inside, and the performance of the TFT can be improved.
  • a pseudo single crystal silicon film (a polycrystalline silicon film can be grown from a seed crystal region) can be selectively formed in a necessary region, and a seed crystal having an uneven structure can be formed.
  • the regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 can be removed in a later etching process of the metal film 7. Therefore, it is not necessary to perform a special step for removing the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6.
  • the CW laser light CWL is used as the laser light PL after being ON-OFF modulated by the ON-OFF signal generator 16
  • the laser light PL is used in one laser light source unit 12.
  • the modified region 6 is the channel semiconductor layer region of the TFT
  • the pseudo single crystal silicon film 5B formed after the second irradiation is directly used as the channel semiconductor layer region.
  • a patterning step such as a photolithography step or a wet etching step for forming the channel semiconductor layer region, a rinsing/cleaning step after the patterning step, etc. are unnecessary, and the manufacturing process of the TFT substrate is eliminated. Can be significantly reduced.
  • the DMD 18 is used as the spatial light modulator, so that the laser beam is gradually continuous in the width direction of the modification target region 6 only by the on/off operation of the micromirror 23. Annealing can proceed as described above. Therefore, it is not necessary to move the substrate 1 to be processed in the width direction or move the laser beam irradiation unit 13 in the width direction of the substrate 1 to be processed.
  • FIGS. 10 and 11 show an imaging optical system of an MLA laser annealing device that can be used in the laser annealing method according to the embodiment of the present invention.
  • the rest of the configuration of this MLA laser annealing apparatus is the same as that of the laser annealing apparatus 10 described above, and therefore its explanation is omitted.
  • the laser beam LB which is the pulsed laser light emitted from the laser light source unit 12 side shown in FIG. 2, is reflected by the mirror 25 and directly below the corresponding lens of the microlens array 20 via the mask 26.
  • the laser beam LB2 is set to irradiate the scheduled reforming region 6 when the scheduled reforming region 6 reaches.
  • This MLA laser annealing apparatus is used in the first irradiation step of forming a seed crystal region outside the modification target region 6 performed in step 4 of the laser annealing method in the present embodiment.
  • the spatial light modulator may be a liquid crystal cell having an optical shutter function, a grating light valve (GLV: Grating Light Valve, a registered trademark of Silicon Light Machines, Inc.). It is also possible to use a thin-film micromirror array (TMA).
  • GLV Grating Light Valve, a registered trademark of Silicon Light Machines, Inc.
  • TMA thin-film micromirror array
  • the DMD 18 is used as the spatial light modulator, but other beam moving means for moving the laser beam may be used without using the spatial light modulator.
  • the first irradiation step is performed by vibrating the micromirror 23 at high speed to perform pulse width modulation.
  • the pseudo single crystal silicon film 5B is formed as the crystallized silicon film, but it is of course possible to grow the polycrystalline silicon film from the seed crystal region. Also in this case, it is possible to form a high-quality polycrystalline silicon film starting from the seed crystal region.
  • the second laser light for forming the polycrystalline silicon film excimer laser light oscillated from the ELA device can also be used.
  • the TFT structure is a so-called bottom gate type structure in which the gate wiring 3 is formed on the glass substrate 2 on the glass substrate 2. It is possible to apply.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Electromagnetism (AREA)
  • Ceramic Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)

Abstract

Provided is a laser anneal method for reforming a reformation-planned region, in which reformation of an amorphous silicon film is to be performed, into a crystallized silicon film by irradiating the reformation-planned region with laser light, the laser anneal method comprising a first irradiating step for performing first laser light irradiation for forming a seed crystal region comprising microcrystalline silicon in the amorphous silicon film outside the reformation-planned region, and a second irradiating step in which a surface of the amorphous silicon film is irradiated with second laser light starting from the seed crystal region, thereby causing crystal growth so that the amorphous silicon film in the reformation-planned region becomes the crystallized silicon film.

Description

レーザアニール方法および薄膜トランジスタの製造方法Laser annealing method and thin film transistor manufacturing method
　本発明は、レーザアニール方法および薄膜トランジスタの製造方法に関する。 The present invention relates to a laser annealing method and a thin film transistor manufacturing method.
　薄膜トランジスタ（ＴＦＴ：Thin Film Transistor）は、液晶ディスプレイ（ＬＣＤ：Liquid Crystal Display）、有機ＥＬディスプレイ（ＯＬＥＤ:Organic Electroluminescence Display）などの薄型ディスプレイ（ＦＰＤ：Flat Panel Display）をアクティブ駆動するためのスイッチング素子として用いられている。薄膜トランジスタ（以下、ＴＦＴという）の半導体層の材料としては、非晶質シリコン（ａ－Ｓｉ：amorphous Silicon）や、多結晶シリコン（p－Ｓｉ：polycrystalline Silicon）などが用いられている。 A thin film transistor (TFT: Thin Film Transistor) is used as a switching element for actively driving a thin display (FPD: Flat Panel Display) such as a liquid crystal display (LCD: Liquid Crystal Display) and an organic EL display (OLED: Organic Electroluminescence Display). It is used. Amorphous silicon (a-Si: amorphous Silicon), polycrystalline silicon (p-Si: polycrystalline Silicon), or the like is used as a material of a semiconductor layer of a thin film transistor (hereinafter referred to as a TFT).
　非晶質シリコンは、電子の動き易さの指標である移動度（μ）が低い。このため、非晶質シリコンでは、さらに高密度・高精細化が進むＦＰＤで要求される高移動度には対応しきれない。そこで、ＦＰＤにおけるスイッチング素子としては、非晶質シリコンよりも移動度が大幅に高い多結晶シリコンでチャネル半導体層を形成することが好ましい。多結晶シリコン膜を形成する方法としては、エキシマレーザを使ったエキシマレーザアニール（ＥＬＡ:Excimer Laser Annealing）装置で、非晶質シリコン膜にレーザ光を照射し、非晶質シリコンを再結晶化させて多結晶シリコンを形成する方法がある。 Amorphous silicon has a low mobility (μ), which is an index of electron mobility. For this reason, amorphous silicon cannot support the high mobility required for FPDs, which are becoming higher in density and definition. Therefore, as the switching element in the FPD, it is preferable to form the channel semiconductor layer from polycrystalline silicon having a mobility significantly higher than that of amorphous silicon. As a method for forming a polycrystalline silicon film, an amorphous silicon film is irradiated with laser light by an excimer laser annealing (ELA) device using an excimer laser to recrystallize the amorphous silicon film. There is a method for forming polycrystalline silicon.
　従来のレーザアニール方法として、基板全面に形成された非晶質シリコン膜に対して、ＴＦＴ形成領域（チャネル半導体層領域）のみに、レーザパルス光を用いたエキシマレーザアニールを施して多結晶シリコン膜を部分的に形成する技術が知られている（例えば、特許文献１参照）。この方法では、ＴＦＴ形成領域に対して、レーザパルス光のビームスポットがＴＦＴ形成領域全体に照射可能となるようにマイクロレンズの配置が設定されている。 As a conventional laser annealing method, the amorphous silicon film formed on the entire surface of the substrate is subjected to excimer laser annealing using laser pulse light only in the TFT formation region (channel semiconductor layer region) to form a polycrystalline silicon film. There is known a technique of partially forming the (see Patent Document 1). In this method, the arrangement of the microlenses is set so that the beam spot of the laser pulse light can be irradiated to the entire TFT formation region with respect to the TFT formation region.
特開２０１０－２８３０７３号公報JP, 2010-283073, A
　しかしながら、エキシマレーザのパルス光照射によって形成される多結晶シリコンは、結晶粒径が数１０～数１００ｎｍ程度である。この程度の結晶粒径では、さらに高い移動度を満足することができない。現在でも、ＦＰＤにおける画素トランジスタをオン・オフするドライバ回路のＴＦＴはチャネル半導体層領域に高い移動度が要求されている。さらに、ＦＰＤにおいては、その大型化、高解像度化、動画特性の高速化に伴って、画素のスイッチング素子としてのＴＦＴにおいても高移動度化が要望される。 However, the crystal grain size of the polycrystalline silicon formed by the irradiation of the excimer laser pulse light is about several tens to several hundreds nm. With such a crystal grain size, higher mobility cannot be satisfied. Even today, a TFT of a driver circuit for turning on/off a pixel transistor in an FPD is required to have high mobility in a channel semiconductor layer region. Further, in the FPD, as the size thereof is increased, the resolution is increased, and the moving image characteristics are increased in speed, the TFT as a switching element of the pixel is also required to have high mobility.
　本発明は、上記の課題に鑑みてなされたものであって、移動度の高い多結晶シリコン膜や疑似単結晶シリコン膜などを必要な領域に選択的に形成することができるレーザアニール方法を提供することを目的とする。また、本発明は、高い移動度を持つ高性能な薄膜トランジスタの製造方法を提供することを目的とする。 The present invention has been made in view of the above problems, and provides a laser annealing method capable of selectively forming a high mobility polycrystalline silicon film, a pseudo single crystal silicon film, or the like in a necessary region. The purpose is to do. Another object of the present invention is to provide a method for manufacturing a high performance thin film transistor having high mobility.
　上述した課題を解決し、目的を達成するために、本発明の態様は、非晶質シリコン膜の改質を行う改質予定領域にレーザ光を照射して前記改質予定領域を結晶化シリコン膜に改質させるレーザアニール方法であって、前記改質予定領域の外側の前記非晶質シリコン膜に微結晶シリコンでなる種結晶領域を形成する第１のレーザ光の照射を行う第１照射工程と、前記種結晶領域を起点として、前記非晶質シリコン膜の表面に第２のレーザ光の照射を行って前記改質予定領域内の前記非晶質シリコン膜が前記結晶化シリコン膜になるように結晶成長させる第２照射工程と、を備えることを特徴とする。 In order to solve the above-mentioned problems and achieve the object, an aspect of the present invention is to irradiate a laser beam to a reforming scheduled region for reforming an amorphous silicon film to crystallize the reforming scheduled region. A laser irradiation method for modifying a film, the first irradiation for irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the modification target region And a step of irradiating the surface of the amorphous silicon film with a second laser beam from the seed crystal region as a starting point, so that the amorphous silicon film in the region to be modified becomes the crystallized silicon film. And a second irradiation step of growing a crystal so that
　上記態様としては、前記非晶質シリコン膜は、表面にゲート配線が形成された基板の上に、ゲート絶縁膜を介して成膜されており、前記改質予定領域は、前記ゲート配線に重なる領域に形成された前記非晶質シリコン膜に設定された薄膜トランジスタのチャネル半導体層となる領域であり、前記種結晶領域は、前記ゲート配線の長手方向に直交する方向の外側に配置されることが好ましい。 In the above aspect, the amorphous silicon film is formed on a substrate having a gate wiring formed on its surface through a gate insulating film, and the region to be modified overlaps the gate wiring. The seed crystal region is a region to be a channel semiconductor layer of a thin film transistor set in the amorphous silicon film formed in the region, and the seed crystal region may be arranged outside in a direction orthogonal to the longitudinal direction of the gate wiring. preferable.
　上記態様としては、前記第１照射工程の前記第１のレーザ光の照射における照射エネルギー量は、前記非晶質シリコン膜が種結晶として微結晶化する条件に設定し、前記第２照射工程の前記第２のレーザ光の照射は、連続発振レーザ光を用いて連続照射することが好ましい。 In the above aspect, the irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition in which the amorphous silicon film is microcrystallized as a seed crystal, and the second irradiation step is performed. The irradiation of the second laser light is preferably continuous irradiation using continuous wave laser light.
　上記態様としては、前記第１のレーザ光は、前記第２照射工程で用いる前記連続発振レーザ光をＯＮ－ＯＦＦ変調して照射することが好ましい。 In the above aspect, it is preferable that the first laser light is irradiated with ON-OFF modulation of the continuous wave laser light used in the second irradiation step.
　上記態様としては、前記第１照射工程と前記第２照射工程は、レーザ光を選択的に反射させてレーザビームを前記改質予定領域内へ選択的に照射させる空間光変調器と、を用いて行うことが好ましい。 As the above aspect, the first irradiation step and the second irradiation step use a spatial light modulator for selectively reflecting a laser beam to selectively irradiate a laser beam into the reforming scheduled region. It is preferable to carry out.
　上記態様としては、前記空間光変調器は、多数のマイクロミラーがマトリクス状に配置され、該マイクロミラーのそれぞれが個別に、前記非晶質シリコン膜の表面へのレーザビームの照射状態と非照射状態とに切り換え可能に選択駆動されることが好ましい。 In the above aspect, in the spatial light modulator, a large number of micromirrors are arranged in a matrix, and each of the micromirrors individually irradiates a laser beam onto the surface of the amorphous silicon film and a non-irradiation state. It is preferable that the state is selectively driven so that the state can be switched.
　上記態様としては、前記第１照射工程は、複数のマイクロレンズがマトリクス状に配置されたマイクロレンズアレイを用いて前記改質予定領域の外側へ複数のレーザパルスビームを照射し、前記第２照射工程は、前記マイクロレンズアレイを用いて前記改質予定領域へ複数の連続発振レーザ光のレーザビームを照射することが好ましい。 In the above aspect, in the first irradiation step, a plurality of laser pulse beams are irradiated to the outside of the modification target region by using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiation is performed. In the step, it is preferable to irradiate the region to be modified with a plurality of laser beams of continuous wave laser beams using the microlens array.
　上記態様としては、前記結晶化シリコン膜は、多結晶シリコン膜、疑似単結晶シリコン膜から選ばれることが好ましい。 In the above aspect, the crystallized silicon film is preferably selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
　本発明の他の態様としては、薄膜トランジスタの製造方法であって、基板上に、順次、ゲート配線と、ゲート絶縁膜と、非晶質シリコン膜と、が形成されてなるゲート基板における、前記非晶質シリコン膜に設定したチャネル半導体層となる改質予定領域の外側で、かつ前記ゲート配線に対して当該ゲート配線の長手方向に直交する方向の外側に、第１のレーザ光の照射を行って微結晶シリコンでなる種結晶領域を形成する第１照射工程と、前記種結晶領域を起点として、前記非晶質シリコン膜の表面に第２のレーザ光の照射を行って前記改質予定領域内の前記非晶質シリコン膜が結晶化シリコン膜になるように結晶成長させる第２照射工程と、前記第２照射工程が施された前記非晶質シリコン膜の上に全面に金属膜を成膜する工程と、前記金属膜上にソース配線およびドレイン配線となる領域のエッチング用マスクをパターニングする工程と、前記エッチング用マスクを用いてエッチングを行って、前記エッチング用マスクで覆われずに露出する前記金属膜と、前記金属膜のエッチング後に露出する前記種結晶領域を含む非晶質シリコン膜と、を除去することを特徴とする。 As another aspect of the present invention, there is provided a method of manufacturing a thin film transistor, wherein the gate wiring, the gate insulating film, and the amorphous silicon film are sequentially formed on the substrate, Irradiation of the first laser beam is performed on the outside of the region to be modified to be the channel semiconductor layer set in the amorphous silicon film and on the outside of the gate wiring in the direction orthogonal to the longitudinal direction of the gate wiring. A first irradiation step of forming a seed crystal region made of microcrystalline silicon as a starting point, and a second laser beam is irradiated to the surface of the amorphous silicon film from the seed crystal region as a starting point to perform the modification target region. A second irradiation step for crystal growth so that the amorphous silicon film therein becomes a crystallized silicon film; and a metal film is formed on the entire surface of the amorphous silicon film subjected to the second irradiation step. A step of forming a film, a step of patterning an etching mask in a region to be a source wiring and a drain wiring on the metal film, and etching by using the etching mask to expose without being covered with the etching mask And the amorphous silicon film including the seed crystal region exposed after the etching of the metal film is removed.
　上記態様としては、前記第１照射工程の前記第１のレーザ光の照射における照射エネルギー量は、前記非晶質シリコン膜が種結晶として微結晶化する条件に設定し、前記第２照射工程の前記第２のレーザ光の照射は、連続発振レーザ光を用いて連続照射することが好ましい。 In the above aspect, the irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition in which the amorphous silicon film is microcrystallized as a seed crystal, and the second irradiation step is performed. The irradiation of the second laser light is preferably continuous irradiation using continuous wave laser light.
　上記態様としては、前記第１のレーザ光は、前記第２照射工程で用いる前記連続発振レーザ光をＯＮ－ＯＦＦ変調して照射することが好ましい。 In the above aspect, it is preferable that the first laser light is irradiated with ON-OFF modulation of the continuous wave laser light used in the second irradiation step.
　上記態様としては、前記第１照射工程と前記第２照射工程は、レーザ光を選択的に反射させてレーザビームを前記改質予定領域内へ選択的に照射させる空間光変調器と、を用いて行うことが好ましい。 As the above aspect, the first irradiation step and the second irradiation step use a spatial light modulator for selectively reflecting a laser beam to selectively irradiate a laser beam into the reforming scheduled region. It is preferable to carry out.
　上記態様としては、前記空間光変調器は、多数のマイクロミラーがマトリクス状に配置され、該マイクロミラーのそれぞれが個別に、前記非晶質シリコン膜の表面へのレーザビームの照射状態と非照射状態とに切り換え可能に選択駆動されることが好ましい。 In the above aspect, in the spatial light modulator, a large number of micromirrors are arranged in a matrix, and each of the micromirrors individually irradiates a laser beam onto the surface of the amorphous silicon film and a non-irradiation state. It is preferable that the state is selectively driven so that the state can be switched.
　上記態様としては、前記第１照射工程は、複数のマイクロレンズがマトリクス状に配置されたマイクロレンズアレイを用いて前記改質予定領域の外側へ複数のレーザ変調ビームを照射し、前記第２照射工程は、前記マイクロレンズアレイを用いて前記改質予定領域へ複数の連続発振レーザ光のレーザビームを照射することが好ましい。 In the above aspect, in the first irradiation step, a plurality of laser-modulated beams are irradiated to the outside of the region to be modified by using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiation is performed. In the step, it is preferable to irradiate the region to be modified with a plurality of laser beams of continuous wave laser beams using the microlens array.
　上記態様としては、前記結晶化シリコン膜は、多結晶シリコン膜、疑似単結晶シリコン膜から選ばれることが好ましい。 In the above aspect, the crystallized silicon film is preferably selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
　本発明に係るレーザアニール方法によれば、移動度の高い多結晶シリコン膜や疑似単結晶シリコン膜を必要な領域に選択的に形成でき、高性能なＴＦＴを実現できる。本発明に係る薄膜トランジスタの製造方法によれば、少ないプロセス数で高性能なＴＦＴの製造を実現できる。 According to the laser annealing method according to the present invention, a high-mobility polycrystalline silicon film or a pseudo single crystal silicon film can be selectively formed in a necessary region, and a high-performance TFT can be realized. According to the method of manufacturing a thin film transistor according to the present invention, it is possible to manufacture a high-performance TFT with a small number of processes.
図１は、本発明の第１の実施の形態に係るレーザアニール方法を示すフローチャートである。FIG. 1 is a flowchart showing a laser annealing method according to the first embodiment of the present invention. 図２は、本発明の第１の実施の形態に係るレーザアニール方法に用いるレーザアニール装置の概略構成図である。FIG. 2 is a schematic configuration diagram of a laser annealing apparatus used in the laser annealing method according to the first embodiment of the present invention. 図３は、本発明の第１の実施の形態に係るレーザアニール方法に用いるレーザアニール装置におけるマイクロミラーの配置例を模式的に示す説明図である。FIG. 3 is an explanatory diagram schematically showing an arrangement example of micromirrors in the laser annealing apparatus used in the laser annealing method according to the first embodiment of the present invention. 図４は、非晶質シリコン膜に対してレーザ光を照射したときに形成される結晶構造が成立する領域を、照射するレーザ光のパワー密度条件と、非晶質シリコン膜（被処理基板）側のスキャン速度条件と、の観点から示すマップである。FIG. 4 shows a region where a crystal structure formed when a laser beam is irradiated to the amorphous silicon film is satisfied, the power density condition of the laser beam to be irradiated, and the amorphous silicon film (substrate to be processed). It is a map shown from the viewpoint of the side scanning speed condition. 図５は、本発明の実施の形態に係るレーザアニール方法において、種結晶領域を形成する第１照射工程を示す説明図である。FIG. 5 is an explanatory diagram showing a first irradiation step of forming a seed crystal region in the laser annealing method according to the embodiment of the present invention. 図６は、本発明の実施の形態に係るレーザアニール方法において、第１照射工程で形成した種結晶領域を起点にして第２照射を行う第２照射工程を開始した状態を示す説明図である。FIG. 6 is an explanatory diagram showing a state where the second irradiation step of performing the second irradiation with the seed crystal region formed in the first irradiation step as a starting point is started in the laser annealing method according to the embodiment of the present invention. .. 図７は、本発明の実施の形態に係るレーザアニール方法において、第２照射工程により改質予定領域を全て疑似単結晶シリコン膜に改質した状態を示す説明図である。FIG. 7 is an explanatory diagram showing a state in which all the regions to be modified are modified into pseudo single crystal silicon films by the second irradiation step in the laser annealing method according to the embodiment of the present invention. 図８－１は、本発明の実施の形態に係るレーザアニール方法において用いるゲート配線が形成されたガラス基板（ゲート基板）を示す工程平面図である。FIG. 8A is a process plan view showing a glass substrate (gate substrate) on which a gate wiring used in the laser annealing method according to the embodiment of the present invention is formed. 図８－２は、本発明の実施の形態に係るレーザアニール方法において、非晶質シリコン膜が全面に形成されたガラス基板（ゲート基板）を示す工程平面図である。FIG. 8-2 is a process plan view showing a glass substrate (gate substrate) on the entire surface of which an amorphous silicon film is formed in the laser annealing method according to the embodiment of the present invention. 図８－３は、本発明の実施の形態に係るレーザアニール方法において、非晶質シリコン膜が全面に形成されたガラス基板（ゲート基板）における改質予定領域を示す工程平面図である。FIG. 8C is a process plan view showing a region to be modified in a glass substrate (gate substrate) having an amorphous silicon film formed on the entire surface thereof in the laser annealing method according to the embodiment of the present invention. 図８－４は、本発明の実施の形態に係るレーザアニール方法において、第１照射工程を施した状態を示す工程平面図である。FIG. 8-4 is a process plan view showing a state where the first irradiation process is performed in the laser annealing method according to the embodiment of the present invention. 図８－５は、本発明の実施の形態に係るレーザアニール方法において、第２照射工程を施した状態を示す工程平面図である。FIG. 8-5 is a process plan view showing a state where the second irradiation process is performed in the laser annealing method according to the embodiment of the present invention. 図８－６は、本発明の実施の形態に係るレーザアニール方法において、第２照射工程の後に、基板全体に金属膜を蒸着した状態を示す工程平面図である。FIG. 8-6 is a process plan view showing a state where the metal film is deposited on the entire substrate after the second irradiation process in the laser annealing method according to the embodiment of the present invention. 図８－７は、本発明の実施の形態に係るレーザアニール方法において、金属膜をパターニングしてソース・ドレインを形成した状態を示す工程平面図である。FIGS. 8-7 are process plan views showing a state in which the metal film is patterned to form the source/drain in the laser annealing method according to the embodiment of the present invention. 図９は、図８－７におけるＡ－Ｂ線で切断した断面を示すＡ－Ｂ断面図である。FIG. 9 is an AB sectional view showing a section taken along line AB in FIG. 8-7. 図１０は、本発明の実施の形態に係るレーザアニール方法に用いるＭＬＡレーザアニール装置における結像光学系を示す説明図である。FIG. 10 is an explanatory diagram showing an imaging optical system in the MLA laser annealing apparatus used in the laser annealing method according to the embodiment of the present invention. 図１１は、本発明の実施の形態に係るレーザアニール方法に用いるＭＬＡレーザアニール装置における結像光学系を示す説明図である。FIG. 11 is an explanatory diagram showing an imaging optical system in the MLA laser annealing apparatus used in the laser annealing method according to the embodiment of the present invention.
　以下に、本発明の実施の形態に係るレーザアニール方法および薄膜トランジスタの製造方法の詳細を図面に基づいて説明する。但し、図面は模式的なものであり、各部材の数、各部材の寸法、寸法の比率、形状などは現実のものと異なることに留意すべきである。また、図面相互間においても互いの寸法の関係や比率や形状が異なる部分が含まれている。 The details of the laser annealing method and the manufacturing method of the thin film transistor according to the embodiment of the present invention will be described below with reference to the drawings. However, it should be noted that the drawings are schematic, and the number of each member, the size of each member, the ratio of sizes, the shape, and the like are different from the actual ones. In addition, the drawings include portions having different dimensional relationships, ratios, and shapes.
　本発明のレーザアニール方法では、非晶質シリコン膜の改質を行う改質予定領域にレーザ光を照射してこの改質予定領域を結晶化シリコン膜に改質させる場合に用いる。このレーザアニール方法は、改質予定領域の外側の前記非晶質シリコン膜に微結晶シリコンでなる種結晶領域を形成する第１のレーザ光の照射を行う第１照射工程と、種結晶領域を起点として、非晶質シリコン膜の表面に第２のレーザ光の照射を行って改質予定領域内の非晶質シリコン膜が結晶化シリコン膜になるように結晶成長させる第２照射工程と、を備える。 The laser annealing method of the present invention is used to irradiate a laser beam to a modification target area for modifying an amorphous silicon film to modify the modification target area into a crystallized silicon film. This laser annealing method comprises a first irradiation step of irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the modification target region, and a seed crystal region As a starting point, a second irradiation step of irradiating the surface of the amorphous silicon film with a second laser beam to grow a crystal so that the amorphous silicon film in the modified region becomes a crystallized silicon film, Equipped with.
［実施の形態］
　レーザアニール方法の説明に先駆けて、このレーザアニール方法でアニール処理を行う被処理基板の一例と、レーザアニール方法に用いるレーザアニール装置１０と、について説明する。 [Embodiment]
Prior to the description of the laser annealing method, an example of the substrate to be annealed by the laser annealing method and the laser annealing apparatus 10 used in the laser annealing method will be described.
（被処理基板）
　図２に示すように、被処理基板１は、ガラス基板２と、このガラス基板２の表面に配置された複数のゲート配線３と、ガラス基板２およびゲート配線３の上に形成されたゲート絶縁膜４と、このゲート絶縁膜４の上に全面に堆積された非晶質シリコン膜５と、を備える。なお、この被処理基板１は、ゲート基板ともいう。被処理基板１は、最終的に薄膜トランジスタ（ＴＦＴ）などが作り込まれたＴＦＴ基板となる。 (Substrate to be processed)
As shown in FIG. 2, the substrate 1 to be processed includes a glass substrate 2, a plurality of gate wirings 3 arranged on the surface of the glass substrate 2, a glass substrate 2 and a gate insulation formed on the gate wiring 3. The film 4 and the amorphous silicon film 5 deposited on the entire surface of the gate insulating film 4 are provided. The substrate 1 to be processed is also referred to as a gate substrate. The substrate 1 to be processed finally becomes a TFT substrate in which a thin film transistor (TFT) or the like is formed.
　本実施の形態では、被処理基板１は、レーザアニール処理において、ゲート配線３の長手方向に直交する方向に沿って搬送される。すなわち、このゲート配線３の長手方向は、図５から図７に示すように、搬送方向Ｔと直交する方向である。なお、図２に示したゲート配線３は、長手方向に沿って切断した状態を示す。図５から図７には、１本のゲート配線３を示すが、ガラス基板２には多数のゲート配線３が互いに平行をなして配置されている。また、被処理基板１には、所定の位置に図示しない複数のアライメントマークが設けられている。 In the present embodiment, the substrate 1 to be processed is transported along the direction orthogonal to the longitudinal direction of the gate wiring 3 in the laser annealing process. That is, the longitudinal direction of the gate wiring 3 is a direction orthogonal to the transport direction T, as shown in FIGS. The gate wiring 3 shown in FIG. 2 is in a state of being cut along the longitudinal direction. Although one gate wiring 3 is shown in FIGS. 5 to 7, a large number of gate wirings 3 are arranged on the glass substrate 2 in parallel with each other. The substrate 1 to be processed is provided with a plurality of alignment marks (not shown) at predetermined positions.
　図５から図７に示すように、ゲート配線３の上方に成膜された非晶質シリコン膜５には、矩形状の改質予定領域６が設定されている。この改質予定領域６は、最終的にはＴＦＴのチャネル半導体層領域となる。この改質予定領域６は、ゲート配線３の長手方向に沿って形成されるＴＦＴの数に応じて複数が設定されている。本実施の形態では、この改質予定領域６の幅寸法Ｗ（図５参照）は、ゲート配線３の幅と略同じ寸法に設定されている。 As shown in FIGS. 5 to 7, in the amorphous silicon film 5 formed above the gate wiring 3, a rectangular reforming-scheduled region 6 is set. The region 6 to be modified finally becomes the channel semiconductor layer region of the TFT. A plurality of regions 6 to be modified are set according to the number of TFTs formed along the longitudinal direction of the gate wiring 3. In the present embodiment, the width dimension W (see FIG. 5) of the region to be modified 6 is set to be substantially the same as the width of the gate wiring 3.
（レーザアニール装置の概略構成）
　以下、図２から図４を用いて、本実施の形態に係るレーザアニール装置１０の概略構成を説明する。図２に示すように、レーザアニール装置１０は、基台１１と、レーザ光源部１２と、レーザビーム照射部１３と、制御部１４と、を備える。 (Schematic configuration of laser annealing device)
The schematic configuration of the laser annealing apparatus 10 according to the present embodiment will be described below with reference to FIGS. 2 to 4. As shown in FIG. 2, the laser annealing apparatus 10 includes a base 11, a laser light source unit 12, a laser beam irradiation unit 13, and a control unit 14.
　本実施の形態では、アニール処理時にはレーザビーム照射部１３は移動せず、被処理基板１を移動させるようになっている。基台１１は、図示しない基板搬送手段を備えている。このレーザアニール装置１０においては、被処理基板１を基台１１の上に配置した状態で、図示しない基板搬送手段によって、搬送方向（スキャン方向）Ｔに向けて搬送する。
図５から図７に示すように、この搬送方向Ｔは、ゲート配線３の長手方向と直交する方向である。 In the present embodiment, the laser beam irradiation unit 13 does not move during the annealing process, but the substrate 1 to be processed is moved. The base 11 is provided with a substrate transfer means (not shown). In the laser annealing apparatus 10, the substrate 1 to be processed is placed on the base 11 and is transported in the transport direction (scanning direction) T by a substrate transport means (not shown).
As shown in FIGS. 5 to 7, the transport direction T is a direction orthogonal to the longitudinal direction of the gate wiring 3.
　図２に示すように、レーザ光源部１２は、連続発振レーザ光（ＣＷレーザ光）を発振する光源としてのＣＷレーザ光源１５と、このＣＷレーザ光をＯＮ－ＯＦＦ変調して第１のレーザ光としてのＣＷレーザ変調光とするＯＮ－ＯＦＦ信号発生器１６と、これら連続発振レーザ光やＣＷレーザ変調光をレーザビーム照射部１３側へ向けて出射する光出射部１７と、を備える。このレーザ光源部１２は、第２のレーザ光としてのＣＷレーザ光と、ＣＷレーザ光源１５から出射されたＣＷレーザ光をＯＮ－ＯＦＦ変調した第１のレーザ光としてのＣＷレーザ変調光と、の２種類のレーザ光の出射ができるように設定されている。
レーザ光源部１２では、光出射部１７から、レーザビーム照射部１３における後述するデジタルマイクロミラーデバイス１８側へ向けてレーザビームＬＢを出射する。 As shown in FIG. 2, the laser light source unit 12 includes a CW laser light source 15 as a light source that oscillates continuous wave laser light (CW laser light), and ON-OFF modulation of the CW laser light to generate a first laser light. An ON-OFF signal generator 16 for generating CW laser modulated light as described above, and a light emitting unit 17 for emitting these continuous wave laser light and CW laser modulated light toward the laser beam irradiation unit 13 side. The laser light source unit 12 includes a CW laser light as a second laser light and a CW laser modulated light as a first laser light obtained by ON-OFF modulating the CW laser light emitted from the CW laser light source 15. It is set so that two types of laser light can be emitted.
In the laser light source unit 12, the laser beam LB is emitted from the light emitting unit 17 toward the digital micromirror device 18 side of the laser beam irradiation unit 13, which will be described later.
　ＣＷレーザ光源１５としては、半導体レーザ、固体レーザ、液体レーザ、気体レーザなどの各種のレーザを用いることが可能である。 As the CW laser light source 15, various lasers such as a semiconductor laser, a solid-state laser, a liquid laser, a gas laser can be used.
　レーザビーム照射部１３は、図示しない支持フレームなどにより、基台１１の上方に配置されている。レーザビーム照射部１３は、空間光変調器としてのデジタルマイクロミラーデバイス（ＤＭＤ：Digital Micro-mirror Device, Texas Instruments 社の登録商標）１８と、ダンパ（アブソーバ）１９と、マイクロレンズアレイ２０と、投影レンズ２１と、を備える。 The laser beam irradiation unit 13 is arranged above the base 11 by a support frame (not shown) or the like. The laser beam irradiation unit 13 includes a digital micromirror device (DMD: Digital Micromirror Device, registered trademark of Texas Instruments) 18, a damper (absorber) 19, a microlens array 20, and a projection. And a lens 21.
　図２および図３に示すように、デジタルマイクロミラーデバイス（以下、ＤＭＤという）１８は、駆動基板（ＣＭＯＳ基板）２２と、多数のマイクロミラー（薄膜ミラー）２３（２３Ａ～２３Ｆ：Ａ～Ｆの列にそれぞれ６つの符号を付す）と、を備えている。本実施の形態では、説明の便宜上、マイクロミラー２３の数を３６として説明するが、実際の数はハイビジョンの画素数以上である。マイクロミラー２３は、一辺の長さが十数μm程度の正方形状に形成されている。駆動基板２２には、多数のピクセル領域がマトリクス状に配置され、個々のピクセル領域にはＣＭＯＳ ＳＲＡＭセルが構成されている。 As shown in FIGS. 2 and 3, a digital micromirror device (hereinafter referred to as DMD) 18 includes a drive substrate (CMOS substrate) 22 and a large number of micromirrors (thin film mirrors) 23 (23A to 23F: A to F). The columns are each provided with six symbols). In the present embodiment, for convenience of description, the number of micromirrors 23 will be described as 36, but the actual number is more than the number of pixels for high-definition television. The micro mirror 23 is formed in a square shape having a side length of about ten and several μm. A large number of pixel regions are arranged in a matrix on the drive substrate 22, and a CMOS SRAM cell is formed in each pixel region.
　マイクロミラー２３は、駆動基板２２の上にそれぞれのＣＭＯＳ ＳＲＡＭセルに対応して配置されている。マイクロミラー２３は、ＭＥＭＳ(Micro Electro Mechanical Systems)技術により設けられている。それぞれのマイクロミラー２３は、２つの位置に移動可能に設けられている。具体的には、基板面に対して例えば、＋１０度の角度と－１０度の角度をなす２つの位置に回転移動するようになっている。マイクロミラー２３は、ＣＭＯＳ ＳＲＡＭセル側からの出力データに対応して、上記２つの位置に変位するように駆動される。 The micro mirror 23 is arranged on the drive substrate 22 so as to correspond to each CMOS SRAM cell. The micro mirror 23 is provided by the MEMS (Micro Electro Mechanical Systems) technology. Each micro mirror 23 is provided so as to be movable to two positions. Specifically, for example, it is configured to be rotationally moved to two positions forming an angle of +10 degrees and an angle of −10 degrees with respect to the substrate surface. The micro mirror 23 is driven so as to be displaced to the above two positions in accordance with the output data from the CMOS SRAM cell side.
　図３に示すように、アレイを構成する多数のマイクロミラー２３には、レーザ光源部１２側からレーザビームＬＢが一括して入射するようになっている。そして、それぞれのマイクロミラー２３（２３Ａ～２３Ｆ）は、上記の２つの位置に選択的に移動することにより、レーザビームＬＢの一部のレーザ光を２つの方向に反射するように設定されている。
これら２つの方向のうちの一方の方向は、レーザビームＬＢの一部のレーザ光をダンパ１９に向かわせる方向であり、２つの方向のうちの他方の方向は、レーザビームＬＢの一部のレーザ光を被処理基板１の表面に向かわせる方向である。 As shown in FIG. 3, the laser beam LB is collectively entered from the laser light source unit 12 side to a large number of micro mirrors 23 forming the array. The respective micro mirrors 23 (23A to 23F) are set so as to reflect a part of the laser light of the laser beam LB in two directions by selectively moving to the above two positions. ..
One of these two directions is a direction in which a part of the laser light of the laser beam LB is directed to the damper 19, and the other of the two directions is a part of the laser beam LB. This is the direction in which light is directed to the surface of the substrate 1 to be processed.
　図２においては、ＤＭＤ１８の所定の列におけるそれぞれのマイクロミラー（２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６）から反射されたレーザ光を６本のレーザビームＬＢｄ１，ＬＢｄ２，ＬＢｄ３，ＬＢｄ４，ＬＢｄ５，ＬＢｄ６で模式的に示している。本実施の形態では、マイクロミラー２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６を備える列を用いるが、他の列のマイクロミラー２３を用いてもよい。 In FIG. 2, the laser beams reflected from the respective micromirrors (23A1, 23A2, 23A3, 23A4, 23A5, 23A6) in a predetermined row of the DMD 18 are converted into six laser beams LBd1, LBd2, LBd3, LBd4, LBd5. It is schematically shown by LBd6. In the present embodiment, the row including the micro mirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 is used, but the micro mirrors 23 in other rows may be used.
　ダンパ１９は、マイクロミラー２３がオフ状態（例えば、駆動基板２２に対する角度が－１０度の状態、非照射状態）のときに、オフ状態のマイクロミラー２３で反射されたレーザ光を受け入れる位置に配置されている。 The damper 19 is arranged at a position for receiving the laser beam reflected by the micro mirror 23 in the off state when the micro mirror 23 is in the off state (for example, the angle with respect to the drive substrate 22 is −10 degrees, non-irradiation state). Has been done.
　マイクロレンズアレイ２０は、オン状態（例えば、駆動基板２２に対する角度が＋１０度の状態、照射状態）のマイクロミラー２３で反射されたレーザビームＬＢｄ（ＬＢｄ１～ＬＢｄ６など）は投影レンズ２１に向けて集光し、投影レンズ２１は、導入されたレーザビームＬＢｄ（ＬＢｄ１～ＬＢｄ６など）を被処理基板１の表面に結像させるように設定されている。 The microlens array 20 collects the laser beams LBd (LBd1 to LBd6, etc.) reflected by the micromirrors 23 in the on state (for example, the angle with respect to the drive substrate 22 is +10 degrees, the irradiation state) toward the projection lens 21. The projection lens 21 is set so as to image the introduced laser beam LBd (LBd1 to LBd6, etc.) on the surface of the substrate 1 to be processed.
　制御部１４は、基台１１に設けられた図示しない基板搬送手段と、レーザ光源部１２と、ＤＭＤ１８と、の制御を行う。具体的には、制御部１４は、図示しない基板搬送手段を駆動制御して被処理基板１を搬送方向Ｔへ向けて所定の速度で移動させるように設定されている。また、制御部１４は、図示しない位置検出手段から被処理基板１における改質予定領域６（図５から図７を参照）の位置情報が入力されるように設定されている。なお、位置検出手段は、被処理基板１に設けられた図示しないアライメントマークを検出し、その検出信号を制御部１４に出力する。 The control unit 14 controls the substrate transfer means (not shown) provided on the base 11, the laser light source unit 12, and the DMD 18. Specifically, the control unit 14 is set to drive and control a substrate transfer unit (not shown) to move the target substrate 1 in the transfer direction T at a predetermined speed. Further, the control unit 14 is set so that the position information of the reforming-scheduled region 6 (see FIGS. 5 to 7) in the substrate 1 to be processed is input from a position detection unit (not shown). The position detecting means detects an alignment mark (not shown) provided on the substrate 1 to be processed and outputs a detection signal thereof to the controller 14.
　また、制御部１４は、レーザ光源部１２と、レーザビーム照射部１３と、を駆動制御して、被処理基板１に対して第１照射と第２照射とを行わせるように設定されている。 In addition, the control unit 14 is set to drive and control the laser light source unit 12 and the laser beam irradiation unit 13 to perform the first irradiation and the second irradiation on the substrate 1 to be processed. ..
　第１照射に際して、制御部１４は、レーザ光源部１２から第１のレーザ光としてのレーザ光を出射させる。本実施の形態においては、このレーザ光の出力は比較的低エネルギーに設定する。 At the time of the first irradiation, the control unit 14 causes the laser light source unit 12 to emit the laser light as the first laser light. In the present embodiment, the output of this laser light is set to a relatively low energy.
　第２照射に際しては、制御部１４は、レーザ光源部１２から第２のレーザ光としてのＣＷレーザ光を連続して出射させる。本実施の形態においては、ＣＷレーザ光の出力は比較的高く設定している。第１照射および第２照射を行わないときは、レーザ光源部１２をオフにするか、またはＤＭＤ１８における全てのマイクロミラー２３（２３Ａ～２３Ｆ）を、レーザビームＬＢをダンパ１９に向けて反射させるオフ状態にするように設定されている。 During the second irradiation, the control unit 14 causes the laser light source unit 12 to continuously emit the CW laser light as the second laser light. In the present embodiment, the output of CW laser light is set to be relatively high. When the first irradiation and the second irradiation are not performed, the laser light source unit 12 is turned off, or all the micromirrors 23 (23A to 23F) in the DMD 18 are turned off so that the laser beam LB is reflected toward the damper 19. Is set to state.
　制御部１４は、改質予定領域６の上記位置情報データに基づいて、改質予定領域６が基台１１に対して所定の位置に到達したときに、ＤＭＤ１８へ駆動信号を出力するように設定されている。上記駆動信号が入力されたＤＭＤ１８は、所定の列のマイクロミラー２３（例えば、２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６）をオン状態にするように制御される。 The control unit 14 is configured to output a drive signal to the DMD 18 when the reforming scheduled area 6 reaches a predetermined position with respect to the base 11 based on the position information data of the reforming scheduled area 6. Has been done. The DMD 18 to which the drive signal is input is controlled to turn on the micromirrors 23 (for example, 23A1, 23A2, 23A3, 23A4, 23A5, 23A6) in a predetermined row.
　上記の複数のマイクロミラー２３がオン状態になると、レーザ光源部１２から出射されたレーザ光でなるレーザビームＬＢは、これらマイクロミラー２３（２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６）で反射されて被処理基板１の表面に入射する。 When the plurality of micro mirrors 23 are turned on, the laser beam LB formed by the laser light emitted from the laser light source unit 12 is reflected by these micro mirrors 23 (23A1, 23A2, 23A3, 23A4, 23A5, 23A6). And is incident on the surface of the substrate 1 to be processed.
　図５に示すように、それぞれのマイクロミラー２３から反射されたレーザビームＬＢｄ１，ＬＢｄ２，ＬＢｄ３，ＬＢｄ４，ＬＢｄ５，ＬＢｄ６は、ゲート配線３の側方の、改質予定領域６の外側（周縁部の外側）にビームスポットを投影する（第１照射）。非晶質シリコン膜５に対して第１照射を行うことによって、図５に示すように、改質予定領域６の所定位置に種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６などが形成できる。なお、本実施の形態においては、これら種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６などを形成するために、微結晶化する条件のエネルギー量および被処理基板１のスキャン速度に条件設定されている。 As shown in FIG. 5, the laser beams LBd1, LBd2, LBd3, LBd4, LBd5, and LBd6 reflected from the respective micromirrors 23 are lateral to the gate wiring 3 and outside the modification-scheduled region 6 (at the peripheral portion). A beam spot is projected on the outer side (first irradiation). By performing the first irradiation on the amorphous silicon film 5, as shown in FIG. 5, seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 and the like are formed at predetermined positions in the reforming scheduled region 6. it can. In the present embodiment, in order to form these seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, etc., conditions are set for the energy amount of the conditions for microcrystallization and the scan speed of the substrate 1 to be processed. Has been done.
　また、制御部１４は、上記位置情報に基づいて、レーザ光源部１２およびレーザビーム照射部１３を駆動制御して、改質予定領域６に対して第２照射を行うように設定されている。具体的には、上記の種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６などを起点として、第２のレーザ光としてのＣＷレーザ光のビームスポットを改質予定領域６側に位置する非晶質シリコン膜５の表面に投影させる。その後、ビームスポットの軌跡が改質予定領域６内を網羅して移動するように設定されている。なお、第２照射によってＣＷレーザ光のビームスポットが改質予定領域６を網羅するように移動させる方法については、後述するレーザアニール方法において説明する。 Further, the control unit 14 is set to drive and control the laser light source unit 12 and the laser beam irradiation unit 13 based on the position information so as to perform the second irradiation on the modification target area 6. Specifically, starting from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, etc., the beam spot of the CW laser light as the second laser light is located on the side of the non-modified region 6 side. It is projected on the surface of the crystalline silicon film 5. After that, the locus of the beam spot is set so as to cover the reforming target area 6 and move. A method of moving the beam spot of the CW laser light so as to cover the modification target area 6 by the second irradiation will be described in the laser annealing method described later.
　この第２照射によって、改質予定領域６内の非晶質シリコン膜５が結晶化シリコン膜としての疑似単結晶（以下、ラテラル結晶ともいう）シリコン膜５Ｂになるように条件設定されている。なお、この第２照射において、制御部１４は、ＣＷレーザ光源１５から発振されたＣＷレーザ光をＯＮ－ＯＦＦ信号発生器１６をＯＦＦ状態として光出射部１７から直接連続照射するように制御する。 By the second irradiation, conditions are set so that the amorphous silicon film 5 in the modified region 6 becomes a pseudo single crystal (hereinafter also referred to as lateral crystal) silicon film 5B as a crystallized silicon film. In this second irradiation, the control unit 14 controls so that the CW laser light oscillated from the CW laser light source 15 is continuously irradiated directly from the light emitting unit 17 with the ON-OFF signal generator 16 in the OFF state.
　図４は、非晶質シリコン膜５に対してレーザ光を照射したときに形成される結晶構造が成立する条件の領域を、照射するレーザ光のパワー密度条件と、非晶質シリコン膜（被処理基板）側のスキャン速度条件と、の観点から示すマップである。本実施の形態に係るレーザアニール装置１０は、図４に示すような内容のマップが格納された図示しない記憶手段を備える。制御部１４は、随時このマップを参照して、第１照射と第２照射を行う。 FIG. 4 shows a region where the crystal structure formed when the amorphous silicon film 5 is irradiated with the laser light is satisfied and the power density condition of the laser light to be irradiated and the amorphous silicon film (covered). It is a map shown from the viewpoint of the scanning speed condition on the processing substrate side. The laser annealing apparatus 10 according to the present embodiment includes a storage unit (not shown) in which a map having the contents shown in FIG. 4 is stored. The control unit 14 refers to this map at any time to perform the first irradiation and the second irradiation.
　具体的には、制御部１４は、第１照射に際して、被処理基板１のスキャン速度およびレーザ光源部１２から出射するレーザ光ＰＬ（図５参照）のパワー密度が、図４に示すマップにおける微結晶領域の成立する条件になるように制御する。制御部１４は、第２照射に際して、被処理基板１のスキャン速度およびレーザ光源部１２から出射するＣＷレーザ光ＣＷＬ（図６参照）のパワー密度が、図４に示すマップにおけるラテラル結晶（疑似単結晶）領域の成立する条件になるように制御する。 Specifically, during the first irradiation, the control unit 14 determines that the scan speed of the substrate to be processed 1 and the power density of the laser light PL (see FIG. 5) emitted from the laser light source unit 12 are small in the map shown in FIG. The control is performed so that the crystal region is satisfied. At the time of the second irradiation, the control unit 14 controls the scanning speed of the substrate 1 to be processed and the power density of the CW laser light CWL (see FIG. 6) emitted from the laser light source unit 12 from the lateral crystal (pseudo single crystal) in the map shown in FIG. The control is performed so that the conditions for the (crystal) region are satisfied.
　以上、本実施の形態に係るレーザアニール方法で用いる被処理基板１およびレーザアニール装置１０について説明したが、以下に、これらを用いたレーザアニール方法および薄膜トランジスタの製造方法について説明する。 The substrate 1 to be processed and the laser annealing apparatus 10 used in the laser annealing method according to the present embodiment have been described above, but the laser annealing method and the method of manufacturing a thin film transistor using these are described below.
（レーザアニール方法および薄膜トランジスタの製造方法）　以下、本実施の形態に係るレーザアニール方法および薄膜トランジスタの製造方法を、図１のフローチャートを用いて説明する。なお、本実施の形態に係るレーザアニール方法は、薄膜トランジスタの製造方法に含めて説明する。本実施の形態に係るレーザアニール方法は、以下に説明する第１照射工程（ステップ４）と第２照射工程（ステップ５）とで構成されている（図１参照）。 (Laser Annealing Method and Thin Film Transistor Manufacturing Method) Hereinafter, the laser annealing method and the thin film transistor manufacturing method according to the present embodiment will be described with reference to the flowchart of FIG. The laser annealing method according to the present embodiment will be described by including it in the method of manufacturing a thin film transistor. The laser annealing method according to this embodiment includes a first irradiation step (step 4) and a second irradiation step (step 5) described below (see FIG. 1).
　まず、図８－１の工程平面図に示すように、ガラス基板２の上に複数のゲート配線３が平行をなすように形成する。その後、図２および図８－２に示すように、ゲート配線３が形成されたガラス基板２の全面に非晶質シリコン膜５を形成して被処理基板（ゲート基板）１を作製する（ステップ１）。 First, as shown in the process plan view of FIG. 8-1, a plurality of gate wirings 3 are formed on the glass substrate 2 in parallel. After that, as shown in FIGS. 2 and 8-2, an amorphous silicon film 5 is formed on the entire surface of the glass substrate 2 on which the gate wiring 3 is formed, and a substrate to be processed (gate substrate) 1 is manufactured (step). 1).
　次に、被処理基板１を洗浄する（ステップ２）。洗浄した被処理基板１の非晶質シリコン膜５は、水素を含んでいるため、例えば、約４５０℃で数時間程度の脱水素処理を行う（ステップ３）。 Next, the substrate 1 to be processed is washed (step 2). Since the cleaned amorphous silicon film 5 of the substrate 1 to be processed contains hydrogen, for example, dehydrogenation processing is performed at about 450° C. for several hours (step 3).
　図２に示すように、被処理基板１をレーザアニール装置１０の基台１１の上にセットして、搬送方向Ｔに沿って所定のスキャン速度で走行させる。 As shown in FIG. 2, the substrate 1 to be processed is set on the base 11 of the laser annealing apparatus 10 and is moved along the transport direction T at a predetermined scan speed.
　次に、第１照射工程を行う（ステップ４）。このステップ４において、制御部１４は、図８－３に示すように、改質予定領域６の位置情報に基づいて改質予定領域６が所定の位置に到達したときに、ＤＭＤ１８へ駆動信号を出力する。駆動信号に基づいて、上記駆動信号が入力されたＤＭＤ１８は、予め設定した列のマイクロミラー２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６をオン状態にする。 Next, the first irradiation process is performed (step 4). In step 4, as shown in FIG. 8-3, the control unit 14 sends a drive signal to the DMD 18 when the scheduled reforming region 6 reaches a predetermined position based on the positional information of the reforming scheduled region 6. Output. Based on the drive signal, the DMD 18 to which the drive signal is input turns on the micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 in the preset columns.
　図５は、列をなす複数のマイクロミラー２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６のオン状態（オン状態のマイクロミラー２３には斜線を付す）を示す。
この状態で、レーザ光源部１２から出射されたパルスレーザ光でなるレーザビームＬＢは、これらマイクロミラー２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６で反射されたレーザビームＬＢｄ１，ＬＢｄ２，ＬＢｄ３，ＬＢｄ４，ＬＢｄ５，ＬＢｄ６となる。これらレーザビームＬＢｄ１，ＬＢｄ２，ＬＢｄ３，ＬＢｄ４，ＬＢｄ５，ＬＢｄ６は、図５に示すレーザ光ＰＬであり改質予定領域６の一辺部（搬送方向Ｔの下流側の縁部）近傍に一列をなすように入射する。 FIG. 5 shows an ON state of the plurality of micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 in a row (the micromirrors 23 in the ON state are shaded).
In this state, the laser beam LB composed of the pulsed laser light emitted from the laser light source unit 12 is the laser beams LBd1, LBd2, LBd3, LBd4, which are reflected by the micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6. LBd5 and LBd6. These laser beams LBd1, LBd2, LBd3, LBd4, LBd5 and LBd6 are the laser light PL shown in FIG. Incident on.
　この結果、図５および図８－４に示すように、改質予定領域６の外側の領域であって、この改質予定領域６における搬送方向Ｔの下流側端縁部に沿って、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６が形成される。これら種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６は、非晶質シリコン膜５が微結晶シリコンに変化したものである。なお、これら種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６の表面は、凹凸構造を有する。 As a result, as shown in FIGS. 5 and 8-4, the seed crystal is a region outside the reforming scheduled region 6 and along the downstream edge of the reforming scheduled region 6 in the transport direction T. Regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are formed. In these seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, the amorphous silicon film 5 is changed to microcrystalline silicon. The surface of these seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 has an uneven structure.
　次に、第２照射工程を行う（ステップ５）。図６、図７、および図８－５は、第２照射工程を示している。上記第１照射工程の終了直後、制御部１４は、改質予定領域６の位置情報に基づいて、レーザ光源部１２およびレーザビーム照射部１３を駆動制御して、改質予定領域６に対して第２照射を開始する。 Next, the second irradiation process is performed (step 5). FIG. 6, FIG. 7, and FIG. 8-5 show the second irradiation step. Immediately after the completion of the first irradiation step, the control unit 14 drives and controls the laser light source unit 12 and the laser beam irradiation unit 13 based on the position information of the reforming scheduled area 6 to control the reforming scheduled area 6. The second irradiation is started.
　図６に示すように、この第２照射工程は、上記の種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を起点として、第２のレーザ光としてのＣＷレーザ光ＣＷＬのビームスポットを非晶質シリコン膜５の表面に投影させてアニールを行う。図６および図７は、第２照射にも用いる複数のマイクロミラー２３Ａ１，２３Ａ２，２３Ａ３，２３Ａ４，２３Ａ５，２３Ａ６のオン状態（オン状態のマイクロミラー２３には格子状の斜線を付す）を示す。このとき、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を構成する微結晶シリコンが種結晶として機能して、非晶質シリコン膜５が疑似単結晶（ラテラル結晶）化することを促進させて良質な疑似単結晶シリコン膜５Ｂが形成できる。 As shown in FIG. 6, in the second irradiation step, the beam spot of the CW laser light CWL serving as the second laser light is set to a non-beam spot starting from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6. Annealing is performed by projecting on the surface of the crystalline silicon film 5. FIG. 6 and FIG. 7 show the ON state of the plurality of micromirrors 23A1, 23A2, 23A3, 23A4, 23A5, 23A6 that are also used for the second irradiation (the micromirrors 23 in the ON state are shaded in a grid pattern). At this time, the microcrystalline silicon forming the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 functions as a seed crystal to promote the amorphous silicon film 5 to become a pseudo single crystal (lateral crystal). As a result, a high quality pseudo single crystal silicon film 5B can be formed.
　図７に示すように、それぞれのＣＷレーザ光ＣＷＬのビームスポットの軌跡が改質予定領域６の搬送方向Ｔの上流側の縁部（一辺）まで到達するまで第２照射を行う。この結果、図７および図８－５に示すように、改質予定領域６の全体に疑似単結晶シリコン膜５Ｂを成長させることができる。 As shown in FIG. 7, the second irradiation is performed until the trajectory of the beam spot of each CW laser light CWL reaches the edge (one side) on the upstream side in the transport direction T of the modification target area 6. As a result, as shown in FIGS. 7 and 8-5, the pseudo single crystal silicon film 5B can be grown on the entire region 6 to be modified.
　上記ステップ４およびステップ５を経て形成された疑似単結晶シリコン膜５Ｂは、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を起点として、改質予定領域６の全体に疑似単結晶シリコン膜５Ｂでなるラテラル結晶膜が均一に形成される。疑似単結晶シリコン膜５Ｂは、移動度（電子移動度）が大きく高移動度のＴＦＴの作製に適する。 The pseudo single crystal silicon film 5B formed through the above steps 4 and 5 starts from the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, and the pseudo single crystal silicon film is formed over the entire region 6 to be modified. A lateral crystal film of 5B is uniformly formed. The pseudo single crystal silicon film 5B has a large mobility (electron mobility) and is suitable for manufacturing a high mobility TFT.
　なお、図５から図７に示すように、このレーザアニール方法では、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６同士が間隔を置くように設定することにより、疑似単結晶シリコン膜５Ｂがゲート配線３の幅方向に成長し易くなる。 As shown in FIGS. 5 to 7, in this laser annealing method, the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are set so as to be spaced apart from each other, so that the pseudo single crystal silicon film 5B is formed. Easily grow in the width direction of the gate wiring 3.
　次に、図８－６に示すように、ステップ５を経て疑似単結晶シリコン膜５Ｂが形成された後、基板全面に金属膜７を、例えば、蒸着法にて形成する（ステップ６）。なお、この金属膜７の材料は、例えば、アルミニウム（Ａｌ）合金などである。 Next, as shown in FIG. 8-6, after the pseudo single crystal silicon film 5B is formed through step 5, the metal film 7 is formed on the entire surface of the substrate by, for example, the vapor deposition method (step 6). The material of the metal film 7 is, for example, an aluminum (Al) alloy.
　その後、金属膜７の上に、フォトリソグラフィー技術を用いて図示しないエッチング用マスクを形成する（ステップ７）。このエッチング用マスクは、金属膜７をソース・ドレイン電極に形成するためのレジストマスクである。 After that, an etching mask (not shown) is formed on the metal film 7 by using a photolithography technique (step 7). This etching mask is a resist mask for forming the metal film 7 on the source/drain electrodes.
　次に、図示しないエッチング用マスクを用いて、例えば、エッチャントとして混酸系のエッチング液を用いたウェットエッチングを行って、エッチング用マスクから露出する金属膜と、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を含む非晶質シリコン膜５の露出する領域を除去する（ステップ８）。 Next, using an etching mask (not shown), for example, wet etching using a mixed acid type etching solution as an etchant is performed to expose the metal film exposed from the etching mask and the seed crystal regions 5A1, 5A2, 5A3, 5A4. , 5A5, 5A6 including the exposed regions of the amorphous silicon film 5 are removed (step 8).
　ステップ８を行った結果、図８－７に示すように、金属膜７は、ソース電極７Ｓとドレイン電極７Ｄとソースライン７ＳＬなどに加工される。また、金属膜７のエッチングに続いて露出する、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を含む非晶質シリコン膜５も、エッチングされる。その結果、図８－７および図９に示すように、その領域の非晶質シリコン膜５が除去されて下地のゲート絶縁膜４が露出する。このようにして、ＴＦＴ８の製造が完了する。 As a result of performing Step 8, the metal film 7 is processed into the source electrode 7S, the drain electrode 7D, the source line 7SL, etc., as shown in FIG. 8-7. Further, the amorphous silicon film 5 including the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 exposed after the etching of the metal film 7 is also etched. As a result, as shown in FIGS. 8-7 and 9, the amorphous silicon film 5 in that region is removed and the underlying gate insulating film 4 is exposed. In this way, the manufacture of the TFT 8 is completed.
　本実施の形態に係る薄膜トランジスタの製造方法では、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を改質予定領域６の外側に形成するため、チャネル半導体層領域となる改質予定領域６内に疑似単結晶シリコン膜５Ｂのみを形成でき、ＴＦＴの性能を高めることができる。 In the method of manufacturing the thin film transistor according to the present embodiment, since the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 are formed outside the modification target area 6, the modification target area 6 to be the channel semiconductor layer area. Only the pseudo single crystal silicon film 5B can be formed inside, and the performance of the TFT can be improved.
　本実施の形態に係る薄膜トランジスタの製造方法では、疑似単結晶シリコン膜（多結晶シリコン膜を種結晶領域から成長させることも可能）を必要な領域に選択的に形成でき、凹凸構造を有する種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６は、後の金属膜７のエッチング工程で削除できる。このため、種結晶領域５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６を除去するための工程を特別に行う必要がない。 In the method of manufacturing a thin film transistor according to this embodiment, a pseudo single crystal silicon film (a polycrystalline silicon film can be grown from a seed crystal region) can be selectively formed in a necessary region, and a seed crystal having an uneven structure can be formed. The regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 can be removed in a later etching process of the metal film 7. Therefore, it is not necessary to perform a special step for removing the seed crystal regions 5A1, 5A2, 5A3, 5A4, 5A5, 5A6.
　特に、本実施の形態に係る薄膜トランジスタの製造方法では、レーザ光ＰＬとして、ＣＷレーザ光ＣＷＬをＯＮ－ＯＦＦ信号発生器１６でＯＮ－ＯＦＦ変調して用いるため、１つのレーザ光源部１２において、レーザ光ＰＬとＣＷレーザ光ＣＷＬとを実現でき、第１照射工程と第２照射工程とを１つの装置で円滑に行えるという効果がある。 In particular, in the method of manufacturing a thin film transistor according to the present embodiment, since the CW laser light CWL is used as the laser light PL after being ON-OFF modulated by the ON-OFF signal generator 16, the laser light PL is used in one laser light source unit 12. There is an effect that the light PL and the CW laser light CWL can be realized, and the first irradiation step and the second irradiation step can be smoothly performed by one device.
　本実施の形態に係る薄膜トランジスタの製造方法によれば、改質予定領域６がＴＦＴのチャネル半導体層領域であるため、第２照射を経て形成された疑似単結晶シリコン膜５Ｂをそのままチャネル半導体層領域として用いることができる。したがって、本実施の形態によれば、チャネル半導体層領域を形成するための、フォトリソグラフィー工程やウェットエッチング工程などのパターニング工程、パターニング工程後のリンス・洗浄工程などが不要となり、ＴＦＴ基板の製造プロセスを大幅に削減できる。 According to the method of manufacturing a thin film transistor according to the present embodiment, since the modified region 6 is the channel semiconductor layer region of the TFT, the pseudo single crystal silicon film 5B formed after the second irradiation is directly used as the channel semiconductor layer region. Can be used as Therefore, according to the present embodiment, a patterning step such as a photolithography step or a wet etching step for forming the channel semiconductor layer region, a rinsing/cleaning step after the patterning step, etc. are unnecessary, and the manufacturing process of the TFT substrate is eliminated. Can be significantly reduced.
　本実施の形態に係る薄膜トランジスタの製造方法では、空間光変調器としてＤＭＤ１８を用いることにより、マイクロミラー２３のオン・オフ動作だけで、レーザビームを改質予定領域６の幅方向に対して漸次連続するようにアニールを進行させることができる。このため、被処理基板１を幅方向に移動させたり、レーザビーム照射部１３を被処理基板１の幅方向に移動させたりする必要がない。 In the method of manufacturing the thin film transistor according to the present embodiment, the DMD 18 is used as the spatial light modulator, so that the laser beam is gradually continuous in the width direction of the modification target region 6 only by the on/off operation of the micromirror 23. Annealing can proceed as described above. Therefore, it is not necessary to move the substrate 1 to be processed in the width direction or move the laser beam irradiation unit 13 in the width direction of the substrate 1 to be processed.
（レーザアニール方法に用いる他のレーザアニール装置）　図１０および図１１は、本発明の実施の形態に係るレーザアニール方法に用いることができるＭＬＡレーザアニール装置の結像光学系を示す。なお、このＭＬＡレーザアニール装置の他の構成は、上記したレーザアニール装置１０と同様であるため、その説明を省略する。 (Other Laser Annealing Device Used in Laser Annealing Method) FIGS. 10 and 11 show an imaging optical system of an MLA laser annealing device that can be used in the laser annealing method according to the embodiment of the present invention. The rest of the configuration of this MLA laser annealing apparatus is the same as that of the laser annealing apparatus 10 described above, and therefore its explanation is omitted.
　このＭＬＡレーザアニール装置においては、図２に示すレーザ光源部１２側から出射されたパルスレーザ光でなるレーザビームＬＢがミラー２５で反射され、マスク２６を介してマイクロレンズアレイ２０の対応レンズの真下に改質予定領域６が到達したときに、レーザビームＬＢ２を改質予定領域６に照射するように設定されている。このＭＬＡレーザアニール装置では、本実施の形態におけるレーザアニール方法のステップ４で行う改質予定領域６の外側に種結晶領域を形成する第１照射工程に用いる。 In this MLA laser annealing apparatus, the laser beam LB, which is the pulsed laser light emitted from the laser light source unit 12 side shown in FIG. 2, is reflected by the mirror 25 and directly below the corresponding lens of the microlens array 20 via the mask 26. The laser beam LB2 is set to irradiate the scheduled reforming region 6 when the scheduled reforming region 6 reaches. This MLA laser annealing apparatus is used in the first irradiation step of forming a seed crystal region outside the modification target region 6 performed in step 4 of the laser annealing method in the present embodiment.
　このようなＭＬＡレーザアニール装置では、マイクロレンズアレイ２０を移動することにより、レーザ光の照射位置精度を向上することができる。 In such an MLA laser annealing apparatus, by moving the microlens array 20, it is possible to improve the irradiation position accuracy of the laser light.
［その他の実施の形態］
　以上、実施の形態について説明したが、この実施の形態の開示の一部をなす論述および図面はこの発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例および運用技術が明らかとなろう。 [Other Embodiments]
Although the embodiments have been described above, it should not be understood that the description and drawings forming part of the disclosure of the embodiments limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.
　例えば、上記の実施の形態では、ＤＭＤ１８を用いたが、空間光変調器としては、光シャッタ機能を有する液晶セル、グレーティングライトバルブ（ＧＬＶ：Grating Light Valve、シリコン・ライト・マシンズ社の登録商標）、薄膜マイクロミラーアレイ（ＴＭＡ：Thin-film Micro mirror Array）などを用いることも可能である。 For example, although the DMD 18 is used in the above embodiment, the spatial light modulator may be a liquid crystal cell having an optical shutter function, a grating light valve (GLV: Grating Light Valve, a registered trademark of Silicon Light Machines, Inc.). It is also possible to use a thin-film micromirror array (TMA).
　上記の実施の形態では、空間光変調器としてＤＭＤ１８を用いたが、空間光変調器を用いずにレーザビームを移動させる他のビーム移動手段を用いる構成としてもよい。 In the above embodiment, the DMD 18 is used as the spatial light modulator, but other beam moving means for moving the laser beam may be used without using the spatial light modulator.
　上記の第１の実施の形態では、ＯＮ－ＯＦＦ信号発生器１６を用いて、レーザ光ＰＬを発生させたが、マイクロミラー２３を高速で振動させてパルス幅変調することにより、第１照射工程に適した低エネルギー密度にしてもよい。 Although the laser beam PL is generated using the ON-OFF signal generator 16 in the first embodiment described above, the first irradiation step is performed by vibrating the micromirror 23 at high speed to perform pulse width modulation. A low energy density suitable for
　上記の実施の形態では、結晶化シリコン膜として、疑似単結晶シリコン膜５Ｂを形成したが、種結晶領域から多結晶シリコン膜を成長させる構成としても勿論よい。この場合も、種結晶領域を起点として、良質な多結晶シリコン膜を形成することが可能となる。なお、多結晶シリコン膜を形成させるための第２のレーザ光としては、ＥＬＡ装置から発振させるエキシマレーザ光を用いることも可能である。 In the above embodiment, the pseudo single crystal silicon film 5B is formed as the crystallized silicon film, but it is of course possible to grow the polycrystalline silicon film from the seed crystal region. Also in this case, it is possible to form a high-quality polycrystalline silicon film starting from the seed crystal region. Note that as the second laser light for forming the polycrystalline silicon film, excimer laser light oscillated from the ELA device can also be used.
　上記の実施の形態では、ＴＦＴの構造として、ガラス基板２の上にゲート配線３がガラス基板２上に形成された所謂ボトムゲートタイプの構造であるが、所謂トップゲートタイプのＴＦＴの製造にも適用することが可能である。 In the above embodiment, the TFT structure is a so-called bottom gate type structure in which the gate wiring 3 is formed on the glass substrate 2 on the glass substrate 2. It is possible to apply.
　ＣＷＬ　ＣＷレーザ光
　ＬＢ　レーザビーム
　ＰＬ　レーザ光
　Ｔ　搬送方向
　Ｗ　幅寸法
　１　被処理基板
　２　ガラス基板
　３　ゲート配線
　４　ゲート絶縁膜
　５　非晶質シリコン膜
　５Ａ１，５Ａ２，５Ａ３，５Ａ４，５Ａ５，５Ａ６　種結晶領域
　５Ｂ　疑似単結晶シリコン（結晶化シリコン）膜
　６　改質予定領域
　７　金属膜
　８　薄膜トランジスタ（ＴＦＴ）
　１０　レーザアニール装置
　１１　基台
　１２　レーザ光源部
　１３　レーザビーム照射部
　１４　制御部
　１５　ＣＷレーザ光源
　１６　ＯＮ－ＯＦＦ信号発生器
　１７　光出射部
　１８　デジタルマイクロミラーデバイス（ＤＭＤ、空間光変調器）
　１９　ダンパ
　２０　マイクロレンズアレイ
　２１　投影レンズ
　２２　駆動基板
　２３Ａ１～６　マイクロミラー
　２５　ミラー
　２６　マスク
  CWL CW laser light LB laser beam PL laser light T transport direction W width dimension 1 substrate to be processed 2 glass substrate 3 gate wiring 4 gate insulating film 5 amorphous silicon film 5A1, 5A2, 5A3, 5A4, 5A5, 5A6 seed crystal region 5B Pseudo-single crystal silicon (crystallized silicon) film 6 Area to be modified 7 Metal film 8 Thin film transistor (TFT)
10 Laser Annealing Device 11 Base 12 Laser Light Source 13 Laser Beam Irradiator 14 Controller 15 CW Laser Light Source 16 ON-OFF Signal Generator 17 Light Emitting Unit 18 Digital Micromirror Device (DMD, Spatial Light Modulator)
19 Damper 20 Microlens Array 21 Projection Lens 22 Driving Substrate 23A1-6 Micromirror 25 Mirror 26 Mask

Claims (15)

  1. 　非晶質シリコン膜の改質を行う改質予定領域にレーザ光を照射して前記改質予定領域を結晶化シリコン膜に改質させるレーザアニール方法であって、
    　前記改質予定領域の外側の前記非晶質シリコン膜に微結晶シリコンでなる種結晶領域を形成する第１のレーザ光の照射を行う第１照射工程と、
    　前記種結晶領域を起点として、前記非晶質シリコン膜の表面に第２のレーザ光の照射を行って前記改質予定領域内の前記非晶質シリコン膜が前記結晶化シリコン膜になるように結晶成長させる第２照射工程と、
    　を備えるレーザアニール方法。     A laser annealing method of irradiating a modification target region for modifying an amorphous silicon film with laser light to modify the modification target region into a crystallized silicon film,
    A first irradiation step of irradiating a first laser beam for forming a seed crystal region made of microcrystalline silicon on the amorphous silicon film outside the region to be modified;
    The surface of the amorphous silicon film is irradiated with a second laser beam with the seed crystal region as a starting point so that the amorphous silicon film in the reforming scheduled region becomes the crystallized silicon film. A second irradiation step for crystal growth,
    A laser annealing method comprising:
  2. 　前記非晶質シリコン膜は、表面にゲート配線が形成された基板の上に、ゲート絶縁膜を介して成膜されており、
    　前記改質予定領域は、前記ゲート配線に重なる領域に形成された前記非晶質シリコン膜に設定された薄膜トランジスタのチャネル半導体層となる領域であり、
    　前記種結晶領域は、前記ゲート配線の長手方向に直交する方向の外側に配置される
    　請求項１に記載のレーザアニール方法。     The amorphous silicon film is formed on a substrate having a gate wiring formed on its surface via a gate insulating film,
    The region to be modified is a region to be a channel semiconductor layer of a thin film transistor set in the amorphous silicon film formed in a region overlapping with the gate wiring,
    The laser annealing method according to claim 1, wherein the seed crystal region is arranged outside a direction orthogonal to a longitudinal direction of the gate wiring.
  3. 　前記第１照射工程の前記第１のレーザ光の照射における照射エネルギー量は、前記非晶質シリコン膜が種結晶として微結晶化する条件に設定し、
    　前記第２照射工程の前記第２のレーザ光の照射は、連続発振レーザ光を用いて連続照射する
    　請求項１または請求項２に記載のレーザアニール方法。     The irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition that the amorphous silicon film is microcrystallized as a seed crystal,
    The laser annealing method according to claim 1 or 2, wherein the irradiation of the second laser light in the second irradiation step is continuous irradiation using continuous wave laser light.
  4. 　前記第１のレーザ光は、前記第２照射工程で用いる前記連続発振レーザ光をＯＮ－ＯＦＦ変調して照射する
    　請求項３に記載のレーザアニール方法。     The laser annealing method according to claim 3, wherein the continuous wave laser light used in the second irradiation step is ON-OFF modulated and is irradiated with the first laser light.
  5. 　前記第１照射工程と前記第２照射工程は、レーザ光を選択的に反射させてレーザビームを前記改質予定領域内へ選択的に照射させる空間光変調器と、を用いて行う
    　請求項１から請求項４のいずれか一項に記載のレーザアニール方法。     The first irradiation step and the second irradiation step are performed by using a spatial light modulator that selectively reflects laser light to selectively irradiate a laser beam into the reforming scheduled region. 5. The laser annealing method according to claim 4.
  6. 　前記空間光変調器は、多数のマイクロミラーがマトリクス状に配置され、該マイクロミラーのそれぞれが個別に、前記非晶質シリコン膜の表面へのレーザビームの照射状態と非照射状態とに切り換え可能に選択駆動される
    　請求項５に記載のレーザアニール方法。     In the spatial light modulator, a large number of micromirrors are arranged in a matrix, and each of the micromirrors can be individually switched between a laser beam irradiation state and a non-irradiation state on the surface of the amorphous silicon film. The laser annealing method according to claim 5, wherein the laser annealing method is selectively driven.
  7. 　前記第１照射工程は、複数のマイクロレンズがマトリクス状に配置されたマイクロレンズアレイを用いて前記改質予定領域の外側へ複数のレーザパルスビームを照射し、前記第２照射工程は、前記マイクロレンズアレイを用いて前記改質予定領域へ複数の前記連続発振レーザ光のレーザビームを照射する
    　請求項１から請求項４のいずれか一項に記載のレーザアニール方法。     The first irradiating step irradiates a plurality of laser pulse beams to the outside of the modification target area using a microlens array in which a plurality of microlenses are arranged in a matrix, and the second irradiating step comprises The laser annealing method according to any one of claims 1 to 4, wherein a plurality of laser beams of the continuous wave laser light are applied to the modification target area using a lens array.
  8. 　前記結晶化シリコン膜は、多結晶シリコン膜、疑似単結晶シリコン膜から選ばれる
    　請求項１から請求項７のいずれか一項に記載のレーザアニール方法。     The laser annealing method according to any one of claims 1 to 7, wherein the crystallized silicon film is selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
  9. 　基板上に、順次、ゲート配線と、ゲート絶縁膜と、非晶質シリコン膜と、が形成されてなるゲート基板における、前記非晶質シリコン膜に設定したチャネル半導体層となる改質予定領域の外側で、かつ前記ゲート配線に対して当該ゲート配線の長手方向に直交する方向の外側に、第１のレーザ光の照射を行って微結晶シリコンでなる種結晶領域を形成する第１照射工程と、
    　前記種結晶領域を起点として、前記非晶質シリコン膜の表面に第２のレーザ光の照射を行って前記改質予定領域内の前記非晶質シリコン膜が結晶化シリコン膜になるように結晶成長させる第２照射工程と、
    　前記第２照射工程が施された前記非晶質シリコン膜の上に全面に金属膜を成膜する工程と、
    　前記金属膜上にソース配線およびドレイン配線となる領域のエッチング用マスクをパターニングする工程と、
    　前記エッチング用マスクを用いてエッチングを行って、前記エッチング用マスクで覆われずに露出する前記金属膜と、前記金属膜のエッチング後に露出する前記種結晶領域を含む非晶質シリコン膜と、を除去する
    　薄膜トランジスタの製造方法。     In a gate substrate formed by sequentially forming a gate wiring, a gate insulating film, and an amorphous silicon film on a substrate, a region to be modified which will be a channel semiconductor layer set in the amorphous silicon film is formed. A first irradiation step of forming a seed crystal region made of microcrystalline silicon by irradiating a first laser beam on the outer side and on the outer side in a direction orthogonal to the longitudinal direction of the gate wiring with respect to the gate wiring; ,
    A second laser beam is irradiated onto the surface of the amorphous silicon film starting from the seed crystal region to crystallize the amorphous silicon film in the modification-targeted region into a crystallized silicon film. A second irradiation step for growing,
    Forming a metal film over the entire surface of the amorphous silicon film that has been subjected to the second irradiation step;
    Patterning an etching mask on a region to be a source wiring and a drain wiring on the metal film;
    Etching is performed using the etching mask to expose the metal film exposed without being covered with the etching mask, and an amorphous silicon film including the seed crystal region exposed after etching the metal film. Method for manufacturing thin film transistor to be removed.
  10. 　前記第１照射工程の前記第１のレーザ光の照射における照射エネルギー量は、前記非晶質シリコン膜が種結晶として微結晶化する条件に設定し、
    　前記第２照射工程の前記第２のレーザ光の照射は、連続発振レーザ光を用いて連続照射する
    　請求項９に記載の薄膜トランジスタの製造方法。     The irradiation energy amount in the irradiation of the first laser light in the first irradiation step is set to a condition that the amorphous silicon film is microcrystallized as a seed crystal,
    The method of manufacturing a thin film transistor according to claim 9, wherein the irradiation of the second laser light in the second irradiation step is continuous irradiation using continuous wave laser light.
  11. 　前記第１のレーザ光は、前記第２照射工程で用いる前記連続発振レーザ光をＯＮ－ＯＦＦ変調して照射する
    　請求項１０に記載の薄膜トランジスタの製造方法。     The method of manufacturing a thin film transistor according to claim 10, wherein the first laser light is ON-OFF modulated and irradiated with the continuous wave laser light used in the second irradiation step.
  12. 　前記第１照射工程と前記第２照射工程は、レーザ光を選択的に反射させてレーザビームを前記改質予定領域内へ選択的に照射させる空間光変調器と、を用いて行う
    　請求項９から請求項１１のいずれか一項に記載の薄膜トランジスタの製造方法。     The spatial light modulator which selectively reflects a laser beam and selectively irradiates a laser beam into the area to be modified is performed in the first irradiation step and the second irradiation step. 12. The method of manufacturing a thin film transistor according to claim 11.
  13. 　前記空間光変調器は、多数のマイクロミラーがマトリクス状に配置され、該マイクロミラーのそれぞれが個別に、前記非晶質シリコン膜の表面へのレーザビームの照射状態と非照射状態とに切り換え可能に選択駆動される
    　請求項１２に記載の薄膜トランジスタの製造方法。     In the spatial light modulator, a large number of micromirrors are arranged in a matrix, and each of the micromirrors can be individually switched between a laser beam irradiation state and a non-irradiation state on the surface of the amorphous silicon film. 13. The method for manufacturing a thin film transistor according to claim 12, wherein the thin film transistor is selectively driven.
  14. 　前記第１照射工程は、複数のマイクロレンズがマトリクス状に配置されたマイクロレンズアレイを用いて前記改質予定領域の外側へ複数のレーザ変調ビームを照射し、前記第２照射工程は、前記マイクロレンズアレイを用いて前記改質予定領域へ複数の前記連続発振レーザ光のレーザビームを照射する
    　請求項９から請求項１１のいずれか一項に記載の薄膜トランジスタの製造方法。     In the first irradiation step, a plurality of laser modulated beams are irradiated to the outside of the modification target area using a microlens array in which a plurality of microlenses are arranged in a matrix, and in the second irradiation step, the microlens array is used. The method for manufacturing a thin film transistor according to claim 9, wherein a plurality of laser beams of the continuous wave laser light are applied to the area to be modified using a lens array.
  15. 　前記結晶化シリコン膜は、多結晶シリコン膜、疑似単結晶シリコン膜から選ばれる
    　請求項９から請求項１４のいずれか一項に記載の薄膜トランジスタの製造方法。
          The method for manufacturing a thin film transistor according to claim 9, wherein the crystallized silicon film is selected from a polycrystalline silicon film and a pseudo single crystal silicon film.
PCT/JP2019/047135 2018-12-18 2019-12-03 Laser anneal method and method for manufacturing thin-film transistor WO2020129600A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201980076602.6A CN113169050A (en) 2018-12-18 2019-12-03 Laser annealing method and method for manufacturing thin film transistor
KR1020217008104A KR20210103457A (en) 2018-12-18 2019-12-03 Laser annealing method and thin film transistor manufacturing method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018236398A JP2020098867A (en) 2018-12-18 2018-12-18 Laser annealing method and method for manufacturing thin film transistor
JP2018-236398 2018-12-18

Publications (1)

Publication Number Publication Date
WO2020129600A1 true WO2020129600A1 (en) 2020-06-25

Family

ID=71101443

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/047135 WO2020129600A1 (en) 2018-12-18 2019-12-03 Laser anneal method and method for manufacturing thin-film transistor

Country Status (5)

Country Link
JP (1) JP2020098867A (en)
KR (1) KR20210103457A (en)
CN (1) CN113169050A (en)
TW (1) TW202036679A (en)
WO (1) WO2020129600A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113634900A (en) * 2021-07-21 2021-11-12 上海理工大学 Method for preparing nickel-based alloy directional twins by using additive manufacturing technology

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01276617A (en) * 1988-04-27 1989-11-07 Seiko Epson Corp Manufacture of semiconductor device
JP2003163165A (en) * 2001-11-28 2003-06-06 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device
JP2003218027A (en) * 2002-01-18 2003-07-31 Sumitomo Heavy Ind Ltd Method of growing crystal and laser annealing apparatus
JP2004342875A (en) * 2003-05-16 2004-12-02 Fuji Photo Film Co Ltd Laser annealing device
JP2006156676A (en) * 2004-11-29 2006-06-15 Sumitomo Heavy Ind Ltd Laser anneal method
JP2008015523A (en) * 2006-06-30 2008-01-24 Lg Phillips Lcd Co Ltd Method for fabricating liquid crystal display device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5471046B2 (en) 2009-06-03 2014-04-16 株式会社ブイ・テクノロジー Laser annealing method and laser annealing apparatus

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01276617A (en) * 1988-04-27 1989-11-07 Seiko Epson Corp Manufacture of semiconductor device
JP2003163165A (en) * 2001-11-28 2003-06-06 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device
JP2003218027A (en) * 2002-01-18 2003-07-31 Sumitomo Heavy Ind Ltd Method of growing crystal and laser annealing apparatus
JP2004342875A (en) * 2003-05-16 2004-12-02 Fuji Photo Film Co Ltd Laser annealing device
JP2006156676A (en) * 2004-11-29 2006-06-15 Sumitomo Heavy Ind Ltd Laser anneal method
JP2008015523A (en) * 2006-06-30 2008-01-24 Lg Phillips Lcd Co Ltd Method for fabricating liquid crystal display device

Also Published As

Publication number Publication date
TW202036679A (en) 2020-10-01
KR20210103457A (en) 2021-08-23
CN113169050A (en) 2021-07-23
JP2020098867A (en) 2020-06-25

Similar Documents

Publication Publication Date Title
US7352002B2 (en) Semiconductor device including semiconductor thin films having different crystallinity, substrate of the same, and manufacturing method of the same, and liquid crystal display and manufacturing method of the same
JP2004311935A (en) Method for making single crystal silicon film
JP6781872B2 (en) Manufacturing method of laser irradiation device and thin film transistor
WO2017145519A1 (en) Laser annealing method, laser annealing device and thin film transistor substrate
JP5800292B2 (en) Laser processing equipment
WO2020137399A1 (en) Laser annealing method and laser annealing device
WO2017067336A1 (en) Array substrate, manufacturing method therefor, display panel, and display apparatus
WO2020129600A1 (en) Laser anneal method and method for manufacturing thin-film transistor
WO2020158464A1 (en) Laser annealing method and laser annealing apparatus
CN110998795A (en) Laser irradiation device, method for manufacturing thin film transistor, and projection mask
JP2010034366A (en) Semiconductor processing apparatus, and semiconductor processing method
JP2006504262A (en) Polycrystallization method, polycrystalline silicon thin film transistor manufacturing method, and laser irradiation apparatus therefor
WO2020129562A1 (en) Laser annealing apparatus
WO2020129601A1 (en) Laser annealing method and laser annealing apparatus
WO2018092218A1 (en) Laser irradiation device, thin-film transistor and thin-film transistor manufacturing method
JP4763983B2 (en) Light modulation element, crystallization apparatus, crystallization method, thin film semiconductor substrate manufacturing apparatus, thin film semiconductor substrate manufacturing method, thin film semiconductor device, thin film semiconductor device manufacturing method, display device, and phase shifter
JP7161758B2 (en) Laser annealing equipment
WO2020158424A1 (en) Laser annealing method, laser annealing device, and crystallized silicon film substrate
US20200168642A1 (en) Laser irradiation device, projection mask, laser irradiation method, and program
WO2019107108A1 (en) Laser irradiation device, laser irradiation method, and projection mask
JP2006054223A (en) Crystallization method of semiconductor thin film, substrate having crystallized semiconductor thin film, and crystallization device of semiconductor thin film
JP2007299911A (en) Method of manufacturing semiconductor film
JP2008205046A (en) Thin-film transistor and manufacturing method thereof
JP2006024753A (en) Thin-film transistor, manufacturing method thereof, manufacturing method of semiconductor device, and display device
JP2000349036A (en) Semiconductor treatment method and manufacture of semiconductor device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19901315

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19901315

Country of ref document: EP

Kind code of ref document: A1